From patchwork Tue Mar 11 07:34:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pinkesh Vaghela X-Patchwork-Id: 14011242 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A23D7C28B2E for ; Tue, 11 Mar 2025 07:36:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/X7NrIHilZOyMAdgMb205cnnWj1lkI+YmCPn9Oqpi/U=; b=sC5kjnhJT/+Qfk 3YixH7s6MJZTxxlzq/Y9P3/WL9Hjs4kGXYVyROuGhj/dtd8XJ8GSWEtJewqfMUn+duDTbKJkrNP/1 Mtu53TK3RVDbAbCwpbStPZ2JPqMv6XaTqyB8E5IX3EwFD8IBl+ow0pVY3GjrjIArdpzpLeoEksuU5 XSEZ6EHVvge++QAwkohw1Ql3iCC4JqXs6GIfh7lgnBZIIf3vZYiGTWbx5uHYTY8eIAFx7Sg8G2G6g l1ZzuwwErLNnTWQXG7peTP+hAtxZQmWSj6Y+/Z0WZx2qOE1jsnqzWIL2VoZ0DQb5bdHbzhHeX+y5/ 99ozzJTmrNw+u23JiAXQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tru9c-00000004qzA-0uYQ; Tue, 11 Mar 2025 07:35:56 +0000 Received: from naesa03.arrow.com ([216.150.161.23]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tru8N-00000004qdd-1nHO for linux-riscv@lists.infradead.org; Tue, 11 Mar 2025 07:34:40 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=einfochips.com; i=@einfochips.com; l=931; q=dns/txt; s=NAESA-Selector1; t=1741678479; x=1773214479; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OYF7/55p2x4bh2lBVQC558u/lk/ZKZ7jhSldjLUhz/s=; b=rfwJZSqOQW7QbGdMfE4TzP+cvjwXbGSuWCZItvyGBK/ShUTzAkT5LwQB WGVQbzmBjV7vry1DmvCTHhRJS9AYtO1zy3HNi4co9gFR2SKpSe0o7pA1U nD+Q0Gl32AAy3OuO3EnS2qb8tWOiExu8n82FdIp6mGSPntOLdxDeUFBJv qpSiqmwDHIBFUsgVz9vxmICnzn1IaTMNdYZF8fKqsq2BNSJpiOOh3YUZl Vym4JHwbOkN695sbT7FUKo+5Zp9jcriq23EncBjuf0bLVYd2FULbMSr2u Glo8AK21vFRWPu/Vq7JWP1k75oUGSvswPrNi+dwUYhzMnCjzrr5brjkMk Q==; X-CSE-ConnectionGUID: eoryC8u/QzSlXoUygPUgRA== X-CSE-MsgGUID: Zmvlro/aRLalypvOaBCORw== X-IronPort-AV: E=Sophos;i="6.14,238,1736838000"; d="scan'208";a="79624703" Received: from unknown (HELO eicahmirelay01.einfochips.com) ([10.100.49.50]) by naesa03out.arrow.com with ESMTP; 11 Mar 2025 01:34:35 -0600 Received: from AHMCPU1888.ap.corp.arrow.com ([172.25.5.100]) by eicahmirelay01.einfochips.com with Microsoft SMTPSVC(10.0.14393.4169); Tue, 11 Mar 2025 13:04:32 +0530 From: Pinkesh Vaghela To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner Cc: Paul Walmsley , Samuel Holland , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Min Lin , Pinkesh Vaghela , Pritesh Patel , Yangyu Chen , Lad Prabhakar , Yu Chien Peter Lin , Charlie Jenkins , Kanak Shilledar , Darshan Prajapati , Neil Armstrong , Heiko Stuebner , Aradhya Bhatia , rafal@milecki.pl, Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/10] dt-bindings: riscv: Add SiFive P550 CPU compatible Date: Tue, 11 Mar 2025 13:04:23 +0530 Message-Id: <20250311073432.4068512-2-pinkesh.vaghela@einfochips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> References: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> MIME-Version: 1.0 X-OriginalArrivalTime: 11 Mar 2025 07:34:32.0749 (UTC) FILETIME=[080E3DD0:01DB9258] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250311_003439_527658_3DB76DA1 X-CRM114-Status: UNSURE ( 7.40 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Darshan Prajapati Update Documentation for supporting SiFive P550 based CPU Signed-off-by: Darshan Prajapati Reviewed-by: Samuel Holland Signed-off-by: Pinkesh Vaghela Acked-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index 2c72f148a74b..3ee7468001f6 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -51,6 +51,7 @@ properties: - sifive,e5 - sifive,e7 - sifive,e71 + - sifive,p550 - sifive,rocket0 - sifive,s7 - sifive,u5 From patchwork Tue Mar 11 07:34:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pinkesh Vaghela X-Patchwork-Id: 14011232 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 672F6C28B2E for ; Tue, 11 Mar 2025 07:36:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WVu53AAjpyekOopxWlfGBppBBbagb1oaPOvKFuXS6rI=; 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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Create a config option to build ESWIN SoC specific resources Signed-off-by: Pinkesh Vaghela Reviewed-by: Samuel Holland Acked-by: Conor Dooley --- arch/riscv/Kconfig.socs | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 1916cf7ba450..35594e365ca6 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -1,5 +1,11 @@ menu "SoC selection" +config ARCH_ESWIN + bool "ESWIN SoCs" + help + This enables support for ESWIN SoC platform hardware, + including the ESWIN EIC7700 SoC. + config ARCH_MICROCHIP_POLARFIRE def_bool ARCH_MICROCHIP From patchwork Tue Mar 11 07:34:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pinkesh Vaghela X-Patchwork-Id: 14011234 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 870FFC35FF1 for ; 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d="scan'208";a="79624717" Received: from unknown (HELO eicahmirelay01.einfochips.com) ([10.100.49.50]) by naesa03out.arrow.com with ESMTP; 11 Mar 2025 01:34:37 -0600 Received: from AHMCPU1888.ap.corp.arrow.com ([172.25.5.100]) by eicahmirelay01.einfochips.com with Microsoft SMTPSVC(10.0.14393.4169); Tue, 11 Mar 2025 13:04:32 +0530 From: Pinkesh Vaghela To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner Cc: Paul Walmsley , Samuel Holland , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Min Lin , Pinkesh Vaghela , Pritesh Patel , Yangyu Chen , Lad Prabhakar , Yu Chien Peter Lin , Charlie Jenkins , Kanak Shilledar , Darshan Prajapati , Neil Armstrong , Heiko Stuebner , Aradhya Bhatia , rafal@milecki.pl, Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 03/10] dt-bindings: vendor-prefixes: add eswin Date: Tue, 11 Mar 2025 13:04:25 +0530 Message-Id: <20250311073432.4068512-4-pinkesh.vaghela@einfochips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> References: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> MIME-Version: 1.0 X-OriginalArrivalTime: 11 Mar 2025 07:34:32.0805 (UTC) FILETIME=[0816C950:01DB9258] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250311_003440_364478_9CBC3396 X-CRM114-Status: UNSURE ( 7.94 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Pritesh Patel Add new vendor string to dt bindings. This new vendor string is used by - ESWIN EIC770X SoC - HiFive Premier P550 board which uses EIC7700 SoC. Link: https://www.eswin.com/en/ Signed-off-by: Pritesh Patel Reviewed-by: Samuel Holland Signed-off-by: Pinkesh Vaghela Acked-by: Conor Dooley --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 5079ca6ce1d1..07ff140e67dc 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -490,6 +490,8 @@ patternProperties: description: Espressif Systems Co. Ltd. "^est,.*": description: ESTeem Wireless Modems + "^eswin,.*": + description: Beijing ESWIN Technology Group Co. Ltd. "^ettus,.*": description: NI Ettus Research "^eukrea,.*": From patchwork Tue Mar 11 07:34:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pinkesh Vaghela X-Patchwork-Id: 14011236 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 43B46C2BA1B for ; Tue, 11 Mar 2025 07:36:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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bh=qeUqFJ/XMVvzusQ5Xy9z1HmZ0fH2eXJgXXxVlj4pokU=; b=l/eRTHcwc6CXCSDRAYFxyyOY21EwJGsBJAkhFnwAS8H7KhY6E5C4MTE0 o6pWfEEwqtHPUE2euAZip4ePQDajyjx/L6cfedt2BJjCBcuQlknggBOVd 9rMCJgjDitspl5UPJUVUiW7V9miQ+zkfiGhrzMRJNkeiaxaCg3DbZxb7N 0saJ2QanSHMOv2T5RYrMlWrOxWq70atWxlM4g6ktoYKkIucpH5884egIB V3iyCD4zGycXOTbYmJPp9fq+/P/yBGo+pUxo1uwvacokTcfTTDIiovnCf ylc1rRT11PxXq6fHdewlDdeE98nylmsuJRzifUS06SRrRiN1bX4PQNBrv Q==; X-CSE-ConnectionGUID: t2W/YAHMQBOtOPWrAPxfpw== X-CSE-MsgGUID: P1il40UxRW6eWZMkPRpR9A== X-IronPort-AV: E=Sophos;i="6.14,238,1736838000"; d="scan'208";a="79624724" Received: from unknown (HELO eicahmirelay01.einfochips.com) ([10.100.49.50]) by naesa03out.arrow.com with ESMTP; 11 Mar 2025 01:34:38 -0600 Received: from AHMCPU1888.ap.corp.arrow.com ([172.25.5.100]) by eicahmirelay01.einfochips.com with Microsoft SMTPSVC(10.0.14393.4169); Tue, 11 Mar 2025 13:04:32 +0530 From: Pinkesh Vaghela To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner Cc: Paul Walmsley , Samuel Holland , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Min Lin , Pinkesh Vaghela , Pritesh Patel , Yangyu Chen , Lad Prabhakar , Yu Chien Peter Lin , Charlie Jenkins , Kanak Shilledar , Darshan Prajapati , Neil Armstrong , Heiko Stuebner , Aradhya Bhatia , rafal@milecki.pl, Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/10] dt-bindings: riscv: Add SiFive HiFive Premier P550 board Date: Tue, 11 Mar 2025 13:04:26 +0530 Message-Id: <20250311073432.4068512-5-pinkesh.vaghela@einfochips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> References: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> MIME-Version: 1.0 X-OriginalArrivalTime: 11 Mar 2025 07:34:32.0906 (UTC) FILETIME=[082632A0:01DB9258] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250311_003440_773653_3DEFB9AC X-CRM114-Status: GOOD ( 11.50 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Pritesh Patel Add DT binding documentation for the ESWIN EIC7700 SoC and HiFive Premier P550 Board Signed-off-by: Pritesh Patel Reviewed-by: Samuel Holland Signed-off-by: Pinkesh Vaghela Reviewed-by: Matthias Brugger --- .../devicetree/bindings/riscv/eswin.yaml | 29 +++++++++++++++++++ MAINTAINERS | 6 ++++ 2 files changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/eswin.yaml diff --git a/Documentation/devicetree/bindings/riscv/eswin.yaml b/Documentation/devicetree/bindings/riscv/eswin.yaml new file mode 100644 index 000000000000..c603c45eef22 --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/eswin.yaml @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/eswin.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ESWIN SoC-based boards + +maintainers: + - Min Lin + - Pinkesh Vaghela + - Pritesh Patel + +description: + ESWIN SoC-based boards + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - sifive,hifive-premier-p550 + - const: eswin,eic7700 + +additionalProperties: true + +... diff --git a/MAINTAINERS b/MAINTAINERS index 25c86f47353d..901d0e0adb25 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8572,6 +8572,12 @@ L: linux-can@vger.kernel.org S: Maintained F: drivers/net/can/usb/esd_usb.c +ESWIN DEVICETREES +M: Min Lin +M: Pinkesh Vaghela +M: Pritesh Patel +S: Maintained + ET131X NETWORK DRIVER M: Mark Einon S: Odd Fixes From patchwork Tue Mar 11 07:34:27 2025 Content-Type: text/plain; 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bh=aR5wXVzzwCMTGciJgNgFTZx8tZMYxM5ueduU4KTlfJI=; b=BKhwvEPoejqtq2SUFSBw2cprhvWCJ6XZdLeZVP/D3D+nSq8R1aoLz5Ys 8IMagC+hOvWB8T1Rz+qod3bfILYVKz2BSNxgwi4D4+2GFHtdo5gK77LQ8 oM01Z3RLXsz0kL/qzZAuS9NQN2VFIcwzApNJIA6ycIFRWwgiRcAVIncTq gTL//mTIPUNPMNmI5W/r/TLbhOiD3cFghGrkC39QKHv/icD2TtMC7+CUp b36hMANYMAaKsGBLxCZRCQZdHESp+cyOkIyyctGktxSPmO3uN7yKz6pSe 6UsWhU67SN0ddzB82vyG/FifN1msQU6ZRt7mCCG18DKj5hQy7rUU7a2kn w==; X-CSE-ConnectionGUID: XFRAnE3ISCqV4y7xuRX2yA== X-CSE-MsgGUID: Yr/fukYTSpKQgGQUn/OEWA== X-IronPort-AV: E=Sophos;i="6.14,238,1736838000"; d="scan'208";a="79624731" Received: from unknown (HELO eicahmirelay01.einfochips.com) ([10.100.49.50]) by naesa03out.arrow.com with ESMTP; 11 Mar 2025 01:34:40 -0600 Received: from AHMCPU1888.ap.corp.arrow.com ([172.25.5.100]) by eicahmirelay01.einfochips.com with Microsoft SMTPSVC(10.0.14393.4169); Tue, 11 Mar 2025 13:04:33 +0530 From: Pinkesh Vaghela To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner Cc: Paul Walmsley , Samuel Holland , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Min Lin , Pinkesh Vaghela , Pritesh Patel , Yangyu Chen , Lad Prabhakar , Yu Chien Peter Lin , Charlie Jenkins , Kanak Shilledar , Darshan Prajapati , Neil Armstrong , Heiko Stuebner , Aradhya Bhatia , rafal@milecki.pl, Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/10] dt-bindings: cache: sifive,ccache0: Add ESWIN EIC7700 SoC compatibility Date: Tue, 11 Mar 2025 13:04:27 +0530 Message-Id: <20250311073432.4068512-6-pinkesh.vaghela@einfochips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> References: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> MIME-Version: 1.0 X-OriginalArrivalTime: 11 Mar 2025 07:34:33.0003 (UTC) FILETIME=[0834FFB0:01DB9258] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250311_003441_377920_575E76F7 X-CRM114-Status: UNSURE ( 8.79 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Pritesh Patel This cache controller is also used on the ESWIN EIC7700 SoC. However, it have 256KB private L2 Cache and shared L3 Cache of 4MB. So add dedicated compatible string for it. Signed-off-by: Pritesh Patel Reviewed-by: Samuel Holland Signed-off-by: Pinkesh Vaghela --- .../bindings/cache/sifive,ccache0.yaml | 28 +++++++++++++++++-- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml index 7e8cebe21584..11e9df2cd153 100644 --- a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml +++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml @@ -39,6 +39,7 @@ properties: - const: cache - items: - enum: + - eswin,eic7700-l3-cache - starfive,jh7100-ccache - starfive,jh7110-ccache - const: sifive,ccache0 @@ -55,10 +56,10 @@ properties: enum: [2, 3] cache-sets: - enum: [1024, 2048] + enum: [1024, 2048, 4096] cache-size: - const: 2097152 + enum: [2097152, 4194304] cache-unified: true @@ -89,6 +90,7 @@ allOf: compatible: contains: enum: + - eswin,eic7700-l3-cache - sifive,fu740-c000-ccache - starfive,jh7100-ccache - starfive,jh7110-ccache @@ -122,11 +124,31 @@ allOf: cache-sets: const: 2048 - else: + - if: + properties: + compatible: + contains: + enum: + - microchip,mpfs-ccache + - sifive,fu540-c000-ccache + + then: properties: cache-sets: const: 1024 + - if: + properties: + compatible: + contains: + enum: + - eswin,eic7700-l3-cache + + then: + properties: + cache-sets: + const: 4096 + - if: properties: compatible: From patchwork Tue Mar 11 07:34:28 2025 Content-Type: text/plain; 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bh=3hrFC8akR20pQMYn01FDGTaAf1FudakKyQp4tQR7was=; b=o4zXMtgnCbJpRw4VvbbJFtNqrzwlvf21wMVnP6sBjYATBiLZGapjRDRZ adrJSWlD2g0SjG+bjZ9wA9VTTt2WKbSe1dwK6xysXYZRT//V6GDgBxHfm XrRn/pr2eegXCDZ/cQv5z0H0ovLqYVUjPxiYgSUtaKV+3bStGKiW6YPZy vhFcPGP/u56fh4z5bXzjmzJLIkAi/vtf3AgLZo8hfrPR+8fnIox8MFC4o 3qqVNzoMa0BZPxJH0zeBrvg1FpO/aMIlnPUyq121Lo2sjpVDT6SqBjxaw N16I6GGEstZ3Wy6H1gvjgQMyaEGBbsXre9EariZmwj02cdGa8xc8a2FeK Q==; X-CSE-ConnectionGUID: bmKcuMhZQIytBBy/3DG3KQ== X-CSE-MsgGUID: ASBBqzq3TOKlMP7ca9xtnw== X-IronPort-AV: E=Sophos;i="6.14,238,1736838000"; d="scan'208";a="79624738" Received: from unknown (HELO eicahmirelay01.einfochips.com) ([10.100.49.50]) by naesa03out.arrow.com with ESMTP; 11 Mar 2025 01:34:41 -0600 Received: from AHMCPU1888.ap.corp.arrow.com ([172.25.5.100]) by eicahmirelay01.einfochips.com with Microsoft SMTPSVC(10.0.14393.4169); Tue, 11 Mar 2025 13:04:33 +0530 From: Pinkesh Vaghela To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner Cc: Paul Walmsley , Samuel Holland , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Min Lin , Pinkesh Vaghela , Pritesh Patel , Yangyu Chen , Lad Prabhakar , Yu Chien Peter Lin , Charlie Jenkins , Kanak Shilledar , Darshan Prajapati , Neil Armstrong , Heiko Stuebner , Aradhya Bhatia , rafal@milecki.pl, Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 06/10] cache: sifive_ccache: Add ESWIN EIC7700 support Date: Tue, 11 Mar 2025 13:04:28 +0530 Message-Id: <20250311073432.4068512-7-pinkesh.vaghela@einfochips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> References: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> MIME-Version: 1.0 X-OriginalArrivalTime: 11 Mar 2025 07:34:33.0098 (UTC) FILETIME=[08437EA0:01DB9258] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250311_003441_920885_4A014454 X-CRM114-Status: UNSURE ( 9.80 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This adds support for the ESWIN EIC7700 SoC which also features this SiFive composable cache controller. Signed-off-by: Pinkesh Vaghela Reviewed-by: Samuel Holland --- drivers/cache/sifive_ccache.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/cache/sifive_ccache.c b/drivers/cache/sifive_ccache.c index 6874b72ec59d..e1a283805ea7 100644 --- a/drivers/cache/sifive_ccache.c +++ b/drivers/cache/sifive_ccache.c @@ -118,6 +118,8 @@ static void ccache_config_read(void) } static const struct of_device_id sifive_ccache_ids[] = { + { .compatible = "eswin,eic7700-l3-cache", + .data = (void *)(QUIRK_NONSTANDARD_CACHE_OPS) }, { .compatible = "sifive,fu540-c000-ccache" }, { .compatible = "sifive,fu740-c000-ccache" }, { .compatible = "starfive,jh7100-ccache", From patchwork Tue Mar 11 07:34:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pinkesh Vaghela X-Patchwork-Id: 14011239 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4CE3CC35FF4 for ; Tue, 11 Mar 2025 07:36:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=piSMAl1oaVjIwYmhGKvTWQ3PN6goOPGtgxDE4j2IgpU=; b=htxczbsYyTr3Lq rNJI31qJpmo2Z84Dkb1hzzqHbIGpN1lItUBMXLVJ/w0zOO49VeEQZWLosMBsq58tvmrR7vw4b3BU+ M/JKxbgkIA+ae4XM1D520lGErRnf5Dn/YlB7d1fWpLLXIKUcqaxI4+i0DIISKGJgR6/VsUTW6Z0WJ 1fEwzo91VMee3/lN/pPGA3LGkhqEc2YxUw018DmV2GYT9/M9xj3TWBndJi1lBzYsikBbfoQsF09fu w5htMyP+gSQu2Z6FOd7RSm8IS1QJQUozQpjusyiFUMhlE8eIKDZ35jBhZG+eB0tScPBFQVEZFGB99 ylPRMasJOc2WKXIYtjnQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tru9g-00000004r2A-10Qn; Tue, 11 Mar 2025 07:36:00 +0000 Received: from naesa03.arrow.com ([216.150.161.23]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tru8R-00000004qda-0Mnz for linux-riscv@lists.infradead.org; Tue, 11 Mar 2025 07:34:44 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=einfochips.com; i=@einfochips.com; l=1066; q=dns/txt; s=NAESA-Selector1; t=1741678483; x=1773214483; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ngmpsXm3zPcGmQ7jHDdbE+hrpXU5UNyN6YCKOT2opCY=; b=Zl4CJ3oeJh04YfTkxiigfa4PzV5JRVhgegmk65gg/BBWNiaUHQLqtb4E kVoW9KIgtOjWBoIaL0JwfGPGNKGxAuVE+zxd2BjOPpAN8iZF66td9PX1d hvZVpvULXgvWSxkxj+Y05Vqu49DT0bTPBFqWhiz1ILvnEUGuDrIOO2joO v876bkPH+1u4QYT5R1B1jxB0BQb6m5FoEmQSwJyd0XLf8VSZ68/k8artm w6lSTpsw3AiyoxLZRnuZcgzMivMo7lmOqxLmDaVmNEbBnrytzylTpP8T2 v2PHB11celTTtwwiLQ7rAmVJtaAkyhcafCTU/fzAZyXvCvstp4T/BpEhG A==; X-CSE-ConnectionGUID: z5e0QINTTNOSe7jJE75fCw== X-CSE-MsgGUID: HJXydEsaS56gIm0Dt4eblQ== X-IronPort-AV: E=Sophos;i="6.14,238,1736838000"; d="scan'208";a="79624745" Received: from unknown (HELO eicahmirelay01.einfochips.com) ([10.100.49.50]) by naesa03out.arrow.com with ESMTP; 11 Mar 2025 01:34:42 -0600 Received: from AHMCPU1888.ap.corp.arrow.com ([172.25.5.100]) by eicahmirelay01.einfochips.com with Microsoft SMTPSVC(10.0.14393.4169); Tue, 11 Mar 2025 13:04:33 +0530 From: Pinkesh Vaghela To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner Cc: Paul Walmsley , Samuel Holland , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Min Lin , Pinkesh Vaghela , Pritesh Patel , Yangyu Chen , Lad Prabhakar , Yu Chien Peter Lin , Charlie Jenkins , Kanak Shilledar , Darshan Prajapati , Neil Armstrong , Heiko Stuebner , Aradhya Bhatia , rafal@milecki.pl, Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 07/10] dt-bindings: interrupt-controller: Add ESWIN EIC7700 PLIC Date: Tue, 11 Mar 2025 13:04:29 +0530 Message-Id: <20250311073432.4068512-8-pinkesh.vaghela@einfochips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> References: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> MIME-Version: 1.0 X-OriginalArrivalTime: 11 Mar 2025 07:34:33.0130 (UTC) FILETIME=[084860A0:01DB9258] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250311_003443_186970_DEB8094A X-CRM114-Status: UNSURE ( 7.40 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Darshan Prajapati Add compatible string for ESWIN EIC7700 PLIC. Signed-off-by: Darshan Prajapati Reviewed-by: Samuel Holland Signed-off-by: Pinkesh Vaghela Acked-by: Conor Dooley --- .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml index 3dfe425909d1..ea7093fde060 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml @@ -58,6 +58,7 @@ properties: - items: - enum: - canaan,k210-plic + - eswin,eic7700-plic - sifive,fu540-c000-plic - spacemit,k1-plic - starfive,jh7100-plic From patchwork Tue Mar 11 07:34:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pinkesh Vaghela X-Patchwork-Id: 14011237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CDDC4C28B2F for ; Tue, 11 Mar 2025 07:36:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=n8QvRvmoLgIZU2gYUm26CV90ou3Hs7QjapCns1vE5nA=; b=umOgBaXs+SyUQC wApSV4jUYpvTA/D5Y6ztEtJuMw+7xRrRWt5jRhdidNZM7kM4+BKJaz1FKiwg36ERfqedz1zfMamuM Sg19/fwDkcoABmR2ZSInjFhVZYbLCQO4ZHueJUufbFqa+wzLLLISu/9brIwT+7X72oSLuzY/nbxH0 7V1GAsvorfg4JxFS6QjYFPJFMbQ7pzdyJzxkiZkIHSDoOR/XFAlhrsBw9VYFbdSZkU9NHCAu1yAfB 7HNdyw+8oKvhBm/+Ya3MmHpvCW2T2DxZ6XFpOdkDKYbSyS+elbf+jNF5Ok8ydthae5kZSGcrR/0Jb nlvrOI30iaHGZiW+7fHg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tru9h-00000004r3A-00qz; Tue, 11 Mar 2025 07:36:01 +0000 Received: from naesa03.arrow.com ([216.150.161.23]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tru8S-00000004qgi-1ErW for linux-riscv@lists.infradead.org; Tue, 11 Mar 2025 07:34:45 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=einfochips.com; i=@einfochips.com; l=1089; q=dns/txt; s=NAESA-Selector1; t=1741678484; x=1773214484; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2J8ImN1eOLZcCD3mcs/m/xlW9C0b++wBIjdeDhMtX88=; b=snOGueN74Oa6XdoBVQ3ntj3fbwen6kuOZzZSV28RxDAwT+SRtVODSnwy oLpefI7Z43KpRLmqwZ2eLQ9APdO0TJrHayMfJOIZS+W7L3wFSZlUIrync z7yLpTfznfil7BPwj+XNr74WfFDkBAB2IiehLfGEXfFIu28OZlnVaRE2Z 5YV1E9z7l3mkveAjQTlVbPngydtdAS0Wg6rPbQmc4AqoxUh2lMkD3UDOe 78DOOcrxMrOWZFawgRjhzAkiwq5Q5hLQChVyj3byODxGcTpC3AyMqcjHz q1DQIDXcW8SyzmUap5n9HHYD6wUn2Bu53/K24ulQBcEZPq0Exdg8VurHX w==; X-CSE-ConnectionGUID: 4LpS8vRURV6CvBiQ625flg== X-CSE-MsgGUID: NmgEBWRET8qnCp+fi3NGbA== X-IronPort-AV: E=Sophos;i="6.14,238,1736838000"; d="scan'208";a="79624751" Received: from unknown (HELO eicahmirelay01.einfochips.com) ([10.100.49.50]) by naesa03out.arrow.com with ESMTP; 11 Mar 2025 01:34:43 -0600 Received: from AHMCPU1888.ap.corp.arrow.com ([172.25.5.100]) by eicahmirelay01.einfochips.com with Microsoft SMTPSVC(10.0.14393.4169); Tue, 11 Mar 2025 13:04:33 +0530 From: Pinkesh Vaghela To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner Cc: Paul Walmsley , Samuel Holland , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Min Lin , Pinkesh Vaghela , Pritesh Patel , Yangyu Chen , Lad Prabhakar , Yu Chien Peter Lin , Charlie Jenkins , Kanak Shilledar , Darshan Prajapati , Neil Armstrong , Heiko Stuebner , Aradhya Bhatia , rafal@milecki.pl, Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/10] dt-bindings: timer: Add ESWIN EIC7700 CLINT Date: Tue, 11 Mar 2025 13:04:30 +0530 Message-Id: <20250311073432.4068512-9-pinkesh.vaghela@einfochips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> References: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> MIME-Version: 1.0 X-OriginalArrivalTime: 11 Mar 2025 07:34:33.0149 (UTC) FILETIME=[084B46D0:01DB9258] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250311_003444_403005_6FE357A1 X-CRM114-Status: UNSURE ( 7.39 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Darshan Prajapati Add compatible string for ESWIN EIC7700 CLINT. Signed-off-by: Darshan Prajapati Reviewed-by: Samuel Holland Signed-off-by: Pinkesh Vaghela Acked-by: Conor Dooley --- Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml index 76d83aea4e2b..eb03a0602315 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -30,6 +30,7 @@ properties: - items: - enum: - canaan,k210-clint # Canaan Kendryte K210 + - eswin,eic7700-clint # ESWIN EIC7700 - sifive,fu540-c000-clint # SiFive FU540 - spacemit,k1-clint # SpacemiT K1 - starfive,jh7100-clint # StarFive JH7100 From patchwork Tue Mar 11 07:34:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pinkesh Vaghela X-Patchwork-Id: 14011241 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84BC5C35FF2 for ; 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d="scan'208";a="79624756" Received: from unknown (HELO eicahmirelay01.einfochips.com) ([10.100.49.50]) by naesa03out.arrow.com with ESMTP; 11 Mar 2025 01:34:44 -0600 Received: from AHMCPU1888.ap.corp.arrow.com ([172.25.5.100]) by eicahmirelay01.einfochips.com with Microsoft SMTPSVC(10.0.14393.4169); Tue, 11 Mar 2025 13:04:33 +0530 From: Pinkesh Vaghela To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner Cc: Paul Walmsley , Samuel Holland , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Min Lin , Pinkesh Vaghela , Pritesh Patel , Yangyu Chen , Lad Prabhakar , Yu Chien Peter Lin , Charlie Jenkins , Kanak Shilledar , Darshan Prajapati , Neil Armstrong , Heiko Stuebner , Aradhya Bhatia , rafal@milecki.pl, Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/10] riscv: dts: add initial support for EIC7700 SoC Date: Tue, 11 Mar 2025 13:04:31 +0530 Message-Id: <20250311073432.4068512-10-pinkesh.vaghela@einfochips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> References: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> MIME-Version: 1.0 X-OriginalArrivalTime: 11 Mar 2025 07:34:33.0196 (UTC) FILETIME=[085272C0:01DB9258] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250311_003445_618426_51361E51 X-CRM114-Status: GOOD ( 13.85 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Min Lin Add initial support for EIC7700 SoC that uses a SiFive Quad-Core P550 CPU cluster. This file is expected to grow as more device drivers are added to the kernel. Signed-off-by: Min Lin Co-developed-by: Pritesh Patel Signed-off-by: Pritesh Patel Co-developed-by: Darshan Prajapati Signed-off-by: Darshan Prajapati Reviewed-by: Samuel Holland Tested-by: Samuel Holland Signed-off-by: Pinkesh Vaghela --- MAINTAINERS | 1 + arch/riscv/boot/dts/eswin/eic7700.dtsi | 344 +++++++++++++++++++++++++ 2 files changed, 345 insertions(+) create mode 100644 arch/riscv/boot/dts/eswin/eic7700.dtsi diff --git a/MAINTAINERS b/MAINTAINERS index 901d0e0adb25..475122cf0ce3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8577,6 +8577,7 @@ M: Min Lin M: Pinkesh Vaghela M: Pritesh Patel S: Maintained +F: arch/riscv/boot/dts/eswin/ ET131X NETWORK DRIVER M: Mark Einon diff --git a/arch/riscv/boot/dts/eswin/eic7700.dtsi b/arch/riscv/boot/dts/eswin/eic7700.dtsi new file mode 100644 index 000000000000..9cef940f07e4 --- /dev/null +++ b/arch/riscv/boot/dts/eswin/eic7700.dtsi @@ -0,0 +1,344 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (c) 2024 Beijing ESWIN Computing Technology Co., Ltd. + */ + +/dts-v1/; + +/ { + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + timebase-frequency = <1000000>; + + cpu0: cpu@0 { + compatible = "sifive,p550", "riscv"; + device_type = "cpu"; + d-cache-block-size = <64>; + d-cache-sets = <128>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <32>; + i-cache-block-size = <64>; + i-cache-sets = <128>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <32>; + mmu-type = "riscv,sv48"; + next-level-cache = <&l2_cache_0>; + reg = <0x0>; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "sscofpmf", + "zba", "zbb", "zicsr", "zifencei"; + tlb-split; + + cpu0_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + cpu1: cpu@1 { + compatible = "sifive,p550", "riscv"; + d-cache-block-size = <64>; + d-cache-sets = <128>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <32>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <128>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <32>; + mmu-type = "riscv,sv48"; + next-level-cache = <&l2_cache_1>; + reg = <0x1>; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "sscofpmf", + "zba", "zbb", "zicsr", "zifencei"; + tlb-split; + + cpu1_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + cpu2: cpu@2 { + compatible = "sifive,p550", "riscv"; + d-cache-block-size = <64>; + d-cache-sets = <128>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <32>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <128>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <32>; + mmu-type = "riscv,sv48"; + next-level-cache = <&l2_cache_2>; + reg = <0x2>; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "sscofpmf", + "zba", "zbb", "zicsr", "zifencei"; + tlb-split; + + cpu2_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + cpu3: cpu@3 { + compatible = "sifive,p550", "riscv"; + d-cache-block-size = <64>; + d-cache-sets = <128>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <32>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <128>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <32>; + mmu-type = "riscv,sv48"; + next-level-cache = <&l2_cache_3>; + reg = <0x3>; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "sscofpmf", + "zba", "zbb", "zicsr", "zifencei"; + tlb-split; + + cpu3_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + l2_cache_0: l2-cache0 { + compatible = "cache"; + cache-block-size = <64>; + cache-level = <2>; + cache-sets = <512>; + cache-size = <262144>; + cache-unified; + next-level-cache = <&ccache>; + }; + + l2_cache_1: l2-cache1 { + compatible = "cache"; + cache-block-size = <64>; + cache-level = <2>; + cache-sets = <512>; + cache-size = <262144>; + cache-unified; + next-level-cache = <&ccache>; + }; + + l2_cache_2: l2-cache2 { + compatible = "cache"; + cache-block-size = <64>; + cache-level = <2>; + cache-sets = <512>; + cache-size = <262144>; + cache-unified; + next-level-cache = <&ccache>; + }; + + l2_cache_3: l2-cache3 { + compatible = "cache"; + cache-block-size = <64>; + cache-level = <2>; + cache-sets = <512>; + cache-size = <262144>; + cache-unified; + next-level-cache = <&ccache>; + }; + }; + + pmu { + compatible = "riscv,pmu"; + riscv,event-to-mhpmcounters = + <0x00001 0x00001 0x00000001>, + <0x00002 0x00002 0x00000004>, + <0x00004 0x00006 0x00000078>, + <0x10009 0x10009 0x00000078>, + <0x10019 0x10019 0x00000078>, + <0x10021 0x10021 0x00000078>; + riscv,event-to-mhpmevent = + <0x00004 0x00000000 0x00000202>, + <0x00005 0x00000000 0x00004000>, + <0x00006 0x00000000 0x00002001>, + <0x10009 0x00000000 0x00000102>, + <0x10019 0x00000000 0x00001002>, + <0x10021 0x00000000 0x00000802>; + riscv,raw-event-to-mhpmcounters = + <0x00000000 0x00000000 0xffffffff 0xfc0000ff 0x00000078>, + <0x00000000 0x00000001 0xffffffff 0xfffe07ff 0x00000078>, + <0x00000000 0x00000002 0xffffffff 0xfffe00ff 0x00000078>, + <0x00000000 0x00000003 0xfffffffc 0x000000ff 0x00000078>, + <0x00000000 0x00000004 0xffffffc0 0x000000ff 0x00000078>, + <0x00000000 0x00000005 0xffffffff 0xfffffdff 0x00000078>, + <0x00000000 0x00000006 0xfffffe00 0x110204ff 0x00000078>, + <0x00000000 0x00000007 0xffffffff 0xf00000ff 0x00000078>, + <0x00000000 0x00000008 0xfffffe04 0x000000ff 0x00000078>, + <0x00000000 0x00000009 0xffffffff 0xffffc0ff 0x00000078>, + <0x00000000 0x0000000a 0xffffffff 0xf00000ff 0x00000078>, + <0x00000000 0x0000000b 0xffffffff 0xfffffcff 0x00000078>, + <0x00000000 0x0000000c 0xfffffff0 0x000000ff 0x00000078>, + <0x00000000 0x0000000d 0xffffffff 0x800000ff 0x00000078>, + <0x00000000 0x0000000e 0xffffffff 0xf80000ff 0x00000078>, + <0x00000000 0x0000000f 0xfffffffc 0x000000ff 0x00000078>; + }; + + soc { + compatible = "simple-bus"; + ranges; + interrupt-parent = <&plic>; + #address-cells = <2>; + #size-cells = <2>; + + clint: timer@2000000 { + compatible = "eswin,eic7700-clint", "sifive,clint0"; + reg = <0x0 0x02000000 0x0 0x10000>; + interrupts-extended = + <&cpu0_intc 3>, <&cpu0_intc 7>, + <&cpu1_intc 3>, <&cpu1_intc 7>, + <&cpu2_intc 3>, <&cpu2_intc 7>, + <&cpu3_intc 3>, <&cpu3_intc 7>; + }; + + ccache: cache-controller@2010000 { + compatible = "eswin,eic7700-l3-cache", "sifive,ccache0", "cache"; + reg = <0x0 0x2010000 0x0 0x4000>; + interrupts = <1>, <3>, <4>, <2>; + cache-block-size = <64>; + cache-level = <3>; + cache-sets = <4096>; + cache-size = <4194304>; + cache-unified; + }; + + plic: interrupt-controller@c000000 { + compatible = "eswin,eic7700-plic", "sifive,plic-1.0.0"; + reg = <0x0 0xc000000 0x0 0x4000000>; + interrupt-controller; + interrupts-extended = + <&cpu0_intc 11>, <&cpu0_intc 9>, + <&cpu1_intc 11>, <&cpu1_intc 9>, + <&cpu2_intc 11>, <&cpu2_intc 9>, + <&cpu3_intc 11>, <&cpu3_intc 9>; + riscv,ndev = <520>; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + + uart0: serial@50900000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x50900000 0x0 0x10000>; + interrupts = <100>; + clock-frequency = <200000000>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart1: serial@50910000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x50910000 0x0 0x10000>; + interrupts = <101>; + clock-frequency = <200000000>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart2: serial@50920000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x50920000 0x0 0x10000>; + interrupts = <102>; + clock-frequency = <200000000>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart3: serial@50930000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x50930000 0x0 0x10000>; + interrupts = <103>; + clock-frequency = <200000000>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart4: serial@50940000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x50940000 0x0 0x10000>; + interrupts = <104>; + clock-frequency = <200000000>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + gpio@51600000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x0 0x51600000 0x0 0x80>; + #address-cells = <1>; + #size-cells = <0>; + + porta: gpio-port@0 { + compatible = "snps,dw-apb-gpio-port"; + reg = <0>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = + <303>, <304>, <305>, <306>, <307>, <308>, <309>, + <310>, <311>, <312>, <313>, <314>, <315>, <316>, + <317>, <318>, <319>, <320>, <321>, <322>, <323>, + <324>, <325>, <326>, <327>, <328>, <329>, <330>, + <331>, <332>, <333>, <334>; + gpio-controller; + ngpios = <32>; + #gpio-cells = <2>; + }; + + portb: gpio-port@1 { + compatible = "snps,dw-apb-gpio-port"; + reg = <1>; + gpio-controller; + ngpios = <32>; + #gpio-cells = <2>; + }; + + portc: gpio-port@2 { + compatible = "snps,dw-apb-gpio-port"; + reg = <2>; + gpio-controller; + ngpios = <32>; + #gpio-cells = <2>; + }; + + portd: gpio-port@3 { + compatible = "snps,dw-apb-gpio-port"; + reg = <3>; + gpio-controller; + ngpios = <16>; + #gpio-cells = <2>; + }; + }; + }; +}; From patchwork Tue Mar 11 07:34:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pinkesh Vaghela X-Patchwork-Id: 14011240 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 94037C35FF1 for ; Tue, 11 Mar 2025 07:36:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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bh=5heB6PuMYbbcCT5z+UhKDkhRC7FHz+vObUOuQmwwSh4=; b=cSKNL1R/uu5osO6+MyLFLwAydj+uVkHuSFI7CX7kwPcnG/39tw0H9GA7 jbT3+CX84N4A+LINYwes9SadRBB9gdNlPvdE/9KXIIlVMZ8elsDhWbhZV xTfr7ziw/mtLgwQ6KPHrZK9vP9kEynaWWilt9oVmv0w8Mt/MD5Tw1UtI9 jEyvO+cVDL2cG5vvWwernccBKpIDQj7z9yuJgG4f2HwcRRsYG4CDoVQRm TqJbMgk0EkITZKr/7hrtqnRfBh7bIsVBi14KRuscxvPshMl+9qjStaWZy hcTLrkziM535IhDOreU/JEJG3R1TGug9hu9sW+9oqN8h/VnSrhMgSmNMN A==; X-CSE-ConnectionGUID: 0cFby3FhSU6yW652y9ZdzQ== X-CSE-MsgGUID: 4Nfi6MyuR7medjq08Qi5BQ== X-IronPort-AV: E=Sophos;i="6.14,238,1736838000"; d="scan'208";a="79624763" Received: from unknown (HELO eicahmirelay01.einfochips.com) ([10.100.49.50]) by naesa03out.arrow.com with ESMTP; 11 Mar 2025 01:34:46 -0600 Received: from AHMCPU1888.ap.corp.arrow.com ([172.25.5.100]) by eicahmirelay01.einfochips.com with Microsoft SMTPSVC(10.0.14393.4169); Tue, 11 Mar 2025 13:04:33 +0530 From: Pinkesh Vaghela To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner Cc: Paul Walmsley , Samuel Holland , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Min Lin , Pinkesh Vaghela , Pritesh Patel , Yangyu Chen , Lad Prabhakar , Yu Chien Peter Lin , Charlie Jenkins , Kanak Shilledar , Darshan Prajapati , Neil Armstrong , Heiko Stuebner , Aradhya Bhatia , rafal@milecki.pl, Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/10] riscv: dts: eswin: add HiFive Premier P550 board device tree Date: Tue, 11 Mar 2025 13:04:32 +0530 Message-Id: <20250311073432.4068512-11-pinkesh.vaghela@einfochips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> References: <20250311073432.4068512-1-pinkesh.vaghela@einfochips.com> MIME-Version: 1.0 X-OriginalArrivalTime: 11 Mar 2025 07:34:33.0290 (UTC) FILETIME=[0860CAA0:01DB9258] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250311_003446_867476_70905BA3 X-CRM114-Status: GOOD ( 12.64 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Min Lin Add initial board data for HiFive Premier P550 Development board Currently the data populated in this DT file describes the board DRAM configuration, UART and GPIO. Signed-off-by: Min Lin Co-developed-by: Pinkesh Vaghela Signed-off-by: Pinkesh Vaghela Reviewed-by: Samuel Holland Tested-by: Samuel Holland --- arch/riscv/boot/dts/Makefile | 1 + arch/riscv/boot/dts/eswin/Makefile | 2 ++ .../dts/eswin/eic7700-hifive-premier-p550.dts | 29 +++++++++++++++++++ 3 files changed, 32 insertions(+) create mode 100644 arch/riscv/boot/dts/eswin/Makefile create mode 100644 arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile index bff887d38abe..286a9939a8cb 100644 --- a/arch/riscv/boot/dts/Makefile +++ b/arch/riscv/boot/dts/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 subdir-y += allwinner subdir-y += canaan +subdir-y += eswin subdir-y += microchip subdir-y += renesas subdir-y += sifive diff --git a/arch/riscv/boot/dts/eswin/Makefile b/arch/riscv/boot/dts/eswin/Makefile new file mode 100644 index 000000000000..224101ae471e --- /dev/null +++ b/arch/riscv/boot/dts/eswin/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_ESWIN) += eic7700-hifive-premier-p550.dtb diff --git a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts new file mode 100644 index 000000000000..131ed1fc6b2e --- /dev/null +++ b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (c) 2024, Beijing ESWIN Computing Technology Co., Ltd. + */ + +/dts-v1/; + +#include "eic7700.dtsi" + +/ { + compatible = "sifive,hifive-premier-p550", "eswin,eic7700"; + model = "SiFive HiFive Premier P550"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +};