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Parse timebase-frequency properpy of /cpus node to initialize cpu_khz variable. 2. Initialize boot_count with the current time counter value. Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/include/asm/time.h | 2 ++ xen/arch/riscv/setup.c | 2 ++ xen/arch/riscv/stubs.c | 2 -- xen/arch/riscv/time.c | 38 +++++++++++++++++++++++++++++++ 5 files changed, 43 insertions(+), 2 deletions(-) create mode 100644 xen/arch/riscv/time.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index b0c8270a99..82016a957a 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -9,6 +9,7 @@ obj-y += setup.o obj-y += shutdown.o obj-y += smp.o obj-y += stubs.o +obj-y += time.o obj-y += traps.o obj-y += vm_event.o diff --git a/xen/arch/riscv/include/asm/time.h b/xen/arch/riscv/include/asm/time.h index fc1572e9b4..f288fe1e5c 100644 --- a/xen/arch/riscv/include/asm/time.h +++ b/xen/arch/riscv/include/asm/time.h @@ -19,6 +19,8 @@ static inline cycles_t get_cycles(void) return csr_read(CSR_TIME); } +void preinit_xen_time(void); + #endif /* ASM__RISCV__TIME_H */ /* diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index b0e587678e..836ad16fed 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -126,6 +126,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, riscv_fill_hwcap(); + preinit_xen_time(); + printk("All set up\n"); machine_halt(); diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index 5951b0ce91..caa133de84 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -27,8 +27,6 @@ nodemask_t __read_mostly node_online_map = { { [0] = 1UL } }; /* time.c */ -unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */ - s_time_t get_s_time(void) { BUG_ON("unimplemented"); diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c new file mode 100644 index 0000000000..210df6ba28 --- /dev/null +++ b/xen/arch/riscv/time.c @@ -0,0 +1,38 @@ +#include +#include +#include +#include + +unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */ +unsigned long __read_mostly boot_count; + +static __initdata struct dt_device_node *timer; + +/* Set up the timer on the boot CPU (early init function) */ +static void __init preinit_dt_xen_time(void) +{ + static const struct dt_device_match __initconst timer_ids[] = + { + DT_MATCH_PATH("/cpus"), + { /* sentinel */ }, + }; + u32 rate; + + timer = dt_find_matching_node(NULL, timer_ids); + if ( !timer ) + panic("Unable to find a compatible timer in the device tree\n"); + + dt_device_set_used_by(timer, DOMID_XEN); + + if ( !dt_property_read_u32(timer, "timebase-frequency", &rate) ) + panic("Unable to find clock frequency.\n"); + + cpu_khz = rate / 1000; +} + +void __init preinit_xen_time(void) +{ + preinit_dt_xen_time(); + + boot_count = get_cycles(); +} From patchwork Tue Mar 11 16:19:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksii Kurochko X-Patchwork-Id: 14012276 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A89B6C35FF1 for ; Tue, 11 Mar 2025 16:20:12 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.908729.1315835 (Exim 4.92) (envelope-from ) id 1ts2Km-0002MT-KM; Tue, 11 Mar 2025 16:20:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 908729.1315835; Tue, 11 Mar 2025 16:20:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ts2Km-0002MM-Hk; Tue, 11 Mar 2025 16:20:00 +0000 Received: by outflank-mailman (input) for mailman id 908729; Tue, 11 Mar 2025 16:19:59 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ts2Kl-0002GP-3e for xen-devel@lists.xenproject.org; Tue, 11 Mar 2025 16:19:59 +0000 Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [2a00:1450:4864:20::529]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id abe9ad35-fe94-11ef-9898-31a8f345e629; Tue, 11 Mar 2025 17:19:56 +0100 (CET) Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-5e5b56fc863so8299651a12.3 for ; Tue, 11 Mar 2025 09:19:56 -0700 (PDT) Received: from fedora.. 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However, since PLIC is now considered obsolete and will not be supported by Xen now, APLIC and IMSIC are selected instead to manage both wired interrupts and MSIs. Signed-off-by: Oleksii Kurochko --- automation/scripts/qemu-smoke-riscv64.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/automation/scripts/qemu-smoke-riscv64.sh b/automation/scripts/qemu-smoke-riscv64.sh index 8f755d0a6a..b2e112c942 100755 --- a/automation/scripts/qemu-smoke-riscv64.sh +++ b/automation/scripts/qemu-smoke-riscv64.sh @@ -6,7 +6,7 @@ set -ex -o pipefail rm -f smoke.serial export TEST_CMD="qemu-system-riscv64 \ - -M virt \ + -M virt,aia=aplic-imsic \ -smp 1 \ -nographic \ -m 2g \ From patchwork Tue Mar 11 16:19:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksii Kurochko X-Patchwork-Id: 14012274 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2CF6BC282EC for ; Tue, 11 Mar 2025 16:20:11 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.908730.1315845 (Exim 4.92) (envelope-from ) id 1ts2Kn-0002ax-Qi; Tue, 11 Mar 2025 16:20:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 908730.1315845; Tue, 11 Mar 2025 16:20:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ts2Kn-0002aq-NK; Tue, 11 Mar 2025 16:20:01 +0000 Received: by outflank-mailman (input) for mailman id 908730; Tue, 11 Mar 2025 16:19:59 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ts2Kl-0002GP-Q1 for xen-devel@lists.xenproject.org; Tue, 11 Mar 2025 16:19:59 +0000 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [2a00:1450:4864:20::52c]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ac9efe9d-fe94-11ef-9898-31a8f345e629; Tue, 11 Mar 2025 17:19:57 +0100 (CET) Received: by mail-ed1-x52c.google.com with SMTP id 4fb4d7f45d1cf-5e6c18e2c7dso5043217a12.3 for ; Tue, 11 Mar 2025 09:19:57 -0700 (PDT) Received: from fedora.. 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Since Microchip originally developed aplic.c, an internal discussion with them led to the decision to use the MIT license instead of the default GPL-2.0-only. [1] https://gitlab.com/xen-project/people/olkur/xen/-/commit/7cfb4bd4748ca268142497ac5c327d2766fb342d Signed-off-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/aplic.c | 50 +++++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/intc.h | 20 +++++++++++++ 3 files changed, 71 insertions(+) create mode 100644 xen/arch/riscv/aplic.c create mode 100644 xen/arch/riscv/include/asm/intc.h diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 82016a957a..dd5fd25c7d 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,3 +1,4 @@ +obj-y += aplic.o obj-y += cpufeature.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += entry.o diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c new file mode 100644 index 0000000000..42fac32958 --- /dev/null +++ b/xen/arch/riscv/aplic.c @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: MIT */ + +/* + * xen/arch/riscv/aplic.c + * + * RISC-V Advanced Platform-Level Interrupt Controller support + * + * Copyright (c) 2023-2024 Microchip. + * Copyright (c) 2024 Vates + */ + +#include +#include +#include + +#include +#include + +static struct intc_info aplic_info = { + .hw_version = INTC_APLIC, + .node = NULL +}; + +static int __init aplic_preinit(struct dt_device_node *node, const void *dat) +{ + if ( aplic_info.node ) + { + printk("XEN doesn't support more than one S mode APLIC\n"); + return -ENODEV; + } + + /* don't process if APLIC node is not for S mode */ + if ( dt_get_property(node, "riscv,children", NULL) ) + return -ENODEV; + + aplic_info.node = node; + + return 0; +} + +static const struct dt_device_match aplic_dt_match[] __initconst = +{ + DT_MATCH_COMPATIBLE("riscv,aplic"), + { /* sentinel */ }, +}; + +DT_DEVICE_START(aplic, "APLIC", DEVICE_INTERRUPT_CONTROLLER) + .dt_match = aplic_dt_match, + .init = aplic_preinit, +DT_DEVICE_END diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h new file mode 100644 index 0000000000..ff9bb33896 --- /dev/null +++ b/xen/arch/riscv/include/asm/intc.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: MIT */ + +/* + * (c) 2023-2024 Microchip Technology Inc. + * (c) 2024 Vates + */ + +#ifndef ASM__RISCV__INTERRUPT_CONTOLLER_H +#define ASM__RISCV__INTERRUPT_CONTOLLER_H + +enum intc_version { + INTC_APLIC, +}; + +struct intc_info { + enum intc_version hw_version; + const struct dt_device_node *node; +}; + +#endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ From patchwork Tue Mar 11 16:19:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksii Kurochko X-Patchwork-Id: 14012275 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8F41CC28B2F for ; Tue, 11 Mar 2025 16:20:12 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.908731.1315849 (Exim 4.92) (envelope-from ) id 1ts2Ko-0002e0-3G; Tue, 11 Mar 2025 16:20:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 908731.1315849; Tue, 11 Mar 2025 16:20:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ts2Kn-0002cr-U5; Tue, 11 Mar 2025 16:20:01 +0000 Received: by outflank-mailman (input) for mailman id 908731; Tue, 11 Mar 2025 16:20:00 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ts2Km-0002GP-QC for xen-devel@lists.xenproject.org; Tue, 11 Mar 2025 16:20:00 +0000 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [2a00:1450:4864:20::52f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ad2f2ec2-fe94-11ef-9898-31a8f345e629; Tue, 11 Mar 2025 17:19:58 +0100 (CET) Received: by mail-ed1-x52f.google.com with SMTP id 4fb4d7f45d1cf-5dca468c5e4so11032476a12.1 for ; Tue, 11 Mar 2025 09:19:58 -0700 (PDT) Received: from fedora.. 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When `acpi_disabled` is true, the system will scan for a node with the "interrupt-controller" property and then call `device_init()` to validate if it is an expected interrupt controller and if yes then save this node for further usage. If `acpi_disabled` is false, the system will panic, as ACPI support is not yet implemented for RISC-V. Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/include/asm/intc.h | 2 ++ xen/arch/riscv/intc.c | 14 ++++++++++++++ xen/arch/riscv/setup.c | 3 +++ 4 files changed, 20 insertions(+) create mode 100644 xen/arch/riscv/intc.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index dd5fd25c7d..0c6c4a38a3 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -2,6 +2,7 @@ obj-y += aplic.o obj-y += cpufeature.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += entry.o +obj-y += intc.o obj-y += mm.o obj-y += pt.o obj-$(CONFIG_RISCV_64) += riscv64/ diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index ff9bb33896..52ba196d87 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -17,4 +17,6 @@ struct intc_info { const struct dt_device_node *node; }; +void intc_preinit(void); + #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c new file mode 100644 index 0000000000..4061a3c457 --- /dev/null +++ b/xen/arch/riscv/intc.c @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +void __init intc_preinit(void) +{ + if ( acpi_disabled ) + intc_dt_preinit(); + else + panic("ACPI interrupt controller preinit() isn't implemented\n"); +} diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 836ad16fed..4e416f6e44 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -128,6 +129,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, preinit_xen_time(); + intc_preinit(); + printk("All set up\n"); machine_halt();