From patchwork Thu Mar 13 13:03:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 14014980 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9568C26770C; Thu, 13 Mar 2025 13:03:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871022; cv=none; b=geSS9zuo4cCw8L4Ba9aOW3RXTFSAg6f9UEPz93mG5ZxJv4XJkrBj0Wr41h3N8ykYwohCp7smNtrRf4zWuPIqhscpUhi30ykXBIvdVA7dT6dCN6ku+suKQK2vd3KgyElwYe4XLDwt9NBm/HmOIei8nFOYZrFSJGHCH1ugrYCIVUg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871022; c=relaxed/simple; bh=98KRXcGEbIO50H7NCISaJsrQv87mCIk32utux6MRmis=; h=Message-ID:From:To:Cc:Subject:References:MIME-Version: Content-Type:Date; b=Y0hoa9Ylj53X1ckX8OQwvfAkakh1v4fsfhynxrLGX61IAg5pRnBDvXjLPcGLZHdixUsmTrdpISusVpqZk1vwNesfXcQNgFOlGQeHdd4AMnh7/krYsaMgKB4SoaHKdGARys0KiSUM5xx8ZR+YPEJJoY/U0F1gNaqLCd8gGcj2Gnw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=shj5CAde; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=byiMxgR9; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="shj5CAde"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="byiMxgR9" Message-ID: <20250313130321.442025758@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1741871018; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=VeVnnwSReah5wOC9Iz7ded+zOeZPkraBXHsDPNXcIs4=; b=shj5CAdewFdh89n7ia0O9o8wc9yKPHi/tldIDoAodBKxyF+cFmiDEmEjtYyMAPgZjYScMI l5cNO6lvwa+TmWNrr+Qsyrf630p24vGKBMnTExIq2Y/T92SWfvXg2xzGgBY+1cGMYLsivY DlZcq4AVeT0feSydUHjIczYk9QZ3X5zE4vfK9Fc2VnZDWzQ2PAj1t8nKypbEiszDEQ356a Fe/V+/OEHJ3wLYHJYTPJt4V2zXoTF1HxXwB2K00o21Dx48t5thojcjBdb3jNb/QVAjuF7P eCUrGrSsp+EBC75dRo/DClUSWmDbo4FXhDbtHGiZi+lTpQjoyUqfqDb3bN1ErQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1741871018; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=VeVnnwSReah5wOC9Iz7ded+zOeZPkraBXHsDPNXcIs4=; b=byiMxgR9qFLezNWz2uxirZ2d+2cD07D0KcxtSE0jlqbSKJ+lcH/sx6VeqWfua+hDn1Tu7X 4A/2eBhQq0y7SIAg== From: Thomas Gleixner To: LKML Cc: Marc Zyngier , Peter Zijlstra , Nishanth Menon , Jonathan Cameron , Dhruva Gole , Tero Kristo , Santosh Shilimkar , Logan Gunthorpe , Dave Jiang , Jon Mason , Allen Hubbe , ntb@lists.linux.dev, Bjorn Helgaas , linux-pci@vger.kernel.org, Michael Kelley , Wei Liu , Haiyang Zhang , linux-hyperv@vger.kernel.org, Wei Huang , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , linux-scsi@vger.kernel.org, Jonathan Cameron Subject: [patch V2 01/10] cleanup: Provide retain_ptr() References: <20250313130212.450198939@linutronix.de> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Thu, 13 Mar 2025 14:03:38 +0100 (CET) In cases where an allocation is consumed by another function, the allocation needs to be retained on success or freed on failure. The code pattern is usually: struct foo *f = kzalloc(sizeof(*f), GFP_KERNEL); struct bar *b; ,,, // Initialize f ... if (ret) goto free; ... bar = bar_create(f); if (!bar) { ret = -ENOMEM; goto free; } ... return 0; free: kfree(f); return ret; This prevents using __free(kfree) on @f because there is no canonical way to tell the cleanup code that the allocation should not be freed. Abusing no_free_ptr() by force ignoring the return value is not really a sensible option either. Provide an explicit macro retain_ptr(), which NULLs the cleanup pointer. That makes it easy to analyze and reason about. Signed-off-by: Thomas Gleixner Cc: Peter Zijlstra Reviewed-by: Jonathan Cameron --- include/linux/cleanup.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) --- a/include/linux/cleanup.h +++ b/include/linux/cleanup.h @@ -216,6 +216,23 @@ const volatile void * __must_check_fn(co #define return_ptr(p) return no_free_ptr(p) +/* + * Only for situations where an allocation is handed in to another function + * and consumed by that function on success. + * + * struct foo *f __free(kfree) = kzalloc(sizeof(*f), GFP_KERNEL); + * + * setup(f); + * if (some_condition) + * return -EINVAL; + * .... + * ret = bar(f); + * if (!ret) + * retain_ptr(f); + * return ret; + */ +#define retain_ptr(p) \ + __get_and_null(p, NULL) /* * DEFINE_CLASS(name, type, exit, init, init_args...): From patchwork Thu Mar 13 13:03:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 14014981 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBDBE26772D; Thu, 13 Mar 2025 13:03:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871023; cv=none; b=sa/fx0SHpsG2a3uR0XU9MZg+HWjX6zqMPvrjTLvPph43/SJrdlIs91t1h9KCGiO4JKK7igF/lFAXIVQsPEYOZEmh4ZJGQhZ9rJUJGe9yNjsFahzN6DeYzUd7we+aiuhbINxNYXq7d36rIDplHPpQMPvEQStsc64sTlo7i6KXAjg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871023; c=relaxed/simple; bh=NDegh5PgVvyvjCN+VkHdyP8e5XP6K0F8iY/xtsyqEjQ=; h=Message-ID:From:To:Cc:Subject:References:MIME-Version: Content-Type:Date; b=M2OlJ1CnMvhrlpE0KnsgwqKUULKIMWuPFSybCOzo5K78KM8On6CzrCe95RPFipHmLHoE2bFhWHQMo/URgMuyQpZ9JDwHgLIyMZBCheRnb91GGleVskfTJ3dJ2akuXQbfxC4E1lAaXhoFEPcuqKAXyb1f/aXm48DLa++qJ55YEv8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=ImxEx8Jj; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=iIYra8uh; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="ImxEx8Jj"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="iIYra8uh" Message-ID: <20250313130321.506045185@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1741871020; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=LiuptbV0IEkZLsRBzb5dCGsbwt91W30ybgR1DfU+eUM=; b=ImxEx8JjkxiBvjpVz4BAKhlhhVQ/QFo2jQEfzzYUuPwSKVwc+B501eTC0MZ8FP3IIKrjkH cvEXU4kTX3WCP6EJny0Yi547b1PimkDrommexmFE1qlZnHvn9XFh15idBIzXp0NBMCga9u zgTvGm9DpwAtUKTR/Xd72D1rtk9r0ow6WL1Vds6vvHY6OM6744iEXpXkcYbK+xjn/v7NV0 s6li1ZztBYCbpsszdhidvnO3cOKfAVkuC96lVY2mUKfbK5NZLU6ZQVGrEyF0KfJvVYkdzh tLAtpWLJsT7t2gFR2xNo0xcqY7WIM3ekThnLb0fZarKAQdJNlXGJvi3jQztRpw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1741871020; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=LiuptbV0IEkZLsRBzb5dCGsbwt91W30ybgR1DfU+eUM=; b=iIYra8uhd7ecZmErW2T/XiGzOQt2jwiwhyrvy7awGu+vJ5Bi8Y/YvvcGA4bCUqLcOb7pgF Dz9ZpvYF0UiRSRDg== From: Thomas Gleixner To: LKML Cc: Marc Zyngier , Peter Zijlstra , Nishanth Menon , Jonathan Cameron , Dhruva Gole , Tero Kristo , Santosh Shilimkar , Logan Gunthorpe , Dave Jiang , Jon Mason , Allen Hubbe , ntb@lists.linux.dev, Bjorn Helgaas , linux-pci@vger.kernel.org, Michael Kelley , Wei Liu , Haiyang Zhang , linux-hyperv@vger.kernel.org, Wei Huang , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , linux-scsi@vger.kernel.org, Jonathan Cameron Subject: [patch V2 02/10] genirq/msi: Use lock guards for MSI descriptor locking References: <20250313130212.450198939@linutronix.de> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Thu, 13 Mar 2025 14:03:39 +0100 (CET) Provide a lock guard for MSI descriptor locking and update the core code accordingly. No functional change intended. Signed-off-by: Thomas Gleixner Reviewed-by: Jonathan Cameron --- V2: Remove the gotos - Jonathan --- include/linux/irqdomain.h | 2 include/linux/msi.h | 3 + kernel/irq/msi.c | 109 ++++++++++++++++------------------------------ 3 files changed, 45 insertions(+), 69 deletions(-) --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -281,6 +281,8 @@ static inline struct fwnode_handle *irq_ void irq_domain_free_fwnode(struct fwnode_handle *fwnode); +DEFINE_FREE(irq_domain_free_fwnode, struct fwnode_handle *, if (_T) irq_domain_free_fwnode(_T)) + struct irq_domain_chip_generic_info; /** --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -227,6 +227,9 @@ int msi_setup_device_data(struct device void msi_lock_descs(struct device *dev); void msi_unlock_descs(struct device *dev); +DEFINE_LOCK_GUARD_1(msi_descs_lock, struct device, msi_lock_descs(_T->lock), + msi_unlock_descs(_T->lock)); + struct msi_desc *msi_domain_first_desc(struct device *dev, unsigned int domid, enum msi_desc_filter filter); --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -443,7 +443,6 @@ EXPORT_SYMBOL_GPL(msi_next_desc); unsigned int msi_domain_get_virq(struct device *dev, unsigned int domid, unsigned int index) { struct msi_desc *desc; - unsigned int ret = 0; bool pcimsi = false; struct xarray *xa; @@ -457,7 +456,7 @@ unsigned int msi_domain_get_virq(struct if (dev_is_pci(dev) && domid == MSI_DEFAULT_DOMAIN) pcimsi = to_pci_dev(dev)->msi_enabled; - msi_lock_descs(dev); + guard(msi_descs_lock)(dev); xa = &dev->msi.data->__domains[domid].store; desc = xa_load(xa, pcimsi ? 0 : index); if (desc && desc->irq) { @@ -466,16 +465,12 @@ unsigned int msi_domain_get_virq(struct * PCI-MSIX and platform MSI use a descriptor per * interrupt. */ - if (pcimsi) { - if (index < desc->nvec_used) - ret = desc->irq + index; - } else { - ret = desc->irq; - } + if (!pcimsi) + return desc->irq; + if (index < desc->nvec_used) + return desc->irq + index; } - - msi_unlock_descs(dev); - return ret; + return 0; } EXPORT_SYMBOL_GPL(msi_domain_get_virq); @@ -993,9 +988,8 @@ bool msi_create_device_irq_domain(struct void *chip_data) { struct irq_domain *domain, *parent = dev->msi.domain; - struct fwnode_handle *fwnode, *fwnalloced = NULL; - struct msi_domain_template *bundle; const struct msi_parent_ops *pops; + struct fwnode_handle *fwnode; if (!irq_domain_is_msi_parent(parent)) return false; @@ -1003,7 +997,8 @@ bool msi_create_device_irq_domain(struct if (domid >= MSI_MAX_DEVICE_IRQDOMAINS) return false; - bundle = kmemdup(template, sizeof(*bundle), GFP_KERNEL); + struct msi_domain_template *bundle __free(kfree) = + bundle = kmemdup(template, sizeof(*bundle), GFP_KERNEL); if (!bundle) return false; @@ -1026,41 +1021,36 @@ bool msi_create_device_irq_domain(struct * node as they are not guaranteed to have a fwnode. They are never * looked up and always handled in the context of the device. */ - if (bundle->info.flags & MSI_FLAG_USE_DEV_FWNODE) - fwnode = dev->fwnode; + struct fwnode_handle *fwnode_alloced __free(irq_domain_free_fwnode) = NULL; + + if (!(bundle->info.flags & MSI_FLAG_USE_DEV_FWNODE)) + fwnode = fwnode_alloced = irq_domain_alloc_named_fwnode(bundle->name); else - fwnode = fwnalloced = irq_domain_alloc_named_fwnode(bundle->name); + fwnode = dev->fwnode; if (!fwnode) - goto free_bundle; + return false; if (msi_setup_device_data(dev)) - goto free_fwnode; - - msi_lock_descs(dev); + return false; + guard(msi_descs_lock)(dev); if (WARN_ON_ONCE(msi_get_device_domain(dev, domid))) - goto fail; + return false; if (!pops->init_dev_msi_info(dev, parent, parent, &bundle->info)) - goto fail; + return false; domain = __msi_create_irq_domain(fwnode, &bundle->info, IRQ_DOMAIN_FLAG_MSI_DEVICE, parent); if (!domain) - goto fail; + return false; + /* @bundle and @fwnode_alloced are now in use. Prevent cleanup */ + retain_ptr(bundle); + retain_ptr(fwnode_alloced); domain->dev = dev; dev->msi.data->__domains[domid].domain = domain; - msi_unlock_descs(dev); return true; - -fail: - msi_unlock_descs(dev); -free_fwnode: - irq_domain_free_fwnode(fwnalloced); -free_bundle: - kfree(bundle); - return false; } /** @@ -1074,12 +1064,10 @@ void msi_remove_device_irq_domain(struct struct msi_domain_info *info; struct irq_domain *domain; - msi_lock_descs(dev); - + guard(msi_descs_lock)(dev); domain = msi_get_device_domain(dev, domid); - if (!domain || !irq_domain_is_msi_device(domain)) - goto unlock; + return; dev->msi.data->__domains[domid].domain = NULL; info = domain->host_data; @@ -1088,9 +1076,6 @@ void msi_remove_device_irq_domain(struct irq_domain_remove(domain); irq_domain_free_fwnode(fwnode); kfree(container_of(info, struct msi_domain_template, info)); - -unlock: - msi_unlock_descs(dev); } /** @@ -1106,16 +1091,14 @@ bool msi_match_device_irq_domain(struct { struct msi_domain_info *info; struct irq_domain *domain; - bool ret = false; - msi_lock_descs(dev); + guard(msi_descs_lock)(dev); domain = msi_get_device_domain(dev, domid); if (domain && irq_domain_is_msi_device(domain)) { info = domain->host_data; - ret = info->bus_token == bus_token; + return info->bus_token == bus_token; } - msi_unlock_descs(dev); - return ret; + return false; } static int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev, @@ -1365,12 +1348,9 @@ int msi_domain_alloc_irqs_range(struct d .last = last, .nirqs = last + 1 - first, }; - int ret; - msi_lock_descs(dev); - ret = msi_domain_alloc_locked(dev, &ctrl); - msi_unlock_descs(dev); - return ret; + guard(msi_descs_lock)(dev); + return msi_domain_alloc_locked(dev, &ctrl); } EXPORT_SYMBOL_GPL(msi_domain_alloc_irqs_range); @@ -1474,12 +1454,8 @@ struct msi_map msi_domain_alloc_irq_at(s const struct irq_affinity_desc *affdesc, union msi_instance_cookie *icookie) { - struct msi_map map; - - msi_lock_descs(dev); - map = __msi_domain_alloc_irq_at(dev, domid, index, affdesc, icookie); - msi_unlock_descs(dev); - return map; + guard(msi_descs_lock)(dev); + return __msi_domain_alloc_irq_at(dev, domid, index, affdesc, icookie); } /** @@ -1516,13 +1492,11 @@ int msi_device_domain_alloc_wired(struct icookie.value = ((u64)type << 32) | hwirq; - msi_lock_descs(dev); + guard(msi_descs_lock)(dev); if (WARN_ON_ONCE(msi_get_device_domain(dev, domid) != domain)) map.index = -EINVAL; else map = __msi_domain_alloc_irq_at(dev, domid, MSI_ANY_INDEX, NULL, &icookie); - msi_unlock_descs(dev); - return map.index >= 0 ? map.virq : map.index; } @@ -1615,9 +1589,8 @@ static void msi_domain_free_irqs_range_l void msi_domain_free_irqs_range(struct device *dev, unsigned int domid, unsigned int first, unsigned int last) { - msi_lock_descs(dev); + guard(msi_descs_lock)(dev); msi_domain_free_irqs_range_locked(dev, domid, first, last); - msi_unlock_descs(dev); } EXPORT_SYMBOL_GPL(msi_domain_free_irqs_all); @@ -1647,9 +1620,8 @@ void msi_domain_free_irqs_all_locked(str */ void msi_domain_free_irqs_all(struct device *dev, unsigned int domid) { - msi_lock_descs(dev); + guard(msi_descs_lock)(dev); msi_domain_free_irqs_all_locked(dev, domid); - msi_unlock_descs(dev); } /** @@ -1668,12 +1640,11 @@ void msi_device_domain_free_wired(struct if (WARN_ON_ONCE(!dev || !desc || domain->bus_token != DOMAIN_BUS_WIRED_TO_MSI)) return; - msi_lock_descs(dev); - if (!WARN_ON_ONCE(msi_get_device_domain(dev, MSI_DEFAULT_DOMAIN) != domain)) { - msi_domain_free_irqs_range_locked(dev, MSI_DEFAULT_DOMAIN, desc->msi_index, - desc->msi_index); - } - msi_unlock_descs(dev); + guard(msi_descs_lock)(dev); + if (WARN_ON_ONCE(msi_get_device_domain(dev, MSI_DEFAULT_DOMAIN) != domain)) + return; + msi_domain_free_irqs_range_locked(dev, MSI_DEFAULT_DOMAIN, desc->msi_index, + desc->msi_index); } /** From patchwork Thu Mar 13 13:03:41 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 14014982 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 51C7F267AF2; Thu, 13 Mar 2025 13:03:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871025; cv=none; b=M21eff7Y8O1NpCylBBlbwq44y2TwxPhEecp1lzopW/RD+rcAQXEYzvy60j3uwKcf6vQ0SRpkjuxj+w/Ive64eflSo+urY7nHU/gpi7/bhl/BKY9Dz7QH+4CvjGx9MSuQwuTscZJasYECw0W/ypI75PZRpjdcUW5FE6ci2Sgky2k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871025; c=relaxed/simple; bh=YA+xRKQ1bCPwCGf288P1mFx8wbPz0YHxLW7XpjZA9Ts=; h=Message-ID:From:To:Cc:Subject:References:MIME-Version: Content-Type:Date; b=lAt4zYhpM2Mt9w/CIAh6H4bar81lnaYG5lnCkBFUYZrrZ7MoWNvWIBQpJ8luKr2Of/gTT3b4o0vlRECpQ4dYvdju9OrFiraHe6IPCKml9+oX8vu31+zBZk7A3+35o7gJNXpEf+z+65Uf3c9DnNnahu8TWTFApGZ3uMzQXW3flIM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=jBCOqsEs; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Tjt6d8fp; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="jBCOqsEs"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Tjt6d8fp" Message-ID: <20250313130321.568379110@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1741871021; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=JAGxU1SGJ7l/lZ3n/Ga0dDjuWkVfIFFiS2EUui8rZ10=; b=jBCOqsEsxbelusapNiCzQLbiVnibMNRVP4P0m03xXCnNAGcxhfGotGn/oKERzj+BT4sLeT PcCaYx7mTe1jPEoz0KiN9644Gn1wfg4bKWQVx6ZmsAb9Tcy+Iv6pjJZKhGF8jrtdZaVlaV eVfbEtv125ieSf5if20k/mlXOndg7Y8tf+2FQHsM7F6yYdsS3IZYmnPJjiNo8huhPBSDDt OtHRMsXE3fQi4ncmOHWhjCHo17b81+gMRGUqQ5WDtIO24iROQ2Om0ZReORUmRyWCXFhOp/ osAlJDaoKta/Z84RkgbOs1hiY5SEpg03QIxaFuELBLtMGhs1lRmjJdrsbfcWTg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1741871021; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=JAGxU1SGJ7l/lZ3n/Ga0dDjuWkVfIFFiS2EUui8rZ10=; b=Tjt6d8fpY/80LWp3IWDxeLCOK/2i0mfgvBm22dduGxRY3Cj8Ppf02XfF5NlP4O5Jl9kPYS Kb+NbJsIpsmP6YBA== From: Thomas Gleixner To: LKML Cc: Marc Zyngier , Nishanth Menon , Jonathan Cameron , Dhruva Gole , Tero Kristo , Santosh Shilimkar , Peter Zijlstra , Logan Gunthorpe , Dave Jiang , Jon Mason , Allen Hubbe , ntb@lists.linux.dev, Bjorn Helgaas , linux-pci@vger.kernel.org, Michael Kelley , Wei Liu , Haiyang Zhang , linux-hyperv@vger.kernel.org, Wei Huang , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , linux-scsi@vger.kernel.org, Jonathan Cameron Subject: [patch V2 03/10] soc: ti: ti_sci_inta_msi: Switch MSI descriptor locking to guard() References: <20250313130212.450198939@linutronix.de> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Thu, 13 Mar 2025 14:03:41 +0100 (CET) Convert the code to use the new guard(msi_descs_lock). No functional change intended. Signed-off-by: Thomas Gleixner Tested-by: Nishanth Menon Reviewed-by: Jonathan Cameron Reviewed-by: Dhruva Gole Cc: Tero Kristo Cc: Santosh Shilimkar --- drivers/soc/ti/ti_sci_inta_msi.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) --- a/drivers/soc/ti/ti_sci_inta_msi.c +++ b/drivers/soc/ti/ti_sci_inta_msi.c @@ -103,19 +103,15 @@ int ti_sci_inta_msi_domain_alloc_irqs(st if (ret) return ret; - msi_lock_descs(dev); + guard(msi_descs_lock)(dev); nvec = ti_sci_inta_msi_alloc_descs(dev, res); - if (nvec <= 0) { - ret = nvec; - goto unlock; - } + if (nvec <= 0) + return nvec; /* Use alloc ALL as it's unclear whether there are gaps in the indices */ ret = msi_domain_alloc_irqs_all_locked(dev, MSI_DEFAULT_DOMAIN, nvec); if (ret) dev_err(dev, "Failed to allocate IRQs %d\n", ret); -unlock: - msi_unlock_descs(dev); return ret; } EXPORT_SYMBOL_GPL(ti_sci_inta_msi_domain_alloc_irqs); From patchwork Thu Mar 13 13:03:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 14014983 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 57FE626770C; Thu, 13 Mar 2025 13:03:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871027; cv=none; b=uCKrhoPncdUDORYi2mxG26Jww+JgLKGQXtYiknmPgGrCdxdP7vRrzyW6VRWALiboTrpmwQmWv3uk4lTTI8mtOfrIDolX00eiLQ2XQjfS8OiJ0eeK4CYbhZpxTYlgexyxUFGKnlpq58C36E+VxhnIyTuT4/Pao9zLtdkHV82QCTo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871027; c=relaxed/simple; bh=qVLn6ogbWidzSjCJP5XFPquGm5LxCS8oOzQG4fE1OLI=; h=Message-ID:From:To:Cc:Subject:References:MIME-Version: Content-Type:Date; b=Tg3M2fRG3q3+NO4U/i3crTCRtgGlsvONPGsMhzdHx0ggpOtC3fQRvcd3Ld2FQdBsDJ8Uu4I3k9SYTHqW6c5ojDYrT/YCUfmJLkNJaSxl6+WDvYME17P1d5dkgeK84zmsHFsU6rD3bGs8x+YUOMFVqsEaUZO+1gZjOmoui9sOeXo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=x8loAjsn; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=TYAEDkqy; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="x8loAjsn"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="TYAEDkqy" Message-ID: <20250313130321.631772601@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1741871023; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=0CMM5PtULSzUKaKYGBG7pUG78FCDwJRzCxffhXq5CuA=; b=x8loAjsnVC4+kX/UBoY+UQCY47KTWtRjKwJNd74if6qE+aEmn3tRBBLFYou/gQCtAP77uq hLAs+ZEudkMZ1MaP+LF211snLK7ppIm6IAeSxp7qq9OO3ACtLT3+0SZ+xeVUubcQhgqpER fVbloaXfjAE3w40Rzq68bcHe4vXmERWth5cBp2x5SmDxWvXvzIFmVejGbkGF177T7gFh0M hkJN5wED0wl6PK1r3qcvGq6nJKNXBFY7NAmBQJpxQ4IuZ/ySHYbQGZJXxGx8rVWYZLRlhu B4smMLz15X5Q8j2rH5CO33RFm3E9i4hg8NwuuKMGTJ3pXRcxUZ5Z/aTZUyqaRA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1741871023; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=0CMM5PtULSzUKaKYGBG7pUG78FCDwJRzCxffhXq5CuA=; b=TYAEDkqytacLpGKxYUYm7ZAusYiccvMKB5B6P75fO7P5fmzI6qkr7Z47WRlzKaCYeTqbPD wSqJvYCamb/whtAg== From: Thomas Gleixner To: LKML Cc: Marc Zyngier , Jonathan Cameron , Logan Gunthorpe , Dave Jiang , Jon Mason , Allen Hubbe , ntb@lists.linux.dev, Peter Zijlstra , Nishanth Menon , Dhruva Gole , Tero Kristo , Santosh Shilimkar , Bjorn Helgaas , linux-pci@vger.kernel.org, Michael Kelley , Wei Liu , Haiyang Zhang , linux-hyperv@vger.kernel.org, Wei Huang , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , linux-scsi@vger.kernel.org, Jonathan Cameron Subject: [patch V2 04/10] NTB/msi: Switch MSI descriptor locking to lock guard() References: <20250313130212.450198939@linutronix.de> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Thu, 13 Mar 2025 14:03:43 +0100 (CET) Convert the code to use the new guard(msi_descs_lock). No functional change intended. Signed-off-by: Thomas Gleixner Reviewed-by: Jonathan Cameron Reviewed-by: Logan Gunthorpe Acked-by: Dave Jiang Cc: Jon Mason Cc: Allen Hubbe Cc: ntb@lists.linux.dev --- drivers/ntb/msi.c | 22 ++++++++-------------- 1 file changed, 8 insertions(+), 14 deletions(-) --- a/drivers/ntb/msi.c +++ b/drivers/ntb/msi.c @@ -106,10 +106,10 @@ int ntb_msi_setup_mws(struct ntb_dev *nt if (!ntb->msi) return -EINVAL; - msi_lock_descs(&ntb->pdev->dev); - desc = msi_first_desc(&ntb->pdev->dev, MSI_DESC_ASSOCIATED); - addr = desc->msg.address_lo + ((uint64_t)desc->msg.address_hi << 32); - msi_unlock_descs(&ntb->pdev->dev); + scoped_guard (msi_descs_lock, &ntb->pdev->dev) { + desc = msi_first_desc(&ntb->pdev->dev, MSI_DESC_ASSOCIATED); + addr = desc->msg.address_lo + ((uint64_t)desc->msg.address_hi << 32); + } for (peer = 0; peer < ntb_peer_port_count(ntb); peer++) { peer_widx = ntb_peer_highest_mw_idx(ntb, peer); @@ -289,7 +289,7 @@ int ntbm_msi_request_threaded_irq(struct if (!ntb->msi) return -EINVAL; - msi_lock_descs(dev); + guard(msi_descs_lock)(dev); msi_for_each_desc(entry, dev, MSI_DESC_ASSOCIATED) { if (irq_has_action(entry->irq)) continue; @@ -307,17 +307,11 @@ int ntbm_msi_request_threaded_irq(struct ret = ntbm_msi_setup_callback(ntb, entry, msi_desc); if (ret) { devm_free_irq(&ntb->dev, entry->irq, dev_id); - goto unlock; + return ret; } - - ret = entry->irq; - goto unlock; + return entry->irq; } - ret = -ENODEV; - -unlock: - msi_unlock_descs(dev); - return ret; + return -ENODEV; } EXPORT_SYMBOL(ntbm_msi_request_threaded_irq); From patchwork Thu Mar 13 13:03:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 14014984 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 42440267700; Thu, 13 Mar 2025 13:03:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871029; cv=none; b=haJNmL0TL1vjTdH4lLSgZxTtodaxzXE37l5zhI/ghszIiRicM2i0ookFi6qdQ2FC26N5O3pP64SXEGEBUfnqp3QN936iEnaoQhQboHiKaTokGh8lragDDpstHWno/YbrotP/ouldOAQHd/2DEfGAsZ3gz24HYTy2phvaFim8AAM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871029; c=relaxed/simple; bh=cx8watuVEcwW1z7vRSIXe+666/Fm5rLf1SxhxLsAvKk=; h=Message-ID:From:To:Cc:Subject:References:MIME-Version: Content-Type:Date; b=MLibcc5kQbKaHQDPYPCroRSTfxNxJxZFIpSWXLSjRHMgaArqUrAFnhpYN55rbpyRbqRAVfEoSn/sgnLktEsb4AWUOJkuEAEj/9SsXpJ77No6GlUvB3ocWmLHYivPtA2sUb3aPKGwQXyxCcg/LhKPl2HM1Jw8V2fmDLuq1fO15Vw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=e01Iv4Fk; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=SFrML0FQ; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="e01Iv4Fk"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="SFrML0FQ" Message-ID: <20250313130321.695027112@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1741871025; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=dLiv+G0W8KNuVAfifTgpex2IB55icVGIsn+3LH/RJ0A=; b=e01Iv4FkOFkVzkMSq5Rtl/y5YuKc7B8fBpnYaxi9Cip+/81X4GdFBgv3XcpVRvF7onhyhD eR07tApeePo8zFjGd7JfJW0nvkM02X4pLTiLEw0F40QHgX+UhxK6zFq+RRZWgMWQ68kVCh rEslhH9HjVxEu81IZmahHvSz6HfncHqkbt7XfT72vhEloF1moADFqN+xDkMeItgrCOssla 7aLRY+vKSX6f4jkxSaHEcpYz0m8vy6ulHkKETQkZi5bGxmo25axTbB7sItZErhFP1ArTRi OHs+M4QfoO8bhyjKP0pw6R/c8vJB6KLrwD+bcdCZOYMI0JxR0IV9dTRABWV5tQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1741871025; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=dLiv+G0W8KNuVAfifTgpex2IB55icVGIsn+3LH/RJ0A=; b=SFrML0FQlaH4aRgr9uAJYi/rRz6FaWpQJ+Vrz2EbNWg+otECuLf8RMQhOnXobcV6J5NuoK yJBmxTatQZ1GmjAQ== From: Thomas Gleixner To: LKML Cc: Marc Zyngier , Bjorn Helgaas , linux-pci@vger.kernel.org, Peter Zijlstra , Nishanth Menon , Jonathan Cameron , Dhruva Gole , Tero Kristo , Santosh Shilimkar , Logan Gunthorpe , Dave Jiang , Jon Mason , Allen Hubbe , ntb@lists.linux.dev, Michael Kelley , Wei Liu , Haiyang Zhang , linux-hyperv@vger.kernel.org, Wei Huang , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , linux-scsi@vger.kernel.org, Jonathan Cameron Subject: [patch V2 05/10] PCI/MSI: Switch to MSI descriptor locking to guard() References: <20250313130212.450198939@linutronix.de> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Thu, 13 Mar 2025 14:03:44 +0100 (CET) Convert the code to use the new guard(msi_descs_lock). No functional change intended. Signed-off-by: Thomas Gleixner Cc: Bjorn Helgaas Cc: linux-pci@vger.kernel.org Reviewed-by: Jonathan Cameron --- V2: Remove the gotos - Jonathan --- drivers/pci/msi/api.c | 6 -- drivers/pci/msi/msi.c | 121 ++++++++++++++++++++++++-------------------------- 2 files changed, 62 insertions(+), 65 deletions(-) --- a/drivers/pci/msi/api.c +++ b/drivers/pci/msi/api.c @@ -53,10 +53,9 @@ void pci_disable_msi(struct pci_dev *dev if (!pci_msi_enabled() || !dev || !dev->msi_enabled) return; - msi_lock_descs(&dev->dev); + guard(msi_descs_lock)(&dev->dev); pci_msi_shutdown(dev); pci_free_msi_irqs(dev); - msi_unlock_descs(&dev->dev); } EXPORT_SYMBOL(pci_disable_msi); @@ -196,10 +195,9 @@ void pci_disable_msix(struct pci_dev *de if (!pci_msi_enabled() || !dev || !dev->msix_enabled) return; - msi_lock_descs(&dev->dev); + guard(msi_descs_lock)(&dev->dev); pci_msix_shutdown(dev); pci_free_msi_irqs(dev); - msi_unlock_descs(&dev->dev); } EXPORT_SYMBOL(pci_disable_msix); --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -336,41 +336,11 @@ static int msi_verify_entries(struct pci return !entry ? 0 : -EIO; } -/** - * msi_capability_init - configure device's MSI capability structure - * @dev: pointer to the pci_dev data structure of MSI device function - * @nvec: number of interrupts to allocate - * @affd: description of automatic IRQ affinity assignments (may be %NULL) - * - * Setup the MSI capability structure of the device with the requested - * number of interrupts. A return value of zero indicates the successful - * setup of an entry with the new MSI IRQ. A negative return value indicates - * an error, and a positive return value indicates the number of interrupts - * which could have been allocated. - */ -static int msi_capability_init(struct pci_dev *dev, int nvec, - struct irq_affinity *affd) +static int __msi_capability_init(struct pci_dev *dev, int nvec, struct irq_affinity_desc *masks) { - struct irq_affinity_desc *masks = NULL; + int ret = msi_setup_msi_desc(dev, nvec, masks); struct msi_desc *entry, desc; - int ret; - - /* Reject multi-MSI early on irq domain enabled architectures */ - if (nvec > 1 && !pci_msi_domain_supports(dev, MSI_FLAG_MULTI_PCI_MSI, ALLOW_LEGACY)) - return 1; - - /* - * Disable MSI during setup in the hardware, but mark it enabled - * so that setup code can evaluate it. - */ - pci_msi_set_enable(dev, 0); - dev->msi_enabled = 1; - - if (affd) - masks = irq_create_affinity_masks(nvec, affd); - msi_lock_descs(&dev->dev); - ret = msi_setup_msi_desc(dev, nvec, masks); if (ret) goto fail; @@ -399,19 +369,48 @@ static int msi_capability_init(struct pc pcibios_free_irq(dev); dev->irq = entry->irq; - goto unlock; - + return 0; err: pci_msi_unmask(&desc, msi_multi_mask(&desc)); pci_free_msi_irqs(dev); fail: dev->msi_enabled = 0; -unlock: - msi_unlock_descs(&dev->dev); - kfree(masks); return ret; } +/** + * msi_capability_init - configure device's MSI capability structure + * @dev: pointer to the pci_dev data structure of MSI device function + * @nvec: number of interrupts to allocate + * @affd: description of automatic IRQ affinity assignments (may be %NULL) + * + * Setup the MSI capability structure of the device with the requested + * number of interrupts. A return value of zero indicates the successful + * setup of an entry with the new MSI IRQ. A negative return value indicates + * an error, and a positive return value indicates the number of interrupts + * which could have been allocated. + */ +static int msi_capability_init(struct pci_dev *dev, int nvec, + struct irq_affinity *affd) +{ + /* Reject multi-MSI early on irq domain enabled architectures */ + if (nvec > 1 && !pci_msi_domain_supports(dev, MSI_FLAG_MULTI_PCI_MSI, ALLOW_LEGACY)) + return 1; + + /* + * Disable MSI during setup in the hardware, but mark it enabled + * so that setup code can evaluate it. + */ + pci_msi_set_enable(dev, 0); + dev->msi_enabled = 1; + + struct irq_affinity_desc *masks __free(kfree) = + affd ? irq_create_affinity_masks(nvec, affd) : NULL; + + guard(msi_descs_lock)(&dev->dev); + return __msi_capability_init(dev, nvec, masks); +} + int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, struct irq_affinity *affd) { @@ -666,37 +665,37 @@ static void msix_mask_all(void __iomem * writel(ctrl, base + PCI_MSIX_ENTRY_VECTOR_CTRL); } -static int msix_setup_interrupts(struct pci_dev *dev, struct msix_entry *entries, - int nvec, struct irq_affinity *affd) +static int __msix_setup_interrupts(struct pci_dev *dev, struct msix_entry *entries, + int nvec, struct irq_affinity_desc *masks) { - struct irq_affinity_desc *masks = NULL; - int ret; + int ret = msix_setup_msi_descs(dev, entries, nvec, masks); - if (affd) - masks = irq_create_affinity_masks(nvec, affd); - - msi_lock_descs(&dev->dev); - ret = msix_setup_msi_descs(dev, entries, nvec, masks); if (ret) - goto out_free; + return ret; ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX); if (ret) - goto out_free; + return ret; /* Check if all MSI entries honor device restrictions */ ret = msi_verify_entries(dev); if (ret) - goto out_free; + return ret; msix_update_entries(dev, entries); - goto out_unlock; + return 0; +} -out_free: - pci_free_msi_irqs(dev); -out_unlock: - msi_unlock_descs(&dev->dev); - kfree(masks); +static int msix_setup_interrupts(struct pci_dev *dev, struct msix_entry *entries, + int nvec, struct irq_affinity *affd) +{ + struct irq_affinity_desc *masks __free(kfree) = + affd ? irq_create_affinity_masks(nvec, affd) : NULL; + + guard(msi_descs_lock)(&dev->dev); + int ret = __msix_setup_interrupts(dev, entries, nvec, masks); + if (ret) + pci_free_msi_irqs(dev); return ret; } @@ -871,13 +870,13 @@ void __pci_restore_msix_state(struct pci write_msg = arch_restore_msi_irqs(dev); - msi_lock_descs(&dev->dev); - msi_for_each_desc(entry, &dev->dev, MSI_DESC_ALL) { - if (write_msg) - __pci_write_msi_msg(entry, &entry->msg); - pci_msix_write_vector_ctrl(entry, entry->pci.msix_ctrl); + scoped_guard (msi_descs_lock, &dev->dev) { + msi_for_each_desc(entry, &dev->dev, MSI_DESC_ALL) { + if (write_msg) + __pci_write_msi_msg(entry, &entry->msg); + pci_msix_write_vector_ctrl(entry, entry->pci.msix_ctrl); + } } - msi_unlock_descs(&dev->dev); pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0); } From patchwork Thu Mar 13 13:03:46 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 14014985 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A2D12686A7; Thu, 13 Mar 2025 13:03:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871030; cv=none; b=YMdAr4dAztx3uEtGxP2wu+N+fRkyuX2U3dgcPJYbZ9qKLAF2nnD/Jh3vad3jTpNWY+txEN4mpg2ahU/ruzywsZNImSf0mJrL6M5EZxgZckD3fUvqhD2TO8HFpTA6jn6bD/9pwfhmJaD2koTNq5RF1alii/KJECBg+wnE9veCblI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871030; c=relaxed/simple; bh=9i1aJ8qWulAmg/dYGGOWI20bIOPVKt/oVPRMd7Z+pD4=; h=Message-ID:From:To:Cc:Subject:References:MIME-Version: Content-Type:Date; b=K3N1aTlZSc9v8Gyvm9q0iFtQEUaTV6LmDlY7pKnUFL6ehsudMIIakQd9FA/Lp+xGNnekZMC8ZY1PVrP1MYlWRaFExFXp4zkCX09fmwGw0Lu/0H2vNz4LXoTiIjU7/MNbEkJB9pQGbttyyMDLo6xIGlp6Exyy9LPyaw/WYVABqv0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Excbi3s1; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=jfqVmJ6+; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Excbi3s1"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="jfqVmJ6+" Message-ID: <20250313130321.758905320@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1741871027; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=itIv7ByiHV7P2pJ+IbyJNFhivtoUlfzZdqMqvWLFhgs=; b=Excbi3s1DtT3QO820qb5czupDlXmRZsoQRpBGpvK92Xo0ijnoLO97t9nQOyksHlordRcEq yRIC5DDmJI7Syx8g33wwE/vy3qVWb65nCHYsABug7AqtgJpQL7bhOImrtCJlJAa6bBKgHV DNRvm3DKmw8a3us4A9mU42aalhn3Mqu57TH9nuoWsh1SnjEXJO6ioOcVwArDWeIuWptoJN U646U7jwYEW7qBzcKZ1iUFYdVinPtECsmLMNoNLTZFK1LL8Kh3azq/jDqas5W79vz0UrEv C9rUEEBNQhTJZDymxk08AhsYbymzaI6EFY2fFMBX3YtmGh4Mcp/rjV6kEINU3Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1741871027; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=itIv7ByiHV7P2pJ+IbyJNFhivtoUlfzZdqMqvWLFhgs=; b=jfqVmJ6+yxvC7C06YY7zxcO2cbhHnaSXC9NCoAAE6oYZqvNT3DwGSigdM1iywhj9lZp5Yx s8aA4mSdDQXMCbDA== From: Thomas Gleixner To: LKML Cc: Marc Zyngier , Jonathan Cameron , Michael Kelley , Wei Liu , Bjorn Helgaas , Haiyang Zhang , linux-hyperv@vger.kernel.org, linux-pci@vger.kernel.org, Peter Zijlstra , Nishanth Menon , Dhruva Gole , Tero Kristo , Santosh Shilimkar , Logan Gunthorpe , Dave Jiang , Jon Mason , Allen Hubbe , ntb@lists.linux.dev, Wei Huang , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , linux-scsi@vger.kernel.org, Jonathan Cameron Subject: [patch V2 06/10] PCI: hv: Switch MSI descriptor locking to guard() References: <20250313130212.450198939@linutronix.de> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Thu, 13 Mar 2025 14:03:46 +0100 (CET) Convert the code to use the new guard(msi_descs_lock). No functional change intended. Signed-off-by: Thomas Gleixner Reviewed-by: Jonathan Cameron Reviewed-by: Michael Kelley Acked-by: Wei Liu Acked-by: Bjorn Helgaas Cc: Haiyang Zhang Cc: linux-hyperv@vger.kernel.org Cc: linux-pci@vger.kernel.org --- drivers/pci/controller/pci-hyperv.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) --- a/drivers/pci/controller/pci-hyperv.c +++ b/drivers/pci/controller/pci-hyperv.c @@ -3976,24 +3976,18 @@ static int hv_pci_restore_msi_msg(struct { struct irq_data *irq_data; struct msi_desc *entry; - int ret = 0; if (!pdev->msi_enabled && !pdev->msix_enabled) return 0; - msi_lock_descs(&pdev->dev); + guard(msi_descs_lock)(&pdev->dev); msi_for_each_desc(entry, &pdev->dev, MSI_DESC_ASSOCIATED) { irq_data = irq_get_irq_data(entry->irq); - if (WARN_ON_ONCE(!irq_data)) { - ret = -EINVAL; - break; - } - + if (WARN_ON_ONCE(!irq_data)) + return -EINVAL; hv_compose_msi_msg(irq_data, &entry->msg); } - msi_unlock_descs(&pdev->dev); - - return ret; + return 0; } /* From patchwork Thu Mar 13 13:03:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 14014986 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 78B6B268C60; Thu, 13 Mar 2025 13:03:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871032; cv=none; b=gXgcYSNYFnG8pTi+8kHy/KbxUiImwYKoUUp7MFKD6CIxO4nGrH/RKwbY/R6QNELFOKfqbfVNn7RsScoOiqwFJaO8bOcpULm7+hl6ucT3Wug5hWiAuFSt+zpBlVCV9MD18fb8CHpawXRePtF2r8gOXuyPfv2RwmYBhuqRuAI7chk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871032; c=relaxed/simple; bh=GVWgBVz76iiyTkBIsI+YrrMsy1toetdlK1fgPEkZEQ8=; h=Message-ID:From:To:Cc:Subject:References:MIME-Version: Content-Type:Date; b=iVXkOp9ajYqrGhN3tr5Ew0Hci6F+8nQ7CmVny1XeTTwShOBGlbFCg0dA6P1CttFbipZHMkssgAOjYK9Pkjm8IRXvU3I4j7DSGqV1vfo5Hhcdf8nVPuGqBt5qSWVIHpPAMFf9pj8i5KH7O099jnmpLxl/zAO0Irn+QUjXHtLHOuw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=fY2fJFVQ; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=F0g6U9v3; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="fY2fJFVQ"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="F0g6U9v3" Message-ID: <20250313130321.822790423@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1741871028; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=JBW9gq+Dmwfzny4pdCzH+bh7Q9MJFTAgc8xClBz3MXs=; b=fY2fJFVQ7bdDaCzEK5BeQ26F//oyqcbCmwLbqxOjP3Ua/AGAHuGZhvCsHOyS+z/ggaVlDu dzTrSrIayKv8HKINVndBu5jtcBmjHEeF6oB8vnvnWy96lCy08p7MZTgWpbdGrk9fn0Uy72 RCZ3/zxWW9r6pOW6HN1tKutmfCVwPw7NfuUK18d0l/PJkj5/shIhl2YsMCKHKPlU718I7E wEWmyJgRRAfx6PY46fZvBxm6X4qA5m/Jp+/3otrXwfekVr4mZwDVW6n9VXc9X3xoVzWo1+ oXNJjkRJt/1VhFDOBZjYMgqmz7L58Sb4VuDND3Zqd3eKovH02LnlCZZIaGt4wg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1741871028; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=JBW9gq+Dmwfzny4pdCzH+bh7Q9MJFTAgc8xClBz3MXs=; b=F0g6U9v33Dmv6/N876MVdoaRL/B8WwcFvKCHrwpO9A2IDervForozvVXvP5ssvfiz4U7Ve A3vcLPyTTtn8R5Dg== From: Thomas Gleixner To: LKML Cc: Marc Zyngier , Bjorn Helgaas , Wei Huang , linux-pci@vger.kernel.org, Peter Zijlstra , Nishanth Menon , Jonathan Cameron , Dhruva Gole , Tero Kristo , Santosh Shilimkar , Logan Gunthorpe , Dave Jiang , Jon Mason , Allen Hubbe , ntb@lists.linux.dev, Michael Kelley , Wei Liu , Haiyang Zhang , linux-hyperv@vger.kernel.org, Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , linux-scsi@vger.kernel.org, Jonathan Cameron Subject: [patch V2 07/10] PCI/MSI: Provide a sane mechanism for TPH References: <20250313130212.450198939@linutronix.de> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Thu, 13 Mar 2025 14:03:48 +0100 (CET) The PCI/TPH driver fiddles with the MSI-X control word of an active interrupt completely unserialized against concurrent operations issued from the interrupt core. It also brings the PCI/MSI-X internal cached control word out of sync. Provide a function, which has the required serialization and keeps the control word cache in sync. Unfortunately this requires to look up and lock the interrupt descriptor, which should be only done in the interrupt core code. But confining this particular oddity in the PCI/MSI core is the lesser of all evil. A interrupt core implementation would require a larger pile of infrastructure and indirections for dubious value. Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas Cc: Wei Huang Cc: linux-pci@vger.kernel.org --- drivers/pci/msi/msi.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ drivers/pci/pci.h | 9 +++++++++ 2 files changed, 56 insertions(+) --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -910,6 +910,53 @@ void pci_free_msi_irqs(struct pci_dev *d } } +#ifdef CONFIG_PCIE_TPH +/** + * pci_msix_write_tph_tag - Update the TPH tag for a given MSI-X vector + * @pdev: The PCIe device to update + * @index: The MSI-X index to update + * @tag: The tag to write + * + * Returns: 0 on success, error code on failure + */ +int pci_msix_write_tph_tag(struct pci_dev *pdev, unsigned int index, u16 tag) +{ + struct msi_desc *msi_desc; + struct irq_desc *irq_desc; + unsigned int virq; + + if (!pdev->msix_enabled) + return -ENXIO; + + guard(msi_descs_lock)(&pdev->dev); + virq = msi_get_virq(&pdev->dev, index); + if (!virq) + return -ENXIO; + /* + * This is a horrible hack, but short of implementing a PCI + * specific interrupt chip callback and a huge pile of + * infrastructure, this is the minor nuissance. It provides the + * protection against concurrent operations on this entry and keeps + * the control word cache in sync. + */ + irq_desc = irq_to_desc(virq); + if (!irq_desc) + return -ENXIO; + + guard(raw_spinlock_irq)(&irq_desc->lock); + msi_desc = irq_data_get_msi_desc(&irq_desc->irq_data); + if (!msi_desc || msi_desc->pci.msi_attrib.is_virtual) + return -ENXIO; + + msi_desc->pci.msix_ctrl &= ~PCI_MSIX_ENTRY_CTRL_ST; + msi_desc->pci.msix_ctrl |= FIELD_PREP(PCI_MSIX_ENTRY_CTRL_ST, tag); + pci_msix_write_vector_ctrl(msi_desc, msi_desc->pci.msix_ctrl); + /* Flush the write */ + readl(pci_msix_desc_addr(msi_desc)); + return 0; +} +#endif + /* Misc. infrastructure */ struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc) --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -989,6 +989,15 @@ int pcim_request_region_exclusive(struct const char *name); void pcim_release_region(struct pci_dev *pdev, int bar); +#ifdef CONFIG_PCI_MSI +int pci_msix_write_tph_tag(struct pci_dev *pdev, unsigned int index, u16 tag); +#else +static inline int pci_msix_write_tph_tag(struct pci_dev *pdev, unsigned int index, u16 tag) +{ + return -ENODEV; +} +#endif + /* * Config Address for PCI Configuration Mechanism #1 * From patchwork Thu Mar 13 13:03:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 14014987 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DF497268C7A; Thu, 13 Mar 2025 13:03:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871033; cv=none; b=VvfbP/uT/49RyXGUop9NjhvEWJoDSEiMPbQx5rzXKIP53VpftoAwhFSIt4EV1LvQJFrzyzV2LR12LI+/ISBVaxpRt7wEmkoVB8vrWDApk92X33elKZmmLawjt4JfzwCiHdeCSXI/74yW6J3llM+5fK5UjgnwltSqhVoQZ7/QTCw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871033; c=relaxed/simple; bh=x5cX0aoOdbYTPk45mqAt6KtNcA84j7hnJw1NaQmAzGM=; h=Message-ID:From:To:Cc:Subject:References:MIME-Version: Content-Type:Date; b=mMyvnITd3pIt26VrhP5zEV0T98NpUKOYoFrelcOJiJbHy9Ep15GwVdg+mhxjCw/+RG9zMmTBqAjYD1/1ZiaXmmiPmxrKLcIqHV3YhhUeAv9MMFrnMWV9Ltta/L9zuVF0cW0WOMwkGW0TPWiBSpmpQqejVQgcqkkJy8paiPzusl0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=NtpHq2hS; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=L50Mu6hV; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="NtpHq2hS"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="L50Mu6hV" Message-ID: <20250313130321.898592817@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1741871030; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=JS2z1O/KmW5u4BttxakywuyzKwIcG0AVCKTp1FgyzQM=; b=NtpHq2hSNMc2ZG3+w6P9RdUzxcKjLVSGDmgYPbToNCFsBogvedVNfySCnN7SP2aoBtfs4r tEwFy8e6VW1LGypRr4R/mWYy3a/eqbhtTMGdjSLUXa80UJq81DVCvN3FJC11ERnN1rKUvs nU0AlR+MSS3WCaYYTUWu/aagSqKone0qdBrqNw5mCA7wtkd3xRpcOUEu/oQDTAoJvWdbEZ EhtUAeoVggaBJZ/pqOVH2nJDbMiYo7/nJVlv2s5UIK9tVvqo83BBAJwdCfnjJOTWMIcc2r AEDt34SE+EEznogy39zM3HCpfpEEIzvYy8Nd7MebnCw9qI9U5iVt2YiYbwwlGA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1741871030; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=JS2z1O/KmW5u4BttxakywuyzKwIcG0AVCKTp1FgyzQM=; b=L50Mu6hVS6WjSGZ8VyPsrl7KULe+YlyE/ssnhQL2nlNwFfgabUxuKuEKKCQpxXnp+VFwUg TOSQQ86lMrXluZCg== From: Thomas Gleixner To: LKML Cc: Marc Zyngier , Bjorn Helgaas , Wei Huang , linux-pci@vger.kernel.org, Peter Zijlstra , Nishanth Menon , Jonathan Cameron , Dhruva Gole , Tero Kristo , Santosh Shilimkar , Logan Gunthorpe , Dave Jiang , Jon Mason , Allen Hubbe , ntb@lists.linux.dev, Michael Kelley , Wei Liu , Haiyang Zhang , linux-hyperv@vger.kernel.org, Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , linux-scsi@vger.kernel.org, Jonathan Cameron Subject: [patch V2 08/10] PCI/TPH: Replace the broken MSI-X control word update References: <20250313130212.450198939@linutronix.de> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Thu, 13 Mar 2025 14:03:50 +0100 (CET) The driver walks the MSI descriptors to test whether a descriptor exists for a given index. That's just abuse of the MSI internals. The same test can be done with a single function call by looking up whether there is a Linux interrupt number assigned at the index. What's worse is that the function is completely unserialized against modifications of the MSI-X control by operations issued from the interrupt core. It also brings the PCI/MSI-X internal cached control word out of sync. Remove the trainwreck and invoke the function provided by the PCI/MSI core to update it. Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas Cc: Wei Huang Cc: linux-pci@vger.kernel.org --- drivers/pci/tph.c | 44 +------------------------------------------- 1 file changed, 1 insertion(+), 43 deletions(-) --- a/drivers/pci/tph.c +++ b/drivers/pci/tph.c @@ -204,48 +204,6 @@ static u8 get_rp_completer_type(struct p return FIELD_GET(PCI_EXP_DEVCAP2_TPH_COMP_MASK, reg); } -/* Write ST to MSI-X vector control reg - Return 0 if OK, otherwise -errno */ -static int write_tag_to_msix(struct pci_dev *pdev, int msix_idx, u16 tag) -{ -#ifdef CONFIG_PCI_MSI - struct msi_desc *msi_desc = NULL; - void __iomem *vec_ctrl; - u32 val; - int err = 0; - - msi_lock_descs(&pdev->dev); - - /* Find the msi_desc entry with matching msix_idx */ - msi_for_each_desc(msi_desc, &pdev->dev, MSI_DESC_ASSOCIATED) { - if (msi_desc->msi_index == msix_idx) - break; - } - - if (!msi_desc) { - err = -ENXIO; - goto err_out; - } - - /* Get the vector control register (offset 0xc) pointed by msix_idx */ - vec_ctrl = pdev->msix_base + msix_idx * PCI_MSIX_ENTRY_SIZE; - vec_ctrl += PCI_MSIX_ENTRY_VECTOR_CTRL; - - val = readl(vec_ctrl); - val &= ~PCI_MSIX_ENTRY_CTRL_ST; - val |= FIELD_PREP(PCI_MSIX_ENTRY_CTRL_ST, tag); - writel(val, vec_ctrl); - - /* Read back to flush the update */ - val = readl(vec_ctrl); - -err_out: - msi_unlock_descs(&pdev->dev); - return err; -#else - return -ENODEV; -#endif -} - /* Write tag to ST table - Return 0 if OK, otherwise -errno */ static int write_tag_to_st_table(struct pci_dev *pdev, int index, u16 tag) { @@ -346,7 +304,7 @@ int pcie_tph_set_st_entry(struct pci_dev switch (loc) { case PCI_TPH_LOC_MSIX: - err = write_tag_to_msix(pdev, index, tag); + err = pci_msix_write_tph_tag(pdev, index, tag); break; case PCI_TPH_LOC_CAP: err = write_tag_to_st_table(pdev, index, tag); From patchwork Thu Mar 13 13:03:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 14014988 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 987B2268FEE; Thu, 13 Mar 2025 13:03:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871035; cv=none; b=WzDW2skX5qdKiwRsz2BY7eVdtLStoYa/6c3YsEtXRsKbocfFbtYLYRo6oDCC653xsAPfnvECQC7WSXuKcMCyxeVQW9TyQbnqnENoxwLdCbvTeJmGH5Gj/RCHMC16NIFIe+ZpKdeyTOUqzMAb8jydccvWnrXvxccwnL87K1V13fw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871035; c=relaxed/simple; bh=lqlTmEWhQiqcWBuXZh4dCP2TjwqZQINlnA32jCQm+RI=; h=Message-ID:From:To:Cc:Subject:References:MIME-Version: Content-Type:Date; b=Flc84lmTLFKcRd3FIwkiBQw+eL0F2NPeKia5qmV6vmUqxLLy3YsRREtjRuZp0U/OGKdDWd/jk/bjijbPbNu+EsDOLLEGHfvtKDCyySjqZpa5/Lv23BDU3/0Kf/3LassOc9JFz1+VXf2JQXzTqKZbYD0yoPDpSPodEEDcCujrsIU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=LlXRK72e; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=6CVsO4/4; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="LlXRK72e"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="6CVsO4/4" Message-ID: <20250313130321.963504017@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1741871032; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=QyPtEZ6gAMvrlmV7htKifTzspcxE2hLV05+DzaYNZ+0=; b=LlXRK72ed+vkJjkUtgyVBAAk0uA/nDbDp/tnpDFnkrxqg1s+D1mlTYqhHA023JDvPrGDzP zsikJbyMSUzdZgKtTz/Wa7bS7wuMZH9+odVtBp5WJfYkVUKE71LsKoXbRV4VfLUFTH3FQa C7aHtcEjbGapFwF27yI5RNMmGeee7BH5TwaHuigpCXYLI9Bc0/TQGZpgx4zs723OMjTk8q tjB0LMzCpbGTpe3o+0/rTzrnhetEHStHIwS9wukUpr3G64zdUgxVG1dkgj6hnq/mTLfxyf X2wbwHQHTCYnSYYNfy0+4FzLu0ULFPNcJjgfO5ErU/jVBLSU1Ltgl3QvDV6R7Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1741871032; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=QyPtEZ6gAMvrlmV7htKifTzspcxE2hLV05+DzaYNZ+0=; b=6CVsO4/4rSSslzUGgG6CzYibiESlnCshRD02yAGpqtUKifj8Pu5XD9/C1xtV5eQWumk8BQ uh4OMyWNUXCA8BAA== From: Thomas Gleixner To: LKML Cc: Marc Zyngier , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , linux-scsi@vger.kernel.org, Peter Zijlstra , Nishanth Menon , Jonathan Cameron , Dhruva Gole , Tero Kristo , Santosh Shilimkar , Logan Gunthorpe , Dave Jiang , Jon Mason , Allen Hubbe , ntb@lists.linux.dev, Bjorn Helgaas , linux-pci@vger.kernel.org, Michael Kelley , Wei Liu , Haiyang Zhang , linux-hyperv@vger.kernel.org, Wei Huang , Jonathan Cameron Subject: [patch V2 09/10] scsi: ufs: qcom: Remove the MSI descriptor abuse References: <20250313130212.450198939@linutronix.de> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Thu, 13 Mar 2025 14:03:51 +0100 (CET) The driver abuses the MSI descriptors for internal purposes. Aside of core code and MSI providers nothing has to care about their existence. They have been encapsulated with a lot of effort because this kind of abuse caused all sorts of issues including a maintainability nightmare. Rewrite the code so it uses dedicated storage to hand the required information to the interrupt handler. No functional change intended. Signed-off-by: Thomas Gleixner Cc: Manivannan Sadhasivam Cc: "James E.J. Bottomley" Cc: "Martin K. Petersen" Cc: linux-scsi@vger.kernel.org --- drivers/ufs/host/ufs-qcom.c | 77 ++++++++++++++++++++++---------------------- 1 file changed, 40 insertions(+), 37 deletions(-) --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -1782,15 +1782,19 @@ static void ufs_qcom_write_msi_msg(struc ufshcd_mcq_config_esi(hba, msg); } +struct ufs_qcom_irq { + unsigned int irq; + unsigned int idx; + struct ufs_hba *hba; +}; + static irqreturn_t ufs_qcom_mcq_esi_handler(int irq, void *data) { - struct msi_desc *desc = data; - struct device *dev = msi_desc_to_dev(desc); - struct ufs_hba *hba = dev_get_drvdata(dev); - u32 id = desc->msi_index; - struct ufs_hw_queue *hwq = &hba->uhq[id]; + struct ufs_qcom_irq *qi = data; + struct ufs_hba *hba = qi->hba; + struct ufs_hw_queue *hwq = &hba->uhq[qi->idx]; - ufshcd_mcq_write_cqis(hba, 0x1, id); + ufshcd_mcq_write_cqis(hba, 0x1, qi->idx); ufshcd_mcq_poll_cqe_lock(hba, hwq); return IRQ_HANDLED; @@ -1799,8 +1803,7 @@ static irqreturn_t ufs_qcom_mcq_esi_hand static int ufs_qcom_config_esi(struct ufs_hba *hba) { struct ufs_qcom_host *host = ufshcd_get_variant(hba); - struct msi_desc *desc; - struct msi_desc *failed_desc = NULL; + struct ufs_qcom_irq *qi; int nr_irqs, ret; if (host->esi_enabled) @@ -1811,47 +1814,47 @@ static int ufs_qcom_config_esi(struct uf * 2. Poll queues do not need ESI. */ nr_irqs = hba->nr_hw_queues - hba->nr_queues[HCTX_TYPE_POLL]; + qi = devm_kcalloc(hba->dev, nr_irqs, sizeof(*qi), GFP_KERNEL); + if (qi) + return -ENOMEM; + ret = platform_device_msi_init_and_alloc_irqs(hba->dev, nr_irqs, ufs_qcom_write_msi_msg); if (ret) { dev_err(hba->dev, "Failed to request Platform MSI %d\n", ret); - return ret; + goto cleanup; } - msi_lock_descs(hba->dev); - msi_for_each_desc(desc, hba->dev, MSI_DESC_ALL) { - ret = devm_request_irq(hba->dev, desc->irq, - ufs_qcom_mcq_esi_handler, - IRQF_SHARED, "qcom-mcq-esi", desc); + for (int idx = 0; idx < nr_irqs; idx++) { + qi[idx].irq = msi_get_virq(hba->dev, idx); + qi[idx].idx = idx; + qi[idx].hba = hba; + + ret = devm_request_irq(hba->dev, qi[idx].irq, ufs_qcom_mcq_esi_handler, + IRQF_SHARED, "qcom-mcq-esi", qi + idx); if (ret) { dev_err(hba->dev, "%s: Fail to request IRQ for %d, err = %d\n", - __func__, desc->irq, ret); - failed_desc = desc; - break; + __func__, qi[idx].irq, ret); + qi[idx].irq = 0; + goto cleanup; } } - msi_unlock_descs(hba->dev); - if (ret) { - /* Rewind */ - msi_lock_descs(hba->dev); - msi_for_each_desc(desc, hba->dev, MSI_DESC_ALL) { - if (desc == failed_desc) - break; - devm_free_irq(hba->dev, desc->irq, hba); - } - msi_unlock_descs(hba->dev); - platform_device_msi_free_irqs_all(hba->dev); - } else { - if (host->hw_ver.major == 6 && host->hw_ver.minor == 0 && - host->hw_ver.step == 0) - ufshcd_rmwl(hba, ESI_VEC_MASK, - FIELD_PREP(ESI_VEC_MASK, MAX_ESI_VEC - 1), - REG_UFS_CFG3); - ufshcd_mcq_enable_esi(hba); - host->esi_enabled = true; + if (host->hw_ver.major == 6 && host->hw_ver.minor == 0 && + host->hw_ver.step == 0) { + ufshcd_rmwl(hba, ESI_VEC_MASK, + FIELD_PREP(ESI_VEC_MASK, MAX_ESI_VEC - 1), + REG_UFS_CFG3); } - + ufshcd_mcq_enable_esi(hba); + host->esi_enabled = true; + return 0; + +cleanup: + for (int idx = 0; qi[idx].irq; idx++) + devm_free_irq(hba->dev, qi[idx].irq, hba); + platform_device_msi_free_irqs_all(hba->dev); + devm_kfree(hba->dev, qi); return ret; } From patchwork Thu Mar 13 13:03:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 14014989 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55A902690E3; Thu, 13 Mar 2025 13:03:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871036; cv=none; b=LC94Fhy39A4h/DJE0Y5LgO7uxSukzkNkHzIIGZn8vcvRsQUg8jBxOOgd3mbFLEH/sPPmuRyfUds7+fdSaSdjeDwgkcwd3SfvQNRElcG2n6Xm14kCAS88GHrRmbzjBei4WMeOh+zH7imNXalIgOuKEFm5YA2iLeXv+qASEBja6x0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741871036; c=relaxed/simple; bh=ziAUb6xXmsqMxAmD+XpOIfqe60CvD7tMtpsaSqUF2VQ=; h=Message-ID:From:To:Cc:Subject:References:MIME-Version: Content-Type:Date; b=pE3o78bHXDpMG6L8HVr/82YMSubZkuByI2REt+yf3WkweDIp2CaZOCsCKVV6rwIgWyj+hYzCYssROW9M+8RKlfiQPSNT0fMK7VeyfTQffgkDXiFtesOFIXZLiogLn1560V6NdZPaE0jq1+5jbU0eM7EbkUMwNXtrIOhwUI7+vzY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=M/g2FUp4; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=3KqNIfwg; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="M/g2FUp4"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="3KqNIfwg" Message-ID: <20250313130322.027190131@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1741871034; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=syj4DKiPqVRJ4tJ6hdHCsNz/PeEgBfCP7TCfi1O9n7E=; b=M/g2FUp4+d4KQi+pVi/iNrEY7yyofNEj4PYtueo0XHrGtIfUZD7Eu7cZ0CPzXYK5SKZfYh Rfh0IFuqq9zUzMWWgGuA7ZEaSAcH3l7zn2BHAwvZ3IQOQDyujLMXR54lzBxNRK83xTSe0N qcFjDActCUwtJzM50bZKHn/hedwdah4TddOJrZjxuWTBZDAocdnxnfNwWdNTq/av1lIHhg XbZdgdTFudwQgFu5BQ5cQkZeTv/V9Vzq73Z0pbMj6gWpWooZF8bmAjGdz/ckMoe1QIcuKA /nKd9bNsdS23IWakjntm6ieGx4xYCb2ZWxuXgSQsWNJwCKHUj/cPzRNoxcuiHw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1741871034; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=syj4DKiPqVRJ4tJ6hdHCsNz/PeEgBfCP7TCfi1O9n7E=; b=3KqNIfwgh2+pPnJQB0EsGRiw7nUHYBApMvIUzU2PhcfESPiI0Bf0dlcX7sRrf8NMWh0FF+ 7ZXowdA74cpHjtAA== From: Thomas Gleixner To: LKML Cc: Marc Zyngier , Jonathan Cameron , Peter Zijlstra , Nishanth Menon , Jonathan Cameron , Dhruva Gole , Tero Kristo , Santosh Shilimkar , Logan Gunthorpe , Dave Jiang , Jon Mason , Allen Hubbe , ntb@lists.linux.dev, Bjorn Helgaas , linux-pci@vger.kernel.org, Michael Kelley , Wei Liu , Haiyang Zhang , linux-hyperv@vger.kernel.org, Wei Huang , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , linux-scsi@vger.kernel.org Subject: [patch V2 10/10] genirq/msi: Rename msi_[un]lock_descs() References: <20250313130212.450198939@linutronix.de> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Thu, 13 Mar 2025 14:03:53 +0100 (CET) Now that all abuse is gone and the legit users are converted to guard(msi_descs_lock), rename the lock functions and document them as internal. No functional change. Signed-off-by: Thomas Gleixner Reviewed-by: Jonathan Cameron --- include/linux/msi.h | 8 ++++---- kernel/irq/msi.c | 16 ++++++++++------ 2 files changed, 14 insertions(+), 10 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -224,11 +224,11 @@ struct msi_dev_domain { int msi_setup_device_data(struct device *dev); -void msi_lock_descs(struct device *dev); -void msi_unlock_descs(struct device *dev); +void __msi_lock_descs(struct device *dev); +void __msi_unlock_descs(struct device *dev); -DEFINE_LOCK_GUARD_1(msi_descs_lock, struct device, msi_lock_descs(_T->lock), - msi_unlock_descs(_T->lock)); +DEFINE_LOCK_GUARD_1(msi_descs_lock, struct device, __msi_lock_descs(_T->lock), + __msi_unlock_descs(_T->lock)); struct msi_desc *msi_domain_first_desc(struct device *dev, unsigned int domid, enum msi_desc_filter filter); --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -337,26 +337,30 @@ int msi_setup_device_data(struct device } /** - * msi_lock_descs - Lock the MSI descriptor storage of a device + * __msi_lock_descs - Lock the MSI descriptor storage of a device * @dev: Device to operate on + * + * Internal function for guard(msi_descs_lock). Don't use in code. */ -void msi_lock_descs(struct device *dev) +void __msi_lock_descs(struct device *dev) { mutex_lock(&dev->msi.data->mutex); } -EXPORT_SYMBOL_GPL(msi_lock_descs); +EXPORT_SYMBOL_GPL(__msi_lock_descs); /** - * msi_unlock_descs - Unlock the MSI descriptor storage of a device + * __msi_unlock_descs - Unlock the MSI descriptor storage of a device * @dev: Device to operate on + * + * Internal function for guard(msi_descs_lock). Don't use in code. */ -void msi_unlock_descs(struct device *dev) +void __msi_unlock_descs(struct device *dev) { /* Invalidate the index which was cached by the iterator */ dev->msi.data->__iter_idx = MSI_XA_MAX_INDEX; mutex_unlock(&dev->msi.data->mutex); } -EXPORT_SYMBOL_GPL(msi_unlock_descs); +EXPORT_SYMBOL_GPL(__msi_unlock_descs); static struct msi_desc *msi_find_desc(struct msi_device_data *md, unsigned int domid, enum msi_desc_filter filter)