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Mon, 17 Mar 2025 07:20:53 GMT Received: from localhost.localdomain (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 17 Mar 2025 00:20:51 -0700 From: Miaoqing Pan To: CC: , , , , Miaoqing Pan Subject: [PATCH v4 ath-next 1/2] wifi: ath11k: add function to get next srng desc Date: Mon, 17 Mar 2025 15:20:35 +0800 Message-ID: <20250317072036.2066518-2-quic_miaoqing@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250317072036.2066518-1-quic_miaoqing@quicinc.com> References: <20250317072036.2066518-1-quic_miaoqing@quicinc.com> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=WbQMa1hX c=1 sm=1 tr=0 ts=67d7cd56 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=Vs1iUdzkB0EA:10 a=COk6AnOGAAAA:8 a=wFPo1YcO-awHL2IpnCwA:9 a=RVmHIydaz68A:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: 9YLB7eGqeDpoNi0BdjO63oOm-w1cKGig X-Proofpoint-ORIG-GUID: 9YLB7eGqeDpoNi0BdjO63oOm-w1cKGig X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-17_02,2025-03-17_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 adultscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 mlxlogscore=994 spamscore=0 clxscore=1015 impostorscore=0 suspectscore=0 mlxscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503170052 Adding the ath11k_hal_srng_dst_next() function allows for the separate invocation of ath11k_hal_srng_dst_peek() and ath11k_hal_srng_dst_next() in certain situations, instead of calling the ath11k_hal_srng_dst_get_next_entry() function alone. Tested-on: QCA6698AQ hw2.1 PCI WLAN.HSP.1.1-04546-QCAHSPSWPL_V1_V2_SILICONZ_IOE-1 Signed-off-by: Miaoqing Pan --- drivers/net/wireless/ath/ath11k/hal.c | 17 ++++++++++++++++- drivers/net/wireless/ath/ath11k/hal.h | 3 ++- 2 files changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/net/wireless/ath/ath11k/hal.c b/drivers/net/wireless/ath/ath11k/hal.c index 61f4b6dd5380..211c085921b6 100644 --- a/drivers/net/wireless/ath/ath11k/hal.c +++ b/drivers/net/wireless/ath/ath11k/hal.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: BSD-3-Clause-Clear /* * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include "hal_tx.h" @@ -656,6 +656,21 @@ static void ath11k_hal_srng_prefetch_desc(struct ath11k_base *ab, } } +void ath11k_hal_srng_dst_next(struct ath11k_base *ab, struct hal_srng *srng) +{ + lockdep_assert_held(&srng->lock); + + srng->u.dst_ring.tp += srng->entry_size; + + /* wrap around to start of ring*/ + if (srng->u.dst_ring.tp == srng->ring_size) + srng->u.dst_ring.tp = 0; + + /* Try to prefetch the next descriptor in the ring */ + if (srng->flags & HAL_SRNG_FLAGS_CACHED) + ath11k_hal_srng_prefetch_desc(ab, srng); +} + u32 *ath11k_hal_srng_dst_get_next_entry(struct ath11k_base *ab, struct hal_srng *srng) { diff --git a/drivers/net/wireless/ath/ath11k/hal.h b/drivers/net/wireless/ath/ath11k/hal.h index 601542410c75..317b09ec6c35 100644 --- a/drivers/net/wireless/ath/ath11k/hal.h +++ b/drivers/net/wireless/ath/ath11k/hal.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause-Clear */ /* * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef ATH11K_HAL_H @@ -941,6 +941,7 @@ int ath11k_hal_srng_get_entrysize(struct ath11k_base *ab, u32 ring_type); int ath11k_hal_srng_get_max_entries(struct ath11k_base *ab, u32 ring_type); void ath11k_hal_srng_get_params(struct ath11k_base *ab, struct hal_srng *srng, struct hal_srng_params *params); +void ath11k_hal_srng_dst_next(struct ath11k_base *ab, struct hal_srng *srng); u32 *ath11k_hal_srng_dst_get_next_entry(struct ath11k_base *ab, struct hal_srng *srng); u32 *ath11k_hal_srng_dst_peek(struct ath11k_base *ab, struct hal_srng *srng); From patchwork Mon Mar 17 07:20:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miaoqing Pan X-Patchwork-Id: 14018732 X-Patchwork-Delegate: quic_jjohnson@quicinc.com Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F6C621B192; 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Mon, 17 Mar 2025 07:20:56 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 52H7KtuW023158 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 17 Mar 2025 07:20:55 GMT Received: from localhost.localdomain (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 17 Mar 2025 00:20:53 -0700 From: Miaoqing Pan To: CC: , , , , Miaoqing Pan Subject: [PATCH v4 ath-next 2/2] wifi: ath11k: fix HTC rx insufficient length Date: Mon, 17 Mar 2025 15:20:36 +0800 Message-ID: <20250317072036.2066518-3-quic_miaoqing@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250317072036.2066518-1-quic_miaoqing@quicinc.com> References: <20250317072036.2066518-1-quic_miaoqing@quicinc.com> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=H8Pbw/Yi c=1 sm=1 tr=0 ts=67d7cd58 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=Vs1iUdzkB0EA:10 a=VwQbUJbxAAAA:8 a=COk6AnOGAAAA:8 a=YcQLN9OU0fFkaZwozdwA:9 a=RVmHIydaz68A:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: DisQPZIHI7a88h-6wECVvZhkjSVOVsnA X-Proofpoint-ORIG-GUID: DisQPZIHI7a88h-6wECVvZhkjSVOVsnA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-17_02,2025-03-17_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 lowpriorityscore=0 bulkscore=0 adultscore=0 spamscore=0 priorityscore=1501 mlxscore=0 suspectscore=0 malwarescore=0 clxscore=1015 impostorscore=0 phishscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503170052 A relatively unusual race condition occurs between host software and hardware, where the host sees the updated destination ring head pointer before the hardware updates the corresponding descriptor. When this situation occurs, the length of the descriptor returns 0. The current error handling method is to increment descriptor tail pointer by 1, but 'sw_index' is not updated, causing descriptor and skb to not correspond one-to-one, resulting in the following error: ath11k_pci 0006:01:00.0: HTC Rx: insufficient length, got 1488, expected 1492 ath11k_pci 0006:01:00.0: HTC Rx: insufficient length, got 1460, expected 1484 To address this problem and work around the broken hardware, temporarily skip processing the current descriptor and handle it again next time. Also, skip updating the length field of the descriptor when it is 0, because there's a racing update, may never see the updated length. Tested-on: QCA6698AQ hw2.1 PCI WLAN.HSP.1.1-04546-QCAHSPSWPL_V1_V2_SILICONZ_IOE-1 Reported-by: Johan Hovold Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218623 Signed-off-by: Miaoqing Pan --- drivers/net/wireless/ath/ath11k/ce.c | 14 +++++++++++--- drivers/net/wireless/ath/ath11k/hal.c | 6 +++++- 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/net/wireless/ath/ath11k/ce.c b/drivers/net/wireless/ath/ath11k/ce.c index e66e86bdec20..2bc8bc97165a 100644 --- a/drivers/net/wireless/ath/ath11k/ce.c +++ b/drivers/net/wireless/ath/ath11k/ce.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: BSD-3-Clause-Clear /* * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023, 2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "dp_rx.h" @@ -387,18 +387,26 @@ static int ath11k_ce_completed_recv_next(struct ath11k_ce_pipe *pipe, ath11k_hal_srng_access_begin(ab, srng); - desc = ath11k_hal_srng_dst_get_next_entry(ab, srng); + desc = ath11k_hal_srng_dst_peek(ab, srng); if (!desc) { ret = -EIO; goto err; } *nbytes = ath11k_hal_ce_dst_status_get_length(desc); - if (*nbytes == 0) { + if (unlikely(*nbytes == 0)) { + /* A relatively unusual race condition occurs between host + * software and hardware, where the host sees the updated + * destination ring head pointer before the hardware updates + * the corresponding descriptor. Temporarily skip processing + * the current descriptor and handle it again next time. + */ ret = -EIO; goto err; } + ath11k_hal_srng_dst_next(ab, srng); + *skb = pipe->dest_ring->skb[sw_index]; pipe->dest_ring->skb[sw_index] = NULL; diff --git a/drivers/net/wireless/ath/ath11k/hal.c b/drivers/net/wireless/ath/ath11k/hal.c index 211c085921b6..16e0b5713445 100644 --- a/drivers/net/wireless/ath/ath11k/hal.c +++ b/drivers/net/wireless/ath/ath11k/hal.c @@ -600,7 +600,11 @@ u32 ath11k_hal_ce_dst_status_get_length(void *buf) u32 len; len = FIELD_GET(HAL_CE_DST_STATUS_DESC_FLAGS_LEN, desc->flags); - desc->flags &= ~HAL_CE_DST_STATUS_DESC_FLAGS_LEN; + /* Skip updating the length field of the descriptor when it is 0, + * because there's a racing update, may never see the updated length. + */ + if (likely(len)) + desc->flags &= ~HAL_CE_DST_STATUS_DESC_FLAGS_LEN; return len; }