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([38.39.164.180]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73711694b2csm8519195b3a.129.2025.03.17.21.51.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 21:51:33 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , qemu-arm@nongnu.org, alex.bennee@linaro.org, Peter Maydell , kvm@vger.kernel.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Marc-Andr=C3=A9?= =?utf-8?q?_Lureau?= , =?utf-8?q?Philippe_Mathi?= =?utf-8?q?eu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PATCH 01/13] exec/cpu-all: restrict BSWAP_NEEDED to target specific code Date: Mon, 17 Mar 2025 21:51:13 -0700 Message-Id: <20250318045125.759259-2-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318045125.759259-1-pierrick.bouvier@linaro.org> References: <20250318045125.759259-1-pierrick.bouvier@linaro.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This identifier is already poisoned, so it can't be used from common code anyway. Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson --- include/exec/cpu-all.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 902ca1f3c7b..6dd71eb0de9 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -34,8 +34,10 @@ * TARGET_BIG_ENDIAN : same for the target cpu */ -#if HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN -#define BSWAP_NEEDED +#ifdef COMPILING_PER_TARGET +# if HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN +# define BSWAP_NEEDED +# endif #endif /* page related stuff */ From patchwork Tue Mar 18 04:51:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierrick Bouvier X-Patchwork-Id: 14020291 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E2C611A8409 for ; Tue, 18 Mar 2025 04:51:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273497; cv=none; b=taEa5L/bbvJ661n9emXZlsvq/ncHYhDWeYnplxrBKKD8CpA1WIF3DaKaQarEzglvEh18lTr3SiW53oxcHUN646HSGiVfAKwOJFMWxk5n+BrPpzrMoox6ChJZPC/26kdtq9uSfJXG7Jx6H8hwbCLb0STkbS5tv+br/jHIu8PDA0Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273497; c=relaxed/simple; bh=0XNoLi343cKSJUwwhWz+jDoQYtdPX1ZsKxln9viXDb8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=nuQB7v8ZDjJbcgfWQNdl9wq4mUwNpaobMN1tITcuRfZbnWbMSkaulSor0JYAW2Baaq1HgrkMJmpJeSixqpCivoSOp5ACsGK6Lz3f7DjATnJXFHYm7qwuzi0I5WOwLRjkweTn6EC2v2vZpzyXjREJx9byz5cXm9OBk5XKibDkkEs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=ZsApJ2CX; arc=none smtp.client-ip=209.85.214.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ZsApJ2CX" Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-22438c356c8so89591635ad.1 for ; Mon, 17 Mar 2025 21:51:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742273495; x=1742878295; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OAWROUlIn7auIWdaE5em6TVb2NvztQjiLgpJIDrbZCE=; b=ZsApJ2CXib/tZOc0pn/ZlRCvy4LxHLpK7SkT+zcvHosdSZiu0jAOL9RpN+6zqHyd0G IhUhE6nAbpYxAY6hzEbu95LwJSH3EwAHYQIbS8wKRfgkU8Vzw2bBHvpto4dAqybUpg7X qRCBXvlt2L+C70yvDvygKr0KuIpw4CfVN6pUHMDO4mykUNRDQFMhUEaOhAGBFnjoc8k1 DVH55aHlci14/PUcrjmVX6PmDDUFddY4Kmv7x9lRa61LD18neENc8o5zPJ+0OaZO1HrQ rkZ0eEFn2fP2oaSS8vF53QNyDoZfvQB6u15scgiPWR1DmNg91iBYVVdBxXsYX8BhSpvC lafw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742273495; x=1742878295; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OAWROUlIn7auIWdaE5em6TVb2NvztQjiLgpJIDrbZCE=; b=dpLLiotGc+5+sbSiC3GFCda1nmuBC/SmpZhXh/wK8OfIbYCTWJ8Do6tiaf20guYQs4 xCZvXBlkxEsO93ny98gafolouUqzXCB4kvcuBB6Rt1u53vYg7QFzKLA2D0AusdkTU7jZ LhFqu1i0jW8PdcCYIBS5DG61SqeUzSI4qM6XyIirfIxp1iUdtSuq7jUTgGgvqmlFSeCU JQpu/uZpWkbx74W8J8Qs/PFG+rvR86OekRRg4Up2bCxrFZQhOYQYtZYQOdlH/BwJLUQm Z1wH2byU3hG69iWOhazDBSZPyeONR7u1oLvL6ON23gl17HzNxYzzDfcxZkAvUFzqIOMV FY0A== X-Forwarded-Encrypted: i=1; AJvYcCW5UsXvLftvNGyc4DPDxvXr0OSMdJu6JsQo2SDT6ze/7WzM//1gFxXrIROX5cGP+xcg+CY=@vger.kernel.org X-Gm-Message-State: AOJu0Yy1YiRIEDRpZEEJtIX9C9xNiPMc6kBuQUY/RHgTentHHOKH4azO gaZPxHz8xSoUGUSrCvx0mHfRipDhe6+Y68H+ZzF7yUFobus4n7TS3I2/Xetmsl4= X-Gm-Gg: ASbGncuUE6E3mJBxYwJX5R5UYceSUcPPtuQs4Wj8077QsxilynvayOCJvRLss8xxqbu 8e4q71IBOmsfYFfV0/gp75O2xXJaYINjkdLiBzHO2NzCFV2ALE+kI0mnncXc9etKDzLO7TMgaL0 uWIGO+F/AQSUOEVEBM8hLO9E3pt1ah25F0wLbr30CTi7rFuAdMJtjXmXmBg5sW+kH9yhvcczoHF 6aupQeSxLMt1UfuwYcCq+97Dr31deKtCVuK5JBgGkDKTQCUiMNNWVw3G5Nhtw5xoKLCehFcxd8G Hjq0uIvvq0LBApksMWcQtyBSwrFC/0tfexN0jj8Za3eB X-Google-Smtp-Source: AGHT+IEt46y/1QHMt9sgoOzblTQOO/Vh992GC9mrguK0N9zijMCVTkkxREI+0zrgLP1cwHkaSo90Bw== X-Received: by 2002:a05:6a00:b95:b0:736:3d7c:2368 with SMTP id d2e1a72fcca58-73722353269mr17764448b3a.7.1742273495053; Mon, 17 Mar 2025 21:51:35 -0700 (PDT) Received: from pc.. ([38.39.164.180]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73711694b2csm8519195b3a.129.2025.03.17.21.51.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 21:51:34 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , qemu-arm@nongnu.org, alex.bennee@linaro.org, Peter Maydell , kvm@vger.kernel.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Marc-Andr=C3=A9?= =?utf-8?q?_Lureau?= , =?utf-8?q?Philippe_Mathi?= =?utf-8?q?eu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PATCH 02/13] exec/cpu-all: restrict compile time assert to target specific code Date: Mon, 17 Mar 2025 21:51:14 -0700 Message-Id: <20250318045125.759259-3-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318045125.759259-1-pierrick.bouvier@linaro.org> References: <20250318045125.759259-1-pierrick.bouvier@linaro.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 TLB_FLAGS defines are based on TARGET_PAGE_BITS_MIN, which is defined for every target. In the next commit, we'll introduce a non-static define for TARGET_PAGE_BITS_MIN in common code, thus, we can't check this at compile time, except in target specific code. Signed-off-by: Pierrick Bouvier --- include/exec/cpu-all.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 6dd71eb0de9..7c6c47c43ed 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -112,8 +112,10 @@ static inline int cpu_mmu_index(CPUState *cs, bool ifetch) #define TLB_SLOW_FLAGS_MASK (TLB_BSWAP | TLB_WATCHPOINT | TLB_CHECK_ALIGNED) +#ifdef COMPILING_PER_TARGET /* The two sets of flags must not overlap. */ QEMU_BUILD_BUG_ON(TLB_FLAGS_MASK & TLB_SLOW_FLAGS_MASK); +#endif #endif /* !CONFIG_USER_ONLY */ From patchwork Tue Mar 18 04:51:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierrick Bouvier X-Patchwork-Id: 14020292 Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B36141B87D7 for ; Tue, 18 Mar 2025 04:51:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273498; cv=none; b=Fwittn7Wm806YMM5TK84lMOHJr6hIo2G8saSPKh3CtYKazxh8Y/uboJEtp9BrjxL2S3aBN5ifHwOpLQUac1B3l1/MrTy9gyn3PpHSb9IMG4OIRGbtoVt6WN3jb0NSxpMajQZw0KkC6iXH9fIPMT8EhQaVAwEUqsr5wUIxbmhMVU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273498; c=relaxed/simple; bh=koOePhk4+szypPcCLvagB8jF+4HgkO7+nLo/kOSwecE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=IyyPFtmAwpvm4TkCrV0ciC8ptK782Pzo+qjdkuebVkN5lhP4PYX+gBDy4FE4tJzehJH+uCvuq6nha3XBoQyD3Zu9Vx9pTnPdMcF26rnwODRpTUhMVnBXY+2dhCq+7TgZzIUBawGCU0LGSESxZ1H76yHoCSpcuNRBv9BY2IrH1nU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=btfCs6Dk; arc=none smtp.client-ip=209.85.214.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="btfCs6Dk" Received: by mail-pl1-f175.google.com with SMTP id d9443c01a7336-225d66a4839so63037935ad.1 for ; Mon, 17 Mar 2025 21:51:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742273496; x=1742878296; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7b7Pa/XivG7M4hjK9jqso2S4d+dz1DGry6GtvIR3C8c=; b=btfCs6DkaGIKiqz2EOzWoaLlL0ByZyCXQxbs8wzMl3ZN4CJqoMxuap9xpuQwHIKKz8 BBSn8ptYMPufFARUjq2ij4pD8p0WlOfSEjvXPl0DuoUvBCuMaC82ZAuJS0+PZEmXZW0/ 86hnRqQM3RAPg2ES+xUKECnWeSmWoLtF4sIx83oPXwWOTwEEL5NybL5e1P0J/AD9BhhI BLqtjdxm+UF5Z38RvUwW97AihK0WfwvQ0JwxuioyYCJv9bLLdod3vnewyQC/oFp4eWAT EXcZ3d0nnr04F/6N9Ha3gJj1J+KCpk1mYVO9Hzrs0N5C3GmsGfXdgb2BLZuT7Q2Qb2/8 uALA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742273496; x=1742878296; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7b7Pa/XivG7M4hjK9jqso2S4d+dz1DGry6GtvIR3C8c=; b=Iay2MM8Mw1K3ODMbK9l0Q1hhnuEPO4x5ltkJ9DxYxFujm2i5kmDlAQC5YDWc9hBgd7 8eYrgyAKMXfSJ+9hS7ZU44Qk6WhFOxlQ2cJ3HIYlTcOHrsCOKw6ZKKb9VDg1FfDulsFt 81OlWYUa9nSijUNQbnD4z74LhtE6TVLkpU05jcjgdndyMr9xz+9aKeMxX4pZJlaUv4mK lOwMa3YJwILCyZZZ1UC2hWlpPK9nU30KClFwDGQVMGBnIGxx8kVV8bk6gJhdCSMGTsEL 6M62UEXc6BJVRbXArkLZ6IRkYcgkbttqKrxg6wYVT1cOGw6sXwMJeZMljGTTgw6CjOBe i/Rw== X-Forwarded-Encrypted: i=1; AJvYcCUE1scIc2mSmps/5N6qIICl80z6EZ0URlFRYhjMG9g5xraaOVkNotQZtvYqC51GB4h8rwg=@vger.kernel.org X-Gm-Message-State: AOJu0YyvskJBGnuCP2B1msChHUX9Z19a/FuJzOYaNiMnEdgZspMgnOZS nGZYxuDWNS2Y+bsq5rE2PdAfpicLEa9k/r7oUPSQHQLPOAo9UeRtPVZW4JcexIw= X-Gm-Gg: ASbGncuGzTIYSof1lmnjyiM/A1omJupFmauj3t0cGdkvRNFtHsr/bOrCLSj3qrHLtQW fof1LdTSlp+cIPJSgbziW2ri0lgAb63l2wUmYTpXlqwFmvlHkb00JzAiw5NrvMVLD+meNqmhr40 kPpS0PXu+PEKtj8WKDi+ipGbkWzkZ4Rul9jajtFO6FzNDR5hjlcs2FetufuvpIbAf3nLIrPNz9q 4jfhsNsye3kPSDvfyxaYO+UzEqFeIlICfU2sXQlPfWNtHGhNfl0SOkZlMiXIYXiB7xia1K3HB3T MO2hB86YJxcDcvK9xHRRP3zk6N8idPDJYMn40wZQxV/g X-Google-Smtp-Source: AGHT+IGfy+Qdd4zIdkaKpSIgsiwDKH+mdyBXjzWe2NY8Kt3gZWsIWhQbMwLpqie8RWdAjPyywqbjZw== X-Received: by 2002:a05:6a21:1f8d:b0:1ee:b5f4:b1d7 with SMTP id adf61e73a8af0-1fa4f9540cbmr3123721637.7.1742273495989; Mon, 17 Mar 2025 21:51:35 -0700 (PDT) Received: from pc.. ([38.39.164.180]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73711694b2csm8519195b3a.129.2025.03.17.21.51.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 21:51:35 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , qemu-arm@nongnu.org, alex.bennee@linaro.org, Peter Maydell , kvm@vger.kernel.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Marc-Andr=C3=A9?= =?utf-8?q?_Lureau?= , =?utf-8?q?Philippe_Mathi?= =?utf-8?q?eu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PATCH 03/13] exec/target_page: runtime defintion for TARGET_PAGE_BITS_MIN Date: Mon, 17 Mar 2025 21:51:15 -0700 Message-Id: <20250318045125.759259-4-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318045125.759259-1-pierrick.bouvier@linaro.org> References: <20250318045125.759259-1-pierrick.bouvier@linaro.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 We introduce later a mechanism to skip cpu definitions inclusion, so we can detect it here, and call the correct runtime function instead. Signed-off-by: Pierrick Bouvier --- include/exec/target_page.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/exec/target_page.h b/include/exec/target_page.h index 8e89e5cbe6f..aeddb25c743 100644 --- a/include/exec/target_page.h +++ b/include/exec/target_page.h @@ -40,6 +40,9 @@ extern const TargetPageBits target_page; # define TARGET_PAGE_MASK ((TARGET_PAGE_TYPE)target_page.mask) # endif # define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK) +# ifndef TARGET_PAGE_BITS_MIN +# define TARGET_PAGE_BITS_MIN qemu_target_page_bits_min() +# endif #else # define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS # define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) From patchwork Tue Mar 18 04:51:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierrick Bouvier X-Patchwork-Id: 14020293 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C16438FA6 for ; Tue, 18 Mar 2025 04:51:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273498; cv=none; b=T+gURZKW0mFVsQlEDFiajjk5uhO5dc9lraiLfIKNp9htudlfnQ0co9ghFSkA5edFSePffcFoP1egHF3p/HxHBxAwvvp/SzNUf2MLBbkuTcKWo3L/syLNPpk3lJtmkRlmf1j7eHRnvqLSyJ+3FmEnb+I95E6mm6SGKV3ITDR21lk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273498; c=relaxed/simple; bh=jaa7IfyywSLJT9eOoNlXt0fIhSE9+JRAFmZnoWLXufU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=I4u6XEEgkBGrgtgWeWs3WA2Rc6HyyyU+umnXHkfDuIzP6b1vcGPQ+GxMSBTLDwOvywVNbe+rcB8OJ74VFL35oCZeLocbbk25rh5oQA6/Y2WM8yxPQ70/TDQ0S4SEDBru5rR4aKsStvLWVLmlfKgVTrX5cQKpJva+pKaJXv3Oic4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=bYS4dGnr; arc=none smtp.client-ip=209.85.214.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="bYS4dGnr" Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-2255003f4c6so89474595ad.0 for ; Mon, 17 Mar 2025 21:51:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742273497; x=1742878297; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vWIezDEnsVaTp50avzaVFN+/54kZx3DW446tGxF6xYk=; b=bYS4dGnrJ1UoPJMO5LjM0fs8n6mCjTTi+itFXypRJpFoXRWshLTgRrjHIzJ6fRJM67 b7a8s2asIISE10jOdGRAZhz6ZPFuka+cFwvO7GdylYCRslt93hd43quUJ3ozVK02/qq6 D/ce9IUqVArS8/ZUvxL7l7hYcMSNNZFIxdPLnhrIlVwHN0aK5Y2akwMy0IcyhsmX2l7O MD5VJlwRKhl8xeNViAOLWf/ImbRTOEj2UjOLOr+ZvZYrUEji+t1AEp2OzCS8kJ8dUA4b JxuoZtdcY3KowDn2xnTRJUp42arI/BvBTJpN1rg+32xdXz6O0ZaPVwqukKE28ScNOvP/ uqcw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742273497; x=1742878297; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vWIezDEnsVaTp50avzaVFN+/54kZx3DW446tGxF6xYk=; b=AAtOC4CfYVhst5b8+XKO56kJJqx/L3zCfT20xahPVhmVBiVSUu83B9APmT6SSBWfC0 Umffblmr8rcYQI8srdoI7pi/ARfYuV548SUfgnzH2Xgf7+UsuyTnIwYuTkZ0OAvConXq xzgEqwJH49JxntSLvlU4Gq/B6EzkO1gQfvzHf/psMEK9obhDwSkdRVO65Cujyd9pKiee 6S5f3EDYU6FzynvLuCpoRcrV9gAWwrYg23Ps8LqdEWR70SZiqW1vfBwLNmH066gTvL9e RSeP3yNpgs2RqHYIYR56m6iDUtzCYmseE/7UN2+FoR7e/0lnJx33L4VSiYFPlrkP0+/o Fo4Q== X-Forwarded-Encrypted: i=1; AJvYcCU3mPaFJq22uD7HKvZMDWN8PfqPLdY6vGxTcen+9PRCnzuf7g4zXeVCvZVyFfaFclntWvo=@vger.kernel.org X-Gm-Message-State: AOJu0YwphWz2PCLUhUHuFpryziI8/dY2pjymlXZFyM0QH3KMMIeJESOB 92yaHZDKilku5MdJt4APDMHBc/67sfwRyCmXmYxD5Fk6j46HPc7bO6LUzR+/L2M= X-Gm-Gg: ASbGnctle57YqqHRD/sYcfvTwA4Sl1JhWgol8PvqV2VwNmBQ06fyO9dQgDEyU0FLST3 O0h4IwwKbVXyid9gLGvrrvL0ghTBPou/GfWGPfYjHlZt2tlntqP+QqabI0ldLzUOPAwcGDIL6gF EQxek9INoIY+chK2NLN6bilFyKAD1hZFS9Cw6AbwPiL7sgcPYPCczzirVMc0yaLzfsZhY9Jv0le qOYkJskVOF/Kdx5d3m+k/P+gKcLXobax8+5Fi+FE3YPt4WnD+ezHkrQk2w5Rv2pS4SCTm2a1hHE ciJk6fn7fM4yE7vQgQvpiR2PUZysGgcDMww6t2T4vYlD X-Google-Smtp-Source: AGHT+IGfVS9r67mKi+C/QhYaIcplE7qOFrPBNlW784RCUzNr+6ZfRfHv2pwT7sOIOfbETdELQgrdAg== X-Received: by 2002:a05:6a00:3cc1:b0:736:ab1d:83c4 with SMTP id d2e1a72fcca58-737222535c1mr17970185b3a.0.1742273496888; Mon, 17 Mar 2025 21:51:36 -0700 (PDT) Received: from pc.. ([38.39.164.180]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73711694b2csm8519195b3a.129.2025.03.17.21.51.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 21:51:36 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , qemu-arm@nongnu.org, alex.bennee@linaro.org, Peter Maydell , kvm@vger.kernel.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Marc-Andr=C3=A9?= =?utf-8?q?_Lureau?= , =?utf-8?q?Philippe_Mathi?= =?utf-8?q?eu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PATCH 04/13] exec/cpu-all: allow to include specific cpu Date: Mon, 17 Mar 2025 21:51:16 -0700 Message-Id: <20250318045125.759259-5-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318045125.759259-1-pierrick.bouvier@linaro.org> References: <20250318045125.759259-1-pierrick.bouvier@linaro.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Including "cpu.h" from code that is not compiled per target is ambiguous by definition. Thus we introduce a conditional include, to allow every architecture to set this, to point to the correct definition. hw/X or target/X will now include directly "target/X/cpu.h", and "target/X/cpu.h" will define CPU_INCLUDE to itself. We already do this change for arm cpu as part of this commit. Signed-off-by: Pierrick Bouvier --- include/exec/cpu-all.h | 4 ++++ target/arm/cpu.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 7c6c47c43ed..1a756c0cfb3 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -46,7 +46,11 @@ CPUArchState *cpu_copy(CPUArchState *env); +#ifdef CPU_INCLUDE +#include CPU_INCLUDE +#else #include "cpu.h" +#endif #ifdef CONFIG_USER_ONLY diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a8177c6c2e8..7aeb012428c 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -31,6 +31,8 @@ #include "target/arm/multiprocessing.h" #include "target/arm/gtimer.h" +#define CPU_INCLUDE "target/arm/cpu.h" + #ifdef TARGET_AARCH64 #define KVM_HAVE_MCE_INJECTION 1 #endif From patchwork Tue Mar 18 04:51:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierrick Bouvier X-Patchwork-Id: 14020294 Received: from mail-pl1-f176.google.com (mail-pl1-f176.google.com [209.85.214.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 729141C5D70 for ; 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([38.39.164.180]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73711694b2csm8519195b3a.129.2025.03.17.21.51.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 21:51:37 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , qemu-arm@nongnu.org, alex.bennee@linaro.org, Peter Maydell , kvm@vger.kernel.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Marc-Andr=C3=A9?= =?utf-8?q?_Lureau?= , =?utf-8?q?Philippe_Mathi?= =?utf-8?q?eu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PATCH 05/13] target/arm/cpu: move KVM_HAVE_MCE_INJECTION to kvm-all.c file directly Date: Mon, 17 Mar 2025 21:51:17 -0700 Message-Id: <20250318045125.759259-6-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318045125.759259-1-pierrick.bouvier@linaro.org> References: <20250318045125.759259-1-pierrick.bouvier@linaro.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This define is used only in accel/kvm/kvm-all.c, so we push directly the definition there. Add more visibility to kvm_arch_on_sigbus_vcpu() to allow removing this define from any header. The only other architecture defining KVM_HAVE_MCE_INJECTION is i386, which we can cleanup later. Signed-off-by: Pierrick Bouvier --- include/system/kvm.h | 2 -- target/arm/cpu.h | 4 ---- accel/kvm/kvm-all.c | 4 ++++ 3 files changed, 4 insertions(+), 6 deletions(-) diff --git a/include/system/kvm.h b/include/system/kvm.h index 716c7dcdf6b..b690dda1370 100644 --- a/include/system/kvm.h +++ b/include/system/kvm.h @@ -392,9 +392,7 @@ bool kvm_vcpu_id_is_valid(int vcpu_id); /* Returns VCPU ID to be used on KVM_CREATE_VCPU ioctl() */ unsigned long kvm_arch_vcpu_id(CPUState *cpu); -#ifdef KVM_HAVE_MCE_INJECTION void kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr); -#endif void kvm_arch_init_irq_routing(KVMState *s); diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 7aeb012428c..23c2293f7d1 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -33,10 +33,6 @@ #define CPU_INCLUDE "target/arm/cpu.h" -#ifdef TARGET_AARCH64 -#define KVM_HAVE_MCE_INJECTION 1 -#endif - #define EXCP_UDEF 1 /* undefined instruction */ #define EXCP_SWI 2 /* software interrupt */ #define EXCP_PREFETCH_ABORT 3 diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index f89568bfa39..28de3990699 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -13,6 +13,10 @@ * */ +#ifdef TARGET_AARCH64 +#define KVM_HAVE_MCE_INJECTION 1 +#endif + #include "qemu/osdep.h" #include #include From patchwork Tue Mar 18 04:51:18 2025 Content-Type: text/plain; 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([38.39.164.180]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73711694b2csm8519195b3a.129.2025.03.17.21.51.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 21:51:38 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , qemu-arm@nongnu.org, alex.bennee@linaro.org, Peter Maydell , kvm@vger.kernel.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Marc-Andr=C3=A9?= =?utf-8?q?_Lureau?= , =?utf-8?q?Philippe_Mathi?= =?utf-8?q?eu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PATCH 06/13] exec/poison: KVM_HAVE_MCE_INJECTION can now be poisoned Date: Mon, 17 Mar 2025 21:51:18 -0700 Message-Id: <20250318045125.759259-7-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318045125.759259-1-pierrick.bouvier@linaro.org> References: <20250318045125.759259-1-pierrick.bouvier@linaro.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 We prevent common code to use this define by mistake. Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson --- include/exec/poison.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/exec/poison.h b/include/exec/poison.h index 8ed04b31083..816f6f99d16 100644 --- a/include/exec/poison.h +++ b/include/exec/poison.h @@ -67,4 +67,6 @@ #pragma GCC poison CONFIG_WHPX #pragma GCC poison CONFIG_XEN +#pragma GCC poison KVM_HAVE_MCE_INJECTION + #endif From patchwork Tue Mar 18 04:51:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierrick Bouvier X-Patchwork-Id: 14020296 Received: from mail-pl1-f179.google.com (mail-pl1-f179.google.com [209.85.214.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 650E338FA6 for ; Tue, 18 Mar 2025 04:51:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273501; cv=none; b=AQMo54pVMKpFj1BYKFqfHAaIE8NjcQ6IQC0/dynkwZA+GU5cTEI7dgh37NIGrPG57hWNDNj0KUvRqYVjYUJiWBEywYXP37kZj19SnDwPYxvasv3iseLp3MbhH22F0V6qcRzvxy2c0EXuM5WiJen6x6qV8QKNNGVfTDR8kwaZTdY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273501; c=relaxed/simple; bh=ryhhsIWRsF1rCK+2IZXlgCT6qZHTW4T2VnsqiMi7dgA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=m5gMmNqPY/MOgmj+pReq8uORPBPICNUtelKdx5DTXsA6cRU6Dhje3V87IO+MFG2o60VAQKk7CClNz71XUV4biqp01GuFO0njJFaVzszeVUp4PCxm9LK+j4QJEHZsKzeCBwPNJL677jxLwlh9POcZSGrD7wYXi6sXzAHFPvsmx/k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=aivLWNsO; arc=none smtp.client-ip=209.85.214.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="aivLWNsO" Received: by mail-pl1-f179.google.com with SMTP id d9443c01a7336-225df540edcso68626115ad.0 for ; Mon, 17 Mar 2025 21:51:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742273499; x=1742878299; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=e9rzsv10o1w5kRlHax2UvpGLKsY+tUQFsRxZLLJXZ6E=; b=aivLWNsOKdgTNPsqFqHUON4lqNPi8TdZ5oYJXadbPHXPgMFkt1DkGoNDbdphogviw2 kKBii9xyBpwpdpQDMMe+hi1ZInvWvDnTm/IdTvE+sqN7cCpWPISWhutBGiD+NqxHlsY/ SWJN8fKOZrFp9eCFWJdW/KZX0QaVO+jdrVckjk99zTnB999sCmELlvRqmLhJHDPwMU1+ V/KXDHVIlA4T2QC2loHCCKMNjyL1x7wPboDH29dzhoATxZrdA8eS/2qFbd83/5JoWZ2u CecxhaJWvTiK8lUcEU78awE3gBVsKHF181C5WhekANmpwpQMRZLsqEvPeWjy4W2oE1Cr MV7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742273499; x=1742878299; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e9rzsv10o1w5kRlHax2UvpGLKsY+tUQFsRxZLLJXZ6E=; b=bCUV5QJGRnjZHJqllvgbKysPQkfIOiJqLBbrscGdAC+FSO9tFOhnat5d2vYJSGNlxo 8tVaOGCudpowa3pH4OUyO2TQk1jizDvRWShJKz0q4MFPDjOGbMYFGvajzOKhuORDvMvq Xw59+s6naDBj8FDfFnoeXb4MjUw2leZcLb+fSK7aXDsLyVMX/ZdnEFyLQ6eCv0xazEI7 fL83JjRyRjgMKXUC73WKALLLpV7fdDododlnfXdVgu0ClP0cotYraA7zpZ67Cg/JCGb+ Ek8oqZ0jaV/+y5zCPxTZQj3huAkiakW7s0m3IEuILYbXdD7bWO+XDE3VFUDLJuyr7lWk 0tDw== X-Forwarded-Encrypted: i=1; AJvYcCXpLmUsPuuDGJpK5AUbt6jkvvF3lA6tl+ss7e6JzcYaBWBGRaFwlIb8R/1A3796LHJ4PDM=@vger.kernel.org X-Gm-Message-State: AOJu0YxUrFsUodwFmZQn5XBDa4wJeVwG+5WOIf+Pwh02k2Ka6ont/gGD 5Q34tnxunNq17Yk8Mw/QuToh5/6zqGqGE1d9evroW/AX5Xstbs4Raey0O4Yx0rI= X-Gm-Gg: ASbGnctERlGUIGcuMXz1n4suc65suRi/mWGmfGUc0HQuc54J2MVpxFD57lKTGUP0Djd AhYjcfAY7WbmJzpfDMJMc79iOtqlNxHlt4vv8M9YTrWm4jPRu0BmQb0TjUX7mwEJhdKX8ENTp6n Ev84onMIXEsPtCVbYWVemdWmZruEw/ayLpu933HjSM0Ue6EL3zzbbXsk+ygc0jc/8j0nIR+BvI2 q7LIB41pNR+khoCiEGZA+qcdNPHScCBg6XkRZpSRgkqCcqQkmGU056LQqwrVEMBpmOGT3MBzFwD ZTgB6Um2wFZMXhVpdZEIoXuKedc991L7d0ko0SdEwWIX X-Google-Smtp-Source: AGHT+IE8qR7rvWy16B29zqVKeH+5Xs9FEHJRohxtlVk1ha0v5ACDqhpK4pBzwowgaOfPj90X8hPjJA== X-Received: by 2002:a05:6a21:27aa:b0:1f3:1ba1:266a with SMTP id adf61e73a8af0-1fa4c6a1afemr2173708637.0.1742273499683; Mon, 17 Mar 2025 21:51:39 -0700 (PDT) Received: from pc.. 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Signed-off-by: Pierrick Bouvier --- target/arm/cpu.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 23c2293f7d1..96f7801a239 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -971,7 +971,6 @@ struct ArchCPU { */ uint32_t kvm_target; -#ifdef CONFIG_KVM /* KVM init features for this CPU */ uint32_t kvm_init_features[7]; @@ -984,7 +983,6 @@ struct ArchCPU { /* KVM steal time */ OnOffAuto kvm_steal_time; -#endif /* CONFIG_KVM */ /* Uniprocessor system with MP extensions */ bool mp_is_up; From patchwork Tue Mar 18 04:51:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierrick Bouvier X-Patchwork-Id: 14020298 Received: from mail-pl1-f179.google.com (mail-pl1-f179.google.com [209.85.214.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 611FB1AC892 for ; Tue, 18 Mar 2025 04:51:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273503; cv=none; b=uVEIHFIDh0x7OdQN0yTK6gkPYfZpV1kOeQ7df0ZxouGQmmJ2dZBk3S951+ooIFRBYVJTxWoh2tZg/em/qrdD4qIwvjTDlLUbv7jm0BY9bIhSpNCPd1ZbN/ceTUabzuxzPSdKFF/8u1UZaTBR1KcWozTbEacWBTZ/GWXgdRLef/Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273503; c=relaxed/simple; bh=36KPe9XcKxa98v8J5OP3bBIOfAN5JP+TUtCz+O1CQ6Y=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Ox56nVhf6+0O7nz9GrirsgjrDdtTxt9ZxlFtYepcjCJ0PYLduaJIXRbKF6aRuQvKB37T3OWsKx3qk2v8PIqicStN6+OonzvHY8ZyxT1lONBKh7OsnlR+ZcxdTBa7V2iiW9OrC5NI7WcPgO3jEeCs2KAIk9Gw4CWwv5txhBfiQQw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=wRmQegX6; arc=none smtp.client-ip=209.85.214.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="wRmQegX6" Received: by mail-pl1-f179.google.com with SMTP id d9443c01a7336-224341bbc1dso95649525ad.3 for ; Mon, 17 Mar 2025 21:51:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742273501; x=1742878301; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zREl7MPAGqYRU9KvXrtENxfPFFrO3Nb7yWvR8XbX8nk=; b=wRmQegX6Y5ATqvTc7LxeBmcYcTCR+js7nRPZIPcHgZwe0OL2jW3RcJ6BW4ygWDT03G jpzTZMt1ZaBHGw0MYvKhMlpg02VhXoBQG2tNE0IsMIlg8FPBCFEo30VPBIW4hubJcckA V2Fs1M2Fxv9nZsWoEMpaIP+HoJLPPO10PxdxjhNN/GSWO4vaUCCJRujC4lC6NIE/qO0E fNCR1p17Wj1erR0KyUVrNuCqiYFFGbBBYQdg1k/K0NSTVJKjDgIfIFqwoDRhStlJSEFp +Rsd/OxjwW2W8E+v/f9041MSKmEbAlGN36NqqlQrcJljUwHTLg2+LVrrIoJi3PU0McND kF8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742273501; x=1742878301; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zREl7MPAGqYRU9KvXrtENxfPFFrO3Nb7yWvR8XbX8nk=; b=BhvKWAOfZZEgtdvkhNqsCKx2ENfTUfpxT5zynJ2o6/i/urtdBrCUmDlo/mTtvO7g3n iS0euUk67zuAnj1UIGXdnAPi7sc8wQGOj37ByhH3gtV8D+S+cHyk8Jtet9gcSICoIj0L WQwH48GtG2Qnwnpa5PCuTgUVhQgzgWwge+4ECweG6HnWaoD2uT+gR/4FbQoS8PZg3sXE b0tOGw+VKOjtQQNP5oyzRM9/PcH3DWqrh/SXgxJsDlTQd5tD+7jYAgOamz1vnBOSlHVw FzNFPQi5jAmOfHJKctkSjBuAlmVPOy57wuNXNMOnfpvtvCwd57lHiNZbXsdahNXFKtFp 5Rkg== X-Forwarded-Encrypted: i=1; AJvYcCX5x3KXUFjWyhdKlimeqS5UqiXLarm1Ns4t3OgSjgYq/Lo1EwBppy+ZZKFo1O0Z71bWaUU=@vger.kernel.org X-Gm-Message-State: AOJu0YzhWj9liVFjsARNifDylxsaq8IJDAuF8IqrdnFgzm9bJpx6GkPu BE63ws8gFCASy58usKw2C78jtMB3dYoaoTNGRgP6ZkHlFuR7vY8earENhx47U08= X-Gm-Gg: ASbGncuQCak5kKCkFeRCVw+rBJoDkw0bpf+7MaZlebZm4TRB1KCTynrR186m8Q7WdfA nP6luTdf1lKlbyzTZYgkhjxFZOjZSA87TPSuNobZJxXaoPHRMDRskZywcnQb1HuIYxNsivB800e DZTofh9v0pu3une4qJtTNvtVdorekLIc5w4pEwfnal24jP4u0yL3lWrHdJKE+flFfsoj0n5Ig2l A8B1fDeeIuppCHg2Qs3zJe5uPLzvjEC8lc3VxfrK11rufsvMJZW5l7iL6CRcuv8jjz/7A6F3Alh EtHNVTd9gRS6Ifgtu5tY1t9zUyT275Qv0j36AM4glVNNfuEhB2diu5g= X-Google-Smtp-Source: AGHT+IFqAyZQRbRYtYEmeMsrs7MIVpz3F5a0071joCl+4E1pyIG8nDoF4tustrp2jVDZXF29mgQhWA== X-Received: by 2002:a05:6a00:1829:b0:736:a540:c9ad with SMTP id d2e1a72fcca58-737572d542bmr3107911b3a.20.1742273500665; Mon, 17 Mar 2025 21:51:40 -0700 (PDT) Received: from pc.. ([38.39.164.180]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73711694b2csm8519195b3a.129.2025.03.17.21.51.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 21:51:40 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , qemu-arm@nongnu.org, alex.bennee@linaro.org, Peter Maydell , kvm@vger.kernel.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Marc-Andr=C3=A9?= =?utf-8?q?_Lureau?= , =?utf-8?q?Philippe_Mathi?= =?utf-8?q?eu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PATCH 08/13] target/arm/cpu: flags2 is always uint64_t Date: Mon, 17 Mar 2025 21:51:20 -0700 Message-Id: <20250318045125.759259-9-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318045125.759259-1-pierrick.bouvier@linaro.org> References: <20250318045125.759259-1-pierrick.bouvier@linaro.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Do not rely on target dependent type, but use a fixed type instead. Since the original type is unsigned, it should be safe to extend its size without any side effect. Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson --- target/arm/cpu.h | 2 +- target/arm/tcg/hflags.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 96f7801a239..27a0d4550f2 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -194,7 +194,7 @@ typedef struct ARMPACKey { /* See the commentary above the TBFLAG field definitions. */ typedef struct CPUARMTBFlags { uint32_t flags; - target_ulong flags2; + uint64_t flags2; } CPUARMTBFlags; typedef struct ARMMMUFaultInfo ARMMMUFaultInfo; diff --git a/target/arm/tcg/hflags.c b/target/arm/tcg/hflags.c index 8d79b8b7ae1..e51d9f7b159 100644 --- a/target/arm/tcg/hflags.c +++ b/target/arm/tcg/hflags.c @@ -506,8 +506,8 @@ void assert_hflags_rebuild_correctly(CPUARMState *env) if (unlikely(c.flags != r.flags || c.flags2 != r.flags2)) { fprintf(stderr, "TCG hflags mismatch " - "(current:(0x%08x,0x" TARGET_FMT_lx ")" - " rebuilt:(0x%08x,0x" TARGET_FMT_lx ")\n", + "(current:(0x%08x,0x%016" PRIx64 ")" + " rebuilt:(0x%08x,0x%016" PRIx64 ")\n", c.flags, c.flags2, r.flags, r.flags2); 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This field is used for MVE and SVE implementations. MVE implementation is clipping index value to 0 or 1 for zregs[*].d[], so we should not touch the rest of data in this case anyway. Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson --- target/arm/cpu.h | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 27a0d4550f2..00f78d64bd8 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -169,11 +169,7 @@ typedef struct ARMGenericTimer { * Align the data for use with TCG host vector operations. */ -#ifdef TARGET_AARCH64 -# define ARM_MAX_VQ 16 -#else -# define ARM_MAX_VQ 1 -#endif +#define ARM_MAX_VQ 16 typedef struct ARMVectorReg { uint64_t d[2 * ARM_MAX_VQ] QEMU_ALIGNED(16); From patchwork Tue Mar 18 04:51:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierrick Bouvier X-Patchwork-Id: 14020299 Received: from mail-pj1-f49.google.com (mail-pj1-f49.google.com [209.85.216.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 292AE1CAA97 for ; Tue, 18 Mar 2025 04:51:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273504; cv=none; b=aC/lAV+jdGytc1l6vq0fEtTMqG+j6vCovICtrJim31VafJdhzUQP6s+QM0bSe11r4A5l1mcXpcCvZoT9TFqQrq/hi9Ui+wsJgu/zDE1dhyEgDvtjxfEjCN19uqcGyffa+Ujj+KxlIjIinfI/TaACuPwEwiCr2vxSCSi8BbD1Kvg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273504; c=relaxed/simple; bh=hHoOsyyrEO+zVHEw+yw4NYM9LKkYQiFxtHWala0FEPc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Xqn32SJm5Js8WYjhKvGIy9HaDvp1zlMedO9SJCjcSAaQoC8FgtSCRPDU06uuMYHQZ76O0xyPA28RkZy7/vEhT4AWDlW/pv/bZYZM9ynjr8c7c12+yejG63ZX4oC7F78xc9GQsmTuAsD/IiiG0QgHWSCUiH4j0ah7zKvgEkPk5qI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=g57FF8mR; arc=none smtp.client-ip=209.85.216.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="g57FF8mR" Received: by mail-pj1-f49.google.com with SMTP id 98e67ed59e1d1-2ff6cf448b8so5859022a91.3 for ; Mon, 17 Mar 2025 21:51:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742273502; x=1742878302; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wWxuqDn4s8YGDZbkaUM66zf0LxM3gMsyBA+i/Ql3r9I=; b=g57FF8mR/xJ4e0UwDteLrWlXEGa9saD3JjydD8EwEuDri3gEcbVlmd5mnxX5+BVoFN 5O9D8ajeo08ASsJ/oglJKjrc6mMQ8s4aqn7Uxa1OyJOCrQUIzOyjLFd72ZkuT5DU2NZ4 774EX/WH2emlVzNAzkLZ8MrYj5//xLBv9eAjzMuWH343OSaVqhQwaLOkcHWX/P0fNj3j Fjw8/q3h8PquRiZZQGinnZqI1rftHsZZh+wLeSbWdI6LPz8PB6idL6/ovI6Wp4xwQXOa sl0rdLSS3lUFUYQbIjvw4eyLbN8ymWWPLdO82cq4nZHDLDpuQQpQ1sbiCub2rKpP1Nvo cigw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742273502; x=1742878302; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wWxuqDn4s8YGDZbkaUM66zf0LxM3gMsyBA+i/Ql3r9I=; b=Zwdvrido3j9dmmtgRuVsmOcmTHEa+1ZtbLpS+28ZWCpLfYK3QH3ihzPW70pxTFLoMC QShmjHy2TZNgYp4OhaORjE55kXood7jrzUPQ/RLJAJaI42v3WG73IAbtkNd69AcamYkv D3ZLKVC+nx4z8jHEFEStidamLTITL4Bg2K0TDEwaRmb0PDB8sNySBBS149KOocA4a1W6 xQUvvBFPflj8LUO7yBJ+hWgB1cUeV3ZtDeFj2AnBlJQFVU5h2isc8jWXiFky288CYF7R KoJS1z8ZjpiqeRu5yNS4v6IeJPt+2LQEaGou6ol9ovEo8pqe+Y1rVVBcm7ftKgVRFw+7 hevg== X-Forwarded-Encrypted: i=1; AJvYcCWlltaaHHShF3tZHqi5hgxm9S7AuTswscsYOt5xVqPvmJHI3y+q7nc1yUIvYEDC/J//T8U=@vger.kernel.org X-Gm-Message-State: AOJu0YzpoylblAPGn5UaBuFGA+K4zKnbvbxQWNNLQRuPOHlH1McTI2AQ 5xO9XrtCiavSd5gLqwU9LsRLvbPzHepBUvnQ0wvQwSYW+wO8v/R+Vhw9vhGMzEs= X-Gm-Gg: ASbGncvgt3Jt1BryT0wOKKdvX7WAbDqGh3ENHAN6t//jpqAJ75YFU/VeM62l1odpj62 ztgk/tpeofYre+fUR9dVGh6fx8WDPAfpc2ZlWscOwz9OIgAVd8BPq2LGTXf3VsZSEu/LpC6kp1E vQI8TRMg3qPP8bveudWNOHcWH/7dbBcOH0B9SAhvN0jDAeUGZASnvWxzZBJ5hCVS00T6y+/tvXD c2xKHcxBZIHOEl6pu0bKZRop82nicvPEXmsbL0GhDqlSAGZ72EAXY0ZHt3GL9hI4pEtF9McQQzJ byGFwx0accaDbtDsDo7zLyXaUZ/5yQDtbHPpK5zu34Im X-Google-Smtp-Source: AGHT+IFe64voSZsfhB6tCQvZ6JsS5YIy++Gra9YOoX3NHYIjPdoV//u+oQg4+pI0ZxYcfpZboB2sWw== X-Received: by 2002:a05:6a20:9c92:b0:1f5:6680:82b6 with SMTP id adf61e73a8af0-1fa461552c5mr3160029637.38.1742273502551; Mon, 17 Mar 2025 21:51:42 -0700 (PDT) Received: from pc.. ([38.39.164.180]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73711694b2csm8519195b3a.129.2025.03.17.21.51.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 21:51:42 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , qemu-arm@nongnu.org, alex.bennee@linaro.org, Peter Maydell , kvm@vger.kernel.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Marc-Andr=C3=A9?= =?utf-8?q?_Lureau?= , =?utf-8?q?Philippe_Mathi?= =?utf-8?q?eu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PATCH 10/13] target/arm/cpu: define same set of registers for aarch32 and aarch64 Date: Mon, 17 Mar 2025 21:51:22 -0700 Message-Id: <20250318045125.759259-11-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318045125.759259-1-pierrick.bouvier@linaro.org> References: <20250318045125.759259-1-pierrick.bouvier@linaro.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 To eliminate TARGET_AARCH64, we need to make various definitions common between 32 and 64 bit Arm targets. Added registers are used only by aarch64 code, and the only impact is on the size of CPUARMState, and added zarray (ARMVectorReg zarray[ARM_MAX_VQ * 16]) member (+64KB) It could be eventually possible to allocate this array only for aarch64 emulation, but I'm not sure it's worth the hassle to save a few KB per vcpu. Running qemu-system takes already several hundreds of MB of (resident) memory, and qemu-user takes dozens of MB of (resident) memory anyway. Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson --- target/arm/cpu.h | 6 ------ 1 file changed, 6 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 00f78d64bd8..51b6428cfec 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -175,7 +175,6 @@ typedef struct ARMVectorReg { uint64_t d[2 * ARM_MAX_VQ] QEMU_ALIGNED(16); } ARMVectorReg; -#ifdef TARGET_AARCH64 /* In AArch32 mode, predicate registers do not exist at all. */ typedef struct ARMPredicateReg { uint64_t p[DIV_ROUND_UP(2 * ARM_MAX_VQ, 8)] QEMU_ALIGNED(16); @@ -185,7 +184,6 @@ typedef struct ARMPredicateReg { typedef struct ARMPACKey { uint64_t lo, hi; } ARMPACKey; -#endif /* See the commentary above the TBFLAG field definitions. */ typedef struct CPUARMTBFlags { @@ -656,13 +654,11 @@ typedef struct CPUArchState { struct { ARMVectorReg zregs[32]; -#ifdef TARGET_AARCH64 /* Store FFR as pregs[16] to make it easier to treat as any other. */ #define FFR_PRED_NUM 16 ARMPredicateReg pregs[17]; /* Scratch space for aa64 sve predicate temporary. */ ARMPredicateReg preg_tmp; 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([38.39.164.180]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73711694b2csm8519195b3a.129.2025.03.17.21.51.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 21:51:43 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , qemu-arm@nongnu.org, alex.bennee@linaro.org, Peter Maydell , kvm@vger.kernel.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Marc-Andr=C3=A9?= =?utf-8?q?_Lureau?= , =?utf-8?q?Philippe_Mathi?= =?utf-8?q?eu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PATCH 11/13] target/arm/cpu: remove inline stubs for aarch32 emulation Date: Mon, 17 Mar 2025 21:51:23 -0700 Message-Id: <20250318045125.759259-12-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318045125.759259-1-pierrick.bouvier@linaro.org> References: <20250318045125.759259-1-pierrick.bouvier@linaro.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Directly condition associated calls in target/arm/helper.c for now. Signed-off-by: Pierrick Bouvier --- target/arm/cpu.h | 8 -------- target/arm/helper.c | 6 ++++++ 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 51b6428cfec..9205cbdec43 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1222,7 +1222,6 @@ int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs, */ void arm_emulate_firmware_reset(CPUState *cpustate, int target_el); -#ifdef TARGET_AARCH64 int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq); @@ -1254,13 +1253,6 @@ static inline uint64_t *sve_bswap64(uint64_t *dst, uint64_t *src, int nr) #endif } -#else -static inline void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq) { } -static inline void aarch64_sve_change_el(CPUARMState *env, int o, - int n, bool a) -{ } -#endif - void aarch64_sync_32_to_64(CPUARMState *env); void aarch64_sync_64_to_32(CPUARMState *env); diff --git a/target/arm/helper.c b/target/arm/helper.c index b46b2bffcf3..774e1ee0245 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6562,7 +6562,9 @@ static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri, */ new_len = sve_vqm1_for_el(env, cur_el); if (new_len < old_len) { +#ifdef TARGET_AARCH64 aarch64_sve_narrow_vq(env, new_len + 1); +#endif } } @@ -10646,7 +10648,9 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs) * Note that new_el can never be 0. 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([38.39.164.180]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73711694b2csm8519195b3a.129.2025.03.17.21.51.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 21:51:44 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , qemu-arm@nongnu.org, alex.bennee@linaro.org, Peter Maydell , kvm@vger.kernel.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Marc-Andr=C3=A9?= =?utf-8?q?_Lureau?= , =?utf-8?q?Philippe_Mathi?= =?utf-8?q?eu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PATCH 12/13] meson: add common hw files Date: Mon, 17 Mar 2025 21:51:24 -0700 Message-Id: <20250318045125.759259-13-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318045125.759259-1-pierrick.bouvier@linaro.org> References: <20250318045125.759259-1-pierrick.bouvier@linaro.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Those files will be compiled once per base architecture ("arm" in this case), instead of being compiled for every variant/bitness of architecture. We make sure to not include target cpu definitions (exec/cpu-defs.h) by defining header guard directly. This way, a given compilation unit can access a specific cpu definition, but not access to compile time defines associated. Previous commits took care to clean up some headers to not rely on cpu-defs.h content. Signed-off-by: Pierrick Bouvier --- meson.build | 36 +++++++++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/meson.build b/meson.build index 672a0f79d11..0dec7d9750e 100644 --- a/meson.build +++ b/meson.build @@ -3689,6 +3689,7 @@ hw_arch = {} target_arch = {} target_system_arch = {} target_user_arch = {} +hw_common_arch = {} # NOTE: the trace/ subdirectory needs the qapi_trace_events variable # that is filled in by qapi/. @@ -4065,6 +4066,33 @@ common_all = static_library('common', implicit_include_directories: false, dependencies: common_ss.all_dependencies()) +# construct common libraries per base architecture +hw_common_arch_libs = {} +foreach target : target_dirs + config_target = config_target_mak[target] + target_base_arch = config_target['TARGET_BASE_ARCH'] + + # check if already generated + if target_base_arch in hw_common_arch_libs + continue + endif + + if target_base_arch in hw_common_arch + src = hw_common_arch[target_base_arch] + lib = static_library( + 'hw_' + target_base_arch, + build_by_default: false, + sources: src.all_sources() + genh, + include_directories: common_user_inc, + implicit_include_directories: false, + # prevent common code to access cpu compile time + # definition, but still allow access to cpu.h + c_args: ['-DCPU_DEFS_H', '-DCONFIG_SOFTMMU'], + dependencies: src.all_dependencies()) + hw_common_arch_libs += {target_base_arch: lib} + endif +endforeach + if have_rust # We would like to use --generate-cstr, but it is only available # starting with bindgen 0.66.0. The oldest supported versions @@ -4230,8 +4258,14 @@ foreach target : target_dirs arch_deps += t.dependencies() target_common = common_ss.apply(config_target, strict: false) - objects = common_all.extract_objects(target_common.sources()) + objects = [common_all.extract_objects(target_common.sources())] arch_deps += target_common.dependencies() + if target_type == 'system' and target_base_arch in hw_common_arch_libs + src = hw_common_arch[target_base_arch].apply(config_target, strict: false) + lib = hw_common_arch_libs[target_base_arch] + objects += lib.extract_objects(src.sources()) + arch_deps += src.dependencies() + endif target_specific = specific_ss.apply(config_target, strict: false) arch_srcs += target_specific.sources() From patchwork Tue Mar 18 04:51:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierrick Bouvier X-Patchwork-Id: 14020302 Received: from mail-pj1-f51.google.com (mail-pj1-f51.google.com [209.85.216.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A4521D61B1 for ; Tue, 18 Mar 2025 04:51:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273508; cv=none; b=FTbJe/M4RkuljXHgcQyMgYJeii9R1JVJt2EDqwUmNt6KrbQfujg7PxeKZCr5M7AKG2BN8cpP/q5fbIqybQc7+CTeIMutdX+g/wrzn+jLKnLM27vo4OQM/oDyJERsbYU9tePm7rUrCrxVFLB+py9FCYGLBcMW+lVWedapYMw6/Fw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742273508; c=relaxed/simple; bh=DjgwglxYYcpzDBf0XN7Ss+nVUJWqsY+d0AHb5OrQiuc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Om6ELlosHjk0R3P8QY1ov1oC7OXrPdMeqfMm+2yXzh9zH4XbSUjoBBSjROLm62VNclOOtWItgcy9PQccugHUTQxz3A8oukUftrKraSK8uGdsSz2Vc5hWTd3Ej2jjCa84NxAZJR0qEAT8e7ImEm3CMuhS6JTAaV6/kwZLMMhJRBo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=BjR55Psf; arc=none smtp.client-ip=209.85.216.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="BjR55Psf" Received: by mail-pj1-f51.google.com with SMTP id 98e67ed59e1d1-2ff85fec403so4818613a91.1 for ; Mon, 17 Mar 2025 21:51:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742273505; x=1742878305; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TJs8jpuU5VHY7crNqDB8k9WdWD2PL+VSpwoAKAzM9C8=; b=BjR55PsfaXkfiSmjje823UdU7VGUtjbIDQRlbvb9sOT7rnIukmhnJTpgCEFNAo5Ixn wCRF+Q8UflbXZsV5c9lmcTSQANFX2J4yGgebtnpd8ImWvo6j222pEv8cW8zsFFHMgST3 a/Ez0RYpWmosVqNj4sVZ1+VDV4ik/6ok7dq8m8UuJ6V50PCbyDpAC7oi2fLsY4ZAb3nw +R2QhO6PhQRkIXz4n8/Ns/XdL7yYrvvbt6jv7qNQ0wiFutX+Lyt8vMl6lUgouHL8DDzA gH0SAjt8b/A6Z8Z4ApT8te4vflHEk/lp6RjgY5PC1TH+2LouRpShH3wMhaS0BKZgrDyq J10g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742273505; x=1742878305; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TJs8jpuU5VHY7crNqDB8k9WdWD2PL+VSpwoAKAzM9C8=; b=WhsY9zbB2SpvAmXYkJjyUTSzuOP9K2WSakTd4yylwjcVWufxAOcsMw5KDkW4QXNPHl 6ybM77KhRrAO00toMEkceVaPxmx2/ncPBzrDD1Or6Z/0BD0STEuRk/F+0m7BQrTEL397 LiTP50hN+re2v6M/opeZvILJAnJkc8GhTFfRwEpE97B7YwR5vTXYIBBheEa55I8PN60v SjbZriE4GP6wxQD1ZmHbofyCKM8AYM0VvGkt2a4b74zGt9QRTAYZLHNSBPlc7W6ZbVsx 9o3Lf20BGnscGlzxfBGtr9Gj0kRo/ijHdf/uCsheS/zD+zR4YaQXlX6eCksBM7xfB6cI u6TQ== X-Forwarded-Encrypted: i=1; AJvYcCV73eDe8mJxIUnLLquH6SjqjxoiVOa4sQSi8Ii7r1V7JvdC08lyZpELenI1lqYGMJC8iLY=@vger.kernel.org X-Gm-Message-State: AOJu0YwIjB/jWHP4qMpKX2sq36rh2Y5wWbhCXylbtq1ky0jc34wzF21R Wde7qOuLj58KrPQVPNSZZQfk63SvKLtA3VRqFNnnMXZ1lEMGEPcOLmhU94YO6qM= X-Gm-Gg: ASbGncv7oXlUhk8c0jxhA9DOE3FKjS7gjPqz+fUrE1vrMu1HcR2v4nyYh+mLpN6HC/l 0lMyZl40oE89ZtSRR/fInnB91hkhvptTbHQoO3t3zcISTVTsRncnhCkyvwWWrpRL3GpUcOJ7dqa /v/9zM+ZfwKmJ4EJNp2hcxRSJvhItDICJPlLqGId3a4sRIX0c4WsDbHBiwATGsjy1qRMqhvyy3e bL5HwkulAPMym/+G1PBzVQfbl/xIO5oRfSxxAC1cMr82Gz5Fz78/pzhsv2OtopxitlMGcjjmJt4 RpkxaHCDI3dRdLOiGCP0UPbwlYDRRzWG9ywQJsq9fiD/Sx0R1sBzYd4= X-Google-Smtp-Source: AGHT+IHEmBiDYdH8DpN4X2712XG3vEXoAh58XN6VBOwchF+ihZ4rs3b8Wb2Qrcz+iN/AtHC1fq47cw== X-Received: by 2002:a05:6a21:1fc1:b0:1ee:a410:4aa5 with SMTP id adf61e73a8af0-1fa50bd891emr2581469637.17.1742273505380; Mon, 17 Mar 2025 21:51:45 -0700 (PDT) Received: from pc.. ([38.39.164.180]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73711694b2csm8519195b3a.129.2025.03.17.21.51.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 21:51:44 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , qemu-arm@nongnu.org, alex.bennee@linaro.org, Peter Maydell , kvm@vger.kernel.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Marc-Andr=C3=A9?= =?utf-8?q?_Lureau?= , =?utf-8?q?Philippe_Mathi?= =?utf-8?q?eu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PATCH 13/13] hw/arm/boot: make compilation unit hw common Date: Mon, 17 Mar 2025 21:51:25 -0700 Message-Id: <20250318045125.759259-14-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318045125.759259-1-pierrick.bouvier@linaro.org> References: <20250318045125.759259-1-pierrick.bouvier@linaro.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Now we eliminated poisoned identifiers from headers, this file can now be compiled once for all arm targets. Signed-off-by: Pierrick Bouvier --- hw/arm/boot.c | 1 + hw/arm/meson.build | 5 ++++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index e296b62fa12..639f737aefe 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -23,6 +23,7 @@ #include "hw/loader.h" #include "elf.h" #include "system/device_tree.h" +#include "target/arm/cpu.h" #include "qemu/config-file.h" #include "qemu/option.h" #include "qemu/units.h" diff --git a/hw/arm/meson.build b/hw/arm/meson.build index ac473ce7cda..9e8c96059eb 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -1,5 +1,5 @@ arm_ss = ss.source_set() -arm_ss.add(files('boot.c')) +arm_common_ss = ss.source_set() arm_ss.add(when: 'CONFIG_ARM_VIRT', if_true: files('virt.c')) arm_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c')) arm_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic_boards.c')) @@ -75,4 +75,7 @@ system_ss.add(when: 'CONFIG_SX1', if_true: files('omap_sx1.c')) system_ss.add(when: 'CONFIG_VERSATILE', if_true: files('versatilepb.c')) system_ss.add(when: 'CONFIG_VEXPRESS', if_true: files('vexpress.c')) +arm_common_ss.add(fdt, files('boot.c')) + hw_arch += {'arm': arm_ss} +hw_common_arch += {'arm': arm_common_ss}