From patchwork Wed Mar 19 13:38:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 14022576 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF6A025743E; Wed, 19 Mar 2025 13:41:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742391673; cv=none; b=HXFQfgeM70ZbseKDPlo3X8vzDtTP3NfDgvwHxRFLJZtHBUHwbMUI9GJ9tMbzJbs5VEScyNP7Hf8YU0974wTtdMDrVCQ7ECYtk6O7WsEiT46WvypJZMWHEEODHRYX3PlwGvXUAX7dc8b0CbhhNp2yzMGzk9ZgVvsORwG7nC2xt78= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742391673; c=relaxed/simple; bh=F51YbMImwQc7/NCLq/dSVZAxpr1K59NO8/ge5HY3tOY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PXbP/WVPq/3xeggZblVUjIEULtJ3bhQQGUkIGlg3UiHXJQEG+Tq8+lSmHesCl8cyhinGBNb9djf8W0xxLDbf10AGHE2WWZCP+dSfMzOMA8rKIipoSPGlLy2Uh17sLfCJOnAbrvQUWSU0z5t/AFno3JaJHTQQMOrnA95LBIfAN0E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Eacp5hOg; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Eacp5hOg" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BB56FC4CEEA; Wed, 19 Mar 2025 13:41:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742391673; bh=F51YbMImwQc7/NCLq/dSVZAxpr1K59NO8/ge5HY3tOY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Eacp5hOgup242qt9qrrXAa0GjkyDVR5tp0rON15rp6LNDGAnpGnwNR+1jVI4byW25 sa83E25/xPvLvJLwuE46QELy68kRu7p150k974fzJSMtW/hIysP7qDfNTHuwxkpFee egt9JCkz8iMZHpTFs210rUzehjxd8W0PH/HT7AZO3Cr+NJHLshk063HGCcR/NQzHJe gO4a9PE2pxqC0jvcPCPr2D0lkOoqmIYJIdoAxAjWkU7ifEDkwrXHGqGNCsYVLrIZvY KGSWlA903eAyVWDRY/giQByHTRZUotp64eyy9zLMjrxUsMPhbk90NjKC9BoAD9+tOz j4ruZb1KtEQGA== From: Roger Quadros Date: Wed, 19 Mar 2025 15:38:27 +0200 Subject: [PATCH net-next 1/9] net: ethernet: ti: cpsw_ale: Update Policer fields for more ALE size/ports Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250319-am65-cpsw-rx-class-v1-1-2bfded07490e@kernel.org> References: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> In-Reply-To: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2711; i=rogerq@kernel.org; h=from:subject:message-id; bh=F51YbMImwQc7/NCLq/dSVZAxpr1K59NO8/ge5HY3tOY=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBn2slw74Pzm5LOGkI0F8t1zYRZAamQfJRPuzzXT JtURNh6q2yJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZ9rJcAAKCRDSWmvTvnYw k6BED/9f80Nd1f5yCO3qR5SgWPWTyWhvLVh3gj70YYk50WbDuRTpzFJkdXz/cZrNimmN1Nbn8ST jyG2xdtZNH9zTUc+V8SR4K8oP9M+b69cv36PA/s4Mrb622mgYrnmw8SgiZsuEJTm2wSz25r3uRK 28/DYQlOnSuiQmIPqjv4tAPjU0BU3B4vd5Yb1LaCFQR76pNASycxtPfTmXDXHh/LqxAU5v6o1fT 6oKQgnbHY+M92Mr2bZY/fPaDVfWFORSSyaEDCti7eXyfS2OJt1E7UeNTDGd7fAiIyKB6V7BFrPj WJqTvr8qbBUTmsGioo6ChVTfBc3RBSLMFlRVWGI1/EgT1blmge7eRWE0opDMa0nASntrBWf5db1 eqkrjpOuCj6twY9vKAxQjOLGEgQ91JLsbm3X3RTKVWi/yX6xmR3WD7ALhGnwpnd2BmONVq/2Sl1 KOKsKbfQCjwPlxFuxSaqIR66CA30W+cp8jpCTsFjPvTWyvpgnFAI+FY1xP81ZYBTFcUYQ3k/Muk vUssm602tRJkCyOajGaEL9fKUcjWDcH4ig0+d2EVDO9JRIslwi1rb40WkOiWTEk8Nj+gUdZvCrj Dcb0L/zQY++1FAxzCinNaM/553Hx/6P1+OjmUOuhKBPSW3fNJZNBIUHREu4vRKDokJLw8qgizyw TAPQxEH02AawrYw== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Different SoCs have different sized ALE table and number of ports. Expand the Policer fields to support 16 ports and 1024 ALE entries. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/cpsw_ale.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 5cc72a91f220..50d0340f83dd 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -1341,33 +1341,33 @@ static const struct reg_field ale_fields_cpsw_nu[] = { /* CPSW_ALE_POLICER_PORT_OUI_REG */ [POL_PORT_MEN] = REG_FIELD(ALE_POLICER_PORT_OUI, 31, 31), [POL_TRUNK_ID] = REG_FIELD(ALE_POLICER_PORT_OUI, 30, 30), - [POL_PORT_NUM] = REG_FIELD(ALE_POLICER_PORT_OUI, 25, 25), + [POL_PORT_NUM] = REG_FIELD(ALE_POLICER_PORT_OUI, 25, 28), [POL_PRI_MEN] = REG_FIELD(ALE_POLICER_PORT_OUI, 19, 19), [POL_PRI_VAL] = REG_FIELD(ALE_POLICER_PORT_OUI, 16, 18), [POL_OUI_MEN] = REG_FIELD(ALE_POLICER_PORT_OUI, 15, 15), - [POL_OUI_INDEX] = REG_FIELD(ALE_POLICER_PORT_OUI, 0, 5), + [POL_OUI_INDEX] = REG_FIELD(ALE_POLICER_PORT_OUI, 0, 9), /* CPSW_ALE_POLICER_DA_SA_REG */ [POL_DST_MEN] = REG_FIELD(ALE_POLICER_DA_SA, 31, 31), - [POL_DST_INDEX] = REG_FIELD(ALE_POLICER_DA_SA, 16, 21), + [POL_DST_INDEX] = REG_FIELD(ALE_POLICER_DA_SA, 16, 25), [POL_SRC_MEN] = REG_FIELD(ALE_POLICER_DA_SA, 15, 15), - [POL_SRC_INDEX] = REG_FIELD(ALE_POLICER_DA_SA, 0, 5), + [POL_SRC_INDEX] = REG_FIELD(ALE_POLICER_DA_SA, 0, 9), /* CPSW_ALE_POLICER_VLAN_REG */ [POL_OVLAN_MEN] = REG_FIELD(ALE_POLICER_VLAN, 31, 31), - [POL_OVLAN_INDEX] = REG_FIELD(ALE_POLICER_VLAN, 16, 21), + [POL_OVLAN_INDEX] = REG_FIELD(ALE_POLICER_VLAN, 16, 25), [POL_IVLAN_MEN] = REG_FIELD(ALE_POLICER_VLAN, 15, 15), - [POL_IVLAN_INDEX] = REG_FIELD(ALE_POLICER_VLAN, 0, 5), + [POL_IVLAN_INDEX] = REG_FIELD(ALE_POLICER_VLAN, 0, 9), /* CPSW_ALE_POLICER_ETHERTYPE_IPSA_REG */ [POL_ETHERTYPE_MEN] = REG_FIELD(ALE_POLICER_ETHERTYPE_IPSA, 31, 31), - [POL_ETHERTYPE_INDEX] = REG_FIELD(ALE_POLICER_ETHERTYPE_IPSA, 16, 21), + [POL_ETHERTYPE_INDEX] = REG_FIELD(ALE_POLICER_ETHERTYPE_IPSA, 16, 25), [POL_IPSRC_MEN] = REG_FIELD(ALE_POLICER_ETHERTYPE_IPSA, 15, 15), - [POL_IPSRC_INDEX] = REG_FIELD(ALE_POLICER_ETHERTYPE_IPSA, 0, 5), + [POL_IPSRC_INDEX] = REG_FIELD(ALE_POLICER_ETHERTYPE_IPSA, 0, 9), /* CPSW_ALE_POLICER_IPDA_REG */ [POL_IPDST_MEN] = REG_FIELD(ALE_POLICER_IPDA, 31, 31), - [POL_IPDST_INDEX] = REG_FIELD(ALE_POLICER_IPDA, 16, 21), + [POL_IPDST_INDEX] = REG_FIELD(ALE_POLICER_IPDA, 16, 25), /* CPSW_ALE_POLICER_TBL_CTL_REG */ /** From patchwork Wed Mar 19 13:38:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 14022577 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A3192571B1; Wed, 19 Mar 2025 13:41:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742391678; cv=none; b=KZFsszN9XxUwY5avX9cg7rmRWBMde09ABaSm60blK8tTtTH1mw/ZevMvF16lkm7PncZTk2Qqo7pfixQL5SCbnkJYadOakzlWDjx5FDdqoWnILQG7rqQjEfsOoC9rbd2RSlq3v4M/+f3qe5yoXCJOylgvjdNGCm45wDE6/Ef/CaY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742391678; c=relaxed/simple; bh=uzzDSnP/9DcDwO/FbX9nZmA22EYtH9spiHEMmle3uHg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2474; i=rogerq@kernel.org; h=from:subject:message-id; bh=uzzDSnP/9DcDwO/FbX9nZmA22EYtH9spiHEMmle3uHg=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBn2slwtAxYCCY4c09MyX9JnNMzVpg8LFuhFpLCa T+ZdhF7XUmJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZ9rJcAAKCRDSWmvTvnYw k9JzD/49R0YGwgsMTAIle64/WE7EvidKqGQOZma7NbP7pV9FwQdloJgKtYAZKNGxb98s8NR+rSF PA+IFTjkn3OyHpjdR0GBqi04KwZf/gUudxAjDr0UOT3PhT1U6rrboLG2No90c3CZmAgFZw8c4Wh EVO6vS+mQJMQApjCwhKVhH44mSVGA7U7A9Gix+lyJ14t1NrYIA004s3fvXWW8kqOD4CGBk64Mwx hMJPg/smsZe6FGtCrL4JEynYMSQrI8JyaMYaeNVQ8vqy7Vzm1DEadBLS6D3QTnUEddD+Efq8qsc gCY/TByDs8cxHWzua0LmQQujIe4qLYKeilGxPvmSw2AtHib2imr+D5UjjDR6vv57Yehi3o0LRU7 RL01U4tACxG6W82KoGSfA6GkKysa2D1EcwhefYhZ8IDtuGBMUCoW0amwhl89yw5moQZY8iNVWwp NNs0hl83j+U+iJxyhS7XvNll1oF+hFxNTzAz86j44XkZV5baRJ49rGJdZ8bMmY99bTwT7Xt+553 aauEJgG0lbf+RCfHG5xU0GUTC1ISxwdMe+juL5etdGhYvv8YMIaAhQ6gdLnOoOskdfv15RWkrxf bHQfows55fRAfJ/Y83m9q5QRsqAundMrkDTQk0X2vsHmoDMdSVnhB1vcQVflOjgP0x0apdBjtSg pIyKWObJ3fITewA== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Policer helpers will be interested to know what ALE index was used for the added VLAN entry. So return the ALE index instead of zero on success. Modify existing users to check for less than zero as error case. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/cpsw.c | 2 +- drivers/net/ethernet/ti/cpsw_ale.c | 6 +++--- drivers/net/ethernet/ti/cpsw_new.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index 0cb6fa6e5b7d..116ef3220458 100644 --- a/drivers/net/ethernet/ti/cpsw.c +++ b/drivers/net/ethernet/ti/cpsw.c @@ -1022,7 +1022,7 @@ static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask, unreg_mcast_mask); - if (ret != 0) + if (ret < 0) return ret; ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 50d0340f83dd..16b523e33e47 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -680,7 +680,7 @@ int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port_mask, int untag, return -ENOMEM; cpsw_ale_write(ale, idx, ale_entry); - return 0; + return idx; } static void cpsw_ale_vlan_del_modify_int(struct cpsw_ale *ale, u32 *ale_entry, @@ -803,14 +803,14 @@ int cpsw_ale_vlan_add_modify(struct cpsw_ale *ale, u16 vid, int port_mask, ret = cpsw_ale_add_vlan(ale, vid, vlan_members, untag_members, reg_mcast_members, unreg_mcast_members); - if (ret) { + if (ret < 0) { dev_err(ale->params.dev, "Unable to add vlan\n"); return ret; } dev_dbg(ale->params.dev, "port mask 0x%x untag 0x%x\n", vlan_members, untag_mask); - return ret; + return 0; } void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, diff --git a/drivers/net/ethernet/ti/cpsw_new.c b/drivers/net/ethernet/ti/cpsw_new.c index 3da1c131335d..24013c52555c 100644 --- a/drivers/net/ethernet/ti/cpsw_new.c +++ b/drivers/net/ethernet/ti/cpsw_new.c @@ -413,7 +413,7 @@ static int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask, unreg_mcast_mask); - if (ret != 0) + if (ret < 0) return ret; ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, From patchwork Wed Mar 19 13:38:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 14022578 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AD2AB2580FB; Wed, 19 Mar 2025 13:41:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742391680; cv=none; b=PVY1jsv95nwbzyWTicyuzYJpwaGTxsbjP044wOC1Fxf/l8LYcAkbO0wQ07HRxE41XBWWfl538rlmVDBgyrr5tkakP5Ma4eYBxUsZSk9MUrcDWnVaGx0wrCq4B6lH0plCymML1AyU3Pf3X0ValEw5DoTlqr1g+O5sMMWAZvjgrsQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742391680; c=relaxed/simple; bh=Q4fxgh7LFQD/pdJcZtm9UR1h59oPTyjwoZxdbhyI6/s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=L7pRMdlnMs33qsLJtzzqUADtLiKt6NxLfCRr1oJI0WXAuvsUyG1vlp0Tl6BLC+H706JV4LVO3JU5YT1ububc/9e0cFs2UP1q1jmN8SrbhkyVpM4MJdCOPixMPGtu3MuUPPzFas5eOJsFxW11AptN+67u0vdJJ9dH9GiZKM1slcQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=shfS5ucN; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="shfS5ucN" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 584F0C4CEE9; Wed, 19 Mar 2025 13:41:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742391680; bh=Q4fxgh7LFQD/pdJcZtm9UR1h59oPTyjwoZxdbhyI6/s=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=shfS5ucNfMAETHGqFA27FTplGA3G0jKEjQC/72Nc5m8Mm/AoekMP7zcJvnZ7/lMrM LsBrQl3LV3WLwREPc+3RCkef4SKAqUkwpO6LWXPj9p2lGDypODJnsTq/rl+kZjSKTZ VzOa6LAmuYIoftSzmTxZ3BqW9PGBYggj9VMtRkn3871VwTDVFfr96d5aOsLO4fgI/0 cLtDTyU19yfawkjIiRYsH1BLIUonDy7q4f2/gVRFK4yl5Vt7QDbU/6vT+g9ZL0rsq3 7qtaIaPU7eSSWW0nt6ZpPoX1JfHutyDjDU8YBNQ3ikTCNIjJUbPaCz5ZmODwLzRCHt eihmRHJpN3rMQ== From: Roger Quadros Date: Wed, 19 Mar 2025 15:38:29 +0200 Subject: [PATCH net-next 3/9] net: ethernet: ti: cpsw_ale: return ALE index in cpsw_ale_vlan_add_modify() Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250319-am65-cpsw-rx-class-v1-3-2bfded07490e@kernel.org> References: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> In-Reply-To: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=4563; i=rogerq@kernel.org; h=from:subject:message-id; bh=Q4fxgh7LFQD/pdJcZtm9UR1h59oPTyjwoZxdbhyI6/s=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBn2slwcwJTDGpAhw1meQIZ9bAc4SVNA0rFiQwsa ytyf7ZyRPWJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZ9rJcAAKCRDSWmvTvnYw kzVJD/0ea4zE3SqUQYw0tul2cnrGycMT8tW5VCBN+xKcotYmQEx9y4h0Z33kNg9kq1d6M3mSJ30 BLylKng/BDp+46hUBXHdjzjN2KMeZT8HO25uup7bfAKEkic2RzEu6JwNUoMHbZkx3ehfCubFc0M 1cQdE5hAPREFblFlfSkSdB85rzJfgif96BYcVrG1CyHJFGR2q04o2wnT2cFJYWvTwdWaEt4Ownb F3cH5kSBGdehhuCirg2wNMiU/q9mIWeaKAU96jr60K3qAhyVuSu5Qp2T1L7LzkpgHwRa2OucQlS tURpd7FfvsIFCGtbrdRyd2WJADyuxDjtxx5SHrMtsTR6sFI0ITmkFCAYQ9eVJbd1Bm9nxdbx164 KtwyhBr8q6oHc1W3wxmlw8KemmV+8uV+Sjz6GudiDVPd6aQb20vsvB++DUb0O1kxVfcNUadp0sq y9RpWFKu6HuaPinPfeYNrMocJhaynP5bPG0firxD/IXGh2dMPEu32IvT9phUAHKNRgNB2KBMWf6 Bdwa75zpUpKhBNGAZeZwuKzMPbo3KCtF6y7dV84snKVJwzJ0wWdrpX2Ke9+/iiAZaaWxuqDoN60 OjmSRmfN3S3ruA3fMMmHUHqgQsawsJdqNPeVFn4QNspSs9Cm/GRaIm6Ai6ONQH+ezYduPYtrucA 49vIG/81KCs6k+g== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Policer helpers will need to know what ALE index was used for the added VLAN entry. So return the ALE index instead of zero on success. Modify existing users to check for less than zero as error case. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 2 ++ drivers/net/ethernet/ti/am65-cpsw-switchdev.c | 6 +++--- drivers/net/ethernet/ti/cpsw_ale.c | 10 +++++----- drivers/net/ethernet/ti/cpsw_switchdev.c | 6 +++--- 4 files changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 3e671be95d6f..1c0eedf884ce 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -321,6 +321,8 @@ static int am65_cpsw_nuss_ndo_slave_add_vid(struct net_device *ndev, dev_info(common->dev, "Adding vlan %d to vlan filter\n", vid); ret = cpsw_ale_vlan_add_modify(common->ale, vid, port_mask, unreg_mcast, port_mask, 0); + if (ret > 0) + ret = 0; pm_runtime_put(common->dev); return ret; diff --git a/drivers/net/ethernet/ti/am65-cpsw-switchdev.c b/drivers/net/ethernet/ti/am65-cpsw-switchdev.c index d4c56da98a6a..b284202bf480 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-switchdev.c +++ b/drivers/net/ethernet/ti/am65-cpsw-switchdev.c @@ -175,7 +175,7 @@ static int am65_cpsw_port_vlan_add(struct am65_cpsw_port *port, bool untag, bool ret = cpsw_ale_vlan_add_modify(cpsw->ale, vid, port_mask, untag_mask, reg_mcast_mask, unreg_mcast_mask); - if (ret) { + if (ret < 0) { netdev_err(port->ndev, "Unable to add vlan\n"); return ret; } @@ -184,14 +184,14 @@ static int am65_cpsw_port_vlan_add(struct am65_cpsw_port *port, bool untag, bool cpsw_ale_add_ucast(cpsw->ale, port->slave.mac_addr, HOST_PORT_NUM, ALE_VLAN | ALE_SECURE, vid); if (!pvid) - return ret; + return 0; am65_cpsw_set_pvid(port, vid, 0, 0); netdev_dbg(port->ndev, "VID add: %s: vid:%u ports:%X\n", port->ndev->name, vid, port_mask); - return ret; + return 0; } static int am65_cpsw_port_vlan_del(struct am65_cpsw_port *port, u16 vid, diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 16b523e33e47..262abdd3f1b7 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -780,7 +780,7 @@ int cpsw_ale_vlan_add_modify(struct cpsw_ale *ale, u16 vid, int port_mask, u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0}; int reg_mcast_members, unreg_mcast_members; int vlan_members, untag_members; - int idx, ret = 0; + int idx; idx = cpsw_ale_match_vlan(ale, vid); if (idx >= 0) @@ -801,16 +801,16 @@ int cpsw_ale_vlan_add_modify(struct cpsw_ale *ale, u16 vid, int port_mask, reg_mcast_members = (reg_mcast_members & ~port_mask) | reg_mask; unreg_mcast_members = (unreg_mcast_members & ~port_mask) | unreg_mask; - ret = cpsw_ale_add_vlan(ale, vid, vlan_members, untag_members, + idx = cpsw_ale_add_vlan(ale, vid, vlan_members, untag_members, reg_mcast_members, unreg_mcast_members); - if (ret < 0) { + if (idx < 0) { dev_err(ale->params.dev, "Unable to add vlan\n"); - return ret; + return idx; } dev_dbg(ale->params.dev, "port mask 0x%x untag 0x%x\n", vlan_members, untag_mask); - return 0; + return idx; } void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, diff --git a/drivers/net/ethernet/ti/cpsw_switchdev.c b/drivers/net/ethernet/ti/cpsw_switchdev.c index ce85f7610273..c767a47b2039 100644 --- a/drivers/net/ethernet/ti/cpsw_switchdev.c +++ b/drivers/net/ethernet/ti/cpsw_switchdev.c @@ -191,7 +191,7 @@ static int cpsw_port_vlan_add(struct cpsw_priv *priv, bool untag, bool pvid, ret = cpsw_ale_vlan_add_modify(cpsw->ale, vid, port_mask, untag_mask, reg_mcast_mask, unreg_mcast_mask); - if (ret) { + if (ret < 0) { dev_err(priv->dev, "Unable to add vlan\n"); return ret; } @@ -200,13 +200,13 @@ static int cpsw_port_vlan_add(struct cpsw_priv *priv, bool untag, bool pvid, cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, ALE_VLAN, vid); if (!pvid) - return ret; + return 0; cpsw_set_pvid(priv, vid, 0, 0); dev_dbg(priv->dev, "VID add: %s: vid:%u ports:%X\n", priv->ndev->name, vid, port_mask); - return ret; + return 0; } static int cpsw_port_vlan_del(struct cpsw_priv *priv, u16 vid, From patchwork Wed Mar 19 13:38:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 14022579 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 11631258CDB; Wed, 19 Mar 2025 13:41:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Wed, 19 Mar 2025 13:41:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742391683; bh=4DTSB2NrpMzqvwjvTdkFc2E+wxOzkKbrSgOx2lj0Rpk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=gUD4S0EkE/Iw9DoMIXv8BRvAAe2q8XzrmER3vmsaMEAxxMsqs2zt5pfTnXgrie5B0 HzO8FqzU42Gs0tr2YtuaYFxPjS7UNKxoiPe+NZobS8cEHmZDj/DvoXy+OwTdPJRpky LNPuXUbcGukwnIQVllIK2Y5OsJgYuu/uxic+2EuDLW45RxtW/hrV7uvNMsrmxycDm0 E4pnMf+95mAwa3vPm5beDrf9i+9E0u2vAK1ML/ixN7h0XFN2LtVzPshXpaGzY1RWmP UFGshpIPN7otSlWhi/9ItkxiOFNk0J+BYKA5BNqMhAE7jRg9y8so/xXsoVub6yZxqu jJ+AHNvM6aMRA== From: Roger Quadros Date: Wed, 19 Mar 2025 15:38:30 +0200 Subject: [PATCH net-next 4/9] net: ethernet: ti: cpsw_ale: return ALE index in cpsw_ale_add_ucast() Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250319-am65-cpsw-rx-class-v1-4-2bfded07490e@kernel.org> References: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> In-Reply-To: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1944; i=rogerq@kernel.org; h=from:subject:message-id; bh=4DTSB2NrpMzqvwjvTdkFc2E+wxOzkKbrSgOx2lj0Rpk=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBn2slxYdnmf4Au1/HN4kwqUfqFMo7TPMCO7cN5Y EiLIb46fu6JAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZ9rJcQAKCRDSWmvTvnYw k3SrD/9E2eqQZOiGvlX7OlU7mgoX8LRdC5INnMGvoKZpA5zOmufsMKgJsmfamFq3V91u9ffUfHE 7rAZkU9YfNJx7ctO/HhxtUNEfcH1tKW9zxPqv47P/5lyTwSHw266tiwlOpAwi6XxBIqEw+6Hahk KnFf6yOH0LIUJkACxPVrNQHpKnvYpsUddgaE7kGshX5zu81niRpyEclrSmZZVktyYyJfgn56loG tRkIOj4dJa+7CjihEK/D4MEP6yB61JAkOrGY+jAU3T3yOwgMGlnE2PEdEnh+fEB1TCcdyWtmaZO owFjfkIsKUgXHVjLp/47opRmGvCJVzO787U07RwYqyg1RVpxeqGMaGgfM0SS4br+Gy5eDcjGagv 6Dhzp19UmUXzmJ8aFfopO5Us5cmEm3K9zn2Z5sNc+HYehWALBR65jwgSVdLAnSMgtlh2akMKASx UCBkFmUnDdGRbc9E2G9Zs2YAcsZkj8f6KEdWHQJUG62QHxW+zgyk5UFKZjikEtcYGkonhsjaA+R jz2oAM3jvDU97QczYrIN9mjZIuMre38PR7BryVGLxgVIZP+m5ixj7aCTii0J7zsy4iMU+7a5UiL jDUQciytgc3Z9uMIWT6PYITHGc5BagcOV7sLZdC+tah8t8YPoJPLREg6P8mJcMhUzf+9U4fyuN2 6Ib1SvcFUeyhKOA== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Policer helpers will need to know what ALE index was used for the added unicast entry. So return the ALE index instead of zero on success. Modify existing users to check for less than zero as error case. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/cpsw.c | 2 +- drivers/net/ethernet/ti/cpsw_ale.c | 2 +- drivers/net/ethernet/ti/cpsw_new.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index 116ef3220458..11d6ff85f424 100644 --- a/drivers/net/ethernet/ti/cpsw.c +++ b/drivers/net/ethernet/ti/cpsw.c @@ -1027,7 +1027,7 @@ static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, ALE_VLAN, vid); - if (ret != 0) + if (ret < 0) goto clean_vid; ret = cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 262abdd3f1b7..2c780efed402 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -534,7 +534,7 @@ int cpsw_ale_add_ucast(struct cpsw_ale *ale, const u8 *addr, int port, return -ENOMEM; cpsw_ale_write(ale, idx, ale_entry); - return 0; + return idx; } int cpsw_ale_del_ucast(struct cpsw_ale *ale, const u8 *addr, int port, diff --git a/drivers/net/ethernet/ti/cpsw_new.c b/drivers/net/ethernet/ti/cpsw_new.c index 24013c52555c..b80042518b95 100644 --- a/drivers/net/ethernet/ti/cpsw_new.c +++ b/drivers/net/ethernet/ti/cpsw_new.c @@ -418,7 +418,7 @@ static int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, ALE_VLAN, vid); - if (ret != 0) + if (ret < 0) goto clean_vid; ret = cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, From patchwork Wed Mar 19 13:38:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 14022580 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6990925742E; Wed, 19 Mar 2025 13:41:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742391687; cv=none; b=N4r9OXTY9ojiR0RygeGWvKPCItNtnmRRG4rLeKfgh/mvhq9kgkG2vzlug15Gmc0DxD7nqiGit2jyUn+A0InHB9P3MWHxv4ErTw45z15C4cn1MfmDYb5k/pVEG3dKTVEsddDRUBqo3U0OQp7/Xmh5TtN3sIKuAJ17Il7+8Vwm7s8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742391687; c=relaxed/simple; bh=gIWNou9NhHWdm2Cuup1OIaQwdRqja35AVHtc6DQS4+o=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fTSF4ZX/x0377sUD0Knm1VtsSi7gu/nepE29+1J6YNelm356ku2vJSGdFLEr3zXBTLw5iggnwerz8uzuFS65nX0krmEPsYZOkKE+smf7IsIgnk07PTNdnZI+2AmNtPf1iTqG2b0vNKU3T9zVaosH+vJD69/iEmUQHSaZY37AE1M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=jYTzua+B; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jYTzua+B" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0B31CC4CEEC; Wed, 19 Mar 2025 13:41:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742391686; bh=gIWNou9NhHWdm2Cuup1OIaQwdRqja35AVHtc6DQS4+o=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=jYTzua+BFyhZr4g/48BxXsk/03bb4uQHnHC6UqMzePAHHXOFg3UrDMAWwrVquMuIh nYlfsOMepZfCn1U8wSZHkPpYXN+ZdZeFJoy0w07KC9QZY28xYBZrJ/7I0AQwYBJaSH EoARH/Y6CBEzTfg6Tbk6WSmg4kLGnLwbJjzhbs0PvLIvYwhHlsYqe10wuJgvYBoxe7 kotzTrsFai7sIZ92Iw8uUAtJe5n5aOzLXOsweym0LLO3glgo+D3WmjUhTFpWE1hJSV MOPYPaM1PKKJ6Ln6Km5/1TJDGlKX1lmf99ZL3JwP0J6GWQVqH0yIG5/AgBfQvxdKIR 1aOJ2+cssPwWA== From: Roger Quadros Date: Wed, 19 Mar 2025 15:38:31 +0200 Subject: [PATCH net-next 5/9] net: ethernet: ti: cpsw_ale: add cpsw_ale_policer_reset_entry() Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250319-am65-cpsw-rx-class-v1-5-2bfded07490e@kernel.org> References: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> In-Reply-To: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=3404; i=rogerq@kernel.org; h=from:subject:message-id; bh=gIWNou9NhHWdm2Cuup1OIaQwdRqja35AVHtc6DQS4+o=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBn2slxvQWNGB+pQCm4LVGa0wN5hgqfhDWBW25ba ltMYjQeyYmJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZ9rJcQAKCRDSWmvTvnYw k+yTD/9h6sob7boaNBYokpj8QWpAusKnaPrv8ptXsJ+JBsmroW33OBzAVkz0iiSm4v89AwznhmB +10KqqFOdp0XoAORTKzw8Am6TSCZYzQ9MKh06R9D/v1Fb6rNn4KYb2qF3ApMGbT1dSpHxgp1gbA msfkTbnZr+3zNKKuopt7Cv1RnWF+PJ91yiitfedNNeAn8bPFgSQJA8QK8oY93tyteCXGSZ/r5YA OhMhUSf5xJTHG2SRxpR36DZXlLfrIb6Bq1Q3YYSa7GpgTKn8GsxfGNHPz7PLwLM6kBgP3+tVlsH k8/HgHz7PWvdhnzMCR0BNeiYEdQ+euuthUpHIrwHiWvFpB5U7e5Gcchch3/mZy2poFeS8rqqvSO CjLkC+utYQ1yAxyno8xMwTDqBz21G3+37ZWjF8+eH4xvk3tVRyVAg8T/ulv/x0FEFBjcZZOA+BK prscWzCDiptl5c7m0sAL2AKaDHCeK2gaIbkhNdCQlucGI3dPFqimHQaKY/cbmgaB4PLcQvtma/N GRVta7p6+aZQkA8hPtXsYJVGSGdU25VdTAiEQtaEmMJnH64KCkWC5pWqxACkJAXDhk4XqWiKJIl cZq+SiUDaUtQqXJZsYhPDduaYKEiR07TbTR9vfmrmBpL0wJbZQXBLq83Wf+8SCiQShmJ+B14Qe2 KoWcyqZA5UrGcxg== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Add new helper cpsw_ale_policer_reset_entry() to reset a single policer entry. Clear all fields instead of just clearing the enable bits. Export cpsw_ale_policer_reset() as it will be required by cpsw drivers using policer. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/cpsw_ale.c | 35 +++++++++++++++-------------------- drivers/net/ethernet/ti/cpsw_ale.h | 4 ++++ 2 files changed, 19 insertions(+), 20 deletions(-) diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 2c780efed402..630e3a555190 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -1674,30 +1674,25 @@ static void cpsw_ale_policer_thread_idx_enable(struct cpsw_ale *ale, u32 idx, regmap_field_write(ale->fields[ALE_THREAD_ENABLE], enable ? 1 : 0); } +static void cpsw_ale_policer_reset_entry(struct cpsw_ale *ale, u32 idx) +{ + int i; + + cpsw_ale_policer_read_idx(ale, idx); + for (i = 0; i < CPSW_ALE_POLICER_ENTRY_WORDS; i++) + writel_relaxed(0, ale->params.ale_regs + + ALE_POLICER_PORT_OUI + 4 * i); + cpsw_ale_policer_thread_idx_enable(ale, idx, 0, 0); + cpsw_ale_policer_write_idx(ale, idx); +} + /* Disable all policer entries and thread mappings */ -static void cpsw_ale_policer_reset(struct cpsw_ale *ale) +void cpsw_ale_policer_reset(struct cpsw_ale *ale) { int i; - for (i = 0; i < ale->params.num_policers ; i++) { - cpsw_ale_policer_read_idx(ale, i); - regmap_field_write(ale->fields[POL_PORT_MEN], 0); - regmap_field_write(ale->fields[POL_PRI_MEN], 0); - regmap_field_write(ale->fields[POL_OUI_MEN], 0); - regmap_field_write(ale->fields[POL_DST_MEN], 0); - regmap_field_write(ale->fields[POL_SRC_MEN], 0); - regmap_field_write(ale->fields[POL_OVLAN_MEN], 0); - regmap_field_write(ale->fields[POL_IVLAN_MEN], 0); - regmap_field_write(ale->fields[POL_ETHERTYPE_MEN], 0); - regmap_field_write(ale->fields[POL_IPSRC_MEN], 0); - regmap_field_write(ale->fields[POL_IPDST_MEN], 0); - regmap_field_write(ale->fields[POL_EN], 0); - regmap_field_write(ale->fields[POL_RED_DROP_EN], 0); - regmap_field_write(ale->fields[POL_YELLOW_DROP_EN], 0); - regmap_field_write(ale->fields[POL_PRIORITY_THREAD_EN], 0); - - cpsw_ale_policer_thread_idx_enable(ale, i, 0, 0); - } + for (i = 0; i < ale->params.num_policers ; i++) + cpsw_ale_policer_reset_entry(ale, i); } /* Default classifier is to map 8 user priorities to N receive channels */ diff --git a/drivers/net/ethernet/ti/cpsw_ale.h b/drivers/net/ethernet/ti/cpsw_ale.h index 87b7d1b3a34a..ce59fec75774 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.h +++ b/drivers/net/ethernet/ti/cpsw_ale.h @@ -156,6 +156,9 @@ enum cpsw_ale_port_state { #define ALE_ENTRY_BITS 68 #define ALE_ENTRY_WORDS DIV_ROUND_UP(ALE_ENTRY_BITS, 32) +/* Policer */ +#define CPSW_ALE_POLICER_ENTRY_WORDS 8 + struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params); void cpsw_ale_start(struct cpsw_ale *ale); @@ -195,5 +198,6 @@ int cpsw_ale_vlan_del_modify(struct cpsw_ale *ale, u16 vid, int port_mask); void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, bool add); void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch); +void cpsw_ale_policer_reset(struct cpsw_ale *ale); #endif From patchwork Wed Mar 19 13:38:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 14022581 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1B81257442; Wed, 19 Mar 2025 13:41:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Wed, 19 Mar 2025 13:41:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742391690; bh=MYN+8GPQJ1QFRYoP01Fl36gIYTYyzG95rG13R9gDY0M=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=PAzKeWcrk8dcrj3MpNcI5L8yXV2BWDi0rmTXKJoCeX+dWEkX62JY76N7ywrFPUAzI 4xhdpoAZvHrJ4yyyea8TxEnYJgXL4ujl/oea/SrVlyQxBETcPXC9m4hVpPt6rclxGl U5X9Iztzquo5j0fW6J9oypmseCgNGf8vWvYNbIqRSk3zn0t87pRfcEujK/W6/r4eti x/OD8zs/5ZIGg/y+uB7TobfX8N+hueWhOfnfKuy7sd8vsi+TNf90uLqou3kyqxhG4m Mb9IROtHUwV235d6nSSGsA6AK4BRzmvakTvil6II9oXIlXgih2g2Nn2IT2XofopYWV cmafl0ZeaZesQ== From: Roger Quadros Date: Wed, 19 Mar 2025 15:38:32 +0200 Subject: [PATCH net-next 6/9] net: ethernet: ti: cpsw_ale: add cpsw_ale_policer_set/clr_entry() Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250319-am65-cpsw-rx-class-v1-6-2bfded07490e@kernel.org> References: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> In-Reply-To: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=5145; i=rogerq@kernel.org; h=from:subject:message-id; bh=MYN+8GPQJ1QFRYoP01Fl36gIYTYyzG95rG13R9gDY0M=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBn2slxbCusx2boZK9IY3ZkG6KeTlgdiSbjaHng5 C2pkNLvFl6JAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZ9rJcQAKCRDSWmvTvnYw k3Z5D/4rG4sRsoRcNaObZTFZ2DcfopJr7TsViFrdi9uWrQBa9waBN03Xk+4isFmFIuvMODpePjf a/UY8OIgNAROfA1E6Cx7LLCIL23RLm6Xwx+Gtohju4s7r+fgtgZvzcN18Ol/bcYrYNj/VRQZTnn uSLLVBm89ym6mW0fqgjrPmUV/KnAMTBrQ3UZUu9d6phr8413xwBUiKHP5QtNrxyF1IJmrM0JxLk 548S66XXQJYbdN8gIo5SkqqLZlGJgFwftNozhmSc+XCebXVDLmrW3XEeOel/YH/AKHaKrhH662W eidH3qcBQlk90njyye7gwNrBJiF8WRYx7jsCtD0pHMWvb5YiVfGBD8wn9CjdyV3ZGgdDeKe2Plm 6ksYkFfAAOCg2zk/Cma12sfak3pSnkIdS+5TcBQcfNU6oPUQ5xVD5gh7W9SWLHFwb3pDXZvjuar IbRYqb1zSGQUPcFP8wVcQWVoWFJiRtJsAgqXMiWcb4bn5zT/I3+UZy7f9OTDeYNfCCLJG2zSVY8 24kvXHwYlqupllv2ET/9sc9+YF5y4s8CrrP7jmRjhbWG0DBjO4j1nvSqoFTBJhpqLmDU4IcBQxD dolk7giyt+usRUktuflLS/tUoaJ8zDiLyx//jD/op9pw4ioGjaromIaDLQs4QCHKWdOPfqoNOKN E41kZhAoGi0FX8w== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Add cpsw_ale_policer_set/clr_entry() helpers. So far Raw Ethernet matching based on Source/Destination address and VLAN Priority (PCP) is supported. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/cpsw_ale.c | 84 ++++++++++++++++++++++++++++++++++++++ drivers/net/ethernet/ti/cpsw_ale.h | 28 +++++++++++++ 2 files changed, 112 insertions(+) diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 630e3a555190..f5ca18d4ea6a 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -1746,3 +1746,87 @@ void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch) 1); } } + +#define HOST_PORT_NUM 0 + +/* Clear Policer and associated ALE table entries */ +void cpsw_ale_policer_clr_entry(struct cpsw_ale *ale, u32 policer_idx, + struct cpsw_ale_policer_cfg *cfg) +{ + cpsw_ale_policer_reset_entry(ale, policer_idx); + + /* We do not delete ALE entries that were added in set_entry + * as they might still be in use by the port e.g. VLAN id + * or port MAC address + */ + + /* clear BLOCKED in case we set it */ + if ((cfg->match_flags & CPSW_ALE_POLICER_MATCH_MACSRC) && cfg->drop) + cpsw_ale_add_ucast(ale, cfg->src_addr, HOST_PORT_NUM, 0, 0); + + if ((cfg->match_flags & CPSW_ALE_POLICER_MATCH_MACDST) && cfg->drop) + cpsw_ale_add_ucast(ale, cfg->dst_addr, HOST_PORT_NUM, 0, 0); +} + +int cpsw_ale_policer_set_entry(struct cpsw_ale *ale, u32 policer_idx, + struct cpsw_ale_policer_cfg *cfg) +{ + int ale_idx; + u16 ale_flags = cfg->drop ? ALE_BLOCKED : 0; + + /* A single policer can support multiple match types simultaneously + * There can be only one ALE entry per address + */ + cpsw_ale_policer_reset_entry(ale, policer_idx); + cpsw_ale_policer_read_idx(ale, policer_idx); + + if (cfg->match_flags & CPSW_ALE_POLICER_MATCH_MACSRC) { + ale_idx = cpsw_ale_add_ucast(ale, cfg->src_addr, HOST_PORT_NUM, ale_flags, 0); + if (ale_idx < 0) + return -ENOENT; + + /* update policer entry */ + regmap_field_write(ale->fields[POL_SRC_INDEX], ale_idx); + regmap_field_write(ale->fields[POL_SRC_MEN], 1); + } + + if (cfg->match_flags & CPSW_ALE_POLICER_MATCH_MACDST) { + ale_idx = cpsw_ale_add_ucast(ale, cfg->dst_addr, HOST_PORT_NUM, ale_flags, 0); + if (ale_idx < 0) + return -ENOENT; + + /* update policer entry */ + regmap_field_write(ale->fields[POL_DST_INDEX], ale_idx); + regmap_field_write(ale->fields[POL_DST_MEN], 1); + } + + if (cfg->match_flags & CPSW_ALE_POLICER_MATCH_OVLAN) { +/* FIXME: VLAN ID based flow routing not yet working, Only PCP matching for now + * u32 port_mask, unreg_mcast = 0; + * + * port_mask = BIT(cfg->port_id) | ALE_PORT_HOST; + * if (!cfg->vid) + * unreg_mcast = port_mask; + * ale_idx = cpsw_ale_vlan_add_modify(ale, cfg->vid, port_mask, + * unreg_mcast, port_mask, 0); + * if (ale_idx < 0) + * return -ENOENT; + * + * regmap_field_write(ale->fields[POL_OVLAN_INDEX], ale_idx); + * regmap_field_write(ale->fields[POL_OVLAN_MEN], 1); + */ + + regmap_field_write(ale->fields[POL_PRI_VAL], cfg->vlan_prio); + regmap_field_write(ale->fields[POL_PRI_MEN], 1); + } + + cpsw_ale_policer_write_idx(ale, policer_idx); + + /* Map to thread id provided by the config */ + if (!cfg->drop) { + cpsw_ale_policer_thread_idx_enable(ale, policer_idx, + cfg->thread_id, true); + } + + return 0; +} diff --git a/drivers/net/ethernet/ti/cpsw_ale.h b/drivers/net/ethernet/ti/cpsw_ale.h index ce59fec75774..11d333bf5a52 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.h +++ b/drivers/net/ethernet/ti/cpsw_ale.h @@ -159,6 +159,30 @@ enum cpsw_ale_port_state { /* Policer */ #define CPSW_ALE_POLICER_ENTRY_WORDS 8 +/* Policer match flags */ +#define CPSW_ALE_POLICER_MATCH_PORT BIT(0) +#define CPSW_ALE_POLICER_MATCH_PRI BIT(1) +#define CPSW_ALE_POLICER_MATCH_OUI BIT(2) +#define CPSW_ALE_POLICER_MATCH_MACDST BIT(3) +#define CPSW_ALE_POLICER_MATCH_MACSRC BIT(4) +#define CPSW_ALE_POLICER_MATCH_OVLAN BIT(5) +#define CPSW_ALE_POLICER_MATCH_IVLAN BIT(6) +#define CPSW_ALE_POLICER_MATCH_ETHTYPE BIT(7) +#define CPSW_ALE_POLICER_MATCH_IPSRC BIT(8) +#define CPSW_ALE_POLICER_MATCH_IPDST BIT(9) + +struct cpsw_ale_policer_cfg { + u32 match_flags; + u16 ether_type; + u16 vid; + u8 vlan_prio; + u8 src_addr[ETH_ALEN]; + u8 dst_addr[ETH_ALEN]; + bool drop; + u64 thread_id; + int port_id; +}; + struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params); void cpsw_ale_start(struct cpsw_ale *ale); @@ -199,5 +223,9 @@ void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, bool add); void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch); void cpsw_ale_policer_reset(struct cpsw_ale *ale); +int cpsw_ale_policer_set_entry(struct cpsw_ale *ale, u32 policer_idx, + struct cpsw_ale_policer_cfg *cfg); +void cpsw_ale_policer_clr_entry(struct cpsw_ale *ale, u32 policer_idx, + struct cpsw_ale_policer_cfg *cfg); #endif From patchwork Wed Mar 19 13:38:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 14022582 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0D7E9257452; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jMU3/0DI" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B1BE3C4CEEC; Wed, 19 Mar 2025 13:41:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742391693; bh=lS3SPHMge0mKx7Qg3gL6pFMXs3xH5zb8zMmcnPbXLBI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=jMU3/0DIeBZ70P4rLWuJVeYm7v0ZNXcs9zMbWLSXFvxjAMfGujLyUuMbCGG4mMjav 43QaLVRiAUJfe+0xaTTi3WpFKiiDVNKJEGPLcNYf20zBSsXlktVY8a5QNbqdZh2hn+ +S91+/IcHijowDo0uBKH3sd8nh7M7HsMhr+6V+Aig8Sou23sVF+WhYoYOMExeb/HQv VKfksIUYKDoh+YqZU4z1io5mcu8CUKBJZ728ZJXPgWRp6pX77j9Jt1nwpNq9q4ZME2 blGY9sk6Dz0uK6ajBJKOjEK8UADu6V1AC+dRfA9BhpnxPnM8QxRDP+56w5M01y/oLi 4zS1V3GJ9UBVQ== From: Roger Quadros Date: Wed, 19 Mar 2025 15:38:33 +0200 Subject: [PATCH net-next 7/9] net: ethernet: ti: cpsw_ale: add policer save restore for PM sleep Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250319-am65-cpsw-rx-class-v1-7-2bfded07490e@kernel.org> References: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> In-Reply-To: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=5534; i=rogerq@kernel.org; h=from:subject:message-id; bh=lS3SPHMge0mKx7Qg3gL6pFMXs3xH5zb8zMmcnPbXLBI=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBn2slyjj6w3g9erkBvy01mwPvcE1+i/eQ2f2sh2 lWz7lR55maJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZ9rJcgAKCRDSWmvTvnYw k/1ED/42+Uhw0BBPRFfp1A2knSP29nIVd970/VVbu3Uzb5BtDXlGms7iSfaH+X+rGprQHms7gcF HmCSMtqGBdQX2ryUutH35t+XaEpYoK5oceusEC/mb4qxPHTSMqdDBgueS7CdrmHR2P5CIn15OqU 1BFhJk1mCtqIZ1YLNzdVjQJFjVlD82bQPt4CFDu8duGYr8IXakh9CkcKQXpJB3EYjHiW+ztnhlT eOu51/z+a7TqcAsihIFvhaQOMOtMmp7+L4R2jfICmybpmx7IQo/ZqxfOUMPavTxMWQTfk26IJWT KtPRGcpPpWKu+UUs8ZjzIjw0DKuBfBUBsjpqydEg+qdoZ26IiycuDOxLEescx+gd9/nlEe95GDn 41UBRtN4aoGlBBQjkttmKJWmggK72q4NHZQeWyUOrI6K46j1ih313Jq+Jtk9E8mgEdOgVLgKDBd nLbtL4lLi8AYdkk6lCfmE7w6HnyytdkOKEg2oPIaJ0lICnAQyiNqnfnmvFBLfvnHimXMSXeYbI0 9UYpPnNMHORw6rmCwHdeAWcukFF3OyS98kkEcDacI/LiAcIMKl+r/h96X7/ywaaJLuXk+bs4Y32 r2NCGLHP8y2zMIw8HImViHOft5ClRZfPzWQD0Pp0VDBDC6Ol5Vt/KRjwh9BrVChYxdP7K86FBRB tO9YeeAUfcCMI6g== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 On some K3 platforms CPSW context is lost during PM sleep. Add cpsw_ale_policer_save() and cpsw_ale_policer_restore() helpers. In am65-cpsw driver, save the policer context during PM suspend and restore it during PM resume. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 23 ++++++++++++++--- drivers/net/ethernet/ti/am65-cpsw-nuss.h | 1 + drivers/net/ethernet/ti/cpsw_ale.c | 42 ++++++++++++++++++++++++++++++++ drivers/net/ethernet/ti/cpsw_ale.h | 4 +++ 4 files changed, 67 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 1c0eedf884ce..405944013521 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -3487,7 +3487,7 @@ static int am65_cpsw_nuss_probe(struct platform_device *pdev) struct device_node *node; struct resource *res; struct clk *clk; - int ale_entries; + int tbl_entries; __be64 id_temp; int ret, i; @@ -3590,10 +3590,25 @@ static int am65_cpsw_nuss_probe(struct platform_device *pdev) goto err_of_clear; } - ale_entries = common->ale->params.ale_entries; + tbl_entries = common->ale->params.ale_entries; common->ale_context = devm_kzalloc(dev, - ale_entries * ALE_ENTRY_WORDS * sizeof(u32), + tbl_entries * ALE_ENTRY_WORDS * sizeof(u32), GFP_KERNEL); + if (!common->ale_context) { + ret = -ENOMEM; + goto err_of_clear; + } + + tbl_entries = common->ale->params.num_policers; + i = CPSW_ALE_POLICER_ENTRY_WORDS + 1; /* 8 CFG + 1 Thread_val */ + i *= tbl_entries; /* for all policers */ + i += 1; /* thread_def register */ + common->policer_context = devm_kzalloc(dev, i * sizeof(u32), GFP_KERNEL); + if (!common->policer_context) { + ret = -ENOMEM; + goto err_of_clear; + } + ret = am65_cpsw_init_cpts(common); if (ret) goto err_of_clear; @@ -3677,6 +3692,7 @@ static int am65_cpsw_nuss_suspend(struct device *dev) int i, ret; cpsw_ale_dump(common->ale, common->ale_context); + cpsw_ale_policer_save(common->ale, common->policer_context); host_p->vid_context = readl(host_p->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET); for (i = 0; i < common->port_num; i++) { port = &common->ports[i]; @@ -3754,6 +3770,7 @@ static int am65_cpsw_nuss_resume(struct device *dev) writel(host_p->vid_context, host_p->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET); cpsw_ale_restore(common->ale, common->ale_context); + cpsw_ale_policer_restore(common->ale, common->policer_context); return 0; } diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.h b/drivers/net/ethernet/ti/am65-cpsw-nuss.h index 917c37e4e89b..61daa5db12e6 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.h +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.h @@ -190,6 +190,7 @@ struct am65_cpsw_common { unsigned char switch_id[MAX_PHYS_ITEM_ID_LEN]; /* only for suspend/resume context restore */ u32 *ale_context; + u32 *policer_context; }; struct am65_cpsw_ndev_priv { diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index f5ca18d4ea6a..48592441085a 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -1830,3 +1830,45 @@ int cpsw_ale_policer_set_entry(struct cpsw_ale *ale, u32 policer_idx, return 0; } + +void cpsw_ale_policer_save(struct cpsw_ale *ale, u32 *data) +{ + int i, idx; + + for (idx = 0; idx < ale->params.num_policers; idx++) { + cpsw_ale_policer_read_idx(ale, idx); + + for (i = 0; i < CPSW_ALE_POLICER_ENTRY_WORDS; i++) + data[i] = readl_relaxed(ale->params.ale_regs + + ALE_POLICER_PORT_OUI + 4 * i); + + regmap_field_write(ale->fields[ALE_THREAD_CLASS_INDEX], idx); + data[i++] = readl_relaxed(ale->params.ale_regs + + ALE_THREAD_VAL); + data += i * 4; + } + + data[0] = readl_relaxed(ale->params.ale_regs + ALE_THREAD_DEF); +} + +void cpsw_ale_policer_restore(struct cpsw_ale *ale, u32 *data) +{ + int i, idx; + + for (idx = 0; idx < ale->params.num_policers; idx++) { + cpsw_ale_policer_read_idx(ale, idx); + + for (i = 0; i < CPSW_ALE_POLICER_ENTRY_WORDS; i++) + writel_relaxed(data[i], ale->params.ale_regs + + ALE_POLICER_PORT_OUI + 4 * i); + + cpsw_ale_policer_write_idx(ale, idx); + + regmap_field_write(ale->fields[ALE_THREAD_CLASS_INDEX], idx); + writel_relaxed(data[i++], ale->params.ale_regs + + ALE_THREAD_VAL); + data += i * 4; + } + + writel_relaxed(data[0], ale->params.ale_regs + ALE_THREAD_DEF); +} diff --git a/drivers/net/ethernet/ti/cpsw_ale.h b/drivers/net/ethernet/ti/cpsw_ale.h index 11d333bf5a52..dbc095397389 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.h +++ b/drivers/net/ethernet/ti/cpsw_ale.h @@ -171,6 +171,8 @@ enum cpsw_ale_port_state { #define CPSW_ALE_POLICER_MATCH_IPSRC BIT(8) #define CPSW_ALE_POLICER_MATCH_IPDST BIT(9) +#define CPSW_ALE_POLICER_ENTRY_WORDS 8 + struct cpsw_ale_policer_cfg { u32 match_flags; u16 ether_type; @@ -227,5 +229,7 @@ int cpsw_ale_policer_set_entry(struct cpsw_ale *ale, u32 policer_idx, struct cpsw_ale_policer_cfg *cfg); void cpsw_ale_policer_clr_entry(struct cpsw_ale *ale, u32 policer_idx, struct cpsw_ale_policer_cfg *cfg); +void cpsw_ale_policer_save(struct cpsw_ale *ale, u32 *data); +void cpsw_ale_policer_restore(struct cpsw_ale *ale, u32 *data); #endif From patchwork Wed Mar 19 13:38:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 14022583 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F101425A341; Wed, 19 Mar 2025 13:41:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Wed, 19 Mar 2025 13:41:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742391696; bh=d3XF5K3KKlq326x57jcWECwDCtWdsL2+/WDRL8A97Jw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=e1W70Df5Ez/mo+twa+OEqELHuylhFFPJPFV1vyJrnYGzX4gUHGuuNJua7LopW5Api E1o9cR6S0ceYUU0V0CXAhHGu0heM9iaqiqwj/HTf/Bdz6Q+0+r6Ac+fuGsEBhrOo5O WmMP0P5HfLNnnAxJH5NFH/oblqluQZldCqRJF1JRtub4A5NKNUxM1FlATSAra7MdRT T3Xsx9crs0fzRN+rkXHfdEaNG3oEU6JcDy4UN2egoJtim1hX3UPYff7l+5YoRD9f56 dhuLDWpXK5/2lQdMuxH7X9BT/aweZKozbGeQL48ZHh3ObPywG9O8Zqyl9CN5L7Mguw /3i2CmYAf2kvw== From: Roger Quadros Date: Wed, 19 Mar 2025 15:38:34 +0200 Subject: [PATCH net-next 8/9] net: ethernet: ti: am65-cpsw: add network flow classification support Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250319-am65-cpsw-rx-class-v1-8-2bfded07490e@kernel.org> References: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> In-Reply-To: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=13425; i=rogerq@kernel.org; h=from:subject:message-id; bh=d3XF5K3KKlq326x57jcWECwDCtWdsL2+/WDRL8A97Jw=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBn2sly2py51wB7niLwd2WNXjwgCczkSR7z8NS9P +otI8PREBWJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZ9rJcgAKCRDSWmvTvnYw k6B6D/4/PEBRixvd0o1S4btOedhK34heOYgnDEClRk6KLMh2RHN2al+BgpI+25InGfeRqPPNHJh Y1VSLB3OA/2qjSgwhyOkb381klzkfs2brKPf4fj7FdxScvvnbPrBJzoeHJfCTUUuLSUBpH/kTs3 kMEl+Wpdo/KW6qr7w4SM6yCjS2+YyNpaicIXuE9XInwKBgypxiFpDlH8ZvoaWfgThK/BAi+h3N7 ikTrMcML8ltVBEcRhpdj+rrZbP80RgsEA2i0AK18VrTZfdcy1vnRvxG83ghLXcM/LgQxyNgRPDd fLc1IecSeT1zAzXyzXAFbW0uzOpF4X80cxID44mOqS9Yln7sKRicvXDZ5WDJl5q7MwnUEnkw6FD 5uXxGJ0HtYHNpsn2b6bJVZBfoRepzQt7WYp9mvHzLSFEQl09Vusiu5xShGZpdhTy1VgEuAH64/b IWa15H90CQeuFijOhNQmhU/0xbTti5VTMMuPqRp3We51y4oY72bil2LD5lW+AMutlCrPT8O3pWf N5xRz8vY/xadpOiG5860SCU+X9eDqMmBhiRhKbVHO/BPBtu0QZrkCrWFBMabcM0u1wffvmcn9fk q3Etdh65hW6W33BNA8nRlZ1CD7JolX6Ju0A4mt2VHzfsjnH9+kSxaiK4gZF+IukECEAXeokrfYz 6DCx+LRJCCQJTvQ== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Adds support for -N/--config-nfc ethtool command for configuring RX classfiers. Currently only raw Ethernet (flow-type ether) matching is added based on source/destination addresses and VLAN Priority (PCP). The ALE policer engine is used to perform the matching and routing to a specific RX channel. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/am65-cpsw-ethtool.c | 348 ++++++++++++++++++++++++++++ drivers/net/ethernet/ti/am65-cpsw-nuss.c | 3 + drivers/net/ethernet/ti/am65-cpsw-nuss.h | 15 ++ 3 files changed, 366 insertions(+) diff --git a/drivers/net/ethernet/ti/am65-cpsw-ethtool.c b/drivers/net/ethernet/ti/am65-cpsw-ethtool.c index 9032444435e9..6adf68cc54fc 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-ethtool.c +++ b/drivers/net/ethernet/ti/am65-cpsw-ethtool.c @@ -970,6 +970,352 @@ static int am65_cpsw_set_coalesce(struct net_device *ndev, struct ethtool_coales return am65_cpsw_set_per_queue_coalesce(ndev, 0, coal); } +#define AM65_CPSW_FLOW_TYPE(f) ((f) & ~(FLOW_EXT | FLOW_MAC_EXT)) + +/* rxnfc_lock must be held */ +static struct am65_cpsw_rxnfc_rule *am65_cpsw_get_rule(struct am65_cpsw_port *port, + int location) +{ + struct am65_cpsw_rxnfc_rule *rule; + + list_for_each_entry(rule, &port->rxnfc_rules, list) { + if (rule->location == location) + return rule; + } + + return NULL; +} + +/* rxnfc_lock must be held */ +static void am65_cpsw_del_rule(struct am65_cpsw_port *port, + struct am65_cpsw_rxnfc_rule *rule) +{ + cpsw_ale_policer_clr_entry(port->common->ale, rule->location, + &rule->cfg); + list_del(&rule->list); + port->rxnfc_count--; + devm_kfree(port->common->dev, rule); +} + +/* rxnfc_lock must be held */ +static int am65_cpsw_add_rule(struct am65_cpsw_port *port, + struct am65_cpsw_rxnfc_rule *rule) +{ + struct am65_cpsw_rxnfc_rule *prev = NULL, *cur; + int ret; + + ret = cpsw_ale_policer_set_entry(port->common->ale, rule->location, + &rule->cfg); + if (ret) + return ret; + + list_for_each_entry(cur, &port->rxnfc_rules, list) { + if (cur->location >= rule->location) + break; + prev = cur; + } + + list_add(&rule->list, prev ? &prev->list : &port->rxnfc_rules); + port->rxnfc_count++; + + return 0; +} + +#define ETHER_TYPE_FULL_MASK cpu_to_be16(FIELD_MAX(U16_MAX)) +#define VLAN_TCI_FULL_MASK ETHER_TYPE_FULL_MASK + +static int am65_cpsw_rxnfc_get_rule(struct am65_cpsw_port *port, + struct ethtool_rxnfc *rxnfc) +{ + struct ethtool_rx_flow_spec *fs = &rxnfc->fs; + struct am65_cpsw_rxnfc_rule *rule; + struct cpsw_ale_policer_cfg *cfg; + + mutex_lock(&port->rxnfc_lock); + rule = am65_cpsw_get_rule(port, fs->location); + if (!rule) { + mutex_unlock(&port->rxnfc_lock); + return -ENOENT; + } + + cfg = &rule->cfg; + + /* build flowspec from policer_cfg */ + fs->flow_type = ETHER_FLOW; + fs->ring_cookie = cfg->thread_id; + + /* clear all masks. Seems to be inverted */ + eth_broadcast_addr(fs->m_u.ether_spec.h_dest); + eth_broadcast_addr(fs->m_u.ether_spec.h_source); + fs->m_u.ether_spec.h_proto = ETHER_TYPE_FULL_MASK; + fs->m_ext.vlan_tci = htons(0xFFFF); + fs->m_ext.vlan_etype = ETHER_TYPE_FULL_MASK; + fs->m_ext.data[0] = cpu_to_be32(FIELD_MAX(U32_MAX)); + fs->m_ext.data[1] = cpu_to_be32(FIELD_MAX(U32_MAX)); + + if (cfg->match_flags & CPSW_ALE_POLICER_MATCH_MACDST) { + ether_addr_copy(fs->h_u.ether_spec.h_dest, + cfg->dst_addr); + eth_zero_addr(fs->m_u.ether_spec.h_dest); + } + + if (cfg->match_flags & CPSW_ALE_POLICER_MATCH_MACSRC) { + ether_addr_copy(fs->h_u.ether_spec.h_source, + cfg->src_addr); + eth_zero_addr(fs->m_u.ether_spec.h_source); + } + + if (cfg->match_flags & CPSW_ALE_POLICER_MATCH_OVLAN) { + fs->flow_type |= FLOW_EXT; + fs->h_ext.vlan_tci = htons(FIELD_PREP(VLAN_VID_MASK, cfg->vid) + | FIELD_PREP(VLAN_PRIO_MASK, cfg->vlan_prio)); + fs->m_ext.vlan_tci = 0; + } + + mutex_unlock(&port->rxnfc_lock); + + return 0; +} + +static int am65_cpsw_rxnfc_get_all(struct am65_cpsw_port *port, + struct ethtool_rxnfc *rxnfc, + u32 *rule_locs) +{ + struct am65_cpsw_rxnfc_rule *rule; + int count = 0; + + rxnfc->data = port->rxnfc_max; + mutex_lock(&port->rxnfc_lock); + + list_for_each_entry(rule, &port->rxnfc_rules, list) { + if (count == rxnfc->rule_cnt) { + mutex_unlock(&port->rxnfc_lock); + return -EMSGSIZE; + } + + rule_locs[count] = rule->location; + count++; + } + + mutex_unlock(&port->rxnfc_lock); + rxnfc->rule_cnt = count; + + return 0; +} + +static int am65_cpsw_get_rxnfc(struct net_device *ndev, struct ethtool_rxnfc *rxnfc, + u32 *rule_locs) +{ + struct am65_cpsw_common *common = am65_ndev_to_common(ndev); + struct am65_cpsw_port *port = am65_ndev_to_port(ndev); + + switch (rxnfc->cmd) { + case ETHTOOL_GRXRINGS: + rxnfc->data = common->rx_ch_num_flows; + return 0; + case ETHTOOL_GRXCLSRLCNT: /* Get RX classification rule count */ + rxnfc->rule_cnt = port->rxnfc_count; + rxnfc->data = port->rxnfc_max; + return 0; + case ETHTOOL_GRXCLSRULE: /* Get RX classification rule */ + return am65_cpsw_rxnfc_get_rule(port, rxnfc); + case ETHTOOL_GRXCLSRLALL: /* Get all RX classification rules */ + return am65_cpsw_rxnfc_get_all(port, rxnfc, rule_locs); + default: + return -EOPNOTSUPP; + } +} + +/* validate the rxnfc rule and convert it to policer config */ +static int am65_cpsw_rxnfc_validate(struct am65_cpsw_port *port, struct ethtool_rxnfc *rxnfc, + struct cpsw_ale_policer_cfg *cfg) +{ + struct ethtool_rx_flow_spec *fs = &rxnfc->fs; + int flow_type = AM65_CPSW_FLOW_TYPE(fs->flow_type); + struct ethhdr *eth_mask; + + memset(cfg, 0, sizeof(*cfg)); + + if (flow_type & FLOW_RSS) + return -EINVAL; + + if (fs->location == RX_CLS_LOC_ANY || + fs->location >= port->rxnfc_max) + return -EINVAL; + + if (fs->ring_cookie == RX_CLS_FLOW_DISC) + cfg->drop = true; + else if (fs->ring_cookie > AM65_CPSW_MAX_QUEUES) + return -EINVAL; + + cfg->port_id = port->port_id; + cfg->thread_id = fs->ring_cookie; + + switch (flow_type) { + case ETHER_FLOW: + eth_mask = &fs->m_u.ether_spec; + + /* etherType matching is supported by h/w but not yet here */ + if (eth_mask->h_proto) + return -EINVAL; + + /* Only support source matching addresses by full mask */ + if (is_broadcast_ether_addr(eth_mask->h_source)) { + cfg->match_flags |= CPSW_ALE_POLICER_MATCH_MACSRC; + ether_addr_copy(cfg->src_addr, + fs->h_u.ether_spec.h_source); + } + + /* Only support destination matching addresses by full mask */ + if (is_broadcast_ether_addr(eth_mask->h_dest)) { + cfg->match_flags |= CPSW_ALE_POLICER_MATCH_MACDST; + ether_addr_copy(cfg->dst_addr, + fs->h_u.ether_spec.h_dest); + } + + if ((fs->flow_type & FLOW_EXT) && fs->m_ext.vlan_tci) { + /* Don't yet support vlan ethertype */ + if (fs->m_ext.vlan_etype) + return -EINVAL; + + if (fs->m_ext.vlan_tci != VLAN_TCI_FULL_MASK) + return -EINVAL; + + cfg->vid = FIELD_GET(VLAN_VID_MASK, + ntohs(fs->h_ext.vlan_tci)); + cfg->vlan_prio = FIELD_GET(VLAN_PRIO_MASK, + ntohs(fs->h_ext.vlan_tci)); + cfg->match_flags |= CPSW_ALE_POLICER_MATCH_OVLAN; + } + + break; + default: + return -EINVAL; + } + + return 0; +} + +static int am65_cpsw_policer_find_match(struct am65_cpsw_port *port, + struct cpsw_ale_policer_cfg *cfg) +{ + struct am65_cpsw_rxnfc_rule *rule; + int loc = -EINVAL; + + mutex_lock(&port->rxnfc_lock); + list_for_each_entry(rule, &port->rxnfc_rules, list) { + if (!memcmp(&rule->cfg, cfg, sizeof(*cfg))) { + loc = rule->location; + break; + } + } + + mutex_unlock(&port->rxnfc_lock); + + return loc; +} + +static int am65_cpsw_rxnfc_add_rule(struct am65_cpsw_port *port, + struct ethtool_rxnfc *rxnfc) +{ + struct ethtool_rx_flow_spec *fs = &rxnfc->fs; + struct am65_cpsw_rxnfc_rule *rule; + struct cpsw_ale_policer_cfg cfg; + int loc, ret; + + if (am65_cpsw_rxnfc_validate(port, rxnfc, &cfg)) + return -EINVAL; + + /* need to check if similar rule is already present at another location, if yes error out */ + loc = am65_cpsw_policer_find_match(port, &cfg); + if (loc >= 0 && loc != fs->location) { + netdev_info(port->ndev, "rule already exists in location %d. not adding\n", loc); + return -EINVAL; + } + + /* delete exisiting rule */ + if (loc >= 0) { + mutex_lock(&port->rxnfc_lock); + rule = am65_cpsw_get_rule(port, loc); + if (rule) + am65_cpsw_del_rule(port, rule); + + mutex_unlock(&port->rxnfc_lock); + } + + rule = devm_kzalloc(port->common->dev, sizeof(*rule), GFP_KERNEL); + if (!rule) + return -ENOMEM; + + INIT_LIST_HEAD(&rule->list); + memcpy(&rule->cfg, &cfg, sizeof(cfg)); + rule->location = fs->location; + + mutex_lock(&port->rxnfc_lock); + ret = am65_cpsw_add_rule(port, rule); + mutex_unlock(&port->rxnfc_lock); + + return ret; +} + +static int am65_cpsw_rxnfc_del_rule(struct am65_cpsw_port *port, + struct ethtool_rxnfc *rxnfc) +{ + struct ethtool_rx_flow_spec *fs = &rxnfc->fs; + struct am65_cpsw_rxnfc_rule *rule; + + mutex_lock(&port->rxnfc_lock); + rule = am65_cpsw_get_rule(port, fs->location); + if (!rule) { + mutex_unlock(&port->rxnfc_lock); + return -ENOENT; + } + + am65_cpsw_del_rule(port, rule); + mutex_unlock(&port->rxnfc_lock); + + return 0; +} + +void am65_cpsw_rxnfc_init(struct am65_cpsw_port *port) +{ + struct cpsw_ale *ale = port->common->ale; + + mutex_init(&port->rxnfc_lock); + INIT_LIST_HEAD(&port->rxnfc_rules); + port->rxnfc_max = ale->params.num_policers; + + /* disable all rules */ + cpsw_ale_policer_reset(ale); +} + +void am65_cpsw_rxnfc_cleanup(struct am65_cpsw_port *port) +{ + struct am65_cpsw_rxnfc_rule *rule, *tmp; + + mutex_lock(&port->rxnfc_lock); + + list_for_each_entry_safe(rule, tmp, &port->rxnfc_rules, list) + am65_cpsw_del_rule(port, rule); + + mutex_unlock(&port->rxnfc_lock); +} + +static int am65_cpsw_set_rxnfc(struct net_device *ndev, struct ethtool_rxnfc *rxnfc) +{ + struct am65_cpsw_port *port = am65_ndev_to_port(ndev); + + netdev_info(ndev, "set_rxnfc %d\n", rxnfc->cmd); + switch (rxnfc->cmd) { + case ETHTOOL_SRXCLSRLINS: + return am65_cpsw_rxnfc_add_rule(port, rxnfc); + case ETHTOOL_SRXCLSRLDEL: + return am65_cpsw_rxnfc_del_rule(port, rxnfc); + default: + return -EOPNOTSUPP; + } +} + const struct ethtool_ops am65_cpsw_ethtool_ops_slave = { .begin = am65_cpsw_ethtool_op_begin, .complete = am65_cpsw_ethtool_op_complete, @@ -1007,4 +1353,6 @@ const struct ethtool_ops am65_cpsw_ethtool_ops_slave = { .get_mm = am65_cpsw_get_mm, .set_mm = am65_cpsw_set_mm, .get_mm_stats = am65_cpsw_get_mm_stats, + .get_rxnfc = am65_cpsw_get_rxnfc, + .set_rxnfc = am65_cpsw_set_rxnfc, }; diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 405944013521..700eb42dd381 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -2742,6 +2742,7 @@ am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx) return -ENOMEM; } + am65_cpsw_rxnfc_init(port); ndev_priv = netdev_priv(port->ndev); ndev_priv->port = port; ndev_priv->msg_enable = AM65_CPSW_DEBUG; @@ -2854,6 +2855,7 @@ static void am65_cpsw_nuss_cleanup_ndev(struct am65_cpsw_common *common) unregister_netdev(port->ndev); free_netdev(port->ndev); port->ndev = NULL; + am65_cpsw_rxnfc_cleanup(port); } } @@ -3156,6 +3158,7 @@ static int am65_cpsw_dl_switch_mode_set(struct devlink *dl, u32 id, /* clean up ALE table */ cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_CLEAR, 1); cpsw_ale_control_get(cpsw->ale, HOST_PORT_NUM, ALE_AGEOUT); + cpsw_ale_policer_reset(cpsw->ale); if (switch_en) { dev_info(cpsw->dev, "Enable switch mode\n"); diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.h b/drivers/net/ethernet/ti/am65-cpsw-nuss.h index 61daa5db12e6..3f3f3500c1df 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.h +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.h @@ -16,6 +16,7 @@ #include #include #include "am65-cpsw-qos.h" +#include "cpsw_ale.h" struct am65_cpts; @@ -40,6 +41,12 @@ struct am65_cpsw_slave_data { struct phylink_config phylink_config; }; +struct am65_cpsw_rxnfc_rule { + struct list_head list; + int location; + struct cpsw_ale_policer_cfg cfg; +}; + struct am65_cpsw_port { struct am65_cpsw_common *common; struct net_device *ndev; @@ -59,6 +66,11 @@ struct am65_cpsw_port { struct xdp_rxq_info xdp_rxq[AM65_CPSW_MAX_QUEUES]; /* Only for suspend resume context */ u32 vid_context; + /* Classifier flows */ + struct mutex rxnfc_lock; + struct list_head rxnfc_rules; + int rxnfc_count; + int rxnfc_max; }; enum am65_cpsw_tx_buf_type { @@ -229,4 +241,7 @@ int am65_cpsw_nuss_update_tx_rx_chns(struct am65_cpsw_common *common, bool am65_cpsw_port_dev_check(const struct net_device *dev); +void am65_cpsw_rxnfc_init(struct am65_cpsw_port *port); +void am65_cpsw_rxnfc_cleanup(struct am65_cpsw_port *port); + #endif /* AM65_CPSW_NUSS_H_ */ From patchwork Wed Mar 19 13:38:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 14022584 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5897D25A633; Wed, 19 Mar 2025 13:41:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742391700; cv=none; b=UvD8Xsw8qtCURtuBvBiLdQw08g/Tro3Nz6KoHUpqEk6mP1RYxlpFVKR2HDr0Zh0ctvXnsYXQd5WHGZIHAxiAafdHl6q9MiZ7XN7Yme67rcn/oLhTyK4piIYOUavqCUDRoptVR3vo5axYdqkif9nngCgYyosfObVuTHHwdN4/TY0= ARC-Message-Signature: i=1; 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b=QcdxIDB1EZzlQrkp6rm95OG1wp3dvhHDhSPLc50Pzy2FYa5hIsBU2qFQRDlcp3KPx 6hH4SuwUSD4+vB2IpgOF3y1/KHxFMmm5cJ52xss0IVATuSdLMxICwBBMuF9Pp5btB6 yxLODdLFJwF72V4k/OCsmYmj0p1V69o9gLLHoWm7KUk/N2Iz5xMW/zV+ip4QYxzbYH uRcv0bgMLAMWC5uxbXf4m7UKTVMjuzTXs6tHJxQbGG6btWjSjaUZan9lZj+QuPqgUw vIW93w5kpAkbOkcZlME2lJ1nHE9L2wYUTfcLXnAv4FRvOaKQIXXpoZ2g1BgtgjUBZG TaE3y0SKmgG8g== From: Roger Quadros Date: Wed, 19 Mar 2025 15:38:35 +0200 Subject: [PATCH net-next 9/9] net: ethernet: ti: am65-cpsw: remove cpsw_ale_classifier_setup_default() Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250319-am65-cpsw-rx-class-v1-9-2bfded07490e@kernel.org> References: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> In-Reply-To: <20250319-am65-cpsw-rx-class-v1-0-2bfded07490e@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=4099; i=rogerq@kernel.org; h=from:subject:message-id; bh=Ara1eTRtgS9rlnEyA0OeNE3ZvBzOMbrRhAfO22PCfzs=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBn2slyzkJ+yalp2OI63PxmaCvhjL2KqlB9qWnjv h+9iAGmpSyJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZ9rJcgAKCRDSWmvTvnYw k+b3EAC07QdtXXEsKpV99Jj3h4gQLrNvnMgOgP76JWCvTWVtGMk84TXtxnIzdxJnHbnRWTXKBQZ 2omXh9O4eyNC4HNmtoO1fw8indQdu41/pqxJMpd/RbGvQNp5Igvdv2Hi9ghtP8O33WubbXudvn2 7BZO4SQpBqRGN9/YgcHAKQ5kTbMwtxDjoFklU5850OW7rvj7loZVVm1SGSB1sLP+U7KxyNTfnIQ ihKY1WCsWHQ538vJ7F0R/Vj5wO3KsidprXBC8hp3iswsacGQclhtUe57EnqkTqD2kZWNnze3Hq9 3piSRPZ2hvdispTThRpTib6anuj8Yw/EfkC7LI2oRBn3uSpvlOX3oyYiq3hLaTbaoudblrXtvfK 6rFrJXFv6OXNopaF8APsHvO8kpUbTb52Aych3+GaLOKd/mctKDybo8j79Dmuhmkz15ot7lq4OPd ARF/AY1IgLDXb8c1vDI7vye/ciEcguIxoix8B5yo7EzAjP5ATuXO+clq3nQy8ljjiguuGWcxFum eYd3fVA6VTnCOima+g+dG6P6YoEUw+PrNRSa8wgT+qPH07J+ta/cund7Pwn07u+ZiCZ/72OqH6G Jzf103Z0sXdxBsehs2ukLFpVNzyMNTyDCypyewN/hrYUEYaETAwP4hftC8HojA7nmhutKrkLSVp hy4lLuCkRjgLsrg== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 The RX classifier can now be configured by user using ethtool -N. So drop cpsw_ale_classifier_setup_default(). Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 3 -- drivers/net/ethernet/ti/cpsw_ale.c | 52 -------------------------------- drivers/net/ethernet/ti/cpsw_ale.h | 1 - 3 files changed, 56 deletions(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 700eb42dd381..12edf2a3bea7 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -2497,9 +2497,6 @@ static int am65_cpsw_nuss_init_rx_chns(struct am65_cpsw_common *common) am65_cpsw_nuss_rx_poll); } - /* setup classifier to route priorities to flows */ - cpsw_ale_classifier_setup_default(common->ale, common->rx_ch_num_flows); - return 0; err_flow: diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 48592441085a..6058c0125af4 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -1695,58 +1695,6 @@ void cpsw_ale_policer_reset(struct cpsw_ale *ale) cpsw_ale_policer_reset_entry(ale, i); } -/* Default classifier is to map 8 user priorities to N receive channels */ -void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch) -{ - int pri, idx; - - /* Reference: - * IEEE802.1Q-2014, Standard for Local and metropolitan area networks - * Table I-2 - Traffic type acronyms - * Table I-3 - Defining traffic types - * Section I.4 Traffic types and priority values, states: - * "0 is thus used both for default priority and for Best Effort, and - * Background is associated with a priority value of 1. This means - * that the value 1 effectively communicates a lower priority than 0." - * - * In the table below, Priority Code Point (PCP) 0 is assigned - * to a higher priority thread than PCP 1 wherever possible. - * The table maps which thread the PCP traffic needs to be - * sent to for a given number of threads (RX channels). Upper threads - * have higher priority. - * e.g. if number of threads is 8 then user priority 0 will map to - * pri_thread_map[8-1][0] i.e. thread 1 - */ - - int pri_thread_map[8][8] = { /* BK,BE,EE,CA,VI,VO,IC,NC */ - { 0, 0, 0, 0, 0, 0, 0, 0, }, - { 0, 0, 0, 0, 1, 1, 1, 1, }, - { 0, 0, 0, 0, 1, 1, 2, 2, }, - { 0, 0, 1, 1, 2, 2, 3, 3, }, - { 0, 0, 1, 1, 2, 2, 3, 4, }, - { 1, 0, 2, 2, 3, 3, 4, 5, }, - { 1, 0, 2, 3, 4, 4, 5, 6, }, - { 1, 0, 2, 3, 4, 5, 6, 7 } }; - - cpsw_ale_policer_reset(ale); - - /* use first 8 classifiers to map 8 (DSCP/PCP) priorities to channels */ - for (pri = 0; pri < 8; pri++) { - idx = pri; - - /* Classifier 'idx' match on priority 'pri' */ - cpsw_ale_policer_read_idx(ale, idx); - regmap_field_write(ale->fields[POL_PRI_VAL], pri); - regmap_field_write(ale->fields[POL_PRI_MEN], 1); - cpsw_ale_policer_write_idx(ale, idx); - - /* Map Classifier 'idx' to thread provided by the map */ - cpsw_ale_policer_thread_idx_enable(ale, idx, - pri_thread_map[num_rx_ch - 1][pri], - 1); - } -} - #define HOST_PORT_NUM 0 /* Clear Policer and associated ALE table entries */ diff --git a/drivers/net/ethernet/ti/cpsw_ale.h b/drivers/net/ethernet/ti/cpsw_ale.h index dbc095397389..5c9614730998 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.h +++ b/drivers/net/ethernet/ti/cpsw_ale.h @@ -223,7 +223,6 @@ int cpsw_ale_vlan_add_modify(struct cpsw_ale *ale, u16 vid, int port_mask, int cpsw_ale_vlan_del_modify(struct cpsw_ale *ale, u16 vid, int port_mask); void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, bool add); -void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch); void cpsw_ale_policer_reset(struct cpsw_ale *ale); int cpsw_ale_policer_set_entry(struct cpsw_ale *ale, u32 policer_idx, struct cpsw_ale_policer_cfg *cfg);