From patchwork Wed Mar 19 19:23:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tariq Toukan X-Patchwork-Id: 14023053 X-Patchwork-Delegate: kuba@kernel.org Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2057.outbound.protection.outlook.com [40.107.243.57]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E69DB213235; Wed, 19 Mar 2025 19:24:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.243.57 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742412290; cv=fail; b=lnN8sdlwhcYHcihNGzeYRD0m47sIwHPuWfv6l5P1rtL92kQobP5TiZ4W6EJtsY9ZqhhVrlj6G/y++8vuCwijxDLpKI0ssTjajCDhF1SYfp4/O8J4RpnuMl9RmA36L7ky8oduBmrs9eVf0z9Ye2TQbZtLeBU9umfdXyk3TVQgupw= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742412290; c=relaxed/simple; bh=olDL2l0LCvizcRs+YQPiPMgLNh5zLCPg1HS+a7Rcd+s=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZvSl+lXPYE99oOUyYCDhEnSNnoDpSESGBgLfpg1qKIQ4pppGWR9ZcqlA/5AzGZ7DY/w0A2FEMVVBRFcbGVXfcfRICSBcNsX3p33rfVJULQwRrcCDTY6xcd0q4cM6zK7/VQK0r0K+xFgGucT4gGhjT8ailNKiFUTCZMCbrM0eyEE= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=Rz5IjV/+; arc=fail smtp.client-ip=40.107.243.57 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="Rz5IjV/+" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=FVZh3Cvu/BhwtRMW67LKHeUvhayEt+qokvdoNEZyz4bjHDKwSrwcpo9glaSC9Nq/1Ms7anB4oAEpYKoA7FCFZaU+xzo+H2u6QY5lHRoCkkhFPrcKozn/y4DuI69ShWB1P50t2lCvBQd6dvfOtAS/RWZxFf7t3dW4WimRpT9BdrItaE+A22SIQgW7NdU7CSo/dy6Ta2hJH+jc49x/7LXZXKyiE8FqNTzVJ4HTJXP3paT5/A/ntD+YwQYH8GH9xgsfWkFnbXZk7Cx0ECUZPDyl3S9zN2l+Tb6nECjA1RgcbED7YDwxr8yDD98w6bMt+tX0yTFZdz6GY0QQvEue1QagPA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=bDCB+eGydQUzaELt89YKNWz3HuIbO5rU+0c3oTHeQls=; b=IbxB0rbJk1cKpEzHm7fxAm0W29iRfsbIvrFOam28f25Cc9ED9DudwosexGARoi5FKFnFRkutaF7PdqkPE7oczkhIN8OOK6YCBk1ENv4GZWh2DhKlmqNuMlR/5A2kLTMDvTZJikf6VDV1gIEWZV6S2eUSKXa1MY+yU2QKf8FHqf5LT6kBldAKGpBouqOkOHanFWRm5FEYIvBnAvbbw3doA9x9534sGPtCWuTIf9aAg7/kE0NH7IJO0XpqDeYUHZH37qRO+BDiNf5PUPYa5yPBALYuldC0gyC8yzXANzmphfg+ukGoSBFQAqM5hitManPmvXguuXY2+QzUcyeFpogR5w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=davemloft.net smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=bDCB+eGydQUzaELt89YKNWz3HuIbO5rU+0c3oTHeQls=; b=Rz5IjV/+kxP2t2zPw2taJFPUPXrXX+Jp4I0Zgw3/FyASANyizJMDpWYFt5J8FNnfQD47dhCt+kkvyR7GiDYwpygp1ZLJJnpCQaE4mAy5phjMVBDjP/rV2kqSwxvMIaKj+lUuM45ysf9nz7NXejagNRtVj7wSMn83HeXYWJSisgiTSm0Vb4Jp8LiOpBdhUzmySyAeGTmjq4Zndoa7tdcqPfza3pc3FCN7rtTh+mf4FpxwHTRgmRcOC6vqdcLux6IV7Oa3NIAPzXP42oKdpGmk1t5iOHrFTRZAv6E3vPpiK7B9GgIDEdMY4fKNhhpTRJC3CLDtTHtMUv/62b25FEjLxw== Received: from MN0PR04CA0011.namprd04.prod.outlook.com (2603:10b6:208:52d::7) by DM4PR12MB6616.namprd12.prod.outlook.com (2603:10b6:8:8e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8534.34; Wed, 19 Mar 2025 19:24:44 +0000 Received: from BN3PEPF0000B06E.namprd21.prod.outlook.com (2603:10b6:208:52d:cafe::73) by MN0PR04CA0011.outlook.office365.com (2603:10b6:208:52d::7) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.8534.33 via Frontend Transport; Wed, 19 Mar 2025 19:24:44 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by BN3PEPF0000B06E.mail.protection.outlook.com (10.167.243.73) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8583.3 via Frontend Transport; Wed, 19 Mar 2025 19:24:43 +0000 Received: from rnnvmail205.nvidia.com (10.129.68.10) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Wed, 19 Mar 2025 12:24:29 -0700 Received: from rnnvmail204.nvidia.com (10.129.68.6) by rnnvmail205.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Wed, 19 Mar 2025 12:24:28 -0700 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Wed, 19 Mar 2025 12:24:25 -0700 From: Tariq Toukan To: "David S. Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: Gal Pressman , Leon Romanovsky , "Saeed Mahameed" , Leon Romanovsky , Tariq Toukan , , , , Moshe Shemesh , Mark Bloch Subject: [PATCH net-next 1/3] net/mlx5: Remove NULL check before dev_{put, hold} Date: Wed, 19 Mar 2025 21:23:17 +0200 Message-ID: <1742412199-159596-2-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1742412199-159596-1-git-send-email-tariqt@nvidia.com> References: <1742412199-159596-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B06E:EE_|DM4PR12MB6616:EE_ X-MS-Office365-Filtering-Correlation-Id: c8fb9190-28b8-41ae-f50b-08dd671bb3e8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|82310400026|376014; X-Microsoft-Antispam-Message-Info: W9B9b15KUVIU83yvUS5ZipcShgu8HuXbayUaSG36TAZ5/Zn8qPcjeP8+KDvGSx8os+3Xp4NMSFtH/X19xwWUvFsGU7ND5n5KQiuzEnb7KVzGZsZfF/WbwcDK15Lie4SziLdpMwc8TQDAGTbqodVSUJJX0lHSPVLGvlr7/jLhP02Tv3/DLUm/3RhPaKtrYYuTXqzv826vuzwsiOqjT0JTXLfvD/fsRQK/MqiEbsoZ9CA9/GiuRtj8viGfUBOziRHXZhVRPmhyQ0LALmpkqsO/6cWLRCsdRbr4fYy97dliWOIVrLusbwBVQ2rkyWtrGiamGbqn712p+9ejTEh7UI6km/x3/pSOA+NQu5ugOmnWWCHOPyL/BtDxzR4OBcDTM2+Nc6/6s5XRrdiSYw++5ECcw9V1weHEpG95hkB+2Jbc7BRcx94nJYHhAetHn6Y18DEafqXKCjA5lSZTzhsuKwsNWgtCrwc3geUiwsTf3Gk0Qe0ADKocAdHluiWZBtyPrzAeetfV72UekQkBWffVL809IlnH7PAt3sssEYoeuDS9H338JcK5jkp2Z2YZqYNbEIwbEzSvNN0N6G1kX1Vm0Q43CJrZQx/4JreL77VXBS0CS7KnkIl+09CTsTkCLkvmBCn9viKToI9O8WLdEplptbxnuTprBcdiZYWO++u/dVR82O5ySdBxzqT7hDC8+Tn0wf2K4NnXTkZBRR8rEXm7fvbdkWQ0gSSBzTVO8mGdUtMaV87fVHCHqcH0TTyU4SOMG6CFiv4eLBxwx1khU13Ijb8cL9NnnBpux0ROMnFpHrhCoo7iPOXPTS7qZjc3uDQePtiKfPJWEPXXRQ7bqXbXO/+gMDZCe/1+Pb/m+zOS3W6LxtpNgq3Mh4TFGxpOfV/HDS8qPI8WVsBaKSbfSh9bsFUDCyVWCBLbori7PXwtA4VuKzgJC1n4e+AKXen+HdURlo3J6/JlZpbf3F42jlR20ksW2rAS5hIgB9Ge1S4lyPVN3r5HIcAaLw38V+YgrSQqxTZz2WTq7bOxAgLwjQFSqaKYaE3fpO0QknyDeUSADnzSIB+0xWFY6+EkobvRAFYk7lGOitJPgHawRd1adqT+VQVN7ZY9pa53Qi4l/94EJhqbxiXWPTsD3TBuqQxDntTB7+S1ZQU7/TF/s04DbSBoLk/S1FdjP14+f8jV+xOcRbKvnXlkzP2XXID6X0DcXhu0hiX4N/LYSgsCgDN3LVwgHWoohBA0StSx5Kqrup9/QmD9G5cW80yz6iDtSUmjvmmomuNObANjBdTJ8ac5umw3qbU5dn2ZlHeY0sYW7YyKO7qU0JCMoYIpS07VNdq5rDfb/alLy246IvAyJT2JAIiEEijTh9CXaaOEjPUt3fkwYc4Z8vi5Pei6R2cCLriWINscs0OwIjMOB/ch7XRpBlUTDWOzkk1C8TN/0kwHNdEAd3LJrd0meCWw2T0l0UbisedLJ+BT3wT/p4wm34jpAeLQCty8AzR5J8zbY2NG7s6dFxSQzxI= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Mar 2025 19:24:43.4770 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c8fb9190-28b8-41ae-f50b-08dd671bb3e8 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06E.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6616 X-Patchwork-Delegate: kuba@kernel.org From: Gal Pressman Fix coccinelle warnings: WARNING: NULL check before dev_{put, hold} functions is not needed. Signed-off-by: Gal Pressman Reviewed-by: Jianbo Liu Signed-off-by: Tariq Toukan Reviewed-by: Kalesh AP --- drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c | 9 +++------ .../net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c | 9 +++------ drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c | 3 +-- 3 files changed, 7 insertions(+), 14 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c index 721f35e59757..2162d776fe35 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c @@ -31,8 +31,7 @@ static void mlx5e_tc_tun_route_attr_cleanup(struct mlx5e_tc_tun_route_attr *attr { if (attr->n) neigh_release(attr->n); - if (attr->route_dev) - dev_put(attr->route_dev); + dev_put(attr->route_dev); } struct mlx5e_tc_tunnel *mlx5e_get_tc_tun(struct net_device *tunnel_dev) @@ -68,16 +67,14 @@ static int get_route_and_out_devs(struct mlx5e_priv *priv, * while holding rcu read lock. Take the net_device for correctness * sake. */ - if (uplink_upper) - dev_hold(uplink_upper); + dev_hold(uplink_upper); rcu_read_unlock(); dst_is_lag_dev = (uplink_upper && netif_is_lag_master(uplink_upper) && real_dev == uplink_upper && mlx5_lag_is_sriov(priv->mdev)); - if (uplink_upper) - dev_put(uplink_upper); + dev_put(uplink_upper); /* if the egress device isn't on the same HW e-switch or * it's a LAG device, use the uplink diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c index e7e01f3298ef..a0fc76a1bc08 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c @@ -42,8 +42,7 @@ static int mlx5e_set_int_port_tunnel(struct mlx5e_priv *priv, &attr->action, out_index); out: - if (route_dev) - dev_put(route_dev); + dev_put(route_dev); return err; } @@ -753,8 +752,7 @@ static int mlx5e_set_vf_tunnel(struct mlx5_eswitch *esw, } out: - if (route_dev) - dev_put(route_dev); + dev_put(route_dev); return err; } @@ -788,8 +786,7 @@ static int mlx5e_update_vf_tunnel(struct mlx5_eswitch *esw, mlx5e_tc_match_to_reg_mod_hdr_change(esw->dev, mod_hdr_acts, VPORT_TO_REG, act_id, data); out: - if (route_dev) - dev_put(route_dev); + dev_put(route_dev); return err; } diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c index ed2ba272946b..ba41dd149f53 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c @@ -523,8 +523,7 @@ static struct net_device *mlx5_lag_active_backup_get_netdev(struct mlx5_core_dev ndev = ldev->pf[last_idx].netdev; } - if (ndev) - dev_hold(ndev); + dev_hold(ndev); unlock: spin_unlock_irqrestore(&lag_lock, flags); From patchwork Wed Mar 19 19:23:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tariq Toukan X-Patchwork-Id: 14023054 X-Patchwork-Delegate: kuba@kernel.org Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2048.outbound.protection.outlook.com [40.107.92.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF4BF2139A2; Wed, 19 Mar 2025 19:24:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.92.48 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742412291; cv=fail; b=HIsen8kWiDN94gKphHg8NscBTISBRwC8uJz7st/0GjqcxIZlxltezyqEalzMv2m0BcdSv3sHQORL35vssp/J87ZcNhdpQ+m4ZaKRv5V9qzUeSLb+lSSHh6Arexw/F63WCwPpFHmE2b6T9uFQuyGhS9I8WM7rAxjf91GH3v84JUk= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742412291; c=relaxed/simple; bh=AnLvlxCC/Xp9RbX+VHOANOBz9cgEgZ38H9XY25AWnVo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=DMAPGbGQQyhj1sfDZ9NXBe562lqw02t4qRU6nwhleFb8JGmQh7QeAzRtHuXod+uTajmUgDaHSX82ilUjdKuzEyY4PazWti93YcBdDb5aoSNh74QEEF4lXHj/eRU54dxIMh+QYM4malKJqcDyXeIxBVONIO450IynHApL8FJ/Xyg= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=GJxBFzNK; arc=fail smtp.client-ip=40.107.92.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="GJxBFzNK" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=IaGbOwYnQ+IAPgRpYHjuEUtooLxSsJzRV+1qb6lUfMfBmzShM/2tT7OdHlReLaYeHTzMc6pqxFExAhZayTxJgzKwHAz2u3ZswtYVmtoYkcDKMr7C3730rf4sgjadMko8Dh9236JUtKfllBu7STd7xaELWziDwV9xbsiEWckzuyx4smDGLtEcKF86yoNI5vR5H4sGgnDNuYPMH1VmR/D+ExTrtKnvDmcJL3XrSYngYp5OzF5CvX5BwTz+d+3eeBs6v1O5C634rbSOnUUKHip+0NFy/CBe2W12yzgF5YAtJyKcnaWXVApJAc98VYMtX9IL/4PQW6gBSQKlDa0BW2EuRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=l2o27uP9884Jv9qilaajTKhlOLjqSJl9iJR48t2rjZw=; b=sxXDQy4DZKWz3vWjbuwq0GQYMoUkMlo9J2L/IvrX5GTk48mU4ytQxhcONV6H49VdApmM4K87+BLgyCxhFfm7AnWpxnNavwW77Gl13Lgx0BmHL5v+++KHklsIfQfmCREw/FQffZd5Bnkt/hS6OSI8U4c5Zx9KMS833s6FSDshvcKVa/HnRRE4+LVjKPR/eLlyUjxl4Jvj1TJIuArp+MdlVWnZLYkhJi1YxXrZdzQCUtZi6l/NLLXIQAEnfFrUaeGSJ+J3Tg6zn/33/pocbWK8l16sJeN6BBw6NhdV+Uzw8DWoxZ8669eiDQmxtbw/vCRlgrXwBWqr3zlD+8C0xPjsEQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=davemloft.net smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=l2o27uP9884Jv9qilaajTKhlOLjqSJl9iJR48t2rjZw=; b=GJxBFzNKBOAZL2wlSMgwHT/+4tzDzcOBcSq8O7gxpMjcFl/1gEss8nlIhwqZ4hiF3GZk3dhnf0RAXrMu7r9S3d6RoqDaHIamGzSud5j9Crs4onl1phSzp1gwVKuIUoG4vdtDTs7VBU05LpC8lDFNk0lKM/c3tkGXJ2LqbPBoAOHi/hp1zrt2gyxBextIth+maw4cMh0aZlh7LuHWo540VkbVXqAZMQC5Z7kzKDccDD0dD3abNWRJbijsps0tGFIi4bEI6X2T9xYh7mkLR/NyAT4NrV2hDbBm0n6c+J9nsMIsh653bY+g4iBHdazlsBGEyYgitlglD8I4fR1lhg81Qg== Received: from MN0P221CA0013.NAMP221.PROD.OUTLOOK.COM (2603:10b6:208:52a::18) by SA0PR12MB4431.namprd12.prod.outlook.com (2603:10b6:806:95::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8534.34; Wed, 19 Mar 2025 19:24:42 +0000 Received: from BL6PEPF00020E63.namprd04.prod.outlook.com (2603:10b6:208:52a:cafe::c0) by MN0P221CA0013.outlook.office365.com (2603:10b6:208:52a::18) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.8534.33 via Frontend Transport; Wed, 19 Mar 2025 19:24:42 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BL6PEPF00020E63.mail.protection.outlook.com (10.167.249.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8534.20 via Frontend Transport; Wed, 19 Mar 2025 19:24:42 +0000 Received: from rnnvmail202.nvidia.com (10.129.68.7) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Wed, 19 Mar 2025 12:24:33 -0700 Received: from rnnvmail204.nvidia.com (10.129.68.6) by rnnvmail202.nvidia.com (10.129.68.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Wed, 19 Mar 2025 12:24:32 -0700 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Wed, 19 Mar 2025 12:24:29 -0700 From: Tariq Toukan To: "David S. Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: Gal Pressman , Leon Romanovsky , "Saeed Mahameed" , Leon Romanovsky , Tariq Toukan , , , , Moshe Shemesh , Mark Bloch , Mark Zhang Subject: [PATCH net-next 2/3] net/mlx5e: Use right API to free bitmap memory Date: Wed, 19 Mar 2025 21:23:18 +0200 Message-ID: <1742412199-159596-3-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1742412199-159596-1-git-send-email-tariqt@nvidia.com> References: <1742412199-159596-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E63:EE_|SA0PR12MB4431:EE_ X-MS-Office365-Filtering-Correlation-Id: b7c65e80-497d-4246-7258-08dd671bb31b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: h2OHhY6H6cZmdBWHE7gtCApVp6PNUPFPmCipwJUo7Z7LqpWkcWGSC2Nw/EGahvhmgRD40t9R2slMlSsqLSObYvmySnfTUALmT/K/GYXvcJJlvQJ+5Yi7uPqmf05sG6xIIGD2sIbBql1o6TUtIAQgXbRJ91J1A+0fyJQAvTvh8OMCtgoXXWogkPIRV+5gJrd6XjKj4LAyGgLdNO/J8qtlGL86LHgnpcYqOdEHtOMf1oBi/HLQLyzeL1F4Gb6pipidalDwDqE76H69P1bWmw+GzjiCteH7ap6hXL+Zk+6Nr7ZzYUxqurxPmldSVsziGQE2uIYm2/sONWLx1OknCUmM4nj2+IBQuLbi/YGL1m/KSh34h6mB+Oiei/e/NBZIF04roTvBUVX/ThBTbA6l3aWAAAKzoCCynSv1WotOuilOnWk7WF18BsYAOU6nUhi5wmazudkR0kcXjeWkqihKX9Vhojc6Uc/NC7u85IOozVvMjDU0n6j9kW+CN6Mo2lXGIEQZLWLnxFKD1YJvs+RCv5wvOFBibG4CperBrA7q8hQGDZ5thJR7VXgXWyVFNFjJ09KAv25Um1oIwjzEwEa6alJyCsJOxdgRrON4PDvZ4sh/avV9jHRJGZREcKsOmCor5LT416sI3uYOjvhSvYHI3xZX49GDOPMUZydtpjqCZha8rIkCc4aVBTwT/U1PK8tKxMrKv0otCcjc5T29bMtTZRuzhGjPAifPTh8BBwz9Cs8caHxmFWJwn1GRobMdinUHBI0VEX394Bz5+zuvnposLL5JlMj2kC34TtMApuw77WwtmSvv48yTyrzBurBtLeqKIY5MF8d3xcqWGwoERIb88pB4kci913f6cL8OwBwrDN8wnI+3SCaPR96fvmXFnVDMFMRhkENpWVQVGVKloGtgbMghB/dpTLheuln039BzyfP+19AqE44kE4+pkOX4JE7+9EkBkBKMOz5vU4UceuogJovEsx/5dnpkM+2v7OrK/Kq5ZCChffoB8w9oIAZSusoR/T9eqKJhW4JprrQUBE8d1I308XS24/rtxq9m5n0dOssYfi5VKJ/zM+FDUePXPrsf3HZQ31eRNvASnPKS6/vyxQ5etFFCNCFQgmC/knwxZDXXlesiw/pDYKv+D3aFEp9nF7xQq9OqH282AOzGYJZ1MXxjGDF0HQcQJAex0FU8nnuQ5DGcPzIPHw5M3fxDYdxsmvm2VOsn8EK2f8u98w59SrSxxrMt6v2gsav3avJqkGRhTSE+nIcfYTOKCWZJEf5U15HyFymTGQzwbTwiZsXqvQuCdJSGxt303ajqd2bKOhpNqcZmc/JwpUVAEyYQRvCSTZioux3P8kOJNVOxXWIu1Y9KWxrfvdRlweJt7AjiTJtFXG/WLsr7f2zjwEbr2OwdxExU13vmp4bn/jYjFLSmAEAxXBtg9y3crP5emIRVySYJxxNoK0Rr2HaV2ijAi4OFJPL3HGRUO3e8S3QEwNeojfW2LIzy6PQZDRr23LI7COE7yXI= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(36860700013)(1800799024)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Mar 2025 19:24:42.1145 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b7c65e80-497d-4246-7258-08dd671bb31b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E63.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4431 X-Patchwork-Delegate: kuba@kernel.org From: Mark Zhang Use bitmap_free() to free memory allocated with bitmap_zalloc_node(). This fixes memtrack error: mtl rsc inconsistency: memtrack_free: .../drivers/net/ethernet/mellanox/mlx5/core/en_main.c::466: kfree for unknown address=0xFFFF0000CA3619E8, device=0x0 Signed-off-by: Mark Zhang Reviewed-by: Maher Sanalla Signed-off-by: Tariq Toukan Reviewed-by: Kalesh AP --- drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index 2edc61328749..3506024c2453 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -359,7 +359,7 @@ static int mlx5e_rq_shampo_hd_info_alloc(struct mlx5e_rq *rq, int node) return 0; err_nomem: - kvfree(shampo->bitmap); + bitmap_free(shampo->bitmap); kvfree(shampo->pages); return -ENOMEM; @@ -367,7 +367,7 @@ static int mlx5e_rq_shampo_hd_info_alloc(struct mlx5e_rq *rq, int node) static void mlx5e_rq_shampo_hd_info_free(struct mlx5e_rq *rq) { - kvfree(rq->mpwqe.shampo->bitmap); + bitmap_free(rq->mpwqe.shampo->bitmap); kvfree(rq->mpwqe.shampo->pages); } From patchwork Wed Mar 19 19:23:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tariq Toukan X-Patchwork-Id: 14023055 X-Patchwork-Delegate: kuba@kernel.org Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2076.outbound.protection.outlook.com [40.107.244.76]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE10621ABBC; Wed, 19 Mar 2025 19:24:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.244.76 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742412296; cv=fail; b=Gwvzj+XpE+7seokxL+7C7x3g+ZTU0aac2TAv9F15j/n2HTqMo4+krg2xy/5kSSkONqy/3mIYSq/aLQpJnCaP6yPQiKJeMlb81TOxt8ZImtKaLPwFfbS64TKpXY6DCnhRUFXS9hJayK64ldumqdg/TKpuOMqL/swwPw4E9Moxyno= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742412296; c=relaxed/simple; bh=Xiw7tN5oeXt0qNWHJnmIFxACUC2NEa8vyII3DpubpZI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=tudf8sJArIow88P8AahqNMGxhgwTdBHG61UfCfhLqU7SNJ4/of+10utGrFfU9swzd8AuQJ1UeB9QCxnyAfPshoC33SEl0h4iUXhYhLF7lHCZpGxOCzIinDYcAl0G8653gDSMK+XJZTnNkpUw9PFVf8mUU7JwoN6LFKwHm2J3YNg= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=CfGX3ztX; arc=fail smtp.client-ip=40.107.244.76 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="CfGX3ztX" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=de5/HDmorzza+ZPOufKukWUrCDI/o15pPHKrXhsxCLaidgkmGgz9hSWa9F4y6nR41q7X2eHr3yy8Gam+Odb5TlQV2DvyCAVcnEZm/sLfNIvAruM4YQphax4/nxpbHr9NIarFmxSwLC6arHqwCBq04w5mFwBzLNP3i9qukD/rYOQB93NSx2+jLwRgR1sX5I4cclwvnjxsIaIIZmS6+R/XyWPBO6R+J5A0KM3DQOD2jL2S9uW+SBHk2FbRJ2b1f69+4jke0JQU3netdl+YZXHYu3E76SIMtss/i9l/cF25x2erJthJn8/o/mGlKHEmbg3tZdq3HWfte0Lczk3Jwam/yg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=5DNaG5uPEuAxV64NB0r+y7JCjICnAGQ7jACDFPDriew=; b=TnxekDHZ+Mcq9AXy5mUMYMuDvDz86Yv5VF3JEB9GZ1Lncd8sv7vj6Ne5+6C6hdbweRi9gbKuXdIFlkrvPfNfTP1jSlN3aRdgjlI74lVEmpsNcMsGmhB7WUjXgnSAdHUbWfLyo+K95z+yqfLF0TzP+SiW7nMuA0EcQOx/XVYoS1WerFgH0iXNCAtgpITxdATPknTHKO10D4JWhiqF8dXQ0aRizF+us26JY8UwUB+fMmAcKpseglrbdhG7jDQQCumzvGWiErnJe9fUHsjSShlgWY3Iwe1rebMkU4Ko2llIWkeTw1Cyq5+d9TBN760qs0PzRsuWv3zOMuvUF9KbGRgVsg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=davemloft.net smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=5DNaG5uPEuAxV64NB0r+y7JCjICnAGQ7jACDFPDriew=; b=CfGX3ztXAlsU18CZHozoY/VkyKdDI2cZpbjvR6jk38ae7vSQ9WqlT7wimKn2sMeYw4YpGvjZbzFP77XPeV5e3sQQ8xnLrsSSVPlabTcyXPSe6hMb5MZYBV3rByuPTpjxexS65y5roJ2GEGpluV6WNdPFKIphxXpAYrPRXRm7XUchnxYSZV9sPxWP7uPpU6PrsRWUabxiWiWr+d/uCgfFmsIJD11BDb/jrFVzLbn1WuyYVcpvNOaApHNVTjWZSPLvV9WPeH24knHg7ihiQaa2wLuA9I5/k6dOXHrMX73eT94gJJYR/m0nehWkaMNAhgG3g78+usj/3Hzd/ua5UjyxKQ== Received: from MN2PR01CA0047.prod.exchangelabs.com (2603:10b6:208:23f::16) by MW4PR12MB8611.namprd12.prod.outlook.com (2603:10b6:303:1ed::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8534.34; Wed, 19 Mar 2025 19:24:50 +0000 Received: from BL6PEPF00020E62.namprd04.prod.outlook.com (2603:10b6:208:23f:cafe::30) by MN2PR01CA0047.outlook.office365.com (2603:10b6:208:23f::16) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.8534.34 via Frontend Transport; Wed, 19 Mar 2025 19:24:48 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BL6PEPF00020E62.mail.protection.outlook.com (10.167.249.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8534.20 via Frontend Transport; Wed, 19 Mar 2025 19:24:48 +0000 Received: from rnnvmail205.nvidia.com (10.129.68.10) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Wed, 19 Mar 2025 12:24:37 -0700 Received: from rnnvmail204.nvidia.com (10.129.68.6) by rnnvmail205.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Wed, 19 Mar 2025 12:24:37 -0700 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Wed, 19 Mar 2025 12:24:33 -0700 From: Tariq Toukan To: "David S. Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: Gal Pressman , Leon Romanovsky , "Saeed Mahameed" , Leon Romanovsky , Tariq Toukan , , , , Moshe Shemesh , Mark Bloch Subject: [PATCH net-next 3/3] net/mlx5e: Always select CONFIG_PAGE_POOL_STATS Date: Wed, 19 Mar 2025 21:23:19 +0200 Message-ID: <1742412199-159596-4-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1742412199-159596-1-git-send-email-tariqt@nvidia.com> References: <1742412199-159596-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E62:EE_|MW4PR12MB8611:EE_ X-MS-Office365-Filtering-Correlation-Id: 91e7c57e-ed06-4b06-e40c-08dd671bb6d0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|376014|1800799024; X-Microsoft-Antispam-Message-Info: g5Qj1Bq05wYx8Wj9Ux90XWmLYAwe3aaeo1mB9+vvg6Kk6yvu82rI2pF/nyKVrtHBv1Jn19jDLvbfvNK80UpcMGs7mFk2ErPcUp94YEW4EnOD+E244Im9RLPpaCDechoeKA8de4zyIxNLAtmacf0FqN6koumicE7krjBOFOfezzcRtaVFcJfEkdypegfv8yI8c3bPTRs3F3XYNif6reA/rk/xtk4jqNp1ISDHTKMgRgP1vUHsOUMUWbsKgB0jezjkGt55qdURqYsiS8CBb9/4dPPqWWqYiVqLl01zmXIvDM3nMscSLj7VAmixuV7GSpB82KvuGrG1sd4hwDZYm5wcemmadjqC1bwWgnGlEsZEe66+91oGj+JeG4F9LMZJ367ULIZw2DX+dn3W/t3CAjVitD2oowf9X70dWkz9se5s7gjTwLOoHepf0uV5GCINsjLfYyCjOcylTO8ZzduXS/JLTVjMCWU/SMPuGCrK7sY0CHiAqXOWQAhX/53IJ3nHG3JkA42jY/0nae3kD6W+3XW/CGIT89Cz0BK/q9/XoBkeXaHjLW3T7CzAJ3EwDZ4mTkp3TU+R/LBCovDDa3af6HyoC2unqVaCLOcP/Xga2qgVCFstaTn+gQsTB1FodK70p0JN29oNtEmC3D9sE4ydJj14PfZDMuW1hu7HHcW2IS6cITxbW0NjpfF2uRBZVtqq31rAJHFC5yfcnravcWmgf8QUmoDCoDsw2xxVVGq3suK+zNCVB6dEMjwYhHvD3r/UxqCfp1lML6Y4b+2WYAXtzOp+bSu7BQ15k2BYGa70qPEer+nbel/A1SZe/QO5eA3CAvju3yDIm+/iLobcVa7Dp7DfAdYCzhgoxuOrYq6q29vArUh8p72f8JDV2r6A/FKg7CNpVO0O03qOKlkxmR8fwTthVu144eqKmbrbgXGsRsCJboLPRNlYfPE6PaP98CQOVuR2b+stkoAw068Cdi4dCRJc4+mqO4agt6z1h1W+K13FI7QITaPVKXdF3p+lDHU/zwHKyYDIlpAWZG3AdblkTg0UFSKAekLjaskZayvKRzXNcSrzLMCV2C2+M6/CQiq2q5dOUyrC43q14EWFM/q035wXnLGCrhkH6fwL4lBY8HMcb/TnJgnHOT1uUy6gaTmoIKr+uVKRkU/8GLrWaD+Kp5IHVlYaopBJMkvG2Vtx4NjhxmNmeLrq12bcSe5pC+V5Bz57vr4TfDK3GHDUDXj6frJJkXBalogRqVb8HYale7YlmvmgYMHb2hQEKjerb5Ih5i166soPhPq7+bbSMmEgLm6LYimOdJWvbDDKs4xoyDh0LfKt1hOI/86PHLhzd4uYOpJcmfBXEUqU5tmsYWvfSvO+i2IgHqpNyKshgTJtrf/KpjdocaBPvpv+lxs/8HHnCS/PS9QC6HlmCu5fiV9bRv6dbxlFVcwryX1VPJmBJSV/Y+pbxtsZoRMq8tzs+j1t5I9JSiAZI7np8+rAWwH54NT6bWEm7BeC6mBOtcOel9D2ePM= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Mar 2025 19:24:48.3368 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 91e7c57e-ed06-4b06-e40c-08dd671bb6d0 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E62.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB8611 X-Patchwork-Delegate: kuba@kernel.org Always set PAGE_POOL_STATS in mlx5 Eth driver. Cleanup the corresponding #ifdefs. Page pool stats are essential to monitor and analyze RX performance. Signed-off-by: Tariq Toukan Reviewed-by: Gal Pressman --- drivers/net/ethernet/mellanox/mlx5/core/Kconfig | 1 + drivers/net/ethernet/mellanox/mlx5/core/en_stats.c | 14 -------------- drivers/net/ethernet/mellanox/mlx5/core/en_stats.h | 4 ---- 3 files changed, 1 insertion(+), 18 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Kconfig b/drivers/net/ethernet/mellanox/mlx5/core/Kconfig index bf4015a12b41..6ec7d6e0181d 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/Kconfig +++ b/drivers/net/ethernet/mellanox/mlx5/core/Kconfig @@ -31,6 +31,7 @@ config MLX5_CORE_EN bool "Mellanox 5th generation network adapters (ConnectX series) Ethernet support" depends on NETDEVICES && ETHERNET && INET && PCI && MLX5_CORE select PAGE_POOL + select PAGE_POOL_STATS select DIMLIB help Ethernet support in Mellanox Technologies ConnectX-4 NIC. diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c index 611ec4b6f370..386f231e642e 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c @@ -37,9 +37,7 @@ #include "en/ptp.h" #include "en/port.h" -#ifdef CONFIG_PAGE_POOL_STATS #include -#endif void mlx5e_ethtool_put_stat(u64 **data, u64 val) { @@ -196,7 +194,6 @@ static const struct counter_desc sw_stats_desc[] = { { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_arfs_err) }, #endif { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_recover) }, -#ifdef CONFIG_PAGE_POOL_STATS { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_alloc_fast) }, { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_alloc_slow) }, { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_alloc_slow_high_order) }, @@ -208,7 +205,6 @@ static const struct counter_desc sw_stats_desc[] = { { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_recycle_ring) }, { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_recycle_ring_full) }, { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_recycle_released_ref) }, -#endif #ifdef CONFIG_MLX5_EN_TLS { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_decrypted_packets) }, { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_decrypted_bytes) }, @@ -377,7 +373,6 @@ static void mlx5e_stats_grp_sw_update_stats_rq_stats(struct mlx5e_sw_stats *s, s->rx_arfs_err += rq_stats->arfs_err; #endif s->rx_recover += rq_stats->recover; -#ifdef CONFIG_PAGE_POOL_STATS s->rx_pp_alloc_fast += rq_stats->pp_alloc_fast; s->rx_pp_alloc_slow += rq_stats->pp_alloc_slow; s->rx_pp_alloc_empty += rq_stats->pp_alloc_empty; @@ -389,7 +384,6 @@ static void mlx5e_stats_grp_sw_update_stats_rq_stats(struct mlx5e_sw_stats *s, s->rx_pp_recycle_ring += rq_stats->pp_recycle_ring; s->rx_pp_recycle_ring_full += rq_stats->pp_recycle_ring_full; s->rx_pp_recycle_released_ref += rq_stats->pp_recycle_released_ref; -#endif #ifdef CONFIG_MLX5_EN_TLS s->rx_tls_decrypted_packets += rq_stats->tls_decrypted_packets; s->rx_tls_decrypted_bytes += rq_stats->tls_decrypted_bytes; @@ -496,7 +490,6 @@ static void mlx5e_stats_grp_sw_update_stats_qos(struct mlx5e_priv *priv, } } -#ifdef CONFIG_PAGE_POOL_STATS static void mlx5e_stats_update_stats_rq_page_pool(struct mlx5e_channel *c) { struct mlx5e_rq_stats *rq_stats = c->rq.stats; @@ -519,11 +512,6 @@ static void mlx5e_stats_update_stats_rq_page_pool(struct mlx5e_channel *c) rq_stats->pp_recycle_ring_full = stats.recycle_stats.ring_full; rq_stats->pp_recycle_released_ref = stats.recycle_stats.released_refcnt; } -#else -static void mlx5e_stats_update_stats_rq_page_pool(struct mlx5e_channel *c) -{ -} -#endif static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(sw) { @@ -2086,7 +2074,6 @@ static const struct counter_desc rq_stats_desc[] = { { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, arfs_err) }, #endif { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, recover) }, -#ifdef CONFIG_PAGE_POOL_STATS { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_alloc_fast) }, { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_alloc_slow) }, { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_alloc_slow_high_order) }, @@ -2098,7 +2085,6 @@ static const struct counter_desc rq_stats_desc[] = { { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_recycle_ring) }, { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_recycle_ring_full) }, { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_recycle_released_ref) }, -#endif #ifdef CONFIG_MLX5_EN_TLS { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_decrypted_packets) }, { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_decrypted_bytes) }, diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h index 5961c569cfe0..8e3344e8eadb 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h @@ -215,7 +215,6 @@ struct mlx5e_sw_stats { u64 ch_aff_change; u64 ch_force_irq; u64 ch_eq_rearm; -#ifdef CONFIG_PAGE_POOL_STATS u64 rx_pp_alloc_fast; u64 rx_pp_alloc_slow; u64 rx_pp_alloc_slow_high_order; @@ -227,7 +226,6 @@ struct mlx5e_sw_stats { u64 rx_pp_recycle_ring; u64 rx_pp_recycle_ring_full; u64 rx_pp_recycle_released_ref; -#endif #ifdef CONFIG_MLX5_EN_TLS u64 tx_tls_encrypted_packets; u64 tx_tls_encrypted_bytes; @@ -381,7 +379,6 @@ struct mlx5e_rq_stats { u64 arfs_err; #endif u64 recover; -#ifdef CONFIG_PAGE_POOL_STATS u64 pp_alloc_fast; u64 pp_alloc_slow; u64 pp_alloc_slow_high_order; @@ -393,7 +390,6 @@ struct mlx5e_rq_stats { u64 pp_recycle_ring; u64 pp_recycle_ring_full; u64 pp_recycle_released_ref; -#endif #ifdef CONFIG_MLX5_EN_TLS u64 tls_decrypted_packets; u64 tls_decrypted_bytes;