From patchwork Wed Mar 19 21:44:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 14023152 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.forwardemail.net (smtp.forwardemail.net [121.127.44.59]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D54D721577D for ; Wed, 19 Mar 2025 21:44:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=121.127.44.59 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742420679; cv=none; b=EnS4vAw5SEbjapkT35xy2O8/ErLbZiee+OyoqVWcVuodi+0+j0b+3Ri+yMKT2vlij3pS12rFW6CZLx2unf1nD53BF29ZGCRLzL5H/uMwKBx/QUb2mRq7F/u8hFF5ptf0kOkuitI9jTQ2B37F4cYLi5gvJdit4a8GDLRrb8pLhi4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742420679; c=relaxed/simple; bh=2bmF5eETK0X62KWDwh10/XSLlS165NQb0nvYGPow2LA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NpSjMcdBcvaazQ64WHvylrEgmIEAHL9oimdllQ1XVaPoWq3KrzLIvM4a0XuXrV0cBabT3XrXHEMuJGNZSrURRRLAtbmhAyaz8fpBmdlsjDpSZHerh4+WCmFQxiNKpFsLG/enWr5G6sKyo5hbvmtkyqmZVJACDIrgLxdtTFR/OoE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=Vwhhz9km; arc=none smtp.client-ip=121.127.44.59 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="Vwhhz9km" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1742420671; bh=go+CvYPHwP2MHqmTP00wWpMhDlSmzW68Q7BuPATSTYo=; b=Vwhhz9kmM++zIJIuhvHuU5Hz/0wWh5z9uNNfu8UyhTMl02DoFC1psnjZrZ0I7BKi5zSmfEMse BqQNbbaywMe+2hZYhPp61uS+xpnXcay1atmnkvBs8Bml6j9rJw+Zx5z84vE4kQ/oViv9t+D36ea dqaRGiGLGKBXfAnCM/nCCvp6EniAYTy4RdZ05Yr37IRmLJL7Gc9Rds3cFgoJNlfXP+IV9y5BE8G DeqFcgIc7pVAP+WEROdqsoMGQZySCzmrlxofi9pXz+XoqGUq0q72kd4L2IXVfy51z4q1qA4pXEE S94qBqmer7VY/GEf0EFxMea9CRSs1kVlWwAYQZkrhF+w== X-Forward-Email-ID: 67db3abacf4d592372b993ee X-Forward-Email-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 121.127.44.59 X-Forward-Email-Version: 0.4.40 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Wu Cc: Yao Zi , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: [PATCH net-next v3 1/5] dt-bindings: net: rockchip-dwmac: Add compatible string for RK3528 Date: Wed, 19 Mar 2025 21:44:05 +0000 Message-ID: <20250319214415.3086027-2-jonas@kwiboo.se> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250319214415.3086027-1-jonas@kwiboo.se> References: <20250319214415.3086027-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Rockchip RK3528 has two Ethernet controllers based on Synopsys DWC Ethernet QoS IP. Add compatible string for the RK3528 variant. Signed-off-by: Jonas Karlman Reviewed-by: Rob Herring (Arm) --- Changes in v3: - Rebase on latest net-next/main - Collect r-b tag Changes in v2: - Restrict the minItems: 4 change to rockchip,rk3528-gmac The enum will be extended in a future patch, Pending RK3562 and a future RK3506 variant also only have 4 clocks. Because snps,dwmac-4.20a is already listed in snps,dwmac.yaml adding the rockchip,rk3528-gmac compatible did not seem necessary. --- .../devicetree/bindings/net/rockchip-dwmac.yaml | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml index 63ee0cc7a8f8..0ac7c4b47d6b 100644 --- a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml @@ -24,6 +24,7 @@ select: - rockchip,rk3366-gmac - rockchip,rk3368-gmac - rockchip,rk3399-gmac + - rockchip,rk3528-gmac - rockchip,rk3568-gmac - rockchip,rk3576-gmac - rockchip,rk3588-gmac @@ -49,6 +50,7 @@ properties: - rockchip,rv1108-gmac - items: - enum: + - rockchip,rk3528-gmac - rockchip,rk3568-gmac - rockchip,rk3576-gmac - rockchip,rk3588-gmac @@ -66,7 +68,7 @@ properties: - const: eth_wake_irq clocks: - minItems: 5 + minItems: 4 maxItems: 8 clock-names: @@ -140,6 +142,18 @@ allOf: properties: rockchip,php-grf: false + - if: + not: + properties: + compatible: + contains: + enum: + - rockchip,rk3528-gmac + then: + properties: + clocks: + minItems: 5 + unevaluatedProperties: false examples: From patchwork Wed Mar 19 21:44:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 14023153 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.forwardemail.net (smtp.forwardemail.net [121.127.44.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5CBD921B9D3 for ; Wed, 19 Mar 2025 21:44:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=121.127.44.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742420683; cv=none; b=m82jV14u5OgYU5GbgsIDFvsgE3H5BKDeosgh2AoPwHomqGSffACNg4DfV9IP16gXlleB+AyqBljrrojbPesg0lXf+LiG/VC36xn5QPTE2h5HYQd9D+zhmyUmE9UtQPKa+XOSv28stMtB178/wO94QqHQtUVIcPv1Su/vFk1OgiU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742420683; c=relaxed/simple; bh=Fl+aq8Mvjz3ooxv6suCHqop8ABQ0qBZjZCJn1N/hRp8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=roQ4LLDGouRKANK4EWj9Azm0UeBREzx5qXlbL+mx3/FXgn2e+SHRghSAGEXg7uVos+MJvLbejStqWvRf4zAKngVMx8x4tGQdPo0AbJ7XGv5ovjpCM1yXOF8QR4m1TcSWPMQ0/sga3OHz/rYFt6CTPftX0KGBQHJkEbiTBhhDPK4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=VcuNJrRL; arc=none smtp.client-ip=121.127.44.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="VcuNJrRL" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1742420675; bh=e4NFTOlsV5jxXvuEThm27uRM0DY7QOxKSuqXbD4r5/4=; b=VcuNJrRLKjIKhYebjeJ019v3Ynai3BH1wc/3pSWoAI0BDEuU4ZsbotHIc4Uxejd0Rf6moQEag pRmFu7YiWG18TPlBxazz6BxTULyxSnCQMKlECO6eW0I30qfR3VKOZST8OIqm7xijcF7Nfk5OMaK SS0MfMGYBeDBoXTfWWS8A4mBOGsPCDlN1+xv8unl+GBiScnaM3qIW3LSlRoEAtP5Y3/mu+klBn+ lhkx/KYH3zp8TXocZkIIV+PjgqUX0Q+G+FNViLSs6qhlmpnlwfgWv5cYElPMyCy+9YxZRro6VFo Y/WP9oOfzUD3pT5c5OayJx/dZ4r1NyOQurnwTXiEzVOQ== X-Forward-Email-ID: 67db3abfcf4d592372b99403 X-Forward-Email-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 121.127.44.73 X-Forward-Email-Version: 0.4.40 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Wu , Yao Zi , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman , linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH net-next v3 2/5] net: stmmac: dwmac-rk: Add GMAC support for RK3528 Date: Wed, 19 Mar 2025 21:44:06 +0000 Message-ID: <20250319214415.3086027-3-jonas@kwiboo.se> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250319214415.3086027-1-jonas@kwiboo.se> References: <20250319214415.3086027-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: David Wu Rockchip RK3528 has two Ethernet controllers based on Synopsys DWC Ethernet QoS IP. Add initial support for the RK3528 GMAC variant. Signed-off-by: David Wu Signed-off-by: Jonas Karlman --- Changes in v3: - No change Changes in v2: - No change Power up/down of the integrated PHY is added in a separate patch. --- .../net/ethernet/stmicro/stmmac/dwmac-rk.c | 132 ++++++++++++++++++ 1 file changed, 132 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c index c404017bc1da..dfb4668db4ee 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -828,6 +828,137 @@ static const struct rk_gmac_ops rk3399_ops = { .set_rmii_speed = rk3399_set_rmii_speed, }; +#define RK3528_VO_GRF_GMAC_CON 0x0018 +#define RK3528_VO_GRF_MACPHY_CON0 0x001c +#define RK3528_VO_GRF_MACPHY_CON1 0x0020 +#define RK3528_VPU_GRF_GMAC_CON5 0x0018 +#define RK3528_VPU_GRF_GMAC_CON6 0x001c + +#define RK3528_GMAC_RXCLK_DLY_ENABLE GRF_BIT(15) +#define RK3528_GMAC_RXCLK_DLY_DISABLE GRF_CLR_BIT(15) +#define RK3528_GMAC_TXCLK_DLY_ENABLE GRF_BIT(14) +#define RK3528_GMAC_TXCLK_DLY_DISABLE GRF_CLR_BIT(14) + +#define RK3528_GMAC_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0xFF, 8) +#define RK3528_GMAC_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0xFF, 0) + +#define RK3528_GMAC0_PHY_INTF_SEL_RMII GRF_BIT(1) +#define RK3528_GMAC1_PHY_INTF_SEL_RGMII GRF_CLR_BIT(8) +#define RK3528_GMAC1_PHY_INTF_SEL_RMII GRF_BIT(8) + +#define RK3528_GMAC1_CLK_SELECT_CRU GRF_CLR_BIT(12) +#define RK3528_GMAC1_CLK_SELECT_IO GRF_BIT(12) + +#define RK3528_GMAC0_CLK_RMII_DIV2 GRF_BIT(3) +#define RK3528_GMAC0_CLK_RMII_DIV20 GRF_CLR_BIT(3) +#define RK3528_GMAC1_CLK_RMII_DIV2 GRF_BIT(10) +#define RK3528_GMAC1_CLK_RMII_DIV20 GRF_CLR_BIT(10) + +#define RK3528_GMAC1_CLK_RGMII_DIV1 (GRF_CLR_BIT(11) | GRF_CLR_BIT(10)) +#define RK3528_GMAC1_CLK_RGMII_DIV5 (GRF_BIT(11) | GRF_BIT(10)) +#define RK3528_GMAC1_CLK_RGMII_DIV50 (GRF_BIT(11) | GRF_CLR_BIT(10)) + +#define RK3528_GMAC0_CLK_RMII_GATE GRF_BIT(2) +#define RK3528_GMAC0_CLK_RMII_NOGATE GRF_CLR_BIT(2) +#define RK3528_GMAC1_CLK_RMII_GATE GRF_BIT(9) +#define RK3528_GMAC1_CLK_RMII_NOGATE GRF_CLR_BIT(9) + +static void rk3528_set_to_rgmii(struct rk_priv_data *bsp_priv, + int tx_delay, int rx_delay) +{ + regmap_write(bsp_priv->grf, RK3528_VPU_GRF_GMAC_CON5, + RK3528_GMAC1_PHY_INTF_SEL_RGMII); + + regmap_write(bsp_priv->grf, RK3528_VPU_GRF_GMAC_CON5, + DELAY_ENABLE(RK3528, tx_delay, rx_delay)); + + regmap_write(bsp_priv->grf, RK3528_VPU_GRF_GMAC_CON6, + RK3528_GMAC_CLK_RX_DL_CFG(rx_delay) | + RK3528_GMAC_CLK_TX_DL_CFG(tx_delay)); +} + +static void rk3528_set_to_rmii(struct rk_priv_data *bsp_priv) +{ + if (bsp_priv->id == 1) + regmap_write(bsp_priv->grf, RK3528_VPU_GRF_GMAC_CON5, + RK3528_GMAC1_PHY_INTF_SEL_RMII); + else + regmap_write(bsp_priv->grf, RK3528_VO_GRF_GMAC_CON, + RK3528_GMAC0_PHY_INTF_SEL_RMII | + RK3528_GMAC0_CLK_RMII_DIV2); +} + +static void rk3528_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed) +{ + struct device *dev = &bsp_priv->pdev->dev; + + if (speed == 10) + regmap_write(bsp_priv->grf, RK3528_VPU_GRF_GMAC_CON5, + RK3528_GMAC1_CLK_RGMII_DIV50); + else if (speed == 100) + regmap_write(bsp_priv->grf, RK3528_VPU_GRF_GMAC_CON5, + RK3528_GMAC1_CLK_RGMII_DIV5); + else if (speed == 1000) + regmap_write(bsp_priv->grf, RK3528_VPU_GRF_GMAC_CON5, + RK3528_GMAC1_CLK_RGMII_DIV1); + else + dev_err(dev, "unknown speed value for RGMII! speed=%d", speed); +} + +static void rk3528_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed) +{ + struct device *dev = &bsp_priv->pdev->dev; + unsigned int reg, val; + + if (speed == 10) + val = bsp_priv->id == 1 ? RK3528_GMAC1_CLK_RMII_DIV20 : + RK3528_GMAC0_CLK_RMII_DIV20; + else if (speed == 100) + val = bsp_priv->id == 1 ? RK3528_GMAC1_CLK_RMII_DIV2 : + RK3528_GMAC0_CLK_RMII_DIV2; + else { + dev_err(dev, "unknown speed value for RMII! speed=%d", speed); + return; + } + + reg = bsp_priv->id == 1 ? RK3528_VPU_GRF_GMAC_CON5 : + RK3528_VO_GRF_GMAC_CON; + + regmap_write(bsp_priv->grf, reg, val); +} + +static void rk3528_set_clock_selection(struct rk_priv_data *bsp_priv, + bool input, bool enable) +{ + unsigned int val; + + if (bsp_priv->id == 1) { + val = input ? RK3528_GMAC1_CLK_SELECT_IO : + RK3528_GMAC1_CLK_SELECT_CRU; + val |= enable ? RK3528_GMAC1_CLK_RMII_NOGATE : + RK3528_GMAC1_CLK_RMII_GATE; + regmap_write(bsp_priv->grf, RK3528_VPU_GRF_GMAC_CON5, val); + } else { + val = enable ? RK3528_GMAC0_CLK_RMII_NOGATE : + RK3528_GMAC0_CLK_RMII_GATE; + regmap_write(bsp_priv->grf, RK3528_VO_GRF_GMAC_CON, val); + } +} + +static const struct rk_gmac_ops rk3528_ops = { + .set_to_rgmii = rk3528_set_to_rgmii, + .set_to_rmii = rk3528_set_to_rmii, + .set_rgmii_speed = rk3528_set_rgmii_speed, + .set_rmii_speed = rk3528_set_rmii_speed, + .set_clock_selection = rk3528_set_clock_selection, + .regs_valid = true, + .regs = { + 0xffbd0000, /* gmac0 */ + 0xffbe0000, /* gmac1 */ + 0x0, /* sentinel */ + }, +}; + #define RK3568_GRF_GMAC0_CON0 0x0380 #define RK3568_GRF_GMAC0_CON1 0x0384 #define RK3568_GRF_GMAC1_CON0 0x0388 @@ -1819,6 +1950,7 @@ static const struct of_device_id rk_gmac_dwmac_match[] = { { .compatible = "rockchip,rk3366-gmac", .data = &rk3366_ops }, { .compatible = "rockchip,rk3368-gmac", .data = &rk3368_ops }, { .compatible = "rockchip,rk3399-gmac", .data = &rk3399_ops }, + { .compatible = "rockchip,rk3528-gmac", .data = &rk3528_ops }, { .compatible = "rockchip,rk3568-gmac", .data = &rk3568_ops }, { .compatible = "rockchip,rk3576-gmac", .data = &rk3576_ops }, { .compatible = "rockchip,rk3588-gmac", .data = &rk3588_ops }, From patchwork Wed Mar 19 21:44:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 14023154 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.forwardemail.net (smtp.forwardemail.net [121.127.44.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 67D4321C9FE for ; Wed, 19 Mar 2025 21:44:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=121.127.44.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742420688; cv=none; b=fxr/aj4xsY6m2W2d203q805kjlSs1bya9gSWKjj15R5ElpwkuvsFDWv64eLAZrnPOsOPFMSsRd1/DPzHzBGvJ1BxgB19rtUQvIzYvX3ztT15rWHB0X4ICZUjJHZzQ/aQMWv7jF4YMgwMs3yeC0MWiugGxpsBdfgj529p640k3Gc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742420688; c=relaxed/simple; bh=TtiUhFgUWksInvX29g3OQnmN5thhE+ROS7QR3501kDk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MAbwUNPKYnR1Gn0Iat7Xh/efD6Sh9tmWQIm9v7Y0vACx1NH5vAjlvChQb02l9YV+f2ZmW9lq/kTBB7IpRK3c+v7m0kBEUmfOTE6XI6BY5KWuRxZhl+eQAhHAxALGhZHT8Nrlq64ducSAIv4bBGYxSSV7OkynpmCU+Mnbouz96HY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=byfZ3iuX; arc=none smtp.client-ip=121.127.44.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="byfZ3iuX" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1742420680; bh=q4UCKRVSyCJCBN+wBNBmcB6bnhnKAJdDekZIqRUmYkM=; b=byfZ3iuXMncdhO1BgXzjcvfPoxOItvMd1H32aimGeiozT7F1weat1WJBKd2Yf+Jk876Hm6Ab/ 0wVkEERbrWcTZtg/QHHusEAzoirhxnRDGIwXTsbwbFiCJX1CaYkTdytuIfkAejgD2a2S8WL8QCG vKQd1Dr7waHnZDAluGcDLdD7AezkkwOUk9HhedjPpNMc7aOifCfkPj4DhAFL8F6iZsixbf4FK0P alDharWShKn5DQrWO8WJFL2FVUa6DhxLfsOXxzYKgKxIa4ylXDFgD+ZvgzTcyQdK10Ivn1RP8sC EDJ97jkErcAvsW4aU6OPG/mX60hrUWTO1TXyvvmPBPMA== X-Forward-Email-ID: 67db3ac4cf4d592372b99418 X-Forward-Email-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 121.127.44.73 X-Forward-Email-Version: 0.4.40 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Philipp Zabel Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Wu , Yao Zi , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman , linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH net-next v3 3/5] net: stmmac: dwmac-rk: Move integrated_phy_powerup/down functions Date: Wed, 19 Mar 2025 21:44:07 +0000 Message-ID: <20250319214415.3086027-4-jonas@kwiboo.se> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250319214415.3086027-1-jonas@kwiboo.se> References: <20250319214415.3086027-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Rockchip RK3528 (and RV1106) has a different integrated PHY compared to the integrated PHY on RK3228/RK3328. Current powerup/down operation is not compatible with the integrated PHY found in these SoCs. Move the rk_gmac_integrated_phy_powerup/down functions to top of the file to prepare for them to be called directly by a GMAC variant specific powerup/down operation. Signed-off-by: Jonas Karlman Reviewed-by: Andrew Lunn --- Changes in v3: - No change Changes in v2: - New patch --- .../net/ethernet/stmicro/stmmac/dwmac-rk.c | 88 +++++++++---------- 1 file changed, 44 insertions(+), 44 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c index dfb4668db4ee..0321befed0d3 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -92,6 +92,50 @@ struct rk_priv_data { (((tx) ? soc##_GMAC_TXCLK_DLY_ENABLE : soc##_GMAC_TXCLK_DLY_DISABLE) | \ ((rx) ? soc##_GMAC_RXCLK_DLY_ENABLE : soc##_GMAC_RXCLK_DLY_DISABLE)) +#define RK_GRF_MACPHY_CON0 0xb00 +#define RK_GRF_MACPHY_CON1 0xb04 +#define RK_GRF_MACPHY_CON2 0xb08 +#define RK_GRF_MACPHY_CON3 0xb0c + +#define RK_MACPHY_ENABLE GRF_BIT(0) +#define RK_MACPHY_DISABLE GRF_CLR_BIT(0) +#define RK_MACPHY_CFG_CLK_50M GRF_BIT(14) +#define RK_GMAC2PHY_RMII_MODE (GRF_BIT(6) | GRF_CLR_BIT(7)) +#define RK_GRF_CON2_MACPHY_ID HIWORD_UPDATE(0x1234, 0xffff, 0) +#define RK_GRF_CON3_MACPHY_ID HIWORD_UPDATE(0x35, 0x3f, 0) + +static void rk_gmac_integrated_phy_powerup(struct rk_priv_data *priv) +{ + if (priv->ops->integrated_phy_powerup) + priv->ops->integrated_phy_powerup(priv); + + regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_CFG_CLK_50M); + regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_GMAC2PHY_RMII_MODE); + + regmap_write(priv->grf, RK_GRF_MACPHY_CON2, RK_GRF_CON2_MACPHY_ID); + regmap_write(priv->grf, RK_GRF_MACPHY_CON3, RK_GRF_CON3_MACPHY_ID); + + if (priv->phy_reset) { + /* PHY needs to be disabled before trying to reset it */ + regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE); + if (priv->phy_reset) + reset_control_assert(priv->phy_reset); + usleep_range(10, 20); + if (priv->phy_reset) + reset_control_deassert(priv->phy_reset); + usleep_range(10, 20); + regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_ENABLE); + msleep(30); + } +} + +static void rk_gmac_integrated_phy_powerdown(struct rk_priv_data *priv) +{ + regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE); + if (priv->phy_reset) + reset_control_assert(priv->phy_reset); +} + #define PX30_GRF_GMAC_CON1 0x0904 /* PX30_GRF_GMAC_CON1 */ @@ -1463,50 +1507,6 @@ static const struct rk_gmac_ops rv1126_ops = { .set_rmii_speed = rv1126_set_rmii_speed, }; -#define RK_GRF_MACPHY_CON0 0xb00 -#define RK_GRF_MACPHY_CON1 0xb04 -#define RK_GRF_MACPHY_CON2 0xb08 -#define RK_GRF_MACPHY_CON3 0xb0c - -#define RK_MACPHY_ENABLE GRF_BIT(0) -#define RK_MACPHY_DISABLE GRF_CLR_BIT(0) -#define RK_MACPHY_CFG_CLK_50M GRF_BIT(14) -#define RK_GMAC2PHY_RMII_MODE (GRF_BIT(6) | GRF_CLR_BIT(7)) -#define RK_GRF_CON2_MACPHY_ID HIWORD_UPDATE(0x1234, 0xffff, 0) -#define RK_GRF_CON3_MACPHY_ID HIWORD_UPDATE(0x35, 0x3f, 0) - -static void rk_gmac_integrated_phy_powerup(struct rk_priv_data *priv) -{ - if (priv->ops->integrated_phy_powerup) - priv->ops->integrated_phy_powerup(priv); - - regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_CFG_CLK_50M); - regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_GMAC2PHY_RMII_MODE); - - regmap_write(priv->grf, RK_GRF_MACPHY_CON2, RK_GRF_CON2_MACPHY_ID); - regmap_write(priv->grf, RK_GRF_MACPHY_CON3, RK_GRF_CON3_MACPHY_ID); - - if (priv->phy_reset) { - /* PHY needs to be disabled before trying to reset it */ - regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE); - if (priv->phy_reset) - reset_control_assert(priv->phy_reset); - usleep_range(10, 20); - if (priv->phy_reset) - reset_control_deassert(priv->phy_reset); - usleep_range(10, 20); - regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_ENABLE); - msleep(30); - } -} - -static void rk_gmac_integrated_phy_powerdown(struct rk_priv_data *priv) -{ - regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE); - if (priv->phy_reset) - reset_control_assert(priv->phy_reset); -} - static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat) { struct rk_priv_data *bsp_priv = plat->bsp_priv; From patchwork Wed Mar 19 21:44:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 14023155 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.forwardemail.net (smtp.forwardemail.net [149.28.215.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B508421A434 for ; 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jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-Forward-Email-Version: 0.4.40 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Wu , Yao Zi , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman , linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH net-next v3 4/5] net: stmmac: dwmac-rk: Add integrated_phy_powerdown operation Date: Wed, 19 Mar 2025 21:44:08 +0000 Message-ID: <20250319214415.3086027-5-jonas@kwiboo.se> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250319214415.3086027-1-jonas@kwiboo.se> References: <20250319214415.3086027-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Rockchip RK3528 (and RV1106) has a different integrated PHY compared to the integrated PHY on RK3228/RK3328. Current powerup/down operation is not compatible with the integrated PHY found in these newer SoCs. Add a new integrated_phy_powerdown operation and change the call chain for integrated_phy_powerup to prepare support for the integrated PHY found in these newer SoCs. Signed-off-by: Jonas Karlman Reviewed-by: Andrew Lunn --- Changes in v3: - No change Changes in v2: - New patch --- .../net/ethernet/stmicro/stmmac/dwmac-rk.c | 26 +++++++++++-------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c index 0321befed0d3..3673abd65302 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -33,6 +33,7 @@ struct rk_gmac_ops { void (*set_clock_selection)(struct rk_priv_data *bsp_priv, bool input, bool enable); void (*integrated_phy_powerup)(struct rk_priv_data *bsp_priv); + void (*integrated_phy_powerdown)(struct rk_priv_data *bsp_priv); bool php_grf_required; bool regs_valid; u32 regs[]; @@ -104,11 +105,8 @@ struct rk_priv_data { #define RK_GRF_CON2_MACPHY_ID HIWORD_UPDATE(0x1234, 0xffff, 0) #define RK_GRF_CON3_MACPHY_ID HIWORD_UPDATE(0x35, 0x3f, 0) -static void rk_gmac_integrated_phy_powerup(struct rk_priv_data *priv) +static void rk_gmac_integrated_ephy_powerup(struct rk_priv_data *priv) { - if (priv->ops->integrated_phy_powerup) - priv->ops->integrated_phy_powerup(priv); - regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_CFG_CLK_50M); regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_GMAC2PHY_RMII_MODE); @@ -129,7 +127,7 @@ static void rk_gmac_integrated_phy_powerup(struct rk_priv_data *priv) } } -static void rk_gmac_integrated_phy_powerdown(struct rk_priv_data *priv) +static void rk_gmac_integrated_ephy_powerdown(struct rk_priv_data *priv) { regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE); if (priv->phy_reset) @@ -368,6 +366,8 @@ static void rk3228_integrated_phy_powerup(struct rk_priv_data *priv) { regmap_write(priv->grf, RK3228_GRF_CON_MUX, RK3228_GRF_CON_MUX_GMAC_INTEGRATED_PHY); + + rk_gmac_integrated_ephy_powerup(priv); } static const struct rk_gmac_ops rk3228_ops = { @@ -375,7 +375,8 @@ static const struct rk_gmac_ops rk3228_ops = { .set_to_rmii = rk3228_set_to_rmii, .set_rgmii_speed = rk3228_set_rgmii_speed, .set_rmii_speed = rk3228_set_rmii_speed, - .integrated_phy_powerup = rk3228_integrated_phy_powerup, + .integrated_phy_powerup = rk3228_integrated_phy_powerup, + .integrated_phy_powerdown = rk_gmac_integrated_ephy_powerdown, }; #define RK3288_GRF_SOC_CON1 0x0248 @@ -601,6 +602,8 @@ static void rk3328_integrated_phy_powerup(struct rk_priv_data *priv) { regmap_write(priv->grf, RK3328_GRF_MACPHY_CON1, RK3328_MACPHY_RMII_MODE); + + rk_gmac_integrated_ephy_powerup(priv); } static const struct rk_gmac_ops rk3328_ops = { @@ -608,7 +611,8 @@ static const struct rk_gmac_ops rk3328_ops = { .set_to_rmii = rk3328_set_to_rmii, .set_rgmii_speed = rk3328_set_rgmii_speed, .set_rmii_speed = rk3328_set_rmii_speed, - .integrated_phy_powerup = rk3328_integrated_phy_powerup, + .integrated_phy_powerup = rk3328_integrated_phy_powerup, + .integrated_phy_powerdown = rk_gmac_integrated_ephy_powerdown, }; #define RK3366_GRF_SOC_CON6 0x0418 @@ -1802,16 +1806,16 @@ static int rk_gmac_powerup(struct rk_priv_data *bsp_priv) pm_runtime_get_sync(dev); - if (bsp_priv->integrated_phy) - rk_gmac_integrated_phy_powerup(bsp_priv); + if (bsp_priv->integrated_phy && bsp_priv->ops->integrated_phy_powerup) + bsp_priv->ops->integrated_phy_powerup(bsp_priv); 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Philipp Zabel Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Wu , Yao Zi , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman , linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH net-next v3 5/5] net: stmmac: dwmac-rk: Add initial support for RK3528 integrated PHY Date: Wed, 19 Mar 2025 21:44:09 +0000 Message-ID: <20250319214415.3086027-6-jonas@kwiboo.se> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250319214415.3086027-1-jonas@kwiboo.se> References: <20250319214415.3086027-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Rockchip RK3528 (and RV1106) has a different integrated PHY compared to the integrated PHY on RK3228/RK3328. Current powerup/down operation is not compatible with the integrated PHY found in these newer SoCs. Add operations to powerup/down the integrated PHY found in RK3528. Use helpers that can be used by other GMAC variants in the future. Signed-off-by: Jonas Karlman Reviewed-by: Andrew Lunn --- Changes in v3: - No change Changes in v2: - New patch This is enough to power up the integrated PHY on RK3528 for MDIO/MII. However, a PHY driver is still missing and I do not have any RK3528 board that make use of this MAC and PHY, so something that can be improved upon in the future. --- .../net/ethernet/stmicro/stmmac/dwmac-rk.c | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c index 3673abd65302..700858ff6f7c 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -134,6 +134,35 @@ static void rk_gmac_integrated_ephy_powerdown(struct rk_priv_data *priv) reset_control_assert(priv->phy_reset); } +#define RK_FEPHY_SHUTDOWN GRF_BIT(1) +#define RK_FEPHY_POWERUP GRF_CLR_BIT(1) +#define RK_FEPHY_INTERNAL_RMII_SEL GRF_BIT(6) +#define RK_FEPHY_24M_CLK_SEL (GRF_BIT(8) | GRF_BIT(9)) +#define RK_FEPHY_PHY_ID GRF_BIT(11) + +static void rk_gmac_integrated_fephy_powerup(struct rk_priv_data *priv, + unsigned int reg) +{ + reset_control_assert(priv->phy_reset); + usleep_range(20, 30); + + regmap_write(priv->grf, reg, + RK_FEPHY_POWERUP | + RK_FEPHY_INTERNAL_RMII_SEL | + RK_FEPHY_24M_CLK_SEL | + RK_FEPHY_PHY_ID); + usleep_range(10000, 12000); + + reset_control_deassert(priv->phy_reset); + usleep_range(50000, 60000); +} + +static void rk_gmac_integrated_fephy_powerdown(struct rk_priv_data *priv, + unsigned int reg) +{ + regmap_write(priv->grf, reg, RK_FEPHY_SHUTDOWN); +} + #define PX30_GRF_GMAC_CON1 0x0904 /* PX30_GRF_GMAC_CON1 */ @@ -993,12 +1022,24 @@ static void rk3528_set_clock_selection(struct rk_priv_data *bsp_priv, } } +static void rk3528_integrated_phy_powerup(struct rk_priv_data *bsp_priv) +{ + rk_gmac_integrated_fephy_powerup(bsp_priv, RK3528_VO_GRF_MACPHY_CON0); +} + +static void rk3528_integrated_phy_powerdown(struct rk_priv_data *bsp_priv) +{ + rk_gmac_integrated_fephy_powerdown(bsp_priv, RK3528_VO_GRF_MACPHY_CON0); +} + static const struct rk_gmac_ops rk3528_ops = { .set_to_rgmii = rk3528_set_to_rgmii, .set_to_rmii = rk3528_set_to_rmii, .set_rgmii_speed = rk3528_set_rgmii_speed, .set_rmii_speed = rk3528_set_rmii_speed, .set_clock_selection = rk3528_set_clock_selection, + .integrated_phy_powerup = rk3528_integrated_phy_powerup, + .integrated_phy_powerdown = rk3528_integrated_phy_powerdown, .regs_valid = true, .regs = { 0xffbd0000, /* gmac0 */