From patchwork Thu Mar 20 09:42:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kelvin Zhang X-Patchwork-Id: 14023629 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3DCEEC28B30 for ; Thu, 20 Mar 2025 09:42:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Reply-To:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References: Message-Id:MIME-Version:Subject:Date:From:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Nt0fbrGCKdqamjv3A1luY5S9kwIkTKiSxndOfEvcrAk=; b=mazkEs5BgQtnGa txQbuLFAxJsXwq2ELkzjY+PzVEksNgu5EJItH7l+KcwSQ0GbgQ0WBsBoUGBbBPdmNBzn5/5RyooiX XugwoyEMzAf9n2qbfMitm7k+n8DPp5izUoVYMT3MOlcUiaqhMwFhKSlZoZQq3+PyM4f9Fx8qg1OH7 G3764dOp9c3ZpGQ/XGEiYVjThyEF5IsA6knO/R5dXvqn/rlD1PJlUcc43iDtiI2ekMugGL1bW/hb4 Pn+qZXie4WpBrVHi64aM2bOYUfSMgDN8qoJHm0aSN8lBeLLOQ1wv9oxqa9XGXIXlVugjNnM//j7y+ E1HNBoMXX6N0Fam+8mBQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tvCQC-0000000Bj9T-3wbC; Thu, 20 Mar 2025 09:42:40 +0000 Received: from tor.source.kernel.org ([172.105.4.254]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tvCQB-0000000Bj8a-3WU2; Thu, 20 Mar 2025 09:42:39 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 9BD786157B; Thu, 20 Mar 2025 09:42:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id E9E8EC4CEEA; Thu, 20 Mar 2025 09:42:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742463759; bh=rcZ4hUqkPHAzf/+Hghm6DmFVxWHcdR3LRlMwrsk358A=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=HoMar0kaMGTZGFgYdsA/6xkvd6Jg7nxJRmZW5ySz4BE3YaZaywvZTjcuLHOvjM/12 KlDh7utBbWi/EV3HfEDrFE8X09gs6riSSJnEqWir+rCGcBXfiTcH6tc5BGld7/tLTJ HGmsXUuQwx3Y7n7+9S19FqkvKgU1OFYgZdtkCtxkvb0w/gBPmnn3ta+DOwVufTq2gc 8WGq8HBBM6FfGJsjEaxXKU0aiA82biWDXs3CqWaNwxbMKJOiYkgIJ/SIZVV64xINpD H9Pr1KOtTy1E4wcatLTpqm2rHkHtuW7JjzhIBIKWO0MjRCjAAKTqHZ/gy1KTT6YoNJ OJG2FQLhBIddw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id D81C3C36000; Thu, 20 Mar 2025 09:42:38 +0000 (UTC) Date: Thu, 20 Mar 2025 17:42:08 +0800 Subject: [PATCH v5 1/3] dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller MIME-Version: 1.0 Message-Id: <20250320-a4-a5-reset-v5-1-296f83bf733d@amlogic.com> References: <20250320-a4-a5-reset-v5-0-296f83bf733d@amlogic.com> In-Reply-To: <20250320-a4-a5-reset-v5-0-296f83bf733d@amlogic.com> To: Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Zelong Dong , Conor Dooley , Kelvin Zhang X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1742463756; l=2254; i=kelvin.zhang@amlogic.com; s=20240329; h=from:subject:message-id; bh=RBPG6lp45fxsEDVQ6Y1mIySEYTUUWfsM6OujOhVw3vA=; b=1iO6XQAAFeNeL4r0duOu23ksrBakwUJYF2Vj+z4zoFgsQqeIlbRVKMe2xVZqS+g5rZ/CT0RwJ 0Xv7AQBqwweD0XX5PoEdJjlX9ggKLsGYWz7wIL7duhKXRJ8hXNgC1wO X-Developer-Key: i=kelvin.zhang@amlogic.com; a=ed25519; pk=pgnle7HTNvnNTcOoGejvtTC7BJT30HUNXfMHRRXSylI= X-Endpoint-Received: by B4 Relay for kelvin.zhang@amlogic.com/20240329 with auth_id=148 X-Original-From: Kelvin Zhang X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: kelvin.zhang@amlogic.com Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org From: Kelvin Zhang From: Zelong Dong Add compatibles for Amlogic A4 and A5 reset controllers, which fall back to 'amlogic,meson-s4-reset'. Signed-off-by: Zelong Dong Acked-by: Conor Dooley Acked-by: Philipp Zabel Link: https://lore.kernel.org/r/20240918074211.8067-2-zelong.dong@amlogic.com Signed-off-by: Kelvin Zhang --- .../bindings/reset/amlogic,meson-reset.yaml | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml index 695ef38a7bb346c92b4cf428e7615d45682c940a..150e95c0d9bed74c7045942610a311114a257889 100644 --- a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml +++ b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml @@ -12,14 +12,20 @@ maintainers: properties: compatible: - enum: - - amlogic,meson8b-reset # Reset Controller on Meson8b and compatible SoCs - - amlogic,meson-gxbb-reset # Reset Controller on GXBB and compatible SoCs - - amlogic,meson-axg-reset # Reset Controller on AXG and compatible SoCs - - amlogic,meson-a1-reset # Reset Controller on A1 and compatible SoCs - - amlogic,meson-s4-reset # Reset Controller on S4 and compatible SoCs - - amlogic,c3-reset # Reset Controller on C3 and compatible SoCs - - amlogic,t7-reset + oneOf: + - enum: + - amlogic,meson8b-reset # Reset Controller on Meson8b and compatible SoCs + - amlogic,meson-gxbb-reset # Reset Controller on GXBB and compatible SoCs + - amlogic,meson-axg-reset # Reset Controller on AXG and compatible SoCs + - amlogic,meson-a1-reset # Reset Controller on A1 and compatible SoCs + - amlogic,meson-s4-reset # Reset Controller on S4 and compatible SoCs + - amlogic,c3-reset # Reset Controller on C3 and compatible SoCs + - amlogic,t7-reset + - items: + - enum: + - amlogic,a4-reset + - amlogic,a5-reset + - const: amlogic,meson-s4-reset reg: maxItems: 1 From patchwork Thu Mar 20 09:42:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kelvin Zhang X-Patchwork-Id: 14023634 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1F220C28B30 for ; Thu, 20 Mar 2025 09:47:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Reply-To:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References: Message-Id:MIME-Version:Subject:Date:From:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6CdwApgRltaUubgy0FXg69Cz8OfdgRT9zNtKtkGEfyw=; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742463759; bh=KVMP+KP4loWBPX8Ab8zvnYv5rM2SYyJlpChJv4S7Ph0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=mY9lf+wMvcsugdnmpe51JPmX72Ymdx/hbUUcqy9N3N5YOJW3e4yxkhTQrcfq+0cax NA5wThSwoE//jtXmRB7YAg2xdcvVER/9DntwxC9MD7Wb0t3thWQf54JEL6ndFbUG7P F3b/hbZioyDBvgqOKJ6d4VLO8rmEspZVV2EHnGZcrg8cJg3aTiDP6LT/aAOsLC/j0A O6H8xNn3GF/bO5o++OEykpX6Kv05ULPH39rWHPtcKcH+k6pPx+FyCOea+unDernvdj VOlOqXJwitW8X1dfwlMsSj8EMU655I2vMqbedPPrXIKtfqRhg70yyKJJw6rYftSMn7 pbS8NeBIBM8Ug== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E70B5C36004; Thu, 20 Mar 2025 09:42:38 +0000 (UTC) Date: Thu, 20 Mar 2025 17:42:09 +0800 Subject: [PATCH v5 2/3] arm64: dts: amlogic: Add A4 Reset Controller MIME-Version: 1.0 Message-Id: <20250320-a4-a5-reset-v5-2-296f83bf733d@amlogic.com> References: <20250320-a4-a5-reset-v5-0-296f83bf733d@amlogic.com> In-Reply-To: <20250320-a4-a5-reset-v5-0-296f83bf733d@amlogic.com> To: Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Zelong Dong , Kelvin Zhang X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1742463756; l=3871; i=kelvin.zhang@amlogic.com; s=20240329; h=from:subject:message-id; bh=zH5X8psdvMQvBp31WZm+TBpjs/7nrtzcnxMyMa/Bno8=; b=wjbX/xleJxuYs/ldvJ677IkJc8tgumu1s+lZ8LBMmgQsS1ztYmBTZTgMRJKk6GVZXGHq95oQ0 A3rh1k9l1HRB1YigJav6oXwePrLqhA180bLSSAE0i69cAMzaqEtoREF X-Developer-Key: i=kelvin.zhang@amlogic.com; a=ed25519; pk=pgnle7HTNvnNTcOoGejvtTC7BJT30HUNXfMHRRXSylI= X-Endpoint-Received: by B4 Relay for kelvin.zhang@amlogic.com/20240329 with auth_id=148 X-Original-From: Kelvin Zhang X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250320_024240_040126_E1D9B864 X-CRM114-Status: GOOD ( 12.42 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: kelvin.zhang@amlogic.com Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org From: Kelvin Zhang From: Zelong Dong Add the device node and related header file for Amlogic A4 reset controller. Signed-off-by: Zelong Dong Link: https://lore.kernel.org/r/20240918074211.8067-3-zelong.dong@amlogic.com Signed-off-by: Kelvin Zhang Reviewed-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h | 93 ++++++++++++++++++++++++++ arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 8 +++ 2 files changed, 101 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h b/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h new file mode 100644 index 0000000000000000000000000000000000000000..f6a4c90bab3cf7cfaa3c98c522bed5e455b73bd3 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h @@ -0,0 +1,93 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. + */ + +#ifndef __DTS_AMLOGIC_A4_RESET_H +#define __DTS_AMLOGIC_A4_RESET_H + +/* RESET0 */ +/* 0-3 */ +#define RESET_USB 4 +/* 5-6*/ +#define RESET_U2PHY22 7 +#define RESET_USBPHY20 8 +#define RESET_U2PHY21 9 +#define RESET_USB2DRD 10 +#define RESET_U2H 11 +#define RESET_LED_CTRL 12 +/* 13-31 */ + +/* RESET1 */ +#define RESET_AUDIO 32 +#define RESET_AUDIO_VAD 33 +/* 34*/ +#define RESET_DDR_APB 35 +#define RESET_DDR 36 +#define RESET_VOUT_VENC 37 +#define RESET_VOUT 38 +/* 39-47 */ +#define RESET_ETHERNET 48 +/* 49-63 */ + +/* RESET2 */ +#define RESET_DEVICE_MMC_ARB 64 +#define RESET_IRCTRL 65 +/* 66*/ +#define RESET_TS_PLL 67 +/* 68-72*/ +#define RESET_SPICC_0 73 +#define RESET_SPICC_1 74 +/* 75-79*/ +#define RESET_MSR_CLK 80 +/* 81*/ +#define RESET_SAR_ADC 82 +/* 83-87*/ +#define RESET_ACODEC 88 +/* 89-90*/ +#define RESET_WATCHDOG 91 +/* 92-95*/ + +/* RESET3 */ +/* 96-127 */ + +/* RESET4 */ +/* 128-131 */ +#define RESET_PWM_AB 132 +#define RESET_PWM_CD 133 +#define RESET_PWM_EF 134 +#define RESET_PWM_GH 135 +/* 136-137*/ +#define RESET_UART_A 138 +#define RESET_UART_B 139 +/* 140*/ +#define RESET_UART_D 141 +#define RESET_UART_E 142 +/* 143-144*/ +#define RESET_I2C_M_A 145 +#define RESET_I2C_M_B 146 +#define RESET_I2C_M_C 147 +#define RESET_I2C_M_D 148 +/* 149-151*/ +#define RESET_SDEMMC_A 152 +/* 153*/ +#define RESET_SDEMMC_C 154 +/* 155-159*/ + +/* RESET5 */ +/* 160-175*/ +#define RESET_BRG_AO_NIC_SYS 176 +/* 177*/ +#define RESET_BRG_AO_NIC_MAIN 178 +#define RESET_BRG_AO_NIC_AUDIO 179 +/* 180-183*/ +#define RESET_BRG_AO_NIC_ALL 184 +/* 185*/ +#define RESET_BRG_NIC_SDIO 186 +#define RESET_BRG_NIC_EMMC 187 +#define RESET_BRG_NIC_DSU 188 +#define RESET_BRG_NIC_CLK81 189 +#define RESET_BRG_NIC_MAIN 190 +#define RESET_BRG_NIC_ALL 191 + +#endif diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi index fa80fa365f13c4a93f5577f78bf2b3369cb91cb8..6537153b3026af1bf9d1df0a196619b716553cde 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi @@ -4,6 +4,7 @@ */ #include "amlogic-a4-common.dtsi" +#include "amlogic-a4-reset.h" #include #include / { @@ -51,6 +52,13 @@ pwrc: power-controller { }; &apb { + reset: reset-controller@2000 { + compatible = "amlogic,a4-reset", + "amlogic,meson-s4-reset"; + reg = <0x0 0x2000 0x0 0x98>; + #reset-cells = <1>; + }; + gpio_intc: interrupt-controller@4080 { compatible = "amlogic,a4-gpio-intc", "amlogic,meson-gpio-intc"; From patchwork Thu Mar 20 09:42:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kelvin Zhang X-Patchwork-Id: 14023631 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2A7F5C28B30 for ; Thu, 20 Mar 2025 09:46:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Reply-To:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References: Message-Id:MIME-Version:Subject:Date:From:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Thu, 20 Mar 2025 09:42:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742463759; bh=uHsvGO19AHMIRVzlCEkDM6qB8mYIPfAdfm6lSZdF2s4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=jMu0q4KjMfE1n4+cU1vSZ1zObn8i/ZlfQX9zrjUaKfIBe60o3IXDOgP8NKZP5QjkJ 7QypGB5RfRRFEZry37lp/CSqJZ93sd1B6w6SAVBTe7fbJJutIIf9Yx2PTAkuYopPtJ RmmCrOCQn4snkLbIyAG43VVz4E/NdePuejxsvu/YvW7Rm5kk4PpOQOJpOmxyoqJnpr oVfYWOgTzwmusYXfjQQGM3j3DZUGAlyIitgjf4hs7YeLZcCaNMPcW8j8Rfz0WL+y0m 6DplaekW2mG8pjfHDA5iJf9mm7gun8DR/jaS2/InEsOu9B/aMJTWP7kAY2FdiNUY8Y 5F5YLrCRZ5JZg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 034AFC28B30; Thu, 20 Mar 2025 09:42:39 +0000 (UTC) Date: Thu, 20 Mar 2025 17:42:10 +0800 Subject: [PATCH v5 3/3] arm64: dts: amlogic: Add A5 Reset Controller MIME-Version: 1.0 Message-Id: <20250320-a4-a5-reset-v5-3-296f83bf733d@amlogic.com> References: <20250320-a4-a5-reset-v5-0-296f83bf733d@amlogic.com> In-Reply-To: <20250320-a4-a5-reset-v5-0-296f83bf733d@amlogic.com> To: Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Zelong Dong , Kelvin Zhang X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1742463756; l=3982; i=kelvin.zhang@amlogic.com; s=20240329; h=from:subject:message-id; bh=JXUL4gu4EApzIkUMmX2K4k010zPgasAAFt6IuBT4mak=; b=InVtCs+ltwnwgTQL64Pk6vhlxiCdQmNpQl+Mq4tvW3ASrSNCr9BM6w46GSQcD09G4xUJik7Cg QduQlQwmygxAnKDcbQuCVHn4bDuIpuexumyc3Vht+QNVeqZj/K3D5GV X-Developer-Key: i=kelvin.zhang@amlogic.com; a=ed25519; pk=pgnle7HTNvnNTcOoGejvtTC7BJT30HUNXfMHRRXSylI= X-Endpoint-Received: by B4 Relay for kelvin.zhang@amlogic.com/20240329 with auth_id=148 X-Original-From: Kelvin Zhang X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250320_024239_899126_CD9729BC X-CRM114-Status: GOOD ( 12.22 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: kelvin.zhang@amlogic.com Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org From: Kelvin Zhang From: Zelong Dong Add the device node and related header file for Amlogic A5 reset controller. Signed-off-by: Zelong Dong Link: https://lore.kernel.org/r/20240918074211.8067-4-zelong.dong@amlogic.com Signed-off-by: Kelvin Zhang Reviewed-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h | 95 ++++++++++++++++++++++++++ arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 8 +++ 2 files changed, 103 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h b/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h new file mode 100644 index 0000000000000000000000000000000000000000..cdf0f515962097c606e4c53badb19df7d21606ec --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. + */ + +#ifndef __DTS_AMLOGIC_A5_RESET_H +#define __DTS_AMLOGIC_A5_RESET_H + +/* RESET0 */ +/* 0-3 */ +#define RESET_USB 4 +/* 5-7 */ +#define RESET_USBPHY20 8 +/* 9 */ +#define RESET_USB2DRD 10 +/* 11-31 */ + +/* RESET1 */ +#define RESET_AUDIO 32 +#define RESET_AUDIO_VAD 33 +/* 34 */ +#define RESET_DDR_APB 35 +#define RESET_DDR 36 +/* 37-40 */ +#define RESET_DSPA_DEBUG 41 +/* 42 */ +#define RESET_DSPA 43 +/* 44-46 */ +#define RESET_NNA 47 +#define RESET_ETHERNET 48 +/* 49-63 */ + +/* RESET2 */ +#define RESET_ABUS_ARB 64 +#define RESET_IRCTRL 65 +/* 66 */ +#define RESET_TS_PLL 67 +/* 68-72 */ +#define RESET_SPICC_0 73 +#define RESET_SPICC_1 74 +#define RESET_RSA 75 + +/* 76-79 */ +#define RESET_MSR_CLK 80 +#define RESET_SPIFC 81 +#define RESET_SAR_ADC 82 +/* 83-90 */ +#define RESET_WATCHDOG 91 +/* 92-95 */ + +/* RESET3 */ +/* 96-127 */ + +/* RESET4 */ +#define RESET_RTC 128 +/* 129-131 */ +#define RESET_PWM_AB 132 +#define RESET_PWM_CD 133 +#define RESET_PWM_EF 134 +#define RESET_PWM_GH 135 +/* 104-105 */ +#define RESET_UART_A 138 +#define RESET_UART_B 139 +#define RESET_UART_C 140 +#define RESET_UART_D 141 +#define RESET_UART_E 142 +/* 143*/ +#define RESET_I2C_S_A 144 +#define RESET_I2C_M_A 145 +#define RESET_I2C_M_B 146 +#define RESET_I2C_M_C 147 +#define RESET_I2C_M_D 148 +/* 149-151 */ +#define RESET_SDEMMC_A 152 +/* 153 */ +#define RESET_SDEMMC_C 154 +/* 155-159*/ + +/* RESET5 */ +/* 160-175 */ +#define RESET_BRG_AO_NIC_SYS 176 +#define RESET_BRG_AO_NIC_DSPA 177 +#define RESET_BRG_AO_NIC_MAIN 178 +#define RESET_BRG_AO_NIC_AUDIO 179 +/* 180-183 */ +#define RESET_BRG_AO_NIC_ALL 184 +#define RESET_BRG_NIC_NNA 185 +#define RESET_BRG_NIC_SDIO 186 +#define RESET_BRG_NIC_EMMC 187 +#define RESET_BRG_NIC_DSU 188 +#define RESET_BRG_NIC_SYSCLK 189 +#define RESET_BRG_NIC_MAIN 190 +#define RESET_BRG_NIC_ALL 191 + +#endif diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi index 32ed1776891bc7d1befd01a76c76048631606f5a..b1da8cbaa25a1844312a23bc39eb876df3c60df5 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi @@ -4,6 +4,7 @@ */ #include "amlogic-a4-common.dtsi" +#include "amlogic-a5-reset.h" #include / { cpus { @@ -50,6 +51,13 @@ pwrc: power-controller { }; &apb { + reset: reset-controller@2000 { + compatible = "amlogic,a5-reset", + "amlogic,meson-s4-reset"; + reg = <0x0 0x2000 0x0 0x98>; + #reset-cells = <1>; + }; + gpio_intc: interrupt-controller@4080 { compatible = "amlogic,a5-gpio-intc", "amlogic,meson-gpio-intc";