From patchwork Thu Mar 20 21:35:46 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 14024550 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 955C1226D18; Thu, 20 Mar 2025 21:36:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742506572; cv=none; b=gSziWDtygBdhQW3KLM6fEgPsvh0uJO1WERbHY4+fcNEQ+isniGxI+0NRGSrEFuhMFVrwICystmB4un/Qb/COhpvZbuSgVbktCTtxTZi1PHkqh9wmEmlbVeQSNmpPzDBeJ8jksTqqOYvQjngAcGUv1JEbkIT0R4gFVVsdSM7uV+Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742506572; c=relaxed/simple; bh=H8AqflaZrnaY5u5MW00jxZ5DD3lLnvsNFAtE2yVcmKE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GpIWlvMgpQeFBIprlGe/+bYX7KKAQDC/Yh1iTZN9lJymhui56QtjIR9RanTYewrw/wZQHi2RtWzOctIJB61p3HAfJiDnk4UydF1u6cOI1/QEldmgHRdjyHvNwX2y1zuzRJhYnG0F1HKUBhMYyzYoHeRpQ5w63PumyxrLHAJdW9w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KuOyvJIe; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KuOyvJIe" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C95A0C4CEDD; Thu, 20 Mar 2025 21:36:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742506572; bh=H8AqflaZrnaY5u5MW00jxZ5DD3lLnvsNFAtE2yVcmKE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=KuOyvJIeXjkbINKSIgugZBKWFsCE4C3tUmQ29zaH+LxKB7Rto5hkunR8yZCwL9icW 2/gZWuaEerxqT/VWj+LBJxaelle5+W1pcG7w1A3ahxn90BKsMMJ8P1IIwltI1jhgM6 +afuoAGvTO5jnriyyxlqHgs/2GBSZbhLOJ7/g6ydT0oh4vp9GMqTsWS6plXykX6z1G nJd+KNlkEGZZTBeQD2eTjpQfjelOW6mhcJDD5RDi7rOiDcLdVUMuzYwMgeG6/P6/An 4DtB99451+OqaQltkTr97S0N+aZKk3jX45wAsZcHYAbULOboAnKlN7CEjVbIwxgYWb HeU5z+jkz07CQ== From: "Rob Herring (Arm)" Date: Thu, 20 Mar 2025 16:35:46 -0500 Subject: [PATCH 1/3] dt-bindings: mmc: marvell,xenon-sdhci: Allow "dma-coherent" and "iommus" Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250320-dt-marvell-mmc-v1-1-e51002ea0238@kernel.org> References: <20250320-dt-marvell-mmc-v1-0-e51002ea0238@kernel.org> In-Reply-To: <20250320-dt-marvell-mmc-v1-0-e51002ea0238@kernel.org> To: Hu Ziji , Ulf Hansson , Krzysztof Kozlowski , Conor Dooley Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15-dev The Marvell xenon-sdhci block can be cache-coherent and needs the "dma-coherent" property. It can also be behind an IOMMU and needs the "iommus" property. Signed-off-by: Rob Herring (Arm) Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml index 3f48d8292d5b..259f465ea369 100644 --- a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml @@ -52,9 +52,14 @@ properties: - const: core - const: axi + dma-coherent: true + interrupts: maxItems: 1 + iommus: + maxItems: 1 + marvell,pad-type: $ref: /schemas/types.yaml#/definitions/string enum: From patchwork Thu Mar 20 21:35:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 14024551 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9581C22A7FC; Thu, 20 Mar 2025 21:36:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742506573; cv=none; b=XkN066eShC3H+fPVnTjycRZdJ6l6vKtaUS1FzjgZ61hLUAD3pMPIYZMpI+INA4AsBgaeCaQlie7Vj3iGwWTAkB2/2Y9KYJqzTEflVRUfmhkDaDcVfM+XDlPz6F4qbuV5XxSZg3zIZftrYS0ZtX+s8RTtOhrPk14JnvIOQXsnlgo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742506573; c=relaxed/simple; bh=3So0h4DZDusrlIA9LF7epHH3a7pM9TCHj9InISpVgJg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SXNoqpTQDWq01FQRmMXFppWV2JuelE9tGU+r6pRSQznrO/n4uBhOPFjK8iHghCzYFxbNRiUicgjJg/BuMUinJWkCaO5ihccgFfPD+7+uGAEurSR1r0yF8Vd/NRM4yy6MhTAA3jwsOH07a/0EUEQfM1l8ERP8mt0GIg22jTPByWg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=at8RyIye; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="at8RyIye" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3B14AC4CEE3; Thu, 20 Mar 2025 21:36:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742506573; bh=3So0h4DZDusrlIA9LF7epHH3a7pM9TCHj9InISpVgJg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=at8RyIyem5/gHQd2L/Wi4mPINhy2peQhygWJ1kOY5sGpsihd+kHWF91Z0tlJaTrSe EMbyA0dqEZjAebOdryhmnMc8Df97K7okyFPZszazp1T66Kyjno4uNCGrMb1ReXByl8 gDDBQ3I+s/rpf7IFPnBf/eT/yxcPlBJZsG0X8+WRsN/Z7WrE1sGxDUK16950DPAKZx S1ehodqopi0MKTLoTvn9/zziG8FqIq7nZw6bkt/FmI9G9GOMJCiq+OcdC9tedoW6Na aXuQi9chzjzGX0oeF3W4vvlzIf2NRRRua91f6AuKGfHy/LbQ/3c2UvJV1W84QYtowS GiykQ+PtGFXiw== From: "Rob Herring (Arm)" Date: Thu, 20 Mar 2025 16:35:47 -0500 Subject: [PATCH 2/3] dt-bindings: mmc: marvell,xenon-sdhci: Add reference to sdhci-common.yaml Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250320-dt-marvell-mmc-v1-2-e51002ea0238@kernel.org> References: <20250320-dt-marvell-mmc-v1-0-e51002ea0238@kernel.org> In-Reply-To: <20250320-dt-marvell-mmc-v1-0-e51002ea0238@kernel.org> To: Hu Ziji , Ulf Hansson , Krzysztof Kozlowski , Conor Dooley Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15-dev The Marvell xenon-sdhci block is an SDHCI and can use properties from sdhci-common.yaml, so change the reference. Signed-off-by: Rob Herring (Arm) Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml index 259f465ea369..e7df7a2a0331 100644 --- a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml @@ -147,7 +147,7 @@ properties: This property provides the re-tuning counter. allOf: - - $ref: mmc-controller.yaml# + - $ref: sdhci-common.yaml# - if: properties: compatible: From patchwork Thu Mar 20 21:35:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 14024552 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7DEA722AE76; Thu, 20 Mar 2025 21:36:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742506575; cv=none; b=Uy7PJTIOArYJZElR7bHBr9oY/hnZB3aHG+DT8jKdaGVhYoiIabRmfKPuRLgdQa+33Pq3hCJAUDYsOh+mxqoO1/pkKyLWVDHMN2D+0mlw9GvcnO5uR5kU8Yc1UlvUPfNPh0Vjy9OWWN663qNwAOcRqzMEi9/gQJTY5ryGsXG1+VE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742506575; c=relaxed/simple; bh=w7+2idG48iwt6RdM0BdjXyWR2kOyypN3ae3K6dy6cJY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Mm1G7zsY5HUNqjaExkChq9qB2uzlSZy0+bp1lrbTee0cDhjm3NR72VZ8x7+n41+UmiaUwoCs9sVF039+AWWlIt56UeO4axus0MTIbtv6hb06hmIYStu8gsa7pra1eaDIZNYc6pcCBxLDPI6k9TyGm2JHrbzf2cUGgcvENx6HFF0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QEfeDncB; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QEfeDncB" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B07ADC4CEE3; Thu, 20 Mar 2025 21:36:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742506574; bh=w7+2idG48iwt6RdM0BdjXyWR2kOyypN3ae3K6dy6cJY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=QEfeDncBOHJb2l7jM1Bq5CztiODqjtqd9sjuPZb1epRHlO5qa8oHRIfoWGT/JN+WP ReVV4wOeQDY3B1p/RewwHtMHCGj1etQS4o+kSiGME3qi//Ur+j9yjv+RP323HOZAca vrbC6UMzFDoEQU+w5Xyx6A2N3bZ8jimBsWjtFU84e8ZG7XeW+0E+6noGWPwE80ET+S uKw+CxzqB3IBuUlccPqr0gvsdddrraAnldS0+lbf5cF69HADE2piJApdJuhPaTdL5r xJIpuojWzzjXxF2OC/CE3OtFVcQwZCUElRUKJV7U/P38p9/ekB7KG/NsCiaJBBnzLW 7DXCqqFslRlUw== From: "Rob Herring (Arm)" Date: Thu, 20 Mar 2025 16:35:48 -0500 Subject: [PATCH 3/3] dt-bindings: mmc: marvell,xenon-sdhci: Drop requiring 2 clocks Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250320-dt-marvell-mmc-v1-3-e51002ea0238@kernel.org> References: <20250320-dt-marvell-mmc-v1-0-e51002ea0238@kernel.org> In-Reply-To: <20250320-dt-marvell-mmc-v1-0-e51002ea0238@kernel.org> To: Hu Ziji , Ulf Hansson , Krzysztof Kozlowski , Conor Dooley Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15-dev The "axi" clock is optional on at least the "marvell,armada-ap806-sdhci" variant. Not sure what's correct here, so just drop the constraint. Signed-off-by: Rob Herring (Arm) Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/mmc/marvell,xenon-sdhci.yaml | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml index e7df7a2a0331..ee2ddef36369 100644 --- a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml @@ -169,26 +169,6 @@ allOf: marvell,pad-type: false - - if: - properties: - compatible: - contains: - enum: - - marvell,armada-cp110-sdhci - - marvell,armada-ap807-sdhci - - marvell,armada-ap806-sdhci - - then: - properties: - clocks: - minItems: 2 - - clock-names: - items: - - const: core - - const: axi - - required: - compatible - reg