From patchwork Fri Mar 21 20:48:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Heidelberg X-Patchwork-Id: 14026045 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1C57B1D5174; Fri, 21 Mar 2025 20:48:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742590129; cv=none; b=iDDX9V3aDZB3jKl2NwLKH+rq/jLSMyZ1cYUTnDb6YcSGNJOzAfUfwyz6M1HfuRofkktaaGoNXo/EDd+pon2NwtCFMs7A9XD+QxPuEeydm/LJHR4+Ejs/EiVZk4Tlltz95AZanQmm6h+PpT2hYhaepUbYlVC28A8z88FgqZMArjM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742590129; c=relaxed/simple; bh=XaAWivEqloIKFy1TevJCmaZVpsJl5G4NKVfEdzOR/pA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=l+GyhZW+AXStBSUi0cfxB3hYWFW5Maw0GtmOynzysX27Tfmxgs53kF/c3lsalVDB7AMKlWzzb/MDKoyVnpHMHXU8xSPFArBAXgQcpyqBJdqVNP5pbUySMXBH3sTsNmwjlQuX81zHGuYDqi18nCCrgHB7qSYfS+e2mGRV9hsi58M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hQxFUIY9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hQxFUIY9" Received: by smtp.kernel.org (Postfix) with ESMTPS id 9855FC4CEE7; Fri, 21 Mar 2025 20:48:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742590128; bh=XaAWivEqloIKFy1TevJCmaZVpsJl5G4NKVfEdzOR/pA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=hQxFUIY9r2z1UIKFunSMbZUGZeP/YFCXL/jd7nzmnvehwXOJbvgyOB2QhslpmDg7R dtA6rF/THzjgiAiGQypz0PV6oP7LCVYd1YYUCBxooq2dksAEC8AQPznx2o0leNteuz CCmOhGB2bqHBUs0h78cq1MH8KB2h3YnMYJQGQUpusNfrVElcgaX7gyerCwW8I36vpu /jMq3A3ilaLZpncWO4P3wZjiIYMdd5PqVUM6A0jvW3Kln+3hisr2Psvfq8ZJmmXQYX gjxSUEnUOLo+KAy1YJro3i1aSf9QIG9ztnETSOeJiDmUe/fiMY4R13jE5WJeOA4I5G kDW+qXXX1ltpw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 822A3C36008; Fri, 21 Mar 2025 20:48:48 +0000 (UTC) Date: Fri, 21 Mar 2025 21:48:43 +0100 Subject: [PATCH v3 1/7] x86/Kconfig: Enable X86_X2APIC by default and improve help text Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250321-x86_x2apic-v3-1-b0cbaa6fa338@ixit.cz> References: <20250321-x86_x2apic-v3-0-b0cbaa6fa338@ixit.cz> In-Reply-To: <20250321-x86_x2apic-v3-0-b0cbaa6fa338@ixit.cz> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Kees Cook , Jonathan Cameron , Lars-Peter Clausen Cc: linux-kernel@vger.kernel.org, Ingo Molnar , linux-iio@vger.kernel.org, =?utf-8?q?Mateusz_Jo=C5=84czyk?= , David Heidelberg X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4973; i=david@ixit.cz; h=from:subject:message-id; bh=a9HTfOr2lzvGamzwVwClUGQQDyIsU1IE/XeFaMhNH7o=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBn3dCu7PcJ8ZnpTOlCAfTY2brG3A6Z8ExtyTrA2 nUT0mvsrnqJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCZ93QrgAKCRBgAj/E00kg cqFbEACnBDsRY6QVE/dtZrOklQ1NSlLF0Rcyb7OwtbthuMy8lznPBITETuxak868zdMEBKmiXJy iZTqKiki0fPSyh635Xdogfhq0mi6YU9bBCAEKg2gzXxILjQIKwexqQfMY9mmJ1jKYlMYlvofd2b 4nzgWCeQie6jB/z5Htkwvq4V6REAuMoPPaKHCEJox+Gr15Ejt4TCNdeaExi+df4WRLsrjr2gc3/ Et73cD4ckPRYykEOGCuTnLSC1BorIxPHUe327gQiJnH4XALg9OcDu8LUAPSe5qhJdyypZYYQuwE I3g8rMrUJLGGVH7Sr0fLdQWaenF5ZZnEUUc9/FKcHHBaVjHULb6sxTu2ktKNQUL/9WUBbBXeM1H Qv7wBsJhMxRhVGiFFy+aJ4dNX23GFnt26MJVftitD5YCXAOPVcRB72SC/OZbQtIYpbBP3GlyvPO xWdjyHdbuXG5ZNccSvcF5wPZwqg31fHGuBbGicNnxcdSYmRAATE+D66dqctRvTUEmWiT5s6C+Hn kpQD1kg4CNt6NLMgD+OsFqjktOUo8Yyfa8UHlFCJJEEIDA4V7St/TsGZ+7Zb0E5V7u63HlZ7KrV FsJAoLImX0wlK8oqMHvS8D2QlqQF0rfND3+3fG2DCtNGW8gGtMAOGKoeASQVxCcYOO2cZL7qvDQ FWMp9HRiJ66sDIQ== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg From: Mateusz Jończyk As many current platforms (most modern Intel CPUs and QEMU) have x2APIC present, enable CONFIG_X86_X2APIC by default as it gives performance and functionality benefits. Additionally, if the BIOS has already switched APIC to x2APIC mode, but CONFIG_X86_X2APIC is disabled, the kernel will panic in arch/x86/kernel/apic/apic.c . Also improve the help text, which was confusing and really did not describe what the feature is about. Help text references and discussion: Both Intel [1] and AMD [3] spell the name as "x2APIC", not "x2apic". "It allows faster access to the local APIC" [2], chapter 2.1, page 15: "More efficient MSR interface to access APIC registers." "x2APIC was introduced in Intel CPUs around 2008": I was unable to find specific information which Intel CPUs support x2APIC. Wikipedia claims it was "introduced with the Nehalem microarchitecture in November 2008", but I was not able to confirm this independently. At least some Nehalem CPUs do not support x2APIC [1]. The documentation [2] is dated June 2008. Linux kernel also introduced x2APIC support in 2008, so the year seems to be right. "and in AMD EPYC CPUs in 2019": [3], page 15: "AMD introduced an x2APIC in our EPYC 7002 Series processors for the first time." "It is also frequently emulated in virtual machines, even when the host CPU does not support it." [1] "If this configuration option is disabled, the kernel will not boot on some platforms that have x2APIC enabled." According to some BIOS documentation [4], the x2APIC may be "disabled", "enabled", or "force enabled" on this system. I think that "enabled" means "made available to the operating system, but not already turned on" and "force enabled" means "already switched to x2APIC mode when the OS boots". Only in the latter mode a kernel without CONFIG_X86_X2APIC will panic in validate_x2apic() in arch/x86/kernel/apic/apic.c . QEMU 4.2.1 and my Intel HP laptop (bought in 2019) use the "enabled" mode and the kernel does not panic. [1] "Re: [Qemu-devel] [Question] why x2apic's set by default without host sup" https://lists.gnu.org/archive/html/qemu-devel/2013-07/msg03527.html [2] Intel® 64 Architecture x2APIC Specification, ( https://www.naic.edu/~phil/software/intel/318148.pdf ) [3] Workload Tuning Guide for AMD EPYC ™ 7002 Series Processor Based Servers Application Note, https://developer.amd.com/wp-content/resources/56745_0.80.pdf [4] UEFI System Utilities and Shell Command Mobile Help for HPE ProLiant Gen10, ProLiant Gen10 Plus Servers and HPE Synergy: Enabling or disabling Processor x2APIC Support https://techlibrary.hpe.com/docs/iss/proliant-gen10-uefi/s_enable_disable_x2APIC_support.html Signed-off-by: Mateusz Jończyk --- arch/x86/Kconfig | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5924c753097b0030fddeba246c72ff8b86e6c8ae..10f48afd67f6fd7d250f2effddcc5bc927b057af 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -462,20 +462,27 @@ config SMP If you don't know what to do here, say N. config X86_X2APIC - bool "Support x2apic" + bool "x2APIC interrupt controller architecture support" depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST) + default y help - This enables x2apic support on CPUs that have this feature. + x2APIC is an interrupt controller architecture, a component of which + (the local APIC) is present in the CPU. It allows faster access to + the local APIC and supports a larger number of CPUs in the system + than the predecessors. - This allows 32-bit apic IDs (so it can support very large systems), - and accesses the local apic via MSRs not via mmio. + x2APIC was introduced in Intel CPUs around 2008 and in AMD EPYC CPUs + in 2019, but it can be disabled by the BIOS. It is also frequently + emulated in virtual machines, even when the host CPU does not support + it. Support in the CPU can be checked by executing + cat /proc/cpuinfo | grep x2apic - Some Intel systems circa 2022 and later are locked into x2APIC mode - and can not fall back to the legacy APIC modes if SGX or TDX are - enabled in the BIOS. They will boot with very reduced functionality - without enabling this option. + If this configuration option is disabled, the kernel will not boot on + some platforms that have x2APIC enabled. - If you don't know what to do here, say N. + Say N if you know that your platform does not have x2APIC. + + Otherwise, say Y. config X86_POSTED_MSI bool "Enable MSI and MSI-x delivery by posted interrupts" From patchwork Fri Mar 21 20:48:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Heidelberg X-Patchwork-Id: 14026048 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 295C91E1C02; Fri, 21 Mar 2025 20:48:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742590129; cv=none; b=UmhNH9JtXsrcEadR2PEUjhCvh5RMk/gO+rqUSKwCoo1+XPI9b8jS8Vh+lo1pDPc2LmDKEe+/ywOCZMz8CmGCqF9qNaG8TPBMZh2hCzSk/wmuxWsODLhlBx99iCrxDdSrS1IRXEoIVJl9Vh+d1hNzIIelsMMmZMkK3/PACsu9/OY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742590129; c=relaxed/simple; bh=wybEI1jw76pvEX0By2A0+Zjf8Iv/OqOrlgu9WLh81Qs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pT9qp+p46YAwUCdN9xIhjq0sc6fNNJE9LLy+oASvtIY5FuNVf/5GwTz9OvQotbrIyniWoVUz/5QTvCEBNtwbl+3ORWhyYIfADRSuiAHAhjH5NoRmj2fnXmrTR9RrTvihqSBAdym3PC6k2+9No9ZcT5qiKfSVhCqmBvxsYVE+Ls0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=U5p+C3Zd; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="U5p+C3Zd" Received: by smtp.kernel.org (Postfix) with ESMTPS id A6746C4CEEA; Fri, 21 Mar 2025 20:48:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742590128; bh=wybEI1jw76pvEX0By2A0+Zjf8Iv/OqOrlgu9WLh81Qs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=U5p+C3ZdB3oZW9uIErHbnboDFCz85ZqM4YB1fLNKJbQXfMZEHuq9YLL+c8Zw92yOb oDGuV/Ip2E44uqkL5nrJ2XP6U+vnDiQZZtATJ/eCHAwtEZkC/c53mmf8ZCUxPo7d6/ qRdSvfKPwv54eQykyABzYvpQOUQ0tRMmBo0yavNrAlPiL1/At/0gXvwgHpflYkpsIG FQw5pHiT8L8JzrQJgajU+CmxcJEzfWaoaM8dpzgbdSP/fLuMxYeovAua/G1zuPM6lx maVouDdB08rHbjBCFXTaTCDtJjcrVM5iyI+5VW5Ru5Y2oR20j4JFXHYeQkJHz8AiFc IkQb80GsA1T7w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90684C3600A; Fri, 21 Mar 2025 20:48:48 +0000 (UTC) Date: Fri, 21 Mar 2025 21:48:44 +0100 Subject: [PATCH v3 2/7] x86/Kconfig: Always enable ARCH_SPARSEMEM_ENABLE Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250321-x86_x2apic-v3-2-b0cbaa6fa338@ixit.cz> References: <20250321-x86_x2apic-v3-0-b0cbaa6fa338@ixit.cz> In-Reply-To: <20250321-x86_x2apic-v3-0-b0cbaa6fa338@ixit.cz> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Kees Cook , Jonathan Cameron , Lars-Peter Clausen Cc: linux-kernel@vger.kernel.org, Ingo Molnar , linux-iio@vger.kernel.org, =?utf-8?q?Mateusz_Jo=C5=84czyk?= , David Heidelberg X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=883; i=david@ixit.cz; h=from:subject:message-id; bh=gBFoQ/Mwva6BqlKESKTHfSvabeRcf/AwbnhAOXp5CGU=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBn3dCuQb2kZ5vosmfdS0lmBu5xbidcEqsWd0qx7 sBiVrjtvOGJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCZ93QrgAKCRBgAj/E00kg chphD/sHnhrT5lKYoLP1lD5ks8ntjQlQanb00MDQ4O0VvLzDzi/DYI2S/89wQ8+sBhbXMMEfR51 NoSxZHNG5b5nAyB/ymHNaVE0arQrMCTaHpLN5pr9fwe95aaVleN0Swf1F8cMMdp5H7uG5PzK1f9 DUToZE003eHrY8komQjf3QqG0+4dizLp03NN4vdnhvjAfS6nxDy8j8RIUtJNBgYcOHoxeGbhcX/ YOedr5LyGP8pgbA3lOQD3MdkTgIcwaSaTCmYL8gFmcy3sx257BpZ+i3PI6459s/+T3v2f8oh3yI yYqrxfJVK7weNw2aJFou/QgkHlVCHKEZ7AYLyMtp7jR1bYqTSDfqNZa+3jHn2mXxuL5jjV82o+d IpyKUM8lxnUQuN32b4PP3U+q+bgVS+KJZrID0yqbtYSWGUVonro+HSHHH36xyCn7xPHr+ticYIl PXkA1vF/wwZROSQpfcCVrk/vRtP5h3Q0g4jPPI+MhJjkFypazP5bbWR7i3yh5k5vhwJIQUYlDwD rI9sbKW0F6wWB/DRnIT30i6DGJ+ILcQ5hVx+i0w8E2j1uJGSMeXZBFX8dDp77L67DQC1RcTCbe0 QQ0avnaCqdOMXFQIjGUGzrutuMamFWwoW3bBRGH6BvCNWj2a79NOcBg+E0iY3Il9knjywrhtl0y b1tT0OtiRkJcQTg== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg From: Mateusz Jończyk It appears that (X86_64 || X86_32) is always true on x86. This logical OR directive was introduced in commit 6ea3038648da ("arch/x86: remove depends on CONFIG_EXPERIMENTAL") probably by a trivial mistake. Fixes: 6ea3038648da ("arch/x86: remove depends on CONFIG_EXPERIMENTAL") Signed-off-by: Mateusz Jończyk Signed-off-by: David Heideberg --- arch/x86/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 10f48afd67f6fd7d250f2effddcc5bc927b057af..38a915f739af45f1b23a197032ce6cff94fdd81d 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1574,7 +1574,6 @@ config ARCH_FLATMEM_ENABLE config ARCH_SPARSEMEM_ENABLE def_bool y - depends on X86_64 || NUMA || X86_32 select SPARSEMEM_STATIC if X86_32 select SPARSEMEM_VMEMMAP_ENABLE if X86_64 From patchwork Fri Mar 21 20:48:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Heidelberg X-Patchwork-Id: 14026047 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 295761D5CFD; Fri, 21 Mar 2025 20:48:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742590129; cv=none; b=CTXBE7jbUDicRhAgI2/u/3/+cRap0v6vZcVyFL585K90ZioKY0364jk6N8nt2Bhv4+pt0clPtv+E9Mk6H0wJ3HlFtljcp8AvvfhYJ4Cp/WtHH2j9ETbG6nZE6/LThB6DNo/ZMjurP8KaTAGdpdudkzA/nqavlPDsN88cK9meghc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742590129; c=relaxed/simple; bh=Sa9bRM4riV9NIaLnG6db+zNr9/vUREUEszuIWeMOixA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qlyltpqXsxUFSnOTSRAiXD9qmBZfA8MIc6/Zr5Rpxsu5TtEIiDlMrj9/H6IVk4Fv+GnUgvYkEPCkCJL/iMWe8kp5AE6a0F2YiJmwpNnCmquiyPekpZcrSD5JEtbH6nhMlu7wNEKKqQFV11QN4aPBHFaifkkUBhcoY1tihQIeSsc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=olQGewil; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="olQGewil" Received: by smtp.kernel.org (Postfix) with ESMTPS id AEDDBC4CEEC; Fri, 21 Mar 2025 20:48:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742590128; bh=Sa9bRM4riV9NIaLnG6db+zNr9/vUREUEszuIWeMOixA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=olQGewilN6VqYzDzjZNc9IPHee6kd4o+t3L5qvJI/03SdtuTNA+hVYGCIIIlOczDP mvIzW0I7wMN3rthji9pbNl/y6TEKQ3Clqw+fyQq82Ku0F9R5UHW7/iFQmuMOJifKPj YDuNZ5pJhpMSWAE8xlqCq9VUJTum+SGu93ac/R2KOtnwu0kScu6Iye8VQeol3z9ri8 ptlRbcnZMcgUZzW6jfUsHYa/vo4jy3YMU5a8eq9PF5iI2NsBDVDLmd3jeGBpjTK0et ThU+XvVWnHv3fv1NQIeKd1e/NKnjVUAMNty2XICZPkKrMPxjJfmYJRBqTxdaCLY8Ft t68wkJpAN1b8g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0386C36007; Fri, 21 Mar 2025 20:48:48 +0000 (UTC) Date: Fri, 21 Mar 2025 21:48:45 +0100 Subject: [PATCH v3 3/7] x86/Kconfig: Move all X86_EXTENDED_PLATFORM options together Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250321-x86_x2apic-v3-3-b0cbaa6fa338@ixit.cz> References: <20250321-x86_x2apic-v3-0-b0cbaa6fa338@ixit.cz> In-Reply-To: <20250321-x86_x2apic-v3-0-b0cbaa6fa338@ixit.cz> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. 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a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg From: Mateusz Jończyk so that these options will be displayed together in menuconfig etc. Signed-off-by: Mateusz Jończyk Signed-off-by: David Heidelberg --- arch/x86/Kconfig | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 38a915f739af45f1b23a197032ce6cff94fdd81d..9e5dea7c9fd7aeceb727f4c372c8880c9182f7f2 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -676,6 +676,17 @@ config X86_INTEL_QUARK Say Y here if you have a Quark based system such as the Arduino compatible Intel Galileo. +config X86_RDC321X + bool "RDC R-321x SoC" + depends on X86_32 + depends on X86_EXTENDED_PLATFORM + select M486 + select X86_REBOOTFIXUPS + help + This option is needed for RDC R-321x system-on-chip, also known + as R-8610-(G). + If you don't have one of these chips, you should say N here. + config X86_INTEL_LPSS bool "Intel Low Power Subsystem Support" depends on X86 && ACPI && PCI @@ -729,17 +740,6 @@ config IOSF_MBI_DEBUG If you don't require the option or are in doubt, say N. -config X86_RDC321X - bool "RDC R-321x SoC" - depends on X86_32 - depends on X86_EXTENDED_PLATFORM - select M486 - select X86_REBOOTFIXUPS - help - This option is needed for RDC R-321x system-on-chip, also known - as R-8610-(G). - If you don't have one of these chips, you should say N here. - config X86_SUPPORTS_MEMORY_FAILURE def_bool y # MCE code calls memory_failure(): From patchwork Fri Mar 21 20:48:46 2025 Content-Type: text/plain; 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Fri, 21 Mar 2025 20:48:48 +0000 (UTC) Date: Fri, 21 Mar 2025 21:48:46 +0100 Subject: [PATCH v3 4/7] x86/Kconfig: Update lists in X86_EXTENDED_PLATFORM Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250321-x86_x2apic-v3-4-b0cbaa6fa338@ixit.cz> References: <20250321-x86_x2apic-v3-0-b0cbaa6fa338@ixit.cz> In-Reply-To: <20250321-x86_x2apic-v3-0-b0cbaa6fa338@ixit.cz> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Kees Cook , Jonathan Cameron , Lars-Peter Clausen Cc: linux-kernel@vger.kernel.org, Ingo Molnar , linux-iio@vger.kernel.org, =?utf-8?q?Mateusz_Jo=C5=84czyk?= , David Heidelberg X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1648; i=david@ixit.cz; h=from:subject:message-id; bh=nrv4SmvAYUhUrihtUik+drIq1LZYFKFcyzZRBUmd5Mg=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBn3dCuv8nW+5F3N0iGdtqB1flVbmyxDXJkJe+1d b1JkzGYJ5iJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCZ93QrgAKCRBgAj/E00kg cjmBD/9pkiNdGCnuFiEQy9B8w/zs2Z3SLBwiQar0/WUwmysqq7Wrj3muZ2PaDEg7wygLs8/Vhe3 1n0RnQcnfEbhi17CKmvoJhi7ItXZUUojjbSqXUGDkQ/BADCofv3tRwD+hmNqUYF+E+P5A2fXmy+ 3C5veQBJavPWtnkGQqbCk1ECq9Zg5bZeTntXH0g+zJbcPzqbtK7WHOe7aUyVpHv7gtbyst5rGWS VQx7qekMLZFi7BHz5dsoBy/jB1aAR2xsybYA6bKxB3Be0H5Pw5lM7QQED2mGtYY9El5+7eD/cjF RwGPFUvpQ6hxSRHx99+Y4U/ptgI7gCNzVa18Qc0L/MujhYDHWepBcPjdnk3dawDiLYf/Ao39chV 3MPPNfZ6HZ5KF/nub8CwmMFTRw3xEb14D9AhW6JAG783ucVCDof3M/Hv1uQQMpXv2bXyEbDMOpR tKUB4NVKu9RUzQ3kOcD12OzFazIRj9xvvddC+4XSNZn4GO8G7wrtHMueoVGK54pV/Cr9zS/pLuc 8ype6q0gl6f1R9unza+JI/31sKUcPs2L7xkuQYw8j+J4xUCOfxy6yRxzAH8XHEoKyFoMmpaXVUz mPM1dJIUWQNS4zba90WYUEBnjbxtMFuFY9C1EVxVMmDx4Swa836lWpiPGoFtMnAD9sGFM95J9Zo +LSdC4bJZZWyL1A== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg From: Mateusz Jończyk The order of the entries matches the order they appear in Kconfig. In 2011, AMD Elan was moved to Kconfig.cpu and the dependency on X86_EXTENDED_PLATFORM was dropped in commit ce9c99af8d4b ("x86, cpu: Move AMD Elan Kconfig under "Processor family"") Support for Moorestown MID devices was removed in 2012 in commit 1a8359e411eb ("x86/mid: Remove Intel Moorestown") SGI 320/540 (Visual Workstation) was removed in 2014 in commit c5f9ee3d665a ("x86, platforms: Remove SGI Visual Workstation") Signed-off-by: Mateusz Jończyk Signed-off-by: David Heideberg --- arch/x86/Kconfig | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 9e5dea7c9fd7aeceb727f4c372c8880c9182f7f2..fbc9ba30fd1cbfb574399a0632b9f77876ba84a8 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -553,16 +553,20 @@ config X86_EXTENDED_PLATFORM CONFIG_64BIT. 32-bit platforms (CONFIG_64BIT=n): - Goldfish (Android emulator) - AMD Elan + Goldfish (mostly Android emulator) + Intel CE media processor (CE4100) SoC + Intel MID (Mobile Internet Device) + Intel Quark RDC R-321x SoC - SGI 320/540 (Visual Workstation) + STA2X11-based (e.g. Northville) 64-bit platforms (CONFIG_64BIT=y): Numascale NumaChip ScaleMP vSMP SGI Ultraviolet Merrifield/Moorefield MID devices + Goldfish (mostly Android emulator) + Intel MID (Mobile Internet Device) If you have one of these systems, or if you want to build a generic distribution kernel, say Y here - otherwise say N. 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Peter Anvin" , Kees Cook , Jonathan Cameron , Lars-Peter Clausen Cc: linux-kernel@vger.kernel.org, Ingo Molnar , linux-iio@vger.kernel.org, =?utf-8?q?Mateusz_Jo=C5=84czyk?= , David Heidelberg X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1354; i=david@ixit.cz; h=from:subject:message-id; bh=Wk/lNByjM8U8pBa5Ev4LNdWk6Mu/MLaTMuM+X8ijgiU=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBn3dCur5z5xbIM6Vj2mqrfW1IC8Kk112jMSEJlL 9REVC+he/GJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCZ93QrgAKCRBgAj/E00kg ckQDD/0cjn/rv15TNepea/LN5OSmUsvz1KkEO9p5surgD2M2+pPeUuTu1SnmFBRzdrRXetOJqzs oK3IntTPEq2ZDf3ynxV2H6fXjfdPr1cvb6gsO8HP8mpYuCUEI10uti8a0iv+p0jEwh2zzJhtTZ8 HZS3067Oz7z5bcK0McMBBG+nLkdeGg5rwCIs8e7U1LuRsH0bDa0BXp9rA6KKK+3kuizFBEETtKO iH0db+yFwbiEd3WJS+rWVxcDyJcpvVa+/ajd1gPVMvgjdDK9Yb2K8okUUtHyTaJVvbmy+9mLvaC wP3f4fLL5zXak2gfan0T53XSognvmXLcWRipLFEx4aaaCa+Ysex7X+Y4Sr1OiNDfQqj0ld/kE3F nhjnaQspSzAwh5CKXt/iEn4KBjjaVP+QwQb18+5NsN9oqVM8NTuZxTLuzGool4FfaOnV+1iP8DQ MSBxeKoE5DuHoo+QnixKx7LMFGpfT5Qbf4Z9728hheIDMxyhpp3sfc6U//+YMdJbxsNh1Hl9Ngi 7do8AgglsB43/B+MsBoM5n0We9uG5WEZV20YdXpjakMurLwAhNIbtJV0nqgzUxWHyknyFIAuAX3 v81gCuR1ekowhRbgkccgsJYVsAh3m2MA3GxW1bt0yYGAQubmRZbKWrnXwaM3Kglbra/ArZRhqY3 dOW1rxWrzMruKxw== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg From: Mateusz Jończyk This configuration option had no help text, so add it. CONFIG_EXPERT is enabled on some distribution kernels, so people using a distribution kernel's configuration as a starting point will see this option. Signed-off-by: Mateusz Jończyk Signed-off-by: David Heideberg --- arch/x86/Kconfig | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index fbc9ba30fd1cbfb574399a0632b9f77876ba84a8..64a1e00619df95f559488e3004558a7b0f653df3 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2914,6 +2914,19 @@ config PCI_MMCONFIG default y depends on PCI && (ACPI || JAILHOUSE_GUEST) depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG) + help + Add support for accessing the PCI configuration space as a memory + mapped area. It is the recommended method if the system supports + this (it must have PCI Express and ACPI for it to be available). + + In the unlikely case that enabling this configuration option causes + problems, the mechanism can be switched off with the 'pci=nommconf' + command line parameter. + + Say 'n' only if you are sure that your platform does not support this + access method or you have problems caused by it. + + Say 'y' otherwise. config PCI_OLPC def_bool y From patchwork Fri Mar 21 20:48:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Heidelberg X-Patchwork-Id: 14026052 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71157230BEB; Fri, 21 Mar 2025 20:48:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742590129; cv=none; b=Mwl5v744Aymvo6R+2ULDJXLmDMjDyywJaCU8n0//EmOxgZ3mQTFo5K4L00q9gT+DotfE6Kkn4qxoOx6iNcwPs5fdZhDfkMxwfNp8N8+jYjr9yjK79Zkkyb6rUJJQdRBm+Eupgo3HmHQDEJsi3BdPSyJmmzI6AEoq19K7AZ1oYFQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742590129; c=relaxed/simple; bh=LAyx8CMvL7ihWgO7vFrzkDYXJm8WnGG71CRYQOialKs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mWRQkKbqEP1vhEpKdjZOU0vr1K1Dr6oARg/0f37ZlkwmsicJ1LfX/v2IFnCVFqQ7AbYdSyE/dtvAarjEC06E8ChewdvNARoZzv6mYfRVXNrOhN08PerTsbr3mhdmv05nwyC19jMA6xUJeNsUSFLdPl8bTqgkPx+WwQWof6+M3As= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lz+btJVY; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lz+btJVY" Received: by smtp.kernel.org (Postfix) with ESMTPS id E1F7EC4CEFD; Fri, 21 Mar 2025 20:48:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742590128; bh=LAyx8CMvL7ihWgO7vFrzkDYXJm8WnGG71CRYQOialKs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=lz+btJVYTrKPdMiGVEg6cYyxI/Y2AiO9XOaE/37CO+R6Oh8geSQal/VFbt7f314bE ZbuYsYDWtOyNRRiMW0ZdQeu3EjxUfadNad3gG5jgMpvkf9rSTXRsIjJSW3EVtRvhVq s555iJtRPJLJSzTyRtl0x9cfQfZGH8wZE/r59BP1UMQxKf3CnhTOepw+rgyQvMm+z0 drV7qIQf5XuZRJ6gTuhtborCvUko6wlEdmyFYzILnzKbco8z7adOivJtq8YnD5S6SK iRmMSvaNAUp5fzBE8ZSXJuAedzIQO0siYlOd3r6fn1yLQVTZPsfdktPYOSimOB0iAC evD1zcA6WkcJg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id D910EC36002; Fri, 21 Mar 2025 20:48:48 +0000 (UTC) Date: Fri, 21 Mar 2025 21:48:48 +0100 Subject: [PATCH v3 6/7] x86/Kconfig: Make CONFIG_PCI_CNB20LE_QUIRK depend on X86_32 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250321-x86_x2apic-v3-6-b0cbaa6fa338@ixit.cz> References: <20250321-x86_x2apic-v3-0-b0cbaa6fa338@ixit.cz> In-Reply-To: <20250321-x86_x2apic-v3-0-b0cbaa6fa338@ixit.cz> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Kees Cook , Jonathan Cameron , Lars-Peter Clausen Cc: linux-kernel@vger.kernel.org, Ingo Molnar , linux-iio@vger.kernel.org, =?utf-8?q?Mateusz_Jo=C5=84czyk?= , David Heidelberg X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3223; i=david@ixit.cz; h=from:subject:message-id; bh=7AuR1hNQHR8/gFLUhnVuBp1tH25Vf1c/ieb+mgzxiH8=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBn3dCuOaoPF9BmpnMsvQu8AmMCME/A9yE3QcM0C E1IkN2uCHCJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCZ93QrgAKCRBgAj/E00kg ckixD/wP8wbyrw8fWmN/lzMqlM0vYxDzeVQOx1bZ1UW4lf4vSSlEPKGJoGXnJ7Ei15xSL4r3WUa Rt20q8NuZQL4l0QQomrMF94Hc8njhRoiGO7D7frk5IUr8GjpdTQ8BgYUt+qYbrhtPkBVb9haPIY ipsw/lP/URrsMGZNEQ5HRx5OeagcjdJTcmDMq26Pr9kS4UheOP6uEVO819z+R0bJXBG3gC3t/8j 4t8mbnSWSOlVodYj89602r4drjja40oO0pPb/7WUK+d01wTSe2mYUp1oBtIwuD3hnBsVnVpIKUM eJwKw5RUN/elMQNTtcu5hntoeaDSeGnme2tasCUbJd3gXAAl0g1Bqwxr/TjpaHPNIo1vyreDR2V Jor4zgnATt7GoiF649PjgPTwPq+Gg/BfPO0QFnXKaexmfMEVgnwFOwt+wRUEHeUH0JUNqWKoJxs Zko/QLuD7MJl/rMgyg1an3/y0vkbTEW9FucJffQVpP91675jWVAQwe46NGc5GvI3dAtrMHe6n89 ukCpUTEEB9DNE4ggHLETDpTA2iObNBkBJfTimC3hbNYzD525wYcVhu2R3anT4jFqDQM9moIOOA8 dUEHrVGDl0YLybY4NZCems32TAH3NIXDc3lhDr+0L3jHDdCbPdji1pjhdmz9PKVD73FS9EseSSE d8rK2w/7xkUwOjQ== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg From: Mateusz Jończyk I was unable to find a good description of the ServerWorks CNB20LE chipset. However, it was probably exclusively used with the Pentium III processor (this CPU model was used in all references to it that I found where the CPU model was provided: dmesgs in [1] and [2]; [3] page 2; [4]-[7]). As is widely known, the Pentium III processor did not support the 64-bit mode, support for which was introduced by Intel a couple of years later. So it is safe to assume that no systems with the CNB20LE chipset have amd64 and the CONFIG_PCI_CNB20LE_QUIRK may now depend on X86_32. Additionally, I have determined that most computers with the CNB20LE chipset did have ACPI support and this driver was inactive on them. I have submitted a patch to remove this driver, but it was met with resistance [8]. [1] Jim Studt, Re: Problem with ServerWorks CNB20LE and lost interrupts Linux Kernel Mailing List, https://lkml.org/lkml/2002/1/11/111 [2] RedHat Bug 665109 - e100 problems on old Compaq Proliant DL320 https://bugzilla.redhat.com/show_bug.cgi?id=665109 [3] R. Hughes-Jones, S. Dallison, G. Fairey, Performance Measurements on Gigabit Ethernet NICs and Server Quality Motherboards, http://datatag.web.cern.ch/papers/pfldnet2003-rhj.doc [4] "Hardware for Linux", Probe #d6b5151873 of Intel STL2-bd A28808-302 Desktop Computer (STL2) https://linux-hardware.org/?probe=d6b5151873 [5] "Hardware for Linux", Probe #0b5d843f10 of Compaq ProLiant DL380 https://linux-hardware.org/?probe=0b5d843f10 [6] Ubuntu Forums, Dell Poweredge 2400 - Adaptec SCSI Bus AIC-7880 https://ubuntuforums.org/showthread.php?t=1689552 [7] Ira W. Snyder, "BISECTED: 2.6.35 (and -git) fail to boot: APIC problems" https://lkml.org/lkml/2010/8/13/220 [8] Bjorn Helgaas, "Re: [PATCH] x86/pci: drop ServerWorks / Broadcom CNB20LE PCI host bridge driver" https://lore.kernel.org/lkml/20220318165535.GA840063@bhelgaas/T/ Signed-off-by: Mateusz Jończyk Signed-off-by: David Heideberg --- arch/x86/Kconfig | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 64a1e00619df95f559488e3004558a7b0f653df3..ba6ba3a7011554d9cb58fb0acf48d541da8ed69b 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2941,13 +2941,21 @@ config MMCONF_FAM10H depends on X86_64 && PCI_MMCONFIG && ACPI config PCI_CNB20LE_QUIRK - bool "Read CNB20LE Host Bridge Windows" if EXPERT - depends on PCI + bool "Read PCI host bridge windows from the CNB20LE chipset" if EXPERT + depends on X86_32 && PCI help Read the PCI windows out of the CNB20LE host bridge. This allows PCI hotplug to work on systems with the CNB20LE chipset which do not have ACPI. + The ServerWorks (later Broadcom) CNB20LE was a chipset designed + most probably only for Pentium III. + + To find out if you have such a chipset, search for a PCI device with + 1166:0009 PCI IDs, for example by executing + lspci -nn | grep '1166:0009' + The code is inactive if there is none. + There's no public spec for this chipset, and this functionality is known to be incomplete. From patchwork Fri Mar 21 20:48:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Heidelberg X-Patchwork-Id: 14026051 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F8BF230BE9; Fri, 21 Mar 2025 20:48:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742590129; cv=none; b=isjZNztWQbuY/jupwOhHfLBFSuCIYykMU9/CM9GrI7rB8zQBUu00B1Sb/nvVcwYBTeT0d0ex99DVVKKY76m5n+h4ngsJxTEFmRUTnHDD+6NqUsRdaZu42wLrhBJ+GwA54Wa74CkbFwCf87Sy0+G6OuQGZhyo7kylRd/pdqm0Rl4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742590129; c=relaxed/simple; bh=NYRafMSdGbGHF2wgz3nyBIvLnZNYTCdkh/71MBOgJdk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gyAcTYihcbjfLcYXFEItzm69JPSXfZrN2dOKOkeFhHRe1wLjoIlKLD/HACPFYEA1pZHm8uJ2SL7ucXlS0TqNVlVr8WfXxsXDkX2h3VClFF7jrMiWftcJ5Wx0+d+HnsYL49v/OLofvsKWW9hKNQM9KFEh5idXhoxylZKB/WNJg0M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=L9JppLeC; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="L9JppLeC" Received: by smtp.kernel.org (Postfix) with ESMTPS id F2D4AC4CEF2; Fri, 21 Mar 2025 20:48:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742590129; bh=NYRafMSdGbGHF2wgz3nyBIvLnZNYTCdkh/71MBOgJdk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=L9JppLeCto8aRVKMPYoHs8Qx+CA1cbOP/TG8skcBiOLmeLv/9Ix+8wFxwoLCEQNSL ogq4gfqU5W1k7uwthBjbicjlwltUVpSlkT4BpWKOdzJjyTJQcBDd5j9BEvA7Sn+n28 c0l1mnsoRO4297q6D3pb9qHdZzd8cUbrLVzCWcng2eh+nEl+5dXkXJ3GXlQp63t0mU H8/4E8YkQcWy3XclPOqs3JcHlbnCWXwEw16VduLRwn3SnotVEwAgJi9uL2PBSxj83i ja5pU85Kpldv29rS9KkLEs9SaWHM5QWO0IjTJz1DERAYZaMSa+jkmytH9+cKkyP8qN inrFVw+PcKy7A== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA65BC3600A; Fri, 21 Mar 2025 20:48:48 +0000 (UTC) Date: Fri, 21 Mar 2025 21:48:49 +0100 Subject: [PATCH v3 7/7] x86/Kconfig: Document release year of glibc 2.3.3 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250321-x86_x2apic-v3-7-b0cbaa6fa338@ixit.cz> References: <20250321-x86_x2apic-v3-0-b0cbaa6fa338@ixit.cz> In-Reply-To: <20250321-x86_x2apic-v3-0-b0cbaa6fa338@ixit.cz> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Kees Cook , Jonathan Cameron , Lars-Peter Clausen Cc: linux-kernel@vger.kernel.org, Ingo Molnar , linux-iio@vger.kernel.org, =?utf-8?q?Mateusz_Jo=C5=84czyk?= , David Heidelberg X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=813; i=david@ixit.cz; h=from:subject:message-id; bh=9OvHfX7hjKPWyoFcg1JfBC1j93k9cRQ1pVfK3nHdJAs=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBn3dCui3quEeZQO7ntSazprt9cEZVgq81Us4dJa OTGelM2MDKJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCZ93QrgAKCRBgAj/E00kg cniOD/48XqqJrrrAlESfe/SxdiR6zjYr5kHsGQkEcmRkUnYaP/g5B3MKUkMr7aAcgXKHbVEnbVO SInWdtQ6aGqNpatjC4G4CeEiw6MEqaRNrJbYYKsvarFpRSvfR2WBCCc4+HwYqK4NfFrUeH5P1kg 6ZQSGWCcnSuVoyMlw22owOb3NMaEHqXKFvsn3PqJNVIlzcu7s9cqGezC4Jjh4wzdYp0nDoRBcZA IhE7c5mG8JnDK5P4Y1M4dAyQ14Klp1YbLHh9a1OZJnbSNNL2g+hTvVH+4aN+YLrn/qn6ieQxopl Rq2ywqWI0seE54VsCp8jsM00FrFq6d/puV9qxZpK+CFZ9YY/nPIVmP8CnekzdgecFwkwIcZSKpr NMxOTPgarQOoYZ5FqlysJ4goTDRq0oIk3IMESK6GVW0Fc1HtqLDtLLfVOfKnlHIyIlzTdCxOdrE 0HMsi5+MOoOpTwA03izg0aXKhbVpzUroRpPraqbkIfjJXsbeH5+TN6c/IPharOUgZtIY1/KA+CY bIDVvzL90uhYHGtUqB/4Q9y0bYFI8pBKwy/0nnQo6dsGIfrpEdm9kHy79fgYbhikIdtJRspfvZz bwgEFEnqHraG2vZYDIOwKHj6/me8b4Mki9P4bMhzXeUCpGIGYwalRKI7zFLjeOTZ4xQzwzLC+S2 kn1fpdXFwpseH9Q== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg From: Mateusz Jończyk I wonder how many people were checking their glibc version when considering whether to enable this option. Signed-off-by: Mateusz Jończyk Signed-off-by: David Heidelberg --- arch/x86/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index ba6ba3a7011554d9cb58fb0acf48d541da8ed69b..22dd962f8e5c86741a512e12596bd940cd1dae97 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2225,7 +2225,7 @@ config HOTPLUG_CPU config COMPAT_VDSO def_bool n - prompt "Disable the 32-bit vDSO (needed for glibc 2.3.3)" + prompt "Workaround for glibc 2.3.2 / 2.3.3 (released in year 2003/2004)" depends on COMPAT_32 help Certain buggy versions of glibc will crash if they are