From patchwork Tue Mar 25 21:39:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 14029557 Received: from out-173.mta1.migadu.com (out-173.mta1.migadu.com [95.215.58.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6BA571EFFBE for ; Tue, 25 Mar 2025 21:39:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938800; cv=none; b=qPSBF+AsfJ3yzd8AFsKWXqcn70qpoLD5yp7dkdR59ui9DR0NZC4t1l2OjHddNlpwXm6Bz5tUMc8Wh18bytcCGnqRmJ1hEIKr3oI02/DPqNR+59X475OzzTTfHGEcizvuIJyRmiMUP2SfhxWFXhEj8T/IO755+PjRcij5U+yL8ew= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938800; c=relaxed/simple; bh=IrzW+Cz/xJtrouhdHY2P0Mc91YNSbjED389JcHD59bY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=hLEn3ohdhgjmpj+/oSbbPPDKHnzTpElk8dXzxhIquIUyjnJq3n8Qki1e0o9kJpbhv0uYLiIkhsTx0bibSeec/+JGAsxxY3jsUU4y8jJIvsT6WJ8lPCgIo2ElZhkvw0cyPuLLTEansYWJb7Ok0YaFP7U36oxnVIjfT27zZhYb/hM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=wikzuLxZ; arc=none smtp.client-ip=95.215.58.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="wikzuLxZ" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1742938794; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oYz86RYJ28yNIa1mANgvH8lyCzktRmqL4Dylf8iwsXM=; b=wikzuLxZm1FSjcEwV6dz3B5aHdNP3uayD6mu9Tpd467YrcSMeSEYPqhVAJRM5qZw+twATZ Mw8TMYxZWmglJ8ez/5IhHyqFalmPY9+z1a0ZEXVNnRhwROMK3ZgqIkmyGWNVZQ+djXk1MY PU093ByKMRaN3WBGdL40uiOXSaxDaN0= From: Oliver Upton To: kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, Will Deacon , Julien Thierry , Marc Zyngier , Alexandru Elisei , Andre Przywara , Oliver Upton Subject: [PATCH kvmtool 1/9] Drop support for 32-bit arm Date: Tue, 25 Mar 2025 14:39:31 -0700 Message-Id: <20250325213939.2414498-2-oliver.upton@linux.dev> In-Reply-To: <20250325213939.2414498-1-oliver.upton@linux.dev> References: <20250325213939.2414498-1-oliver.upton@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Linux dropped support for KVM in 32-bit arm kernels almost 5 years ago in the 5.7 kernel release. In addition to that KVM/arm64 never had 32-bit compat support, so it is a safe assumption that usage of 32-bit kvmtool is pretty much dead at this point. Do not despair -- 32-bit guests are still supported with a 64-bit userspace. Acked-by: Marc Zyngier Signed-off-by: Oliver Upton --- INSTALL | 9 +- Makefile | 31 +-- arm/aarch32/arm-cpu.c | 50 ---- arm/aarch32/include/asm/kernel.h | 8 - arm/aarch32/include/asm/kvm.h | 311 ---------------------- arm/aarch32/include/kvm/barrier.h | 10 - arm/aarch32/include/kvm/fdt-arch.h | 6 - arm/aarch32/include/kvm/kvm-arch.h | 18 -- arm/aarch32/include/kvm/kvm-config-arch.h | 8 - arm/aarch32/include/kvm/kvm-cpu-arch.h | 24 -- arm/aarch32/kvm-cpu.c | 132 --------- arm/aarch32/kvm.c | 14 - builtin-run.c | 2 +- hw/cfi_flash.c | 2 +- hw/rtc.c | 2 +- hw/serial.c | 2 +- virtio/core.c | 2 +- 17 files changed, 19 insertions(+), 612 deletions(-) delete mode 100644 arm/aarch32/arm-cpu.c delete mode 100644 arm/aarch32/include/asm/kernel.h delete mode 100644 arm/aarch32/include/asm/kvm.h delete mode 100644 arm/aarch32/include/kvm/barrier.h delete mode 100644 arm/aarch32/include/kvm/fdt-arch.h delete mode 100644 arm/aarch32/include/kvm/kvm-arch.h delete mode 100644 arm/aarch32/include/kvm/kvm-config-arch.h delete mode 100644 arm/aarch32/include/kvm/kvm-cpu-arch.h delete mode 100644 arm/aarch32/kvm-cpu.c delete mode 100644 arm/aarch32/kvm.c diff --git a/INSTALL b/INSTALL index 2a65735..0e1e63e 100644 --- a/INSTALL +++ b/INSTALL @@ -26,7 +26,7 @@ For Fedora based systems: For OpenSUSE based systems: # zypper install glibc-devel-static -Architectures which require device tree (PowerPC, ARM, ARM64, RISC-V) also +Architectures which require device tree (PowerPC, ARM64, RISC-V) also require libfdt. deb: $ sudo apt-get install libfdt-dev Fedora: # yum install libfdt-devel @@ -61,16 +61,15 @@ to the Linux name of the architecture. Architectures supported: - i386 - x86_64 - powerpc -- arm - arm64 - mips - riscv If ARCH is not provided, the target architecture will be automatically determined by running "uname -m" on your host, resulting in a native build. -To cross-compile to ARM for instance, install a cross-compiler, put the +To cross-compile to arm64 for instance, install a cross-compiler, put the required libraries in the cross-compiler's SYSROOT and type: -$ make CROSS_COMPILE=arm-linux-gnueabihf- ARCH=arm +$ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=arm64 Missing libraries when cross-compiling --------------------------------------- @@ -82,7 +81,7 @@ On multiarch system you should be able to install those be appending the architecture name after the package (example for ARM64): $ sudo apt-get install libfdt-dev:arm64 -PowerPC, ARM/ARM64 and RISC-V require libfdt to be installed. If you cannot use +PowerPC, ARM64 and RISC-V require libfdt to be installed. If you cannot use precompiled mulitarch packages, you could either copy the required header and library files from an installed target system into the SYSROOT (you will need /usr/include/*fdt*.h and /usr/lib64/libfdt-v.v.v.so and its symlinks), or you diff --git a/Makefile b/Makefile index d84dc8e..462659b 100644 --- a/Makefile +++ b/Makefile @@ -166,35 +166,24 @@ ifeq ($(ARCH), powerpc) ARCH_WANT_LIBFDT := y endif -# ARM -OBJS_ARM_COMMON := arm/fdt.o arm/gic.o arm/gicv2m.o arm/ioport.o \ - arm/kvm.o arm/kvm-cpu.o arm/pci.o arm/timer.o \ - hw/serial.o -HDRS_ARM_COMMON := arm/include -ifeq ($(ARCH), arm) - DEFINES += -DCONFIG_ARM - OBJS += $(OBJS_ARM_COMMON) - OBJS += arm/aarch32/arm-cpu.o - OBJS += arm/aarch32/kvm-cpu.o - OBJS += arm/aarch32/kvm.o - ARCH_INCLUDE := $(HDRS_ARM_COMMON) - ARCH_INCLUDE += -Iarm/aarch32/include - CFLAGS += -march=armv7-a - - ARCH_WANT_LIBFDT := y - ARCH_HAS_FLASH_MEM := y -endif - # ARM64 ifeq ($(ARCH), arm64) DEFINES += -DCONFIG_ARM64 - OBJS += $(OBJS_ARM_COMMON) + OBJS += arm/fdt.o + OBJS += arm/gic.o + OBJS += arm/gicv2m.o + OBJS += arm/ioport.o + OBJS += arm/kvm.o + OBJS += arm/kvm-cpu.o + OBJS += arm/pci.o + OBJS += arm/timer.o + OBJS += hw/serial.o OBJS += arm/aarch64/arm-cpu.o OBJS += arm/aarch64/kvm-cpu.o OBJS += arm/aarch64/kvm.o OBJS += arm/aarch64/pvtime.o OBJS += arm/aarch64/pmu.o - ARCH_INCLUDE := $(HDRS_ARM_COMMON) + ARCH_INCLUDE := arm/include ARCH_INCLUDE += -Iarm/aarch64/include ARCH_WANT_LIBFDT := y diff --git a/arm/aarch32/arm-cpu.c b/arm/aarch32/arm-cpu.c deleted file mode 100644 index 16bba55..0000000 --- a/arm/aarch32/arm-cpu.c +++ /dev/null @@ -1,50 +0,0 @@ -#include "kvm/kvm.h" -#include "kvm/kvm-cpu.h" -#include "kvm/util.h" - -#include "arm-common/gic.h" -#include "arm-common/timer.h" - -#include -#include - -static void generate_fdt_nodes(void *fdt, struct kvm *kvm) -{ - int timer_interrupts[4] = {13, 14, 11, 10}; - - gic__generate_fdt_nodes(fdt, kvm->cfg.arch.irqchip); - timer__generate_fdt_nodes(fdt, kvm, timer_interrupts); -} - -static int arm_cpu__vcpu_init(struct kvm_cpu *vcpu) -{ - vcpu->generate_fdt_nodes = generate_fdt_nodes; - return 0; -} - -static struct kvm_arm_target target_generic_v7 = { - .id = UINT_MAX, - .compatible = "arm,arm-v7", - .init = arm_cpu__vcpu_init, -}; - -static struct kvm_arm_target target_cortex_a15 = { - .id = KVM_ARM_TARGET_CORTEX_A15, - .compatible = "arm,cortex-a15", - .init = arm_cpu__vcpu_init, -}; - -static struct kvm_arm_target target_cortex_a7 = { - .id = KVM_ARM_TARGET_CORTEX_A7, - .compatible = "arm,cortex-a7", - .init = arm_cpu__vcpu_init, -}; - -static int arm_cpu__core_init(struct kvm *kvm) -{ - kvm_cpu__set_kvm_arm_generic_target(&target_generic_v7); - - return (kvm_cpu__register_kvm_arm_target(&target_cortex_a15) || - kvm_cpu__register_kvm_arm_target(&target_cortex_a7)); -} -core_init(arm_cpu__core_init); diff --git a/arm/aarch32/include/asm/kernel.h b/arm/aarch32/include/asm/kernel.h deleted file mode 100644 index 6129609..0000000 --- a/arm/aarch32/include/asm/kernel.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ - -#ifndef __ASM_KERNEL_H -#define __ASM_KERNEL_H - -#define NR_CPUS 32 - -#endif /* __ASM_KERNEL_H */ diff --git a/arm/aarch32/include/asm/kvm.h b/arm/aarch32/include/asm/kvm.h deleted file mode 100644 index a4217c1..0000000 --- a/arm/aarch32/include/asm/kvm.h +++ /dev/null @@ -1,311 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Copyright (C) 2012 - Virtual Open Systems and Columbia University - * Author: Christoffer Dall - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - */ - -#ifndef __ARM_KVM_H__ -#define __ARM_KVM_H__ - -#include -#include -#include - -#define __KVM_HAVE_GUEST_DEBUG -#define __KVM_HAVE_IRQ_LINE -#define __KVM_HAVE_READONLY_MEM -#define __KVM_HAVE_VCPU_EVENTS - -#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 - -#define KVM_REG_SIZE(id) \ - (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT)) - -/* Valid for svc_regs, abt_regs, und_regs, irq_regs in struct kvm_regs */ -#define KVM_ARM_SVC_sp svc_regs[0] -#define KVM_ARM_SVC_lr svc_regs[1] -#define KVM_ARM_SVC_spsr svc_regs[2] -#define KVM_ARM_ABT_sp abt_regs[0] -#define KVM_ARM_ABT_lr abt_regs[1] -#define KVM_ARM_ABT_spsr abt_regs[2] -#define KVM_ARM_UND_sp und_regs[0] -#define KVM_ARM_UND_lr und_regs[1] -#define KVM_ARM_UND_spsr und_regs[2] -#define KVM_ARM_IRQ_sp irq_regs[0] -#define KVM_ARM_IRQ_lr irq_regs[1] -#define KVM_ARM_IRQ_spsr irq_regs[2] - -/* Valid only for fiq_regs in struct kvm_regs */ -#define KVM_ARM_FIQ_r8 fiq_regs[0] -#define KVM_ARM_FIQ_r9 fiq_regs[1] -#define KVM_ARM_FIQ_r10 fiq_regs[2] -#define KVM_ARM_FIQ_fp fiq_regs[3] -#define KVM_ARM_FIQ_ip fiq_regs[4] -#define KVM_ARM_FIQ_sp fiq_regs[5] -#define KVM_ARM_FIQ_lr fiq_regs[6] -#define KVM_ARM_FIQ_spsr fiq_regs[7] - -struct kvm_regs { - struct pt_regs usr_regs; /* R0_usr - R14_usr, PC, CPSR */ - unsigned long svc_regs[3]; /* SP_svc, LR_svc, SPSR_svc */ - unsigned long abt_regs[3]; /* SP_abt, LR_abt, SPSR_abt */ - unsigned long und_regs[3]; /* SP_und, LR_und, SPSR_und */ - unsigned long irq_regs[3]; /* SP_irq, LR_irq, SPSR_irq */ - unsigned long fiq_regs[8]; /* R8_fiq - R14_fiq, SPSR_fiq */ -}; - -/* Supported Processor Types */ -#define KVM_ARM_TARGET_CORTEX_A15 0 -#define KVM_ARM_TARGET_CORTEX_A7 1 -#define KVM_ARM_NUM_TARGETS 2 - -/* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */ -#define KVM_ARM_DEVICE_TYPE_SHIFT 0 -#define KVM_ARM_DEVICE_TYPE_MASK (0xffff << KVM_ARM_DEVICE_TYPE_SHIFT) -#define KVM_ARM_DEVICE_ID_SHIFT 16 -#define KVM_ARM_DEVICE_ID_MASK (0xffff << KVM_ARM_DEVICE_ID_SHIFT) - -/* Supported device IDs */ -#define KVM_ARM_DEVICE_VGIC_V2 0 - -/* Supported VGIC address types */ -#define KVM_VGIC_V2_ADDR_TYPE_DIST 0 -#define KVM_VGIC_V2_ADDR_TYPE_CPU 1 - -#define KVM_VGIC_V2_DIST_SIZE 0x1000 -#define KVM_VGIC_V2_CPU_SIZE 0x2000 - -/* Supported VGICv3 address types */ -#define KVM_VGIC_V3_ADDR_TYPE_DIST 2 -#define KVM_VGIC_V3_ADDR_TYPE_REDIST 3 -#define KVM_VGIC_ITS_ADDR_TYPE 4 -#define KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION 5 - -#define KVM_VGIC_V3_DIST_SIZE SZ_64K -#define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K) -#define KVM_VGIC_V3_ITS_SIZE (2 * SZ_64K) - -#define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */ -#define KVM_ARM_VCPU_PSCI_0_2 1 /* CPU uses PSCI v0.2 */ - -struct kvm_vcpu_init { - __u32 target; - __u32 features[7]; -}; - -struct kvm_sregs { -}; - -struct kvm_fpu { -}; - -struct kvm_guest_debug_arch { -}; - -struct kvm_debug_exit_arch { -}; - -struct kvm_sync_regs { - /* Used with KVM_CAP_ARM_USER_IRQ */ - __u64 device_irq_level; -}; - -struct kvm_arch_memory_slot { -}; - -/* for KVM_GET/SET_VCPU_EVENTS */ -struct kvm_vcpu_events { - struct { - __u8 serror_pending; - __u8 serror_has_esr; - /* Align it to 8 bytes */ - __u8 pad[6]; - __u64 serror_esr; - } exception; - __u32 reserved[12]; -}; - -/* If you need to interpret the index values, here is the key: */ -#define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 -#define KVM_REG_ARM_COPROC_SHIFT 16 -#define KVM_REG_ARM_32_OPC2_MASK 0x0000000000000007 -#define KVM_REG_ARM_32_OPC2_SHIFT 0 -#define KVM_REG_ARM_OPC1_MASK 0x0000000000000078 -#define KVM_REG_ARM_OPC1_SHIFT 3 -#define KVM_REG_ARM_CRM_MASK 0x0000000000000780 -#define KVM_REG_ARM_CRM_SHIFT 7 -#define KVM_REG_ARM_32_CRN_MASK 0x0000000000007800 -#define KVM_REG_ARM_32_CRN_SHIFT 11 -/* - * For KVM currently all guest registers are nonsecure, but we reserve a bit - * in the encoding to distinguish secure from nonsecure for AArch32 system - * registers that are banked by security. This is 1 for the secure banked - * register, and 0 for the nonsecure banked register or if the register is - * not banked by security. - */ -#define KVM_REG_ARM_SECURE_MASK 0x0000000010000000 -#define KVM_REG_ARM_SECURE_SHIFT 28 - -#define ARM_CP15_REG_SHIFT_MASK(x,n) \ - (((x) << KVM_REG_ARM_ ## n ## _SHIFT) & KVM_REG_ARM_ ## n ## _MASK) - -#define __ARM_CP15_REG(op1,crn,crm,op2) \ - (KVM_REG_ARM | (15 << KVM_REG_ARM_COPROC_SHIFT) | \ - ARM_CP15_REG_SHIFT_MASK(op1, OPC1) | \ - ARM_CP15_REG_SHIFT_MASK(crn, 32_CRN) | \ - ARM_CP15_REG_SHIFT_MASK(crm, CRM) | \ - ARM_CP15_REG_SHIFT_MASK(op2, 32_OPC2)) - -#define ARM_CP15_REG32(...) (__ARM_CP15_REG(__VA_ARGS__) | KVM_REG_SIZE_U32) - -#define __ARM_CP15_REG64(op1,crm) \ - (__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64) -#define ARM_CP15_REG64(...) __ARM_CP15_REG64(__VA_ARGS__) - -/* PL1 Physical Timer Registers */ -#define KVM_REG_ARM_PTIMER_CTL ARM_CP15_REG32(0, 14, 2, 1) -#define KVM_REG_ARM_PTIMER_CNT ARM_CP15_REG64(0, 14) -#define KVM_REG_ARM_PTIMER_CVAL ARM_CP15_REG64(2, 14) - -/* Virtual Timer Registers */ -#define KVM_REG_ARM_TIMER_CTL ARM_CP15_REG32(0, 14, 3, 1) -#define KVM_REG_ARM_TIMER_CNT ARM_CP15_REG64(1, 14) -#define KVM_REG_ARM_TIMER_CVAL ARM_CP15_REG64(3, 14) - -/* Normal registers are mapped as coprocessor 16. */ -#define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT) -#define KVM_REG_ARM_CORE_REG(name) (offsetof(struct kvm_regs, name) / 4) - -/* Some registers need more space to represent values. */ -#define KVM_REG_ARM_DEMUX (0x0011 << KVM_REG_ARM_COPROC_SHIFT) -#define KVM_REG_ARM_DEMUX_ID_MASK 0x000000000000FF00 -#define KVM_REG_ARM_DEMUX_ID_SHIFT 8 -#define KVM_REG_ARM_DEMUX_ID_CCSIDR (0x00 << KVM_REG_ARM_DEMUX_ID_SHIFT) -#define KVM_REG_ARM_DEMUX_VAL_MASK 0x00000000000000FF -#define KVM_REG_ARM_DEMUX_VAL_SHIFT 0 - -/* VFP registers: we could overload CP10 like ARM does, but that's ugly. */ -#define KVM_REG_ARM_VFP (0x0012 << KVM_REG_ARM_COPROC_SHIFT) -#define KVM_REG_ARM_VFP_MASK 0x000000000000FFFF -#define KVM_REG_ARM_VFP_BASE_REG 0x0 -#define KVM_REG_ARM_VFP_FPSID 0x1000 -#define KVM_REG_ARM_VFP_FPSCR 0x1001 -#define KVM_REG_ARM_VFP_MVFR1 0x1006 -#define KVM_REG_ARM_VFP_MVFR0 0x1007 -#define KVM_REG_ARM_VFP_FPEXC 0x1008 -#define KVM_REG_ARM_VFP_FPINST 0x1009 -#define KVM_REG_ARM_VFP_FPINST2 0x100A - -/* KVM-as-firmware specific pseudo-registers */ -#define KVM_REG_ARM_FW (0x0014 << KVM_REG_ARM_COPROC_SHIFT) -#define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM | KVM_REG_SIZE_U64 | \ - KVM_REG_ARM_FW | ((r) & 0xffff)) -#define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0) -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1 KVM_REG_ARM_FW_REG(1) - /* Higher values mean better protection. */ -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL 0 -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL 1 -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED 2 -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2 KVM_REG_ARM_FW_REG(2) - /* Higher values mean better protection. */ -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL 0 -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN 1 -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL 2 -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED 3 -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED (1U << 4) - -/* Device Control API: ARM VGIC */ -#define KVM_DEV_ARM_VGIC_GRP_ADDR 0 -#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1 -#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2 -#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32 -#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT) -#define KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32 -#define KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \ - (0xffffffffULL << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT) -#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0 -#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT) -#define KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff) -#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3 -#define KVM_DEV_ARM_VGIC_GRP_CTRL 4 -#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5 -#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6 -#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7 -#define KVM_DEV_ARM_VGIC_GRP_ITS_REGS 8 -#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10 -#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \ - (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) -#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff -#define VGIC_LEVEL_INFO_LINE_LEVEL 0 - -/* Device Control API on vcpu fd */ -#define KVM_ARM_VCPU_PMU_V3_CTRL 0 -#define KVM_ARM_VCPU_PMU_V3_IRQ 0 -#define KVM_ARM_VCPU_PMU_V3_INIT 1 -#define KVM_ARM_VCPU_TIMER_CTRL 1 -#define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0 -#define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1 - -#define KVM_DEV_ARM_VGIC_CTRL_INIT 0 -#define KVM_DEV_ARM_ITS_SAVE_TABLES 1 -#define KVM_DEV_ARM_ITS_RESTORE_TABLES 2 -#define KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES 3 -#define KVM_DEV_ARM_ITS_CTRL_RESET 4 - -/* KVM_IRQ_LINE irq field index values */ -#define KVM_ARM_IRQ_TYPE_SHIFT 24 -#define KVM_ARM_IRQ_TYPE_MASK 0xff -#define KVM_ARM_IRQ_VCPU_SHIFT 16 -#define KVM_ARM_IRQ_VCPU_MASK 0xff -#define KVM_ARM_IRQ_NUM_SHIFT 0 -#define KVM_ARM_IRQ_NUM_MASK 0xffff - -/* irq_type field */ -#define KVM_ARM_IRQ_TYPE_CPU 0 -#define KVM_ARM_IRQ_TYPE_SPI 1 -#define KVM_ARM_IRQ_TYPE_PPI 2 - -/* out-of-kernel GIC cpu interrupt injection irq_number field */ -#define KVM_ARM_IRQ_CPU_IRQ 0 -#define KVM_ARM_IRQ_CPU_FIQ 1 - -/* - * This used to hold the highest supported SPI, but it is now obsolete - * and only here to provide source code level compatibility with older - * userland. The highest SPI number can be set via KVM_DEV_ARM_VGIC_GRP_NR_IRQS. - */ -#ifndef __KERNEL__ -#define KVM_ARM_IRQ_GIC_MAX 127 -#endif - -/* One single KVM irqchip, ie. the VGIC */ -#define KVM_NR_IRQCHIPS 1 - -/* PSCI interface */ -#define KVM_PSCI_FN_BASE 0x95c1ba5e -#define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n)) - -#define KVM_PSCI_FN_CPU_SUSPEND KVM_PSCI_FN(0) -#define KVM_PSCI_FN_CPU_OFF KVM_PSCI_FN(1) -#define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2) -#define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3) - -#define KVM_PSCI_RET_SUCCESS PSCI_RET_SUCCESS -#define KVM_PSCI_RET_NI PSCI_RET_NOT_SUPPORTED -#define KVM_PSCI_RET_INVAL PSCI_RET_INVALID_PARAMS -#define KVM_PSCI_RET_DENIED PSCI_RET_DENIED - -#endif /* __ARM_KVM_H__ */ diff --git a/arm/aarch32/include/kvm/barrier.h b/arm/aarch32/include/kvm/barrier.h deleted file mode 100644 index 94913a9..0000000 --- a/arm/aarch32/include/kvm/barrier.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef KVM__KVM_BARRIER_H -#define KVM__KVM_BARRIER_H - -#define dmb() asm volatile ("dmb" : : : "memory") - -#define mb() dmb() -#define rmb() dmb() -#define wmb() dmb() - -#endif /* KVM__KVM_BARRIER_H */ diff --git a/arm/aarch32/include/kvm/fdt-arch.h b/arm/aarch32/include/kvm/fdt-arch.h deleted file mode 100644 index e448bf1..0000000 --- a/arm/aarch32/include/kvm/fdt-arch.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef KVM__KVM_FDT_H -#define KVM__KVM_FDT_H - -#include "arm-common/fdt-arch.h" - -#endif /* KVM__KVM_FDT_H */ diff --git a/arm/aarch32/include/kvm/kvm-arch.h b/arm/aarch32/include/kvm/kvm-arch.h deleted file mode 100644 index 0333cf4..0000000 --- a/arm/aarch32/include/kvm/kvm-arch.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef KVM__KVM_ARCH_H -#define KVM__KVM_ARCH_H - -#include - -#define kvm__arch_get_kern_offset(...) 0x8000 -#define kvm__arch_get_kernel_size(...) 0 -#define kvm__arch_get_payload_region_size(...) SZ_256M - -struct kvm; -static inline void kvm__arch_read_kernel_header(struct kvm *kvm, int fd) {} -static inline void kvm__arch_enable_mte(struct kvm *kvm) {} - -#define MAX_PAGE_SIZE SZ_4K - -#include "arm-common/kvm-arch.h" - -#endif /* KVM__KVM_ARCH_H */ diff --git a/arm/aarch32/include/kvm/kvm-config-arch.h b/arm/aarch32/include/kvm/kvm-config-arch.h deleted file mode 100644 index acf0d23..0000000 --- a/arm/aarch32/include/kvm/kvm-config-arch.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef KVM__KVM_CONFIG_ARCH_H -#define KVM__KVM_CONFIG_ARCH_H - -#define ARM_OPT_ARCH_RUN(...) - -#include "arm-common/kvm-config-arch.h" - -#endif /* KVM__KVM_CONFIG_ARCH_H */ diff --git a/arm/aarch32/include/kvm/kvm-cpu-arch.h b/arm/aarch32/include/kvm/kvm-cpu-arch.h deleted file mode 100644 index fd0b387..0000000 --- a/arm/aarch32/include/kvm/kvm-cpu-arch.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef KVM__KVM_CPU_ARCH_H -#define KVM__KVM_CPU_ARCH_H - -#include "kvm/kvm.h" - -#include "arm-common/kvm-cpu-arch.h" - -#define ARM_MPIDR_HWID_BITMASK 0xFFFFFF -#define ARM_CPU_ID 0, 0, 0 -#define ARM_CPU_ID_MPIDR 5 - -static inline void kvm_cpu__select_features(struct kvm *kvm, - struct kvm_vcpu_init *init) { } -static inline int kvm_cpu__configure_features(struct kvm_cpu *vcpu) -{ - return 0; -} - -static inline int kvm_cpu__teardown_pvtime(struct kvm *kvm) -{ - return 0; -} - -#endif /* KVM__KVM_CPU_ARCH_H */ diff --git a/arm/aarch32/kvm-cpu.c b/arm/aarch32/kvm-cpu.c deleted file mode 100644 index 95fb1da..0000000 --- a/arm/aarch32/kvm-cpu.c +++ /dev/null @@ -1,132 +0,0 @@ -#include "kvm/kvm-cpu.h" -#include "kvm/kvm.h" -#include "kvm/virtio.h" - -#include - -#define ARM_CORE_REG(x) (KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_CORE | \ - KVM_REG_ARM_CORE_REG(x)) - -unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vcpu) -{ - struct kvm_one_reg reg; - u32 mpidr; - - reg.id = ARM_CP15_REG32(ARM_CPU_ID, ARM_CPU_ID_MPIDR); - reg.addr = (u64)(unsigned long)&mpidr; - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (get_mpidr vcpu%ld", vcpu->cpu_id); - - return mpidr; -} - -void kvm_cpu__reset_vcpu(struct kvm_cpu *vcpu) -{ - struct kvm *kvm = vcpu->kvm; - struct kvm_one_reg reg; - u32 data; - - /* Who said future-proofing was a good idea? */ - reg.addr = (u64)(unsigned long)&data; - - /* cpsr = IRQs/FIQs masked */ - data = PSR_I_BIT | PSR_F_BIT | SVC_MODE; - reg.id = ARM_CORE_REG(usr_regs.ARM_cpsr); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (cpsr)"); - - /* Secondary cores are stopped awaiting PSCI wakeup */ - if (vcpu->cpu_id != 0) - return; - - /* r0 = 0 */ - data = 0; - reg.id = ARM_CORE_REG(usr_regs.ARM_r0); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (r0)"); - - /* r1 = machine type (-1) */ - data = -1; - reg.id = ARM_CORE_REG(usr_regs.ARM_r1); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (r1)"); - - /* r2 = physical address of the device tree blob */ - data = kvm->arch.dtb_guest_start; - reg.id = ARM_CORE_REG(usr_regs.ARM_r2); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (r2)"); - - /* pc = start of kernel image */ - data = kvm->arch.kern_guest_start; - reg.id = ARM_CORE_REG(usr_regs.ARM_pc); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (pc)"); -} - -int kvm_cpu__get_endianness(struct kvm_cpu *vcpu) -{ - struct kvm_one_reg reg; - u32 data; - - reg.id = ARM_CORE_REG(usr_regs.ARM_cpsr); - reg.addr = (u64)(unsigned long)&data; - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (cpsr)"); - - return (data & PSR_E_BIT) ? VIRTIO_ENDIAN_BE : VIRTIO_ENDIAN_LE; -} - -void kvm_cpu__show_code(struct kvm_cpu *vcpu) -{ - struct kvm_one_reg reg; - u32 data; - int debug_fd = kvm_cpu__get_debug_fd(); - - reg.addr = (u64)(unsigned long)&data; - - dprintf(debug_fd, "\n*pc:\n"); - reg.id = ARM_CORE_REG(usr_regs.ARM_pc); - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (show_code @ PC)"); - - kvm__dump_mem(vcpu->kvm, data, 32, debug_fd); - - dprintf(debug_fd, "\n*lr (svc):\n"); - reg.id = ARM_CORE_REG(svc_regs[1]); - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (show_code @ LR_svc)"); - data &= ~0x1; - - kvm__dump_mem(vcpu->kvm, data, 32, debug_fd); -} - -void kvm_cpu__show_registers(struct kvm_cpu *vcpu) -{ - struct kvm_one_reg reg; - u32 data; - int debug_fd = kvm_cpu__get_debug_fd(); - - reg.addr = (u64)(unsigned long)&data; - dprintf(debug_fd, "\n Registers:\n"); - - reg.id = ARM_CORE_REG(usr_regs.ARM_pc); - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (pc)"); - dprintf(debug_fd, " PC: 0x%x\n", data); - - reg.id = ARM_CORE_REG(usr_regs.ARM_cpsr); - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (cpsr)"); - dprintf(debug_fd, " CPSR: 0x%x\n", data); - - reg.id = ARM_CORE_REG(svc_regs[0]); - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (SP_svc)"); - dprintf(debug_fd, " SP_svc: 0x%x\n", data); - - reg.id = ARM_CORE_REG(svc_regs[1]); - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (LR_svc)"); - dprintf(debug_fd, " LR_svc: 0x%x\n", data); -} diff --git a/arm/aarch32/kvm.c b/arm/aarch32/kvm.c deleted file mode 100644 index 768a56b..0000000 --- a/arm/aarch32/kvm.c +++ /dev/null @@ -1,14 +0,0 @@ -#include "kvm/kvm.h" - -void kvm__arch_validate_cfg(struct kvm *kvm) -{ - if (kvm->cfg.ram_size > ARM_LOMAP_MAX_MEMORY) { - die("RAM size 0x%llx exceeds maximum allowed 0x%llx", - kvm->cfg.ram_size, ARM_LOMAP_MAX_MEMORY); - } -} - -u64 kvm__arch_default_ram_address(void) -{ - return ARM_MEMORY_AREA; -} diff --git a/builtin-run.c b/builtin-run.c index 4b9a391..81f255f 100644 --- a/builtin-run.c +++ b/builtin-run.c @@ -182,7 +182,7 @@ static int loglevel_parser(const struct option *opt, const char *arg, int unset) " in megabytes (M)" #endif -#if defined(CONFIG_ARM) || defined(CONFIG_ARM64) || defined(CONFIG_RISCV) +#if defined(CONFIG_ARM64) || defined(CONFIG_RISCV) #define VIRTIO_TRANS_OPT_HELP_SHORT "[pci|pci-legacy|mmio|mmio-legacy]" #else #define VIRTIO_TRANS_OPT_HELP_SHORT "[pci|pci-legacy]" diff --git a/hw/cfi_flash.c b/hw/cfi_flash.c index 7faecdf..b68d9e0 100644 --- a/hw/cfi_flash.c +++ b/hw/cfi_flash.c @@ -443,7 +443,7 @@ static void cfi_flash_write(struct cfi_flash_device *sfdev, u16 command, * If we are in ARRAY_READ mode, we can map the flash array directly * into the guest, just as read-only. This greatly improves read * performance, and avoids problems with exits due to accesses from - * load instructions without syndrome information (on ARM). + * load instructions without syndrome information (on arm64). * Also it could allow code to be executed XIP in there. */ static int map_flash_memory(struct kvm *kvm, struct cfi_flash_device *sfdev) diff --git a/hw/rtc.c b/hw/rtc.c index da696e1..e3523a1 100644 --- a/hw/rtc.c +++ b/hw/rtc.c @@ -6,7 +6,7 @@ #include -#if defined(CONFIG_ARM) || defined(CONFIG_ARM64) +#if defined(CONFIG_ARM64) #define RTC_BUS_TYPE DEVICE_BUS_MMIO #define RTC_BASE_ADDRESS ARM_RTC_MMIO_BASE #elif defined(CONFIG_RISCV) diff --git a/hw/serial.c b/hw/serial.c index b6263a0..68e6186 100644 --- a/hw/serial.c +++ b/hw/serial.c @@ -13,7 +13,7 @@ #include -#if defined(CONFIG_ARM) || defined(CONFIG_ARM64) +#if defined(CONFIG_ARM64) #define serial_iobase(nr) (ARM_UART_MMIO_BASE + (nr) * 0x1000) #define serial_irq(nr) (32 + (nr)) #define SERIAL8250_BUS_TYPE DEVICE_BUS_MMIO diff --git a/virtio/core.c b/virtio/core.c index b77e987..50c9ddd 100644 --- a/virtio/core.c +++ b/virtio/core.c @@ -31,7 +31,7 @@ int virtio_transport_parser(const struct option *opt, const char *arg, int unset *type = VIRTIO_PCI; } else if (!strcmp(arg, "pci-legacy")) { *type = VIRTIO_PCI_LEGACY; -#if defined(CONFIG_ARM) || defined(CONFIG_ARM64) || defined(CONFIG_RISCV) +#if defined(CONFIG_ARM64) || defined(CONFIG_RISCV) } else if (!strcmp(arg, "mmio")) { *type = VIRTIO_MMIO; } else if (!strcmp(arg, "mmio-legacy")) { From patchwork Tue Mar 25 21:39:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 14029556 Received: from out-179.mta1.migadu.com (out-179.mta1.migadu.com [95.215.58.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB617269806 for ; Tue, 25 Mar 2025 21:39:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938799; cv=none; b=fsHDsR1rjD+2iLqEK8Zwddxe5CeJ+89Ej24/8ou/vcKrY81ob4GckDr5okIdpG0VMUo9wRFv0/LZLtS8hwStHfn9XzeljX7XLNGbDAoSR6JPUbtckt3mVy79xedCWLkvsZYpNi/YHU0nEBImRIsJgT2tn9TmRfXKFNrvHXz2NL8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938799; c=relaxed/simple; bh=3R09RuiAnBU8D6+J9O8s3Vb56r8kBcF+H5LbCga2D2s=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=DfNMBZMnvpNj9iNIuCpWFE17vRKHzwfLptwfaL80stAg9AakwSyCnO8+Aceia5wqFtzaqu9seNH7Etz+Ygrk+IX8IZV/vYEfmpB1s9oxGMsI0Me8aOlJfD98yRK6MquxHTWS1bSf+pqsM56XTrbCicTuElE3MQM3b2BCdHWgk9Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=pFSzJycL; arc=none smtp.client-ip=95.215.58.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="pFSzJycL" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1742938796; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=99Sb0eJWHhItpr3BqfyKTZVUmxWKVyySy6BYybNLtew=; b=pFSzJycLvYS6cAhgk6QZVrDh5/DwYFMaNeJN7N/5Oj91w/1irncfgSZJdgoia4NKgdgaP3 Z3YeI3Y7omNjKaAL/RjBxvcKcihHHHlwZ1iL6qgkK3uSBADXGo23s2/13wlIdE3KjqjPSn V0rsTGPZaNT7VklqzN2s1RWMQsy1pB4= From: Oliver Upton To: kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, Will Deacon , Julien Thierry , Marc Zyngier , Alexandru Elisei , Andre Przywara , Oliver Upton Subject: [PATCH kvmtool 2/9] arm64: Move arm64-only features into main directory Date: Tue, 25 Mar 2025 14:39:32 -0700 Message-Id: <20250325213939.2414498-3-oliver.upton@linux.dev> In-Reply-To: <20250325213939.2414498-1-oliver.upton@linux.dev> References: <20250325213939.2414498-1-oliver.upton@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Start the backing out the 32/64-bit split by moving arm64-only features up a level into the main arch directory. Acked-by: Marc Zyngier Signed-off-by: Oliver Upton --- Makefile | 6 +++--- arm/{aarch64 => }/arm-cpu.c | 0 arm/{aarch64 => }/pmu.c | 0 arm/{aarch64 => }/pvtime.c | 0 4 files changed, 3 insertions(+), 3 deletions(-) rename arm/{aarch64 => }/arm-cpu.c (100%) rename arm/{aarch64 => }/pmu.c (100%) rename arm/{aarch64 => }/pvtime.c (100%) diff --git a/Makefile b/Makefile index 462659b..cf50cf7 100644 --- a/Makefile +++ b/Makefile @@ -178,11 +178,11 @@ ifeq ($(ARCH), arm64) OBJS += arm/pci.o OBJS += arm/timer.o OBJS += hw/serial.o - OBJS += arm/aarch64/arm-cpu.o + OBJS += arm/arm-cpu.o OBJS += arm/aarch64/kvm-cpu.o OBJS += arm/aarch64/kvm.o - OBJS += arm/aarch64/pvtime.o - OBJS += arm/aarch64/pmu.o + OBJS += arm/pvtime.o + OBJS += arm/pmu.o ARCH_INCLUDE := arm/include ARCH_INCLUDE += -Iarm/aarch64/include diff --git a/arm/aarch64/arm-cpu.c b/arm/arm-cpu.c similarity index 100% rename from arm/aarch64/arm-cpu.c rename to arm/arm-cpu.c diff --git a/arm/aarch64/pmu.c b/arm/pmu.c similarity index 100% rename from arm/aarch64/pmu.c rename to arm/pmu.c diff --git a/arm/aarch64/pvtime.c b/arm/pvtime.c similarity index 100% rename from arm/aarch64/pvtime.c rename to arm/pvtime.c From patchwork Tue Mar 25 21:39:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 14029558 Received: from out-174.mta1.migadu.com (out-174.mta1.migadu.com [95.215.58.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB6DD179A3 for ; Tue, 25 Mar 2025 21:39:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938802; cv=none; b=Sq2aPS4tt2ZbosctOi7H6nOPINV6rpybo2n4R6Cwf9m1xMLH9SyLbQFwD/2aYDNQXLImReUoLvQiCtEPMgdTxDpWDTfDsDbZSFPOxSBmhoghThd9YbUt1BkbWCu9JA/gtWscJY+hTrZPfZP6O7oLn3ykeokGZt0QBVfC2hIAyTk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938802; c=relaxed/simple; bh=S3YJ8L3kvyXi2B2D0BRHmAIYBENOqbldv+pKCuVzxvQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=DQH+wHg6XYF0d0Ye0afhaAmdEkrTLB41UGS5f4fPykl/PeZth2+DT4p47pQ7JAQz9uIO/QDBI1dN5OlBkvUUFdv6em5oTOg5ZhKk6ti2zZhlihjT7bsVMZYpclsDNKztAKHCnJ6OsZfu+ADVm00SA8PvzBAv7/Lr0WWgexUwHsU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=h/5EEmuj; arc=none smtp.client-ip=95.215.58.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="h/5EEmuj" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1742938798; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wDVxvrzUuo2y8V0JqYrwuU/ow4oSX+xh0ag0biYRHS8=; b=h/5EEmujhClaxkq2QuV0NJN9eT4HPJwswHNl+1RdVN+76fxVuBfnn4HTMo/KRl7qEU0ZeF Bw0wvP2RG5VTyGeUeMmq5lDSWP3HVuLxlY5VZTeqK2rzy2nEJP9wJA+AGEqZ2VV/bvBVB8 whLIF6bM42ziZKKt92srL6TDOK6GJxw= From: Oliver Upton To: kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, Will Deacon , Julien Thierry , Marc Zyngier , Alexandru Elisei , Andre Przywara , Oliver Upton Subject: [PATCH kvmtool 3/9] arm64: Combine kvm.c Date: Tue, 25 Mar 2025 14:39:33 -0700 Message-Id: <20250325213939.2414498-4-oliver.upton@linux.dev> In-Reply-To: <20250325213939.2414498-1-oliver.upton@linux.dev> References: <20250325213939.2414498-1-oliver.upton@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Glue together the ARM common and previously arm64-specific bits into one source file. Acked-by: Marc Zyngier Signed-off-by: Oliver Upton --- Makefile | 1 - arm/aarch64/include/kvm/kvm-arch.h | 22 --- arm/aarch64/kvm.c | 212 --------------------- arm/include/{arm-common => kvm}/kvm-arch.h | 6 +- arm/kvm.c | 207 ++++++++++++++++++++ 5 files changed, 212 insertions(+), 236 deletions(-) delete mode 100644 arm/aarch64/include/kvm/kvm-arch.h delete mode 100644 arm/aarch64/kvm.c rename arm/include/{arm-common => kvm}/kvm-arch.h (97%) diff --git a/Makefile b/Makefile index cf50cf7..72027e0 100644 --- a/Makefile +++ b/Makefile @@ -180,7 +180,6 @@ ifeq ($(ARCH), arm64) OBJS += hw/serial.o OBJS += arm/arm-cpu.o OBJS += arm/aarch64/kvm-cpu.o - OBJS += arm/aarch64/kvm.o OBJS += arm/pvtime.o OBJS += arm/pmu.o ARCH_INCLUDE := arm/include diff --git a/arm/aarch64/include/kvm/kvm-arch.h b/arm/aarch64/include/kvm/kvm-arch.h deleted file mode 100644 index 2d1a4ed..0000000 --- a/arm/aarch64/include/kvm/kvm-arch.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef KVM__KVM_ARCH_H -#define KVM__KVM_ARCH_H - -#include - -struct kvm; -void kvm__arch_read_kernel_header(struct kvm *kvm, int fd); -unsigned long long kvm__arch_get_kern_offset(struct kvm *kvm); -u64 kvm__arch_get_kernel_size(struct kvm *kvm); - -u64 kvm__arch_get_payload_region_size(struct kvm *kvm); - -int kvm__arch_get_ipa_limit(struct kvm *kvm); -void kvm__arch_enable_mte(struct kvm *kvm); - -#define MAX_PAGE_SIZE SZ_64K - -#define ARCH_HAS_CFG_RAM_ADDRESS 1 - -#include "arm-common/kvm-arch.h" - -#endif /* KVM__KVM_ARCH_H */ diff --git a/arm/aarch64/kvm.c b/arm/aarch64/kvm.c deleted file mode 100644 index 98b2437..0000000 --- a/arm/aarch64/kvm.c +++ /dev/null @@ -1,212 +0,0 @@ -#include "kvm/kvm.h" - -#include - -#include -#include -#include - -#include - -static struct arm64_image_header *kernel_header; - -int vcpu_affinity_parser(const struct option *opt, const char *arg, int unset) -{ - struct kvm *kvm = opt->ptr; - const char *cpulist = arg; - cpumask_t *cpumask; - int cpu, ret; - - kvm->cfg.arch.vcpu_affinity = cpulist; - - cpumask = calloc(1, cpumask_size()); - if (!cpumask) - die_perror("calloc"); - - ret = cpulist_parse(cpulist, cpumask); - if (ret) { - free(cpumask); - return ret; - } - - kvm->arch.vcpu_affinity_cpuset = CPU_ALLOC(NR_CPUS); - if (!kvm->arch.vcpu_affinity_cpuset) - die_perror("CPU_ALLOC"); - CPU_ZERO_S(CPU_ALLOC_SIZE(NR_CPUS), kvm->arch.vcpu_affinity_cpuset); - - for_each_cpu(cpu, cpumask) - CPU_SET(cpu, kvm->arch.vcpu_affinity_cpuset); - - return 0; -} - -void kvm__arch_validate_cfg(struct kvm *kvm) -{ - - if (kvm->cfg.ram_addr < ARM_MEMORY_AREA) { - die("RAM address is below the I/O region ending at %luGB", - ARM_MEMORY_AREA >> 30); - } - - if (kvm->cfg.arch.aarch32_guest && - kvm->cfg.ram_addr + kvm->cfg.ram_size > SZ_4G) { - die("RAM extends above 4GB"); - } -} - -u64 kvm__arch_default_ram_address(void) -{ - return ARM_MEMORY_AREA; -} - -void kvm__arch_read_kernel_header(struct kvm *kvm, int fd) -{ - const char *debug_str; - off_t cur_offset; - ssize_t size; - - if (kvm->cfg.arch.aarch32_guest) - return; - - kernel_header = malloc(sizeof(*kernel_header)); - if (!kernel_header) - return; - - cur_offset = lseek(fd, 0, SEEK_CUR); - if (cur_offset == (off_t)-1 || lseek(fd, 0, SEEK_SET) == (off_t)-1) { - debug_str = "Failed to seek in kernel image file"; - goto fail; - } - - size = xread(fd, kernel_header, sizeof(*kernel_header)); - if (size < 0 || (size_t)size < sizeof(*kernel_header)) - die("Failed to read kernel image header"); - - lseek(fd, cur_offset, SEEK_SET); - - if (memcmp(&kernel_header->magic, ARM64_IMAGE_MAGIC, sizeof(kernel_header->magic))) { - debug_str = "Kernel image magic not matching"; - kernel_header = NULL; - goto fail; - } - - return; - -fail: - pr_debug("%s, using defaults", debug_str); -} - -/* - * Return the TEXT_OFFSET value that the guest kernel expects. Note - * that pre-3.17 kernels expose this value using the native endianness - * instead of Little-Endian. BE kernels of this vintage may fail to - * boot. See Documentation/arm64/booting.rst in your local kernel tree. - */ -unsigned long long kvm__arch_get_kern_offset(struct kvm *kvm) -{ - const char *debug_str; - - /* the 32bit kernel offset is a well known value */ - if (kvm->cfg.arch.aarch32_guest) - return 0x8000; - - if (!kernel_header) { - debug_str = "Kernel header is missing"; - goto default_offset; - } - - if (!le64_to_cpu(kernel_header->image_size)) { - debug_str = "Image size is 0"; - goto default_offset; - } - - return le64_to_cpu(kernel_header->text_offset); - -default_offset: - pr_debug("%s, assuming TEXT_OFFSET to be 0x80000", debug_str); - return 0x80000; -} - -u64 kvm__arch_get_kernel_size(struct kvm *kvm) -{ - if (kvm->cfg.arch.aarch32_guest || !kernel_header) - return 0; - - return le64_to_cpu(kernel_header->image_size); -} - -u64 kvm__arch_get_payload_region_size(struct kvm *kvm) -{ - if (kvm->cfg.arch.aarch32_guest) - return SZ_256M; - - return SZ_512M; -} - -int kvm__arch_get_ipa_limit(struct kvm *kvm) -{ - int ret; - - ret = ioctl(kvm->sys_fd, KVM_CHECK_EXTENSION, KVM_CAP_ARM_VM_IPA_SIZE); - if (ret <= 0) - ret = 0; - - return ret; -} - -int kvm__get_vm_type(struct kvm *kvm) -{ - unsigned int ipa_bits, max_ipa_bits; - unsigned long max_ipa; - - /* If we're running on an old kernel, use 0 as the VM type */ - max_ipa_bits = kvm__arch_get_ipa_limit(kvm); - if (!max_ipa_bits) - return 0; - - /* Otherwise, compute the minimal required IPA size */ - max_ipa = kvm->cfg.ram_addr + kvm->cfg.ram_size - 1; - ipa_bits = max(32, fls_long(max_ipa)); - pr_debug("max_ipa %lx ipa_bits %d max_ipa_bits %d", - max_ipa, ipa_bits, max_ipa_bits); - - if (ipa_bits > max_ipa_bits) - die("Memory too large for this system (needs %d bits, %d available)", ipa_bits, max_ipa_bits); - - return KVM_VM_TYPE_ARM_IPA_SIZE(ipa_bits); -} - -void kvm__arch_enable_mte(struct kvm *kvm) -{ - struct kvm_enable_cap cap = { - .cap = KVM_CAP_ARM_MTE, - }; - - if (kvm->cfg.arch.aarch32_guest) { - pr_debug("MTE is incompatible with AArch32"); - return; - } - - if (kvm->cfg.arch.mte_disabled) { - pr_debug("MTE disabled by user"); - return; - } - - if (!kvm__supports_extension(kvm, KVM_CAP_ARM_MTE)) { - pr_debug("MTE capability not available"); - return; - } - - if (ioctl(kvm->vm_fd, KVM_ENABLE_CAP, &cap)) - die_perror("KVM_ENABLE_CAP(KVM_CAP_ARM_MTE)"); - - pr_debug("MTE capability enabled"); -} - -static int kvm__arch_free_kernel_header(struct kvm *kvm) -{ - free(kernel_header); - - return 0; -} -late_exit(kvm__arch_free_kernel_header); diff --git a/arm/include/arm-common/kvm-arch.h b/arm/include/kvm/kvm-arch.h similarity index 97% rename from arm/include/arm-common/kvm-arch.h rename to arm/include/kvm/kvm-arch.h index 60eec02..b097186 100644 --- a/arm/include/arm-common/kvm-arch.h +++ b/arm/include/kvm/kvm-arch.h @@ -82,7 +82,11 @@ #define VIRTIO_RING_ENDIAN (VIRTIO_ENDIAN_LE | VIRTIO_ENDIAN_BE) -#define ARCH_HAS_PCI_EXP 1 +#define ARCH_HAS_PCI_EXP 1 +#define ARCH_HAS_CFG_RAM_ADDRESS 1 + +#define MAX_PAGE_SIZE SZ_64K + static inline bool arm_addr_in_ioport_region(u64 phys_addr) { diff --git a/arm/kvm.c b/arm/kvm.c index cc0cc4f..11c7a16 100644 --- a/arm/kvm.c +++ b/arm/kvm.c @@ -7,10 +7,16 @@ #include "arm-common/gic.h" +#include +#include #include #include #include +#include + +static struct arm64_image_header *kernel_header; + struct kvm_ext kvm_req_ext[] = { { DEFINE_KVM_EXT(KVM_CAP_IRQCHIP) }, { DEFINE_KVM_EXT(KVM_CAP_ONE_REG) }, @@ -87,6 +93,33 @@ void kvm__arch_set_cmdline(char *cmdline, bool video) { } +static void kvm__arch_enable_mte(struct kvm *kvm) +{ + struct kvm_enable_cap cap = { + .cap = KVM_CAP_ARM_MTE, + }; + + if (kvm->cfg.arch.aarch32_guest) { + pr_debug("MTE is incompatible with AArch32"); + return; + } + + if (kvm->cfg.arch.mte_disabled) { + pr_debug("MTE disabled by user"); + return; + } + + if (!kvm__supports_extension(kvm, KVM_CAP_ARM_MTE)) { + pr_debug("MTE capability not available"); + return; + } + + if (ioctl(kvm->vm_fd, KVM_ENABLE_CAP, &cap)) + die_perror("KVM_ENABLE_CAP(KVM_CAP_ARM_MTE)"); + + pr_debug("MTE capability enabled"); +} + void kvm__arch_init(struct kvm *kvm) { /* Create the virtual GIC. */ @@ -96,6 +129,90 @@ void kvm__arch_init(struct kvm *kvm) kvm__arch_enable_mte(kvm); } +static u64 kvm__arch_get_payload_region_size(struct kvm *kvm) +{ + if (kvm->cfg.arch.aarch32_guest) + return SZ_256M; + + return SZ_512M; +} + +/* + * Return the TEXT_OFFSET value that the guest kernel expects. Note + * that pre-3.17 kernels expose this value using the native endianness + * instead of Little-Endian. BE kernels of this vintage may fail to + * boot. See Documentation/arm64/booting.rst in your local kernel tree. + */ +static u64 kvm__arch_get_kern_offset(struct kvm *kvm) +{ + const char *debug_str; + + /* the 32bit kernel offset is a well known value */ + if (kvm->cfg.arch.aarch32_guest) + return 0x8000; + + if (!kernel_header) { + debug_str = "Kernel header is missing"; + goto default_offset; + } + + if (!le64_to_cpu(kernel_header->image_size)) { + debug_str = "Image size is 0"; + goto default_offset; + } + + return le64_to_cpu(kernel_header->text_offset); + +default_offset: + pr_debug("%s, assuming TEXT_OFFSET to be 0x80000", debug_str); + return 0x80000; +} + +static void kvm__arch_read_kernel_header(struct kvm *kvm, int fd) +{ + const char *debug_str; + off_t cur_offset; + ssize_t size; + + if (kvm->cfg.arch.aarch32_guest) + return; + + kernel_header = malloc(sizeof(*kernel_header)); + if (!kernel_header) + return; + + cur_offset = lseek(fd, 0, SEEK_CUR); + if (cur_offset == (off_t)-1 || lseek(fd, 0, SEEK_SET) == (off_t)-1) { + debug_str = "Failed to seek in kernel image file"; + goto fail; + } + + size = xread(fd, kernel_header, sizeof(*kernel_header)); + if (size < 0 || (size_t)size < sizeof(*kernel_header)) + die("Failed to read kernel image header"); + + lseek(fd, cur_offset, SEEK_SET); + + if (memcmp(&kernel_header->magic, ARM64_IMAGE_MAGIC, sizeof(kernel_header->magic))) { + debug_str = "Kernel image magic not matching"; + kernel_header = NULL; + goto fail; + } + + return; + +fail: + pr_debug("%s, using defaults", debug_str); +} + +static u64 kvm__arch_get_kernel_size(struct kvm *kvm) +{ + if (kvm->cfg.arch.aarch32_guest || !kernel_header) + return 0; + + return le64_to_cpu(kernel_header->image_size); +} + #define FDT_ALIGN SZ_2M #define INITRD_ALIGN 4 bool kvm__arch_load_kernel_image(struct kvm *kvm, int fd_kernel, int fd_initrd, @@ -264,3 +381,93 @@ int kvm__arch_setup_firmware(struct kvm *kvm) { return 0; } + +int vcpu_affinity_parser(const struct option *opt, const char *arg, int unset) +{ + struct kvm *kvm = opt->ptr; + const char *cpulist = arg; + cpumask_t *cpumask; + int cpu, ret; + + kvm->cfg.arch.vcpu_affinity = cpulist; + + cpumask = calloc(1, cpumask_size()); + if (!cpumask) + die_perror("calloc"); + + ret = cpulist_parse(cpulist, cpumask); + if (ret) { + free(cpumask); + return ret; + } + + kvm->arch.vcpu_affinity_cpuset = CPU_ALLOC(NR_CPUS); + if (!kvm->arch.vcpu_affinity_cpuset) + die_perror("CPU_ALLOC"); + CPU_ZERO_S(CPU_ALLOC_SIZE(NR_CPUS), kvm->arch.vcpu_affinity_cpuset); + + for_each_cpu(cpu, cpumask) + CPU_SET(cpu, kvm->arch.vcpu_affinity_cpuset); + + return 0; +} + +void kvm__arch_validate_cfg(struct kvm *kvm) +{ + + if (kvm->cfg.ram_addr < ARM_MEMORY_AREA) { + die("RAM address is below the I/O region ending at %luGB", + ARM_MEMORY_AREA >> 30); + } + + if (kvm->cfg.arch.aarch32_guest && + kvm->cfg.ram_addr + kvm->cfg.ram_size > SZ_4G) { + die("RAM extends above 4GB"); + } +} + +u64 kvm__arch_default_ram_address(void) +{ + return ARM_MEMORY_AREA; +} + +static int kvm__arch_get_ipa_limit(struct kvm *kvm) +{ + int ret; + + ret = ioctl(kvm->sys_fd, KVM_CHECK_EXTENSION, KVM_CAP_ARM_VM_IPA_SIZE); + if (ret <= 0) + ret = 0; + + return ret; +} + +int kvm__get_vm_type(struct kvm *kvm) +{ + unsigned int ipa_bits, max_ipa_bits; + unsigned long max_ipa; + + /* If we're running on an old kernel, use 0 as the VM type */ + max_ipa_bits = kvm__arch_get_ipa_limit(kvm); + if (!max_ipa_bits) + return 0; + + /* Otherwise, compute the minimal required IPA size */ + max_ipa = kvm->cfg.ram_addr + kvm->cfg.ram_size - 1; + ipa_bits = max(32, fls_long(max_ipa)); + pr_debug("max_ipa %lx ipa_bits %d max_ipa_bits %d", + max_ipa, ipa_bits, max_ipa_bits); + + if (ipa_bits > max_ipa_bits) + die("Memory too large for this system (needs %d bits, %d available)", ipa_bits, max_ipa_bits); + + return KVM_VM_TYPE_ARM_IPA_SIZE(ipa_bits); +} + +static int kvm__arch_free_kernel_header(struct kvm *kvm) +{ + free(kernel_header); + + return 0; +} +late_exit(kvm__arch_free_kernel_header); From patchwork Tue Mar 25 21:39:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 14029559 Received: from out-178.mta1.migadu.com (out-178.mta1.migadu.com [95.215.58.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9527D269B18 for ; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1742938799; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/AGkwckcp+S1XMHvzbpymUSuCKMudJuadm/ETaUl9Es=; b=CC7CuuEQIGGOagJ2MQmLNL+lxdjT7PVElYGYxpdzFP80kx+SRxki0cwKR156Wk6LQa1IdT +pdA6suCUOxuX//gCNLTwSALxSonZWYn12dz5B52mKbSHsnK4i4K/fCgVJmxPq/b/zLjl+ MUIoBiMuifDqfMuJaRUzc/+0XRePPxg= From: Oliver Upton To: kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, Will Deacon , Julien Thierry , Marc Zyngier , Alexandru Elisei , Andre Przywara , Oliver Upton Subject: [PATCH kvmtool 4/9] arm64: Merge kvm-cpu.c Date: Tue, 25 Mar 2025 14:39:34 -0700 Message-Id: <20250325213939.2414498-5-oliver.upton@linux.dev> In-Reply-To: <20250325213939.2414498-1-oliver.upton@linux.dev> References: <20250325213939.2414498-1-oliver.upton@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT As before, glue together the arm64 and ARM generic bits into one file. Acked-by: Marc Zyngier Signed-off-by: Oliver Upton --- Makefile | 1 - arm/aarch64/include/kvm/kvm-cpu-arch.h | 19 - arm/aarch64/kvm-cpu.c | 330 ------------------ .../{arm-common => kvm}/kvm-cpu-arch.h | 10 +- arm/kvm-cpu.c | 328 +++++++++++++++++ 5 files changed, 337 insertions(+), 351 deletions(-) delete mode 100644 arm/aarch64/include/kvm/kvm-cpu-arch.h delete mode 100644 arm/aarch64/kvm-cpu.c rename arm/include/{arm-common => kvm}/kvm-cpu-arch.h (82%) diff --git a/Makefile b/Makefile index 72027e0..25ee9b0 100644 --- a/Makefile +++ b/Makefile @@ -179,7 +179,6 @@ ifeq ($(ARCH), arm64) OBJS += arm/timer.o OBJS += hw/serial.o OBJS += arm/arm-cpu.o - OBJS += arm/aarch64/kvm-cpu.o OBJS += arm/pvtime.o OBJS += arm/pmu.o ARCH_INCLUDE := arm/include diff --git a/arm/aarch64/include/kvm/kvm-cpu-arch.h b/arm/aarch64/include/kvm/kvm-cpu-arch.h deleted file mode 100644 index aeae8c1..0000000 --- a/arm/aarch64/include/kvm/kvm-cpu-arch.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef KVM__KVM_CPU_ARCH_H -#define KVM__KVM_CPU_ARCH_H - -#include "kvm/kvm.h" - -#include "arm-common/kvm-cpu-arch.h" - -#define ARM_MPIDR_HWID_BITMASK 0xFF00FFFFFFUL -#define ARM_CPU_ID 3, 0, 0, 0 -#define ARM_CPU_ID_MPIDR 5 -#define ARM_CPU_CTRL 3, 0, 1, 0 -#define ARM_CPU_CTRL_SCTLR_EL1 0 - -void kvm_cpu__select_features(struct kvm *kvm, struct kvm_vcpu_init *init); -int kvm_cpu__configure_features(struct kvm_cpu *vcpu); -int kvm_cpu__setup_pvtime(struct kvm_cpu *vcpu); -int kvm_cpu__teardown_pvtime(struct kvm *kvm); - -#endif /* KVM__KVM_CPU_ARCH_H */ diff --git a/arm/aarch64/kvm-cpu.c b/arm/aarch64/kvm-cpu.c deleted file mode 100644 index 7b6061a..0000000 --- a/arm/aarch64/kvm-cpu.c +++ /dev/null @@ -1,330 +0,0 @@ -#include "kvm/kvm-cpu.h" -#include "kvm/kvm.h" -#include "kvm/virtio.h" - -#include -#include - -#define COMPAT_PSR_F_BIT 0x00000040 -#define COMPAT_PSR_I_BIT 0x00000080 -#define COMPAT_PSR_E_BIT 0x00000200 -#define COMPAT_PSR_MODE_SVC 0x00000013 - -#define SCTLR_EL1_E0E_MASK (1 << 24) -#define SCTLR_EL1_EE_MASK (1 << 25) - -static __u64 __core_reg_id(__u64 offset) -{ - __u64 id = KVM_REG_ARM64 | KVM_REG_ARM_CORE | offset; - - if (offset < KVM_REG_ARM_CORE_REG(fp_regs)) - id |= KVM_REG_SIZE_U64; - else if (offset < KVM_REG_ARM_CORE_REG(fp_regs.fpsr)) - id |= KVM_REG_SIZE_U128; - else - id |= KVM_REG_SIZE_U32; - - return id; -} - -#define ARM64_CORE_REG(x) __core_reg_id(KVM_REG_ARM_CORE_REG(x)) - -unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vcpu) -{ - struct kvm_one_reg reg; - u64 mpidr; - - reg.id = ARM64_SYS_REG(ARM_CPU_ID, ARM_CPU_ID_MPIDR); - reg.addr = (u64)&mpidr; - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (get_mpidr vcpu%ld", vcpu->cpu_id); - - return mpidr; -} - -static void reset_vcpu_aarch32(struct kvm_cpu *vcpu) -{ - struct kvm *kvm = vcpu->kvm; - struct kvm_one_reg reg; - u64 data; - - reg.addr = (u64)&data; - - /* pstate = all interrupts masked */ - data = COMPAT_PSR_I_BIT | COMPAT_PSR_F_BIT | COMPAT_PSR_MODE_SVC; - reg.id = ARM64_CORE_REG(regs.pstate); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (spsr[EL1])"); - - /* Secondary cores are stopped awaiting PSCI wakeup */ - if (vcpu->cpu_id != 0) - return; - - /* r0 = 0 */ - data = 0; - reg.id = ARM64_CORE_REG(regs.regs[0]); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (r0)"); - - /* r1 = machine type (-1) */ - data = -1; - reg.id = ARM64_CORE_REG(regs.regs[1]); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (r1)"); - - /* r2 = physical address of the device tree blob */ - data = kvm->arch.dtb_guest_start; - reg.id = ARM64_CORE_REG(regs.regs[2]); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (r2)"); - - /* pc = start of kernel image */ - data = kvm->arch.kern_guest_start; - reg.id = ARM64_CORE_REG(regs.pc); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (pc)"); -} - -static void reset_vcpu_aarch64(struct kvm_cpu *vcpu) -{ - struct kvm *kvm = vcpu->kvm; - struct kvm_one_reg reg; - u64 data; - - reg.addr = (u64)&data; - - /* pstate = all interrupts masked */ - data = PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1h; - reg.id = ARM64_CORE_REG(regs.pstate); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (spsr[EL1])"); - - /* x1...x3 = 0 */ - data = 0; - reg.id = ARM64_CORE_REG(regs.regs[1]); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (x1)"); - - reg.id = ARM64_CORE_REG(regs.regs[2]); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (x2)"); - - reg.id = ARM64_CORE_REG(regs.regs[3]); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (x3)"); - - /* Secondary cores are stopped awaiting PSCI wakeup */ - if (vcpu->cpu_id == 0) { - /* x0 = physical address of the device tree blob */ - data = kvm->arch.dtb_guest_start; - reg.id = ARM64_CORE_REG(regs.regs[0]); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (x0)"); - - /* pc = start of kernel image */ - data = kvm->arch.kern_guest_start; - reg.id = ARM64_CORE_REG(regs.pc); - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) - die_perror("KVM_SET_ONE_REG failed (pc)"); - } -} - -void kvm_cpu__select_features(struct kvm *kvm, struct kvm_vcpu_init *init) -{ - if (kvm->cfg.arch.aarch32_guest) { - if (!kvm__supports_extension(kvm, KVM_CAP_ARM_EL1_32BIT)) - die("32bit guests are not supported\n"); - init->features[0] |= 1UL << KVM_ARM_VCPU_EL1_32BIT; - } - - if (kvm->cfg.arch.has_pmuv3) { - if (!kvm__supports_extension(kvm, KVM_CAP_ARM_PMU_V3)) - die("PMUv3 is not supported"); - init->features[0] |= 1UL << KVM_ARM_VCPU_PMU_V3; - } - - /* Enable pointer authentication if available */ - if (kvm__supports_extension(kvm, KVM_CAP_ARM_PTRAUTH_ADDRESS) && - kvm__supports_extension(kvm, KVM_CAP_ARM_PTRAUTH_GENERIC)) { - init->features[0] |= 1UL << KVM_ARM_VCPU_PTRAUTH_ADDRESS; - init->features[0] |= 1UL << KVM_ARM_VCPU_PTRAUTH_GENERIC; - } - - /* Enable SVE if available */ - if (kvm__supports_extension(kvm, KVM_CAP_ARM_SVE)) - init->features[0] |= 1UL << KVM_ARM_VCPU_SVE; -} - -int sve_vl_parser(const struct option *opt, const char *arg, int unset) -{ - struct kvm *kvm = opt->ptr; - unsigned long val; - unsigned int vq; - - errno = 0; - val = strtoull(arg, NULL, 10); - if (errno == ERANGE) - die("SVE vector length too large: %s", arg); - - if (!val || (val & (val - 1))) - die("SVE vector length isn't power of 2: %s", arg); - - vq = val / 128; - if (vq > KVM_ARM64_SVE_VQ_MAX || vq < KVM_ARM64_SVE_VQ_MIN) - die("SVE vector length out of range: %s", arg); - - kvm->cfg.arch.sve_max_vq = vq; - return 0; -} - -static int vcpu_configure_sve(struct kvm_cpu *vcpu) -{ - unsigned int max_vq = vcpu->kvm->cfg.arch.sve_max_vq; - int feature = KVM_ARM_VCPU_SVE; - - if (max_vq) { - unsigned long vls[KVM_ARM64_SVE_VLS_WORDS]; - struct kvm_one_reg reg = { - .id = KVM_REG_ARM64_SVE_VLS, - .addr = (u64)&vls, - }; - unsigned int vq; - - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®)) - die_perror("KVM_GET_ONE_REG failed (KVM_ARM64_SVE_VLS)"); - - if (!test_bit(max_vq - KVM_ARM64_SVE_VQ_MIN, vls)) - die("SVE vector length (%u) not supported", max_vq * 128); - - for (vq = KVM_ARM64_SVE_VQ_MAX; vq > max_vq; vq--) - clear_bit(vq - KVM_ARM64_SVE_VQ_MIN, vls); - - if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®)) - die_perror("KVM_SET_ONE_REG failed (KVM_ARM64_SVE_VLS)"); - } - - if (ioctl(vcpu->vcpu_fd, KVM_ARM_VCPU_FINALIZE, &feature)) { - pr_err("KVM_ARM_VCPU_FINALIZE: %s", strerror(errno)); - return -1; - } - - return 0; -} - -int kvm_cpu__configure_features(struct kvm_cpu *vcpu) -{ - if (kvm__supports_extension(vcpu->kvm, KVM_CAP_ARM_SVE)) - return vcpu_configure_sve(vcpu); - - return 0; -} - -void kvm_cpu__reset_vcpu(struct kvm_cpu *vcpu) -{ - struct kvm *kvm = vcpu->kvm; - cpu_set_t *affinity; - int ret; - - affinity = kvm->arch.vcpu_affinity_cpuset; - if (affinity) { - ret = sched_setaffinity(0, sizeof(cpu_set_t), affinity); - if (ret == -1) - die_perror("sched_setaffinity"); - } - - if (kvm->cfg.arch.aarch32_guest) - return reset_vcpu_aarch32(vcpu); - else - return reset_vcpu_aarch64(vcpu); -} - -int kvm_cpu__get_endianness(struct kvm_cpu *vcpu) -{ - struct kvm_one_reg reg; - u64 psr; - u64 sctlr; - - /* - * Quoting the definition given by Peter Maydell: - * - * "Endianness of the CPU which does the virtio reset at the - * point when it does that reset" - * - * We first check for an AArch32 guest: its endianness can - * change when using SETEND, which affects the CPSR.E bit. - * - * If we're AArch64, use SCTLR_EL1.E0E if access comes from - * EL0, and SCTLR_EL1.EE if access comes from EL1. - */ - reg.id = ARM64_CORE_REG(regs.pstate); - reg.addr = (u64)&psr; - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (spsr[EL1])"); - - if (psr & PSR_MODE32_BIT) - return (psr & COMPAT_PSR_E_BIT) ? VIRTIO_ENDIAN_BE : VIRTIO_ENDIAN_LE; - - reg.id = ARM64_SYS_REG(ARM_CPU_CTRL, ARM_CPU_CTRL_SCTLR_EL1); - reg.addr = (u64)&sctlr; - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (SCTLR_EL1)"); - - if ((psr & PSR_MODE_MASK) == PSR_MODE_EL0t) - sctlr &= SCTLR_EL1_E0E_MASK; - else - sctlr &= SCTLR_EL1_EE_MASK; - return sctlr ? VIRTIO_ENDIAN_BE : VIRTIO_ENDIAN_LE; -} - -void kvm_cpu__show_code(struct kvm_cpu *vcpu) -{ - struct kvm_one_reg reg; - unsigned long data; - int debug_fd = kvm_cpu__get_debug_fd(); - - reg.addr = (u64)&data; - - dprintf(debug_fd, "\n*pc:\n"); - reg.id = ARM64_CORE_REG(regs.pc); - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (show_code @ PC)"); - - kvm__dump_mem(vcpu->kvm, data, 32, debug_fd); - - dprintf(debug_fd, "\n*lr:\n"); - reg.id = ARM64_CORE_REG(regs.regs[30]); - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (show_code @ LR)"); - - kvm__dump_mem(vcpu->kvm, data, 32, debug_fd); -} - -void kvm_cpu__show_registers(struct kvm_cpu *vcpu) -{ - struct kvm_one_reg reg; - unsigned long data; - int debug_fd = kvm_cpu__get_debug_fd(); - - reg.addr = (u64)&data; - dprintf(debug_fd, "\n Registers:\n"); - - reg.id = ARM64_CORE_REG(regs.pc); - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (pc)"); - dprintf(debug_fd, " PC: 0x%lx\n", data); - - reg.id = ARM64_CORE_REG(regs.pstate); - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (pstate)"); - dprintf(debug_fd, " PSTATE: 0x%lx\n", data); - - reg.id = ARM64_CORE_REG(sp_el1); - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (sp_el1)"); - dprintf(debug_fd, " SP_EL1: 0x%lx\n", data); - - reg.id = ARM64_CORE_REG(regs.regs[30]); - if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) - die("KVM_GET_ONE_REG failed (lr)"); - dprintf(debug_fd, " LR: 0x%lx\n", data); -} diff --git a/arm/include/arm-common/kvm-cpu-arch.h b/arm/include/kvm/kvm-cpu-arch.h similarity index 82% rename from arm/include/arm-common/kvm-cpu-arch.h rename to arm/include/kvm/kvm-cpu-arch.h index 923d2c4..1af394a 100644 --- a/arm/include/arm-common/kvm-cpu-arch.h +++ b/arm/include/kvm/kvm-cpu-arch.h @@ -1,11 +1,17 @@ #ifndef ARM_COMMON__KVM_CPU_ARCH_H #define ARM_COMMON__KVM_CPU_ARCH_H +#include "kvm/kvm.h" + #include #include #include -struct kvm; +#define ARM_MPIDR_HWID_BITMASK 0xFF00FFFFFFUL +#define ARM_CPU_ID 3, 0, 0, 0 +#define ARM_CPU_ID_MPIDR 5 +#define ARM_CPU_CTRL 3, 0, 1, 0 +#define ARM_CPU_CTRL_SCTLR_EL1 0 struct kvm_cpu { pthread_t thread; @@ -58,5 +64,7 @@ static inline bool kvm_cpu__emulate_mmio(struct kvm_cpu *vcpu, u64 phys_addr, } unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vcpu); +int kvm_cpu__setup_pvtime(struct kvm_cpu *vcpu); +int kvm_cpu__teardown_pvtime(struct kvm *kvm); #endif /* ARM_COMMON__KVM_CPU_ARCH_H */ diff --git a/arm/kvm-cpu.c b/arm/kvm-cpu.c index a43eb90..94c08a4 100644 --- a/arm/kvm-cpu.c +++ b/arm/kvm-cpu.c @@ -1,5 +1,17 @@ #include "kvm/kvm.h" #include "kvm/kvm-cpu.h" +#include "kvm/virtio.h" + +#include +#include + +#define COMPAT_PSR_F_BIT 0x00000040 +#define COMPAT_PSR_I_BIT 0x00000080 +#define COMPAT_PSR_E_BIT 0x00000200 +#define COMPAT_PSR_MODE_SVC 0x00000013 + +#define SCTLR_EL1_E0E_MASK (1 << 24) +#define SCTLR_EL1_EE_MASK (1 << 25) static int debug_fd; @@ -35,6 +47,74 @@ int kvm_cpu__register_kvm_arm_target(struct kvm_arm_target *target) return -ENOSPC; } +static void kvm_cpu__select_features(struct kvm *kvm, struct kvm_vcpu_init *init) +{ + if (kvm->cfg.arch.aarch32_guest) { + if (!kvm__supports_extension(kvm, KVM_CAP_ARM_EL1_32BIT)) + die("32bit guests are not supported\n"); + init->features[0] |= 1UL << KVM_ARM_VCPU_EL1_32BIT; + } + + if (kvm->cfg.arch.has_pmuv3) { + if (!kvm__supports_extension(kvm, KVM_CAP_ARM_PMU_V3)) + die("PMUv3 is not supported"); + init->features[0] |= 1UL << KVM_ARM_VCPU_PMU_V3; + } + + /* Enable pointer authentication if available */ + if (kvm__supports_extension(kvm, KVM_CAP_ARM_PTRAUTH_ADDRESS) && + kvm__supports_extension(kvm, KVM_CAP_ARM_PTRAUTH_GENERIC)) { + init->features[0] |= 1UL << KVM_ARM_VCPU_PTRAUTH_ADDRESS; + init->features[0] |= 1UL << KVM_ARM_VCPU_PTRAUTH_GENERIC; + } + + /* Enable SVE if available */ + if (kvm__supports_extension(kvm, KVM_CAP_ARM_SVE)) + init->features[0] |= 1UL << KVM_ARM_VCPU_SVE; +} + +static int vcpu_configure_sve(struct kvm_cpu *vcpu) +{ + unsigned int max_vq = vcpu->kvm->cfg.arch.sve_max_vq; + int feature = KVM_ARM_VCPU_SVE; + + if (max_vq) { + unsigned long vls[KVM_ARM64_SVE_VLS_WORDS]; + struct kvm_one_reg reg = { + .id = KVM_REG_ARM64_SVE_VLS, + .addr = (u64)&vls, + }; + unsigned int vq; + + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®)) + die_perror("KVM_GET_ONE_REG failed (KVM_ARM64_SVE_VLS)"); + + if (!test_bit(max_vq - KVM_ARM64_SVE_VQ_MIN, vls)) + die("SVE vector length (%u) not supported", max_vq * 128); + + for (vq = KVM_ARM64_SVE_VQ_MAX; vq > max_vq; vq--) + clear_bit(vq - KVM_ARM64_SVE_VQ_MIN, vls); + + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®)) + die_perror("KVM_SET_ONE_REG failed (KVM_ARM64_SVE_VLS)"); + } + + if (ioctl(vcpu->vcpu_fd, KVM_ARM_VCPU_FINALIZE, &feature)) { + pr_err("KVM_ARM_VCPU_FINALIZE: %s", strerror(errno)); + return -1; + } + + return 0; +} + +static int kvm_cpu__configure_features(struct kvm_cpu *vcpu) +{ + if (kvm__supports_extension(vcpu->kvm, KVM_CAP_ARM_SVE)) + return vcpu_configure_sve(vcpu); + + return 0; +} + struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, unsigned long cpu_id) { struct kvm_arm_target *target = NULL; @@ -151,3 +231,251 @@ bool kvm_cpu__handle_exit(struct kvm_cpu *vcpu) void kvm_cpu__show_page_tables(struct kvm_cpu *vcpu) { } + +static __u64 __core_reg_id(__u64 offset) +{ + __u64 id = KVM_REG_ARM64 | KVM_REG_ARM_CORE | offset; + + if (offset < KVM_REG_ARM_CORE_REG(fp_regs)) + id |= KVM_REG_SIZE_U64; + else if (offset < KVM_REG_ARM_CORE_REG(fp_regs.fpsr)) + id |= KVM_REG_SIZE_U128; + else + id |= KVM_REG_SIZE_U32; + + return id; +} + +#define ARM64_CORE_REG(x) __core_reg_id(KVM_REG_ARM_CORE_REG(x)) + +unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vcpu) +{ + struct kvm_one_reg reg; + u64 mpidr; + + reg.id = ARM64_SYS_REG(ARM_CPU_ID, ARM_CPU_ID_MPIDR); + reg.addr = (u64)&mpidr; + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) + die("KVM_GET_ONE_REG failed (get_mpidr vcpu%ld", vcpu->cpu_id); + + return mpidr; +} + +static void reset_vcpu_aarch32(struct kvm_cpu *vcpu) +{ + struct kvm *kvm = vcpu->kvm; + struct kvm_one_reg reg; + u64 data; + + reg.addr = (u64)&data; + + /* pstate = all interrupts masked */ + data = COMPAT_PSR_I_BIT | COMPAT_PSR_F_BIT | COMPAT_PSR_MODE_SVC; + reg.id = ARM64_CORE_REG(regs.pstate); + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) + die_perror("KVM_SET_ONE_REG failed (spsr[EL1])"); + + /* Secondary cores are stopped awaiting PSCI wakeup */ + if (vcpu->cpu_id != 0) + return; + + /* r0 = 0 */ + data = 0; + reg.id = ARM64_CORE_REG(regs.regs[0]); + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) + die_perror("KVM_SET_ONE_REG failed (r0)"); + + /* r1 = machine type (-1) */ + data = -1; + reg.id = ARM64_CORE_REG(regs.regs[1]); + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) + die_perror("KVM_SET_ONE_REG failed (r1)"); + + /* r2 = physical address of the device tree blob */ + data = kvm->arch.dtb_guest_start; + reg.id = ARM64_CORE_REG(regs.regs[2]); + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) + die_perror("KVM_SET_ONE_REG failed (r2)"); + + /* pc = start of kernel image */ + data = kvm->arch.kern_guest_start; + reg.id = ARM64_CORE_REG(regs.pc); + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) + die_perror("KVM_SET_ONE_REG failed (pc)"); +} + +static void reset_vcpu_aarch64(struct kvm_cpu *vcpu) +{ + struct kvm *kvm = vcpu->kvm; + struct kvm_one_reg reg; + u64 data; + + reg.addr = (u64)&data; + + /* pstate = all interrupts masked */ + data = PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1h; + reg.id = ARM64_CORE_REG(regs.pstate); + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) + die_perror("KVM_SET_ONE_REG failed (spsr[EL1])"); + + /* x1...x3 = 0 */ + data = 0; + reg.id = ARM64_CORE_REG(regs.regs[1]); + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) + die_perror("KVM_SET_ONE_REG failed (x1)"); + + reg.id = ARM64_CORE_REG(regs.regs[2]); + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) + die_perror("KVM_SET_ONE_REG failed (x2)"); + + reg.id = ARM64_CORE_REG(regs.regs[3]); + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) + die_perror("KVM_SET_ONE_REG failed (x3)"); + + /* Secondary cores are stopped awaiting PSCI wakeup */ + if (vcpu->cpu_id == 0) { + /* x0 = physical address of the device tree blob */ + data = kvm->arch.dtb_guest_start; + reg.id = ARM64_CORE_REG(regs.regs[0]); + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) + die_perror("KVM_SET_ONE_REG failed (x0)"); + + /* pc = start of kernel image */ + data = kvm->arch.kern_guest_start; + reg.id = ARM64_CORE_REG(regs.pc); + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) + die_perror("KVM_SET_ONE_REG failed (pc)"); + } +} + +int sve_vl_parser(const struct option *opt, const char *arg, int unset) +{ + struct kvm *kvm = opt->ptr; + unsigned long val; + unsigned int vq; + + errno = 0; + val = strtoull(arg, NULL, 10); + if (errno == ERANGE) + die("SVE vector length too large: %s", arg); + + if (!val || (val & (val - 1))) + die("SVE vector length isn't power of 2: %s", arg); + + vq = val / 128; + if (vq > KVM_ARM64_SVE_VQ_MAX || vq < KVM_ARM64_SVE_VQ_MIN) + die("SVE vector length out of range: %s", arg); + + kvm->cfg.arch.sve_max_vq = vq; + return 0; +} + +void kvm_cpu__reset_vcpu(struct kvm_cpu *vcpu) +{ + struct kvm *kvm = vcpu->kvm; + cpu_set_t *affinity; + int ret; + + affinity = kvm->arch.vcpu_affinity_cpuset; + if (affinity) { + ret = sched_setaffinity(0, sizeof(cpu_set_t), affinity); + if (ret == -1) + die_perror("sched_setaffinity"); + } + + if (kvm->cfg.arch.aarch32_guest) + return reset_vcpu_aarch32(vcpu); + else + return reset_vcpu_aarch64(vcpu); +} + +int kvm_cpu__get_endianness(struct kvm_cpu *vcpu) +{ + struct kvm_one_reg reg; + u64 psr; + u64 sctlr; + + /* + * Quoting the definition given by Peter Maydell: + * + * "Endianness of the CPU which does the virtio reset at the + * point when it does that reset" + * + * We first check for an AArch32 guest: its endianness can + * change when using SETEND, which affects the CPSR.E bit. + * + * If we're AArch64, use SCTLR_EL1.E0E if access comes from + * EL0, and SCTLR_EL1.EE if access comes from EL1. + */ + reg.id = ARM64_CORE_REG(regs.pstate); + reg.addr = (u64)&psr; + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) + die("KVM_GET_ONE_REG failed (spsr[EL1])"); + + if (psr & PSR_MODE32_BIT) + return (psr & COMPAT_PSR_E_BIT) ? VIRTIO_ENDIAN_BE : VIRTIO_ENDIAN_LE; + + reg.id = ARM64_SYS_REG(ARM_CPU_CTRL, ARM_CPU_CTRL_SCTLR_EL1); + reg.addr = (u64)&sctlr; + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) + die("KVM_GET_ONE_REG failed (SCTLR_EL1)"); + + if ((psr & PSR_MODE_MASK) == PSR_MODE_EL0t) + sctlr &= SCTLR_EL1_E0E_MASK; + else + sctlr &= SCTLR_EL1_EE_MASK; + return sctlr ? VIRTIO_ENDIAN_BE : VIRTIO_ENDIAN_LE; +} + +void kvm_cpu__show_code(struct kvm_cpu *vcpu) +{ + struct kvm_one_reg reg; + unsigned long data; + int debug_fd = kvm_cpu__get_debug_fd(); + + reg.addr = (u64)&data; + + dprintf(debug_fd, "\n*pc:\n"); + reg.id = ARM64_CORE_REG(regs.pc); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) + die("KVM_GET_ONE_REG failed (show_code @ PC)"); + + kvm__dump_mem(vcpu->kvm, data, 32, debug_fd); + + dprintf(debug_fd, "\n*lr:\n"); + reg.id = ARM64_CORE_REG(regs.regs[30]); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) + die("KVM_GET_ONE_REG failed (show_code @ LR)"); + + kvm__dump_mem(vcpu->kvm, data, 32, debug_fd); +} + +void kvm_cpu__show_registers(struct kvm_cpu *vcpu) +{ + struct kvm_one_reg reg; + unsigned long data; + int debug_fd = kvm_cpu__get_debug_fd(); + + reg.addr = (u64)&data; + dprintf(debug_fd, "\n Registers:\n"); + + reg.id = ARM64_CORE_REG(regs.pc); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) + die("KVM_GET_ONE_REG failed (pc)"); + dprintf(debug_fd, " PC: 0x%lx\n", data); + + reg.id = ARM64_CORE_REG(regs.pstate); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) + die("KVM_GET_ONE_REG failed (pstate)"); + dprintf(debug_fd, " PSTATE: 0x%lx\n", data); + + reg.id = ARM64_CORE_REG(sp_el1); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) + die("KVM_GET_ONE_REG failed (sp_el1)"); + dprintf(debug_fd, " SP_EL1: 0x%lx\n", data); + + reg.id = ARM64_CORE_REG(regs.regs[30]); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) + die("KVM_GET_ONE_REG failed (lr)"); + dprintf(debug_fd, " LR: 0x%lx\n", data); +} From patchwork Tue Mar 25 21:39:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 14029561 Received: from out-177.mta1.migadu.com (out-177.mta1.migadu.com [95.215.58.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A07D269D13 for ; Tue, 25 Mar 2025 21:40:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938807; cv=none; b=tJawioMR4hmY3kW1jIaQ1z6WECgJPPYiHza6aA9GY3gf6hB+LbmIuiI1lJTQjmoXM7oK6htk5kw5tTm3+f87I4ejFRlnWGuek4XSKm2FoH5EkdqCmLhSVbpBNlq2lsDVbSJOsY/1yMN7PwsmF8Rxl7UlnlMAigre7yvVKXn+Hk8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938807; c=relaxed/simple; bh=gr5C3iKUv9+Qm+cHwkG0yVdflK2MlZncn6K8MTFx4/U=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=mXbB6cPx3WY1JGyV9zk7pP+FhmK52YwPFRALdLpZenT7lT2F9A0DOs/jbCMpnmnog96O8JXdZi9nbO8pWCLPAWc4Fy0U62EabNi0UaVxvaIYa09Q8f0l5zqEWGzJaYz2guY8CE37oxmRxNeBlx8I8+u5p0u18+dPHu1HJ8+Q1oo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=H+ZDICrQ; arc=none smtp.client-ip=95.215.58.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="H+ZDICrQ" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1742938801; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zm1afkfwfFnya3XfdChEQoMTsnuGAY9/LUZ+lOu9va4=; b=H+ZDICrQiy2BLFiUDpR7peP8ctQjv6vIyx5RdjxlRWvwL/qbHBogUoc/cTdxBkBTntpepf uXJ8gx10p4Fl9i8s4xH6d+6DMgL5z2hsWPVaVKvSOk7OrYHDnDqGANOgCYELrDAGxvQLBN d+IVnXq/JJqkz4lFzdtQCVq3Hw7gCi8= From: Oliver Upton To: kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, Will Deacon , Julien Thierry , Marc Zyngier , Alexandru Elisei , Andre Przywara , Oliver Upton Subject: [PATCH kvmtool 5/9] arm64: Combine kvm-config-arch.h Date: Tue, 25 Mar 2025 14:39:35 -0700 Message-Id: <20250325213939.2414498-6-oliver.upton@linux.dev> In-Reply-To: <20250325213939.2414498-1-oliver.upton@linux.dev> References: <20250325213939.2414498-1-oliver.upton@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT You get the point... Acked-by: Marc Zyngier Signed-off-by: Oliver Upton --- arm/aarch64/include/kvm/kvm-config-arch.h | 29 ------------------- .../{arm-common => kvm}/kvm-config-arch.h | 24 +++++++++++++-- 2 files changed, 22 insertions(+), 31 deletions(-) delete mode 100644 arm/aarch64/include/kvm/kvm-config-arch.h rename arm/include/{arm-common => kvm}/kvm-config-arch.h (54%) diff --git a/arm/aarch64/include/kvm/kvm-config-arch.h b/arm/aarch64/include/kvm/kvm-config-arch.h deleted file mode 100644 index 642fe67..0000000 --- a/arm/aarch64/include/kvm/kvm-config-arch.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef KVM__KVM_CONFIG_ARCH_H -#define KVM__KVM_CONFIG_ARCH_H - -int vcpu_affinity_parser(const struct option *opt, const char *arg, int unset); -int sve_vl_parser(const struct option *opt, const char *arg, int unset); - -#define ARM_OPT_ARCH_RUN(cfg) \ - OPT_BOOLEAN('\0', "aarch32", &(cfg)->aarch32_guest, \ - "Run AArch32 guest"), \ - OPT_BOOLEAN('\0', "pmu", &(cfg)->has_pmuv3, \ - "Create PMUv3 device. The emulated PMU will be" \ - " set to the PMU associated with the" \ - " main thread, unless --vcpu-affinity is set"), \ - OPT_BOOLEAN('\0', "disable-mte", &(cfg)->mte_disabled, \ - "Disable Memory Tagging Extension"), \ - OPT_CALLBACK('\0', "vcpu-affinity", kvm, "cpulist", \ - "Specify the CPU affinity that will apply to " \ - "all VCPUs", vcpu_affinity_parser, kvm), \ - OPT_U64('\0', "kaslr-seed", &(cfg)->kaslr_seed, \ - "Specify random seed for Kernel Address Space " \ - "Layout Randomization (KASLR)"), \ - OPT_BOOLEAN('\0', "no-pvtime", &(cfg)->no_pvtime, "Disable" \ - " stolen time"), \ - OPT_CALLBACK('\0', "sve-max-vl", NULL, "vector length", \ - "Specify the max SVE vector length (in bits) for " \ - "all vCPUs", sve_vl_parser, kvm), -#include "arm-common/kvm-config-arch.h" - -#endif /* KVM__KVM_CONFIG_ARCH_H */ diff --git a/arm/include/arm-common/kvm-config-arch.h b/arm/include/kvm/kvm-config-arch.h similarity index 54% rename from arm/include/arm-common/kvm-config-arch.h rename to arm/include/kvm/kvm-config-arch.h index 4722d8f..ee031f0 100644 --- a/arm/include/arm-common/kvm-config-arch.h +++ b/arm/include/kvm/kvm-config-arch.h @@ -18,17 +18,37 @@ struct kvm_config_arch { }; int irqchip_parser(const struct option *opt, const char *arg, int unset); +int vcpu_affinity_parser(const struct option *opt, const char *arg, int unset); +int sve_vl_parser(const struct option *opt, const char *arg, int unset); #define OPT_ARCH_RUN(pfx, cfg) \ pfx, \ - ARM_OPT_ARCH_RUN(cfg) \ + OPT_BOOLEAN('\0', "aarch32", &(cfg)->aarch32_guest, \ + "Run AArch32 guest"), \ + OPT_BOOLEAN('\0', "pmu", &(cfg)->has_pmuv3, \ + "Create PMUv3 device. The emulated PMU will be" \ + " set to the PMU associated with the" \ + " main thread, unless --vcpu-affinity is set"), \ + OPT_BOOLEAN('\0', "disable-mte", &(cfg)->mte_disabled, \ + "Disable Memory Tagging Extension"), \ + OPT_CALLBACK('\0', "vcpu-affinity", kvm, "cpulist", \ + "Specify the CPU affinity that will apply to " \ + "all VCPUs", vcpu_affinity_parser, kvm), \ + OPT_U64('\0', "kaslr-seed", &(cfg)->kaslr_seed, \ + "Specify random seed for Kernel Address Space " \ + "Layout Randomization (KASLR)"), \ + OPT_BOOLEAN('\0', "no-pvtime", &(cfg)->no_pvtime, "Disable" \ + " stolen time"), \ + OPT_CALLBACK('\0', "sve-max-vl", NULL, "vector length", \ + "Specify the max SVE vector length (in bits) for " \ + "all vCPUs", sve_vl_parser, kvm), \ OPT_STRING('\0', "dump-dtb", &(cfg)->dump_dtb_filename, \ ".dtb file", "Dump generated .dtb to specified file"), \ OPT_UINTEGER('\0', "override-bad-firmware-cntfrq", &(cfg)->force_cntfrq,\ "Specify Generic Timer frequency in guest DT to " \ "work around buggy secure firmware *Firmware should be " \ "updated to program CNTFRQ correctly*"), \ - OPT_CALLBACK_NOOPT('\0', "force-pci", NULL, "", \ + OPT_CALLBACK_NOOPT('\0', "force-pci", NULL, "", \ "Force virtio devices to use PCI as their default " \ "transport (Deprecated: Use --virtio-transport " \ "option instead)", virtio_transport_parser, kvm), \ From patchwork Tue Mar 25 21:39:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 14029560 Received: from out-174.mta1.migadu.com (out-174.mta1.migadu.com [95.215.58.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 125DE26A088 for ; Tue, 25 Mar 2025 21:40:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938807; cv=none; b=roxLzSookNz47FGEPJDzy1B1Gau4yFG/gj3lEcGiiyaeLqVCkwmq4z0gGi66LlofLufRWSuTtjhxW6sSg695pidvyFeb7uzAmY96EaKHZ/p3W2zAekMi76R9sT0KPOp1mSyyuW7gb33ghBK4KoBr4V1/UGa1EHdoZVgsIHG4Uv8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938807; c=relaxed/simple; bh=iQgGYAz+QPP5HbflwSDAvegeWKIlJ4QeMpJW4l9lAGo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qdHhqQQWhoOgMRa0WjCZNIoH+pAyLx5+VbSY89yzW5MwiOVgAnCl9HVGk0qkAY4fQSy7PCX64ZVymKe/772akRsfDHwJrxq30bn6ujzoL7wpWDAfNKRChEde0Xyd2be00dYWLAbL/owrgQM3zCMeWiFxhj/pI+sLzjgOaV3c5Rc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=TOz65J7e; arc=none smtp.client-ip=95.215.58.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="TOz65J7e" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1742938803; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WnVnLC+BrbTLwQ/rBq8l+CNs17j9rpKS2l4jwwS5bH4=; b=TOz65J7eMMK/K34No8HlsBClhdnf0vJTlCQ9+5UATrr9TSnmptGuFQNHjhJYGuZdWUZ3I3 TGkAQ27J0yuVNjMCcVhkwreMfWAnCHf6TnDaAR7cieoWaj681JKnFTHToQTZGY7ElvsS/1 0UqSgIrOV6I49dRniEsjh0S2IEGfgkg= From: Oliver Upton To: kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, Will Deacon , Julien Thierry , Marc Zyngier , Alexandru Elisei , Andre Przywara , Oliver Upton Subject: [PATCH kvmtool 6/9] arm64: Move remaining kvm/* headers Date: Tue, 25 Mar 2025 14:39:36 -0700 Message-Id: <20250325213939.2414498-7-oliver.upton@linux.dev> In-Reply-To: <20250325213939.2414498-1-oliver.upton@linux.dev> References: <20250325213939.2414498-1-oliver.upton@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Move the remaining kvm/* headers into the top-level ARM include path. Acked-by: Marc Zyngier Signed-off-by: Oliver Upton --- arm/aarch64/include/kvm/fdt-arch.h | 6 ------ arm/{aarch64 => }/include/kvm/barrier.h | 0 arm/include/{arm-common => kvm}/fdt-arch.h | 0 3 files changed, 6 deletions(-) delete mode 100644 arm/aarch64/include/kvm/fdt-arch.h rename arm/{aarch64 => }/include/kvm/barrier.h (100%) rename arm/include/{arm-common => kvm}/fdt-arch.h (100%) diff --git a/arm/aarch64/include/kvm/fdt-arch.h b/arm/aarch64/include/kvm/fdt-arch.h deleted file mode 100644 index e448bf1..0000000 --- a/arm/aarch64/include/kvm/fdt-arch.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef KVM__KVM_FDT_H -#define KVM__KVM_FDT_H - -#include "arm-common/fdt-arch.h" - -#endif /* KVM__KVM_FDT_H */ diff --git a/arm/aarch64/include/kvm/barrier.h b/arm/include/kvm/barrier.h similarity index 100% rename from arm/aarch64/include/kvm/barrier.h rename to arm/include/kvm/barrier.h diff --git a/arm/include/arm-common/fdt-arch.h b/arm/include/kvm/fdt-arch.h similarity index 100% rename from arm/include/arm-common/fdt-arch.h rename to arm/include/kvm/fdt-arch.h From patchwork Tue Mar 25 21:39:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 14029562 Received: from out-188.mta1.migadu.com (out-188.mta1.migadu.com [95.215.58.188]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D44C9266B51 for ; Tue, 25 Mar 2025 21:40:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.188 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938808; cv=none; b=WP5yYMHf/JceP5hQ2SsnHDgb3mcjBPHkVGNZxsP1Ge6xZlWkcZT4PKf7Hhiq5YNG2yHg1PBfLE7C2UDFCpzboMxbAjBmNvWMXChuqUNZENd6983+K+RGLRiER5jmcORVCtC4rHRa7g++/z7NHX9ayMFt1+FWSMxY0Keg5Y30DPg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938808; c=relaxed/simple; bh=ptYRt89sgou4FpaEtUAOMprqib9DDbfe6Q/dbNifWHs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=oMWMVCE1DAd6rsqsrAOPg6HjDIIBsQImVa5serknrUhL0DgnwY1O3ya07PCeX7ZNJ85PpuE3o6BgJfVTmgqIXkvuf3AdHUTQCcNJ0xr2sRmGhHVV0f1sAU4ReqDEQXVodlqxbNnjlc2hugHMhB7Zq8KMnlWCxXXWRzYE/J++FEI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=EprJpRog; arc=none smtp.client-ip=95.215.58.188 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="EprJpRog" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1742938805; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xOvg56wudx30L0mZ1KHo5OKQo6JZQ2J4gWt09byKS9Y=; b=EprJpRogyPfdiRVOZrInUodVdDdN+OCvMPf+aa5HBLPlSUpG75jh+71kQCs+e8UjDJcSO1 mQwYnQ2DLDiGKTyW8rL9Qf94FKElGe+2nG+XQEYdUwDttWDHv+IMaK3p8kXx8DVvuBWuOR aoUE20HKYB+alrmiDT1Q/CG7mgtonFc= From: Oliver Upton To: kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, Will Deacon , Julien Thierry , Marc Zyngier , Alexandru Elisei , Andre Przywara , Oliver Upton Subject: [PATCH kvmtool 7/9] arm64: Move asm headers Date: Tue, 25 Mar 2025 14:39:37 -0700 Message-Id: <20250325213939.2414498-8-oliver.upton@linux.dev> In-Reply-To: <20250325213939.2414498-1-oliver.upton@linux.dev> References: <20250325213939.2414498-1-oliver.upton@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Acked-by: Marc Zyngier Signed-off-by: Oliver Upton --- Makefile | 1 - arm/{aarch64 => }/include/asm/image.h | 0 arm/{aarch64 => }/include/asm/kernel.h | 0 arm/{aarch64 => }/include/asm/kvm.h | 0 arm/{aarch64 => }/include/asm/pmu.h | 0 arm/{aarch64 => }/include/asm/sve_context.h | 0 6 files changed, 1 deletion(-) rename arm/{aarch64 => }/include/asm/image.h (100%) rename arm/{aarch64 => }/include/asm/kernel.h (100%) rename arm/{aarch64 => }/include/asm/kvm.h (100%) rename arm/{aarch64 => }/include/asm/pmu.h (100%) rename arm/{aarch64 => }/include/asm/sve_context.h (100%) diff --git a/Makefile b/Makefile index 25ee9b0..3085609 100644 --- a/Makefile +++ b/Makefile @@ -182,7 +182,6 @@ ifeq ($(ARCH), arm64) OBJS += arm/pvtime.o OBJS += arm/pmu.o ARCH_INCLUDE := arm/include - ARCH_INCLUDE += -Iarm/aarch64/include ARCH_WANT_LIBFDT := y ARCH_HAS_FLASH_MEM := y diff --git a/arm/aarch64/include/asm/image.h b/arm/include/asm/image.h similarity index 100% rename from arm/aarch64/include/asm/image.h rename to arm/include/asm/image.h diff --git a/arm/aarch64/include/asm/kernel.h b/arm/include/asm/kernel.h similarity index 100% rename from arm/aarch64/include/asm/kernel.h rename to arm/include/asm/kernel.h diff --git a/arm/aarch64/include/asm/kvm.h b/arm/include/asm/kvm.h similarity index 100% rename from arm/aarch64/include/asm/kvm.h rename to arm/include/asm/kvm.h diff --git a/arm/aarch64/include/asm/pmu.h b/arm/include/asm/pmu.h similarity index 100% rename from arm/aarch64/include/asm/pmu.h rename to arm/include/asm/pmu.h diff --git a/arm/aarch64/include/asm/sve_context.h b/arm/include/asm/sve_context.h similarity index 100% rename from arm/aarch64/include/asm/sve_context.h rename to arm/include/asm/sve_context.h From patchwork Tue Mar 25 21:39:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 14029563 Received: from out-180.mta1.migadu.com (out-180.mta1.migadu.com [95.215.58.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99EAA26A0A2 for ; Tue, 25 Mar 2025 21:40:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938810; cv=none; b=WKPbBQLeXmLSndIJBqBBjgnpAhoxHGdJLrLIcyV0HkAdxhE51oExq5JRQGFDy6K+ltWrz1TljiT2siAEj9xyA5n1zbdL+1P75XCXpk8dWQ9tn3bZXI36NTwQFT4YkfIkqeWEojR8SbO1wp33nC3jlkxiKzID8tSyzbM3/UNMGqY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742938810; c=relaxed/simple; bh=vXrB6hJs3o1Fk4seq/2z4SQtzntmV/T6Sjg1l58u/VM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=RAArn3Rx5z4QBLSyN11pDGrkrGIhhgTam77ltYg/cXQTQzQjK5t8qClZ0vRxBuuRNy8j7yc820HHsvnHVDIZP7yCLC17gcDCwctp0lTM9i2lin+BT3ZlfRqJpisbBxAX/eW+KgERM6S0zkVb67ojVmhcw4P1f1vSMRRyPVOI/Mc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=k6+zC7QH; arc=none smtp.client-ip=95.215.58.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="k6+zC7QH" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1742938806; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ZPsM/NZfchQy4UiNZb92MrGPviC2hHtn5e4gCTHXvdY=; b=k6+zC7QHoRZKDEY3pEgGh1b61SftY5qq63QlB0dTX6ALCUi/3x62kzDIijVHcjLcr27JLK f68jCSQ9d54Gcvu5LOH78jJpf/KjcNnjsB9cCuty11OtcC0m6LsBZB52UrTaqmcFLc5D0+ U1UxBspi7dAtkAZNysvs1EvS6aRKeZg= From: Oliver Upton To: kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, Will Deacon , Julien Thierry , Marc Zyngier , Alexandru Elisei , Andre Przywara , Oliver Upton Subject: [PATCH kvmtool 8/9] arm64: Rename top-level directory Date: Tue, 25 Mar 2025 14:39:38 -0700 Message-Id: <20250325213939.2414498-9-oliver.upton@linux.dev> In-Reply-To: <20250325213939.2414498-1-oliver.upton@linux.dev> References: <20250325213939.2414498-1-oliver.upton@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT As a finishing touch, align the top-level arch directory name with the kernel's naming scheme. Acked-by: Marc Zyngier Signed-off-by: Oliver Upton --- Makefile | 24 ++++++++++---------- {arm => arm64}/arm-cpu.c | 0 {arm => arm64}/fdt.c | 0 {arm => arm64}/gic.c | 0 {arm => arm64}/gicv2m.c | 0 {arm => arm64}/include/arm-common/gic.h | 0 {arm => arm64}/include/arm-common/pci.h | 0 {arm => arm64}/include/arm-common/timer.h | 0 {arm => arm64}/include/asm/image.h | 0 {arm => arm64}/include/asm/kernel.h | 0 {arm => arm64}/include/asm/kvm.h | 0 {arm => arm64}/include/asm/pmu.h | 0 {arm => arm64}/include/asm/sve_context.h | 0 {arm => arm64}/include/kvm/barrier.h | 0 {arm => arm64}/include/kvm/fdt-arch.h | 0 {arm => arm64}/include/kvm/kvm-arch.h | 0 {arm => arm64}/include/kvm/kvm-config-arch.h | 0 {arm => arm64}/include/kvm/kvm-cpu-arch.h | 0 {arm => arm64}/ioport.c | 0 {arm => arm64}/kvm-cpu.c | 0 {arm => arm64}/kvm.c | 0 {arm => arm64}/pci.c | 0 {arm => arm64}/pmu.c | 0 {arm => arm64}/pvtime.c | 0 {arm => arm64}/timer.c | 0 25 files changed, 12 insertions(+), 12 deletions(-) rename {arm => arm64}/arm-cpu.c (100%) rename {arm => arm64}/fdt.c (100%) rename {arm => arm64}/gic.c (100%) rename {arm => arm64}/gicv2m.c (100%) rename {arm => arm64}/include/arm-common/gic.h (100%) rename {arm => arm64}/include/arm-common/pci.h (100%) rename {arm => arm64}/include/arm-common/timer.h (100%) rename {arm => arm64}/include/asm/image.h (100%) rename {arm => arm64}/include/asm/kernel.h (100%) rename {arm => arm64}/include/asm/kvm.h (100%) rename {arm => arm64}/include/asm/pmu.h (100%) rename {arm => arm64}/include/asm/sve_context.h (100%) rename {arm => arm64}/include/kvm/barrier.h (100%) rename {arm => arm64}/include/kvm/fdt-arch.h (100%) rename {arm => arm64}/include/kvm/kvm-arch.h (100%) rename {arm => arm64}/include/kvm/kvm-config-arch.h (100%) rename {arm => arm64}/include/kvm/kvm-cpu-arch.h (100%) rename {arm => arm64}/ioport.c (100%) rename {arm => arm64}/kvm-cpu.c (100%) rename {arm => arm64}/kvm.c (100%) rename {arm => arm64}/pci.c (100%) rename {arm => arm64}/pmu.c (100%) rename {arm => arm64}/pvtime.c (100%) rename {arm => arm64}/timer.c (100%) diff --git a/Makefile b/Makefile index 3085609..60e551f 100644 --- a/Makefile +++ b/Makefile @@ -169,19 +169,19 @@ endif # ARM64 ifeq ($(ARCH), arm64) DEFINES += -DCONFIG_ARM64 - OBJS += arm/fdt.o - OBJS += arm/gic.o - OBJS += arm/gicv2m.o - OBJS += arm/ioport.o - OBJS += arm/kvm.o - OBJS += arm/kvm-cpu.o - OBJS += arm/pci.o - OBJS += arm/timer.o + OBJS += arm64/fdt.o + OBJS += arm64/gic.o + OBJS += arm64/gicv2m.o + OBJS += arm64/ioport.o + OBJS += arm64/kvm.o + OBJS += arm64/kvm-cpu.o + OBJS += arm64/pci.o + OBJS += arm64/timer.o OBJS += hw/serial.o - OBJS += arm/arm-cpu.o - OBJS += arm/pvtime.o - OBJS += arm/pmu.o - ARCH_INCLUDE := arm/include + OBJS += arm64/arm-cpu.o + OBJS += arm64/pvtime.o + OBJS += arm64/pmu.o + ARCH_INCLUDE := arm64/include ARCH_WANT_LIBFDT := y ARCH_HAS_FLASH_MEM := y diff --git a/arm/arm-cpu.c b/arm64/arm-cpu.c similarity index 100% rename from arm/arm-cpu.c rename to arm64/arm-cpu.c diff --git a/arm/fdt.c b/arm64/fdt.c similarity index 100% rename from arm/fdt.c rename to arm64/fdt.c diff --git a/arm/gic.c b/arm64/gic.c similarity index 100% rename from arm/gic.c rename to arm64/gic.c diff --git a/arm/gicv2m.c b/arm64/gicv2m.c similarity index 100% rename from arm/gicv2m.c rename to arm64/gicv2m.c diff --git a/arm/include/arm-common/gic.h b/arm64/include/arm-common/gic.h similarity index 100% rename from arm/include/arm-common/gic.h rename to arm64/include/arm-common/gic.h diff --git a/arm/include/arm-common/pci.h b/arm64/include/arm-common/pci.h similarity index 100% rename from arm/include/arm-common/pci.h rename to arm64/include/arm-common/pci.h diff --git a/arm/include/arm-common/timer.h b/arm64/include/arm-common/timer.h similarity index 100% rename from arm/include/arm-common/timer.h rename to arm64/include/arm-common/timer.h diff --git a/arm/include/asm/image.h b/arm64/include/asm/image.h similarity index 100% rename from arm/include/asm/image.h rename to arm64/include/asm/image.h diff --git a/arm/include/asm/kernel.h b/arm64/include/asm/kernel.h similarity index 100% rename from arm/include/asm/kernel.h rename to arm64/include/asm/kernel.h diff --git a/arm/include/asm/kvm.h b/arm64/include/asm/kvm.h similarity index 100% rename from arm/include/asm/kvm.h rename to arm64/include/asm/kvm.h diff --git a/arm/include/asm/pmu.h b/arm64/include/asm/pmu.h similarity index 100% rename from arm/include/asm/pmu.h rename to arm64/include/asm/pmu.h diff --git a/arm/include/asm/sve_context.h b/arm64/include/asm/sve_context.h similarity index 100% rename from arm/include/asm/sve_context.h rename to arm64/include/asm/sve_context.h diff --git a/arm/include/kvm/barrier.h b/arm64/include/kvm/barrier.h similarity index 100% rename from arm/include/kvm/barrier.h rename to arm64/include/kvm/barrier.h diff --git a/arm/include/kvm/fdt-arch.h b/arm64/include/kvm/fdt-arch.h similarity index 100% rename from arm/include/kvm/fdt-arch.h rename to arm64/include/kvm/fdt-arch.h diff --git a/arm/include/kvm/kvm-arch.h b/arm64/include/kvm/kvm-arch.h similarity index 100% rename from arm/include/kvm/kvm-arch.h rename to arm64/include/kvm/kvm-arch.h diff --git a/arm/include/kvm/kvm-config-arch.h b/arm64/include/kvm/kvm-config-arch.h similarity index 100% rename from arm/include/kvm/kvm-config-arch.h rename to arm64/include/kvm/kvm-config-arch.h diff --git a/arm/include/kvm/kvm-cpu-arch.h b/arm64/include/kvm/kvm-cpu-arch.h similarity index 100% rename from arm/include/kvm/kvm-cpu-arch.h rename to arm64/include/kvm/kvm-cpu-arch.h diff --git a/arm/ioport.c b/arm64/ioport.c similarity index 100% rename from arm/ioport.c rename to arm64/ioport.c diff --git a/arm/kvm-cpu.c b/arm64/kvm-cpu.c similarity index 100% rename from arm/kvm-cpu.c rename to arm64/kvm-cpu.c diff --git a/arm/kvm.c b/arm64/kvm.c similarity index 100% rename from arm/kvm.c rename to arm64/kvm.c diff --git a/arm/pci.c b/arm64/pci.c similarity index 100% rename from arm/pci.c rename to arm64/pci.c diff --git a/arm/pmu.c b/arm64/pmu.c similarity index 100% rename from arm/pmu.c rename to arm64/pmu.c diff --git a/arm/pvtime.c b/arm64/pvtime.c similarity index 100% rename from arm/pvtime.c rename to arm64/pvtime.c diff --git a/arm/timer.c b/arm64/timer.c similarity index 100% rename from arm/timer.c rename to arm64/timer.c From patchwork Tue Mar 25 21:39:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 14029564 Received: from out-178.mta1.migadu.com (out-178.mta1.migadu.com [95.215.58.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6FC6626A0B7 for ; Tue, 25 Mar 2025 21:40:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1742938808; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4pBygg55ww7iZjXC5+eJpKjdiWLeyf3O34eZggKpIlw=; b=VWogPlft4JkJmxZEG5lQkEiGm8+ZF8FxOZk9edlWJGmuL7HG7eutHcnapQnSPAoSmaSGCu 67LeYqCDnd3qWf/BspmGvICToRHbYT6PVrq080UYOloMzxcVBo34WliMYXH6e72MSflW9F Biun7kSC3ClhjrzxlQpRZItvfKt/FEk= From: Oliver Upton To: kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, Will Deacon , Julien Thierry , Marc Zyngier , Alexandru Elisei , Andre Przywara , Oliver Upton Subject: [PATCH kvmtool 9/9] arm64: Get rid of the 'arm-common' include directory Date: Tue, 25 Mar 2025 14:39:39 -0700 Message-Id: <20250325213939.2414498-10-oliver.upton@linux.dev> In-Reply-To: <20250325213939.2414498-1-oliver.upton@linux.dev> References: <20250325213939.2414498-1-oliver.upton@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Acked-by: Marc Zyngier Signed-off-by: Oliver Upton --- arm64/arm-cpu.c | 4 ++-- arm64/fdt.c | 4 ++-- arm64/gic.c | 2 +- arm64/gicv2m.c | 2 +- arm64/include/{arm-common => }/gic.h | 0 arm64/include/kvm/kvm-arch.h | 2 +- arm64/include/{arm-common => }/pci.h | 0 arm64/include/{arm-common => }/timer.h | 0 arm64/kvm.c | 2 +- arm64/pci.c | 4 ++-- arm64/pmu.c | 2 +- arm64/timer.c | 4 ++-- 12 files changed, 13 insertions(+), 13 deletions(-) rename arm64/include/{arm-common => }/gic.h (100%) rename arm64/include/{arm-common => }/pci.h (100%) rename arm64/include/{arm-common => }/timer.h (100%) diff --git a/arm64/arm-cpu.c b/arm64/arm-cpu.c index f5c8e1e..b9ca814 100644 --- a/arm64/arm-cpu.c +++ b/arm64/arm-cpu.c @@ -3,8 +3,8 @@ #include "kvm/kvm-cpu.h" #include "kvm/util.h" -#include "arm-common/gic.h" -#include "arm-common/timer.h" +#include "gic.h" +#include "timer.h" #include "asm/pmu.h" diff --git a/arm64/fdt.c b/arm64/fdt.c index 286ccad..9d93551 100644 --- a/arm64/fdt.c +++ b/arm64/fdt.c @@ -4,8 +4,8 @@ #include "kvm/kvm-cpu.h" #include "kvm/virtio-mmio.h" -#include "arm-common/gic.h" -#include "arm-common/pci.h" +#include "gic.h" +#include "pci.h" #include diff --git a/arm64/gic.c b/arm64/gic.c index 0795e95..d0d8543 100644 --- a/arm64/gic.c +++ b/arm64/gic.c @@ -3,7 +3,7 @@ #include "kvm/kvm.h" #include "kvm/virtio.h" -#include "arm-common/gic.h" +#include "gic.h" #include #include diff --git a/arm64/gicv2m.c b/arm64/gicv2m.c index b47ada8..e4e7dc8 100644 --- a/arm64/gicv2m.c +++ b/arm64/gicv2m.c @@ -5,7 +5,7 @@ #include "kvm/kvm.h" #include "kvm/util.h" -#include "arm-common/gic.h" +#include "gic.h" #define GICV2M_MSI_TYPER 0x008 #define GICV2M_MSI_SETSPI 0x040 diff --git a/arm64/include/arm-common/gic.h b/arm64/include/gic.h similarity index 100% rename from arm64/include/arm-common/gic.h rename to arm64/include/gic.h diff --git a/arm64/include/kvm/kvm-arch.h b/arm64/include/kvm/kvm-arch.h index b097186..ef3a701 100644 --- a/arm64/include/kvm/kvm-arch.h +++ b/arm64/include/kvm/kvm-arch.h @@ -10,7 +10,7 @@ #include #include -#include "arm-common/gic.h" +#include "gic.h" /* * The memory map used for ARM guests (not to scale): diff --git a/arm64/include/arm-common/pci.h b/arm64/include/pci.h similarity index 100% rename from arm64/include/arm-common/pci.h rename to arm64/include/pci.h diff --git a/arm64/include/arm-common/timer.h b/arm64/include/timer.h similarity index 100% rename from arm64/include/arm-common/timer.h rename to arm64/include/timer.h diff --git a/arm64/kvm.c b/arm64/kvm.c index 11c7a16..7d49cb4 100644 --- a/arm64/kvm.c +++ b/arm64/kvm.c @@ -5,7 +5,7 @@ #include "kvm/virtio-console.h" #include "kvm/fdt.h" -#include "arm-common/gic.h" +#include "gic.h" #include #include diff --git a/arm64/pci.c b/arm64/pci.c index 5bd82d4..99bf887 100644 --- a/arm64/pci.c +++ b/arm64/pci.c @@ -5,8 +5,8 @@ #include "kvm/pci.h" #include "kvm/util.h" -#include "arm-common/pci.h" -#include "arm-common/gic.h" +#include "pci.h" +#include "gic.h" /* * An entry in the interrupt-map table looks like: diff --git a/arm64/pmu.c b/arm64/pmu.c index 5ed4979..52f4256 100644 --- a/arm64/pmu.c +++ b/arm64/pmu.c @@ -9,7 +9,7 @@ #include "kvm/kvm-cpu.h" #include "kvm/util.h" -#include "arm-common/gic.h" +#include "gic.h" #include "asm/pmu.h" diff --git a/arm64/timer.c b/arm64/timer.c index 6acc50e..b3164f8 100644 --- a/arm64/timer.c +++ b/arm64/timer.c @@ -3,8 +3,8 @@ #include "kvm/kvm-cpu.h" #include "kvm/util.h" -#include "arm-common/gic.h" -#include "arm-common/timer.h" +#include "gic.h" +#include "timer.h" void timer__generate_fdt_nodes(void *fdt, struct kvm *kvm, int *irqs) {