From patchwork Wed Mar 26 07:21:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manikandan Muralidharan X-Patchwork-Id: 14029777 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A9A0BC36008 for ; Wed, 26 Mar 2025 07:27:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=CDECal5V85bLuwJl/5d6ibF7GHhbN5e42sBEeD3FMzo=; b=ti4i3t3Opwa6i7vTMTv+S8bHm2 NQVBhB2FfDo6sFWwMc3m9IBp/HtuWXcOZDi52JFk6ijk0QsiibawWpTZ7wJNtHHyUpAmxdeTSJCuL B8gR0Tu82RuFG1zZJTWQHg+vo/vVTqFfWyS3/EdPSSsGXetAjkq4TbG2n1QmAfrXDX3JmgBrmxmrk +Y4sQOZGRUxyRgqt3DKeyKdosr7m32iDpjSRtN9ctyYfWYO0yZKoakpR0ihgU0v63ROKYREZ1HLnW NkAc3J718zTfh5qyqOP5qnjsztz6baWoSMyjQP3wOl9ORt9tZtQ+P24BSvGe1fH8RQJI+Qex52stE w4Wxfrzw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.1 #2 (Red Hat Linux)) id 1txLAi-00000007mGp-486e; Wed, 26 Mar 2025 07:27:32 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.98.1 #2 (Red Hat Linux)) id 1txL5j-00000007lOk-3ohX; Wed, 26 Mar 2025 07:22:25 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1742973744; x=1774509744; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8VYqpJBwzckNJtWP0ZHwgshXfd1CjjdPlbtTRY4ocIs=; b=W0VjzKfBZzWXuzQQk0H0mqEhmyaqcOrosJMaYuMwqLkLD9Jmaqtih7kS TSVLPp/qxVV2ZK8S1rHzVAKv6ZrrcTUMcRH0k3ZKMDl8YTMCW5DQzMdV8 awpGSwtTftvynV/NH1grBli4MhiRyJxiz/sYI6IYEcp9mTqlqF1OpdH5L M+3KPwiwNVNd6j1uYKyMkS7n5JK27/8r1aMfyVlmvFwVbdkyiH8P804kB MlK2rzG0SE3twbUsOG4fvCJUMvHuZS7uj74fkzvDCr9ioyeZy2vuH1UV8 lqoBDpDdVrgIoqnbUZDSed05aT+RZhxLuwZ1A9KMfTtossciXn7wx+W2a g==; X-CSE-ConnectionGUID: QApF+UAWRZutY2upgn7tGQ== X-CSE-MsgGUID: VAFzNfzLQ5+vOs3yEZkekg== X-IronPort-AV: E=Sophos;i="6.14,277,1736838000"; d="scan'208";a="271100166" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 26 Mar 2025 00:22:23 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Wed, 26 Mar 2025 00:22:02 -0700 Received: from che-lt-i67131.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Wed, 26 Mar 2025 00:21:56 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , , CC: Subject: [PATCH v2 1/3] mtd: spi-nor: sfdp: parse SFDP SST vendor map and register EUI addresses into NVMEM framework Date: Wed, 26 Mar 2025 12:51:38 +0530 Message-ID: <20250326072140.172244-2-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250326072140.172244-1-manikandan.m@microchip.com> References: <20250326072140.172244-1-manikandan.m@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250326_002223_957373_63CAF75B X-CRM114-Status: GOOD ( 21.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Some SST flash like SST26VF064BEUI serial quad flash memory is programmed at the factory with a globally unique EUI-48 and EUI-64 identifiers stored in the SFDP vendor parameter table and it is permanently write-protected. Add SST Vendor table SFDP parser to read the EUI-48 and EUI-64 Mac Addresses and allocate them using resource-managed devm_kcalloc which will be freed on driver detach. Regitser the Addresses into NVMEM framework and parse them when requested using the nvmem properties in the DT by the net drivers. In kernel the Ethernet MAC address relied on U-Boot env variables or generated a random address, which posed challenges for boards without on-board EEPROMs or with multiple Ethernet ports. This change ensures consistent and reliable MAC address retrieval from QSPI benefiting boards like the sama5d29 curiosity and sam9x75 curiosity. Signed-off-by: Manikandan Muralidharan --- drivers/mtd/spi-nor/sfdp.c | 161 ++++++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 7 ++ 2 files changed, 168 insertions(+) diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index 21727f9a4ac6..920708ae928a 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -31,6 +31,7 @@ * Register Map Offsets for Multi-Chip * SPI Memory Devices. */ +#define SFDP_MCHP_SST_ID 0x01bf #define SFDP_SIGNATURE 0x50444653U @@ -1344,6 +1345,163 @@ static int spi_nor_parse_sccr_mc(struct spi_nor *nor, return ret; } +#define SFDP_MCHP_PARAM_TABLE_LEN 28 +#define SFDP_SST26VF064BEUI_ID 0xFF4326BFU + +#define SFDP_MCHP_EUI48 0x30 +#define SFDP_MCHP_EUI48_MASK GENMASK(7, 0) +#define SFDP_MCHP_EUI48_MAC_LEN 6 + +#define SFDP_MCHP_EUI64 0x40 +#define SFDP_MCHP_EUI64_MASK GENMASK(31, 24) +#define SFDP_MCHP_EUI64_MAC_LEN 8 + +/** + * spi_nor_mchp_sfdp_read_addr()- read callback to copy the EUI-48 or EUI-68 + * Addresses for device that request via NVMEM + * + * @priv: User context passed to read callbacks. + * @offset: Offset within the NVMEM device. + * @val: pointer where to fill the ethernet address + * @bytes: Length of the NVMEM cell + * + * Return: 0 on success, -EINVAL otherwise. + */ +static int spi_nor_mchp_sfdp_read_addr(void *priv, unsigned int off, + void *val, size_t bytes) +{ + struct spi_nor *nor = priv; + + if (SFDP_MCHP_PARAM_TABLE_LEN == nor->mchp_eui->vendor_param_length) { + switch (bytes) { + case SFDP_MCHP_EUI48_MAC_LEN: + memcpy(val, nor->mchp_eui->ethaddr_eui48, SFDP_MCHP_EUI48_MAC_LEN); + break; + case SFDP_MCHP_EUI64_MAC_LEN: + memcpy(val, nor->mchp_eui->ethaddr_eui64, SFDP_MCHP_EUI64_MAC_LEN); + break; + default: + return -EINVAL; + } + } + + return 0; +} + +/** + * spi_nor_parse_mchp_sfdp() - Parse the Microchip vendor specific parameter table + * Read and store the EUI-48 and EUI-64 address to + * struct spi_nor_sst_mchp_eui_info if the addresses are + * programmed in the SST26VF064BEUI sst flag + * + * @nor: pointer to a 'struct spi_nor' + * @sccr_header: pointer to the 'struct sfdp_parameter_header' describing + * the Microchip vendor parameter header length and version. + * + * Return: 0 on success of if addresses are not programmed, -errno otherwise. + */ +static int spi_nor_parse_mchp_sfdp(struct spi_nor *nor, + const struct sfdp_parameter_header *mchp_header) +{ + struct nvmem_device *nvmem; + struct nvmem_config nvmem_config = { }; + struct spi_nor_sst_mchp_eui_info *mchp_eui; + u32 *dwords, addr, sst_flash_id; + size_t len; + int ret = 0, size = 0; + + if (SFDP_MCHP_PARAM_TABLE_LEN != mchp_header->length) + return -EINVAL; + + addr = SFDP_PARAM_HEADER_PTP(mchp_header); + /* Get the SST SPI NOR FLASH ID */ + ret = spi_nor_read_sfdp_dma_unsafe(nor, addr, sizeof(sst_flash_id), + &sst_flash_id); + if (ret < 0) + return ret; + + /* Check the SPI NOR FLASH ID */ + if (le32_to_cpu(sst_flash_id) != SFDP_SST26VF064BEUI_ID) + return -EINVAL; + + len = mchp_header->length * sizeof(*dwords); + dwords = kmalloc(len, GFP_KERNEL); + if (!dwords) + return -ENOMEM; + + ret = spi_nor_read_sfdp(nor, addr, len, dwords); + if (ret) + goto out; + + le32_to_cpu_array(dwords, mchp_header->length); + + mchp_eui = devm_kzalloc(nor->dev, sizeof(*mchp_eui), GFP_KERNEL); + if (!mchp_eui) { + ret = -ENOMEM; + goto out; + } + + if (SFDP_MCHP_EUI48 == FIELD_GET(SFDP_MCHP_EUI48_MASK, + dwords[SFDP_DWORD(25)])) { + mchp_eui->ethaddr_eui48 = devm_kcalloc(nor->dev, + SFDP_MCHP_EUI48_MAC_LEN, + sizeof(u8), GFP_KERNEL); + if (!mchp_eui->ethaddr_eui48) { + ret = -ENOMEM; + devm_kfree(nor->dev, mchp_eui); + goto out; + } + memcpy(mchp_eui->ethaddr_eui48, (u8 *)&dwords[SFDP_DWORD(25)] + 1, + SFDP_MCHP_EUI48_MAC_LEN); + size = SFDP_MCHP_EUI48_MAC_LEN; + } + + if (SFDP_MCHP_EUI64 == FIELD_GET(SFDP_MCHP_EUI64_MASK, + dwords[SFDP_DWORD(26)])) { + mchp_eui->ethaddr_eui64 = devm_kcalloc(nor->dev, + SFDP_MCHP_EUI64_MAC_LEN, + sizeof(u8), GFP_KERNEL); + if (!mchp_eui->ethaddr_eui64) { + ret = -ENOMEM; + devm_kfree(nor->dev, mchp_eui->ethaddr_eui48); + devm_kfree(nor->dev, mchp_eui); + goto out; + } + memcpy(mchp_eui->ethaddr_eui64, (u8 *)&dwords[SFDP_DWORD(27)], + SFDP_MCHP_EUI64_MAC_LEN); + size += SFDP_MCHP_EUI64_MAC_LEN; + } + + /* + * Return if SST26VF064BEUI sst flash is not programmed + * with EUI-48 or EUI-64 information + */ + if (!size) { + devm_kfree(nor->dev, mchp_eui); + goto out; + } + + mchp_eui->vendor_param_length = mchp_header->length; + nor->mchp_eui = mchp_eui; + nvmem_config.word_size = 1; + nvmem_config.stride = 1; + nvmem_config.dev = nor->dev; + nvmem_config.size = size; + nvmem_config.priv = nor; + nvmem_config.reg_read = spi_nor_mchp_sfdp_read_addr; + + nvmem = devm_nvmem_register(nor->dev, &nvmem_config); + if (IS_ERR(nvmem)) { + dev_err(nor->dev, "failed to register NVMEM device: %ld\n", + PTR_ERR(nvmem)); + ret = PTR_ERR(nvmem); + } + +out: + kfree(dwords); + return ret; +} + /** * spi_nor_post_sfdp_fixups() - Updates the flash's parameters and settings * after SFDP has been parsed. Called only for flashes that define JESD216 SFDP @@ -1564,6 +1722,9 @@ int spi_nor_parse_sfdp(struct spi_nor *nor) err = spi_nor_parse_sccr_mc(nor, param_header); break; + case SFDP_MCHP_SST_ID: + err = spi_nor_parse_mchp_sfdp(nor, param_header); + break; default: break; } diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index cdcfe0fd2e7d..051078d23ea1 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -339,6 +339,12 @@ struct flash_info; struct spi_nor_manufacturer; struct spi_nor_flash_parameter; +struct spi_nor_sst_mchp_eui_info { + u8 vendor_param_length; + u8 *ethaddr_eui48; + u8 *ethaddr_eui64; +}; + /** * struct spi_nor - Structure for defining the SPI NOR layer * @mtd: an mtd_info structure @@ -408,6 +414,7 @@ struct spi_nor { u32 flags; enum spi_nor_cmd_ext cmd_ext_type; struct sfdp *sfdp; + struct spi_nor_sst_mchp_eui_info *mchp_eui; struct dentry *debugfs_root; const struct spi_nor_controller_ops *controller_ops; From patchwork Wed Mar 26 07:21:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manikandan Muralidharan X-Patchwork-Id: 14029778 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EF695C36008 for ; Wed, 26 Mar 2025 07:29:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=8EO63GVf/gIVmI1VUH08R9+CAUwMxq7JjqCExnyGsJA=; b=j5I4Hbo7JLdyUOEzK9TitDBNEi rKrjhD2Ys2VUOqKGwgBwnzTSHRpLaYWrcUVvSQmpWDCOBfUQ1GlfmtnoPl9bXifFP8Xbl3o6vHJJb G6DXcaKB4yRAiA8dVB4nM0KOKoW5HB/ZJEBhkhcaMJgpXmJ0TnPNZoSdVaocQ9f262b/sGVpTTiam PEXRTkCjb8A1oXrjiy8ja9tYm/NFuIZYUsoBY4jYviIcQc+GnpEoMZfl6bae9LshEB3mGYEmhJ+O3 wJ+kD/hqqD4dMoodtrPZZnGMm7vIv5gjW3z8KuIgPkLuUzsVR+INBe2eM5lpmTFG983V3G/RYFaK9 YFkEaslQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.1 #2 (Red Hat Linux)) id 1txLCQ-00000007mdL-02Ol; Wed, 26 Mar 2025 07:29:18 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.98.1 #2 (Red Hat Linux)) id 1txL5l-00000007lOh-0rIz; Wed, 26 Mar 2025 07:22:26 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1742973746; x=1774509746; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=S1fjsSj00xmhu6OCChhz0tKM0pQCmdFU6YLAley0nKc=; b=v58qXIBPxYpSVM9dcKK3lTHD5XLPVKZ+LYHirR6NI/cIPlMpzdeV86JN jPsvRobsxyGqU0bGENL7KXnNpIWh0bWpRGT0JDlr66AjC1GcNLc37eaEr Hxlfd127ouXC0z8RAORRVomMwr2jypcF6QuxH0cROR8ONGVecYdtyYX5j JiHMB+KYFBYVGZR6tCIwyTpXf86u8cDP0jNnL7VopVwsdtmegduxfnrYi DAXxyY3EStkoGSUDluMN/5yMzqDn4f/YF2yL61qmkiiub0RUq+AtxfKW1 wc7pagitmX1wQB4/boH9Fi4LLik94mbtwcssj4sSJ9gk3wghjTFC7MQXr A==; X-CSE-ConnectionGUID: QApF+UAWRZutY2upgn7tGQ== X-CSE-MsgGUID: yqyq6tBRSRWUKm5lvgvVQg== X-IronPort-AV: E=Sophos;i="6.14,277,1736838000"; d="scan'208";a="271100167" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 26 Mar 2025 00:22:23 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Wed, 26 Mar 2025 00:22:15 -0700 Received: from che-lt-i67131.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Wed, 26 Mar 2025 00:22:08 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , , CC: Subject: [PATCH v2 2/3] ARM: dts: microchip: sama5d29_curiosity: update the QSPI partitions using "fixed-partition" binding Date: Wed, 26 Mar 2025 12:51:39 +0530 Message-ID: <20250326072140.172244-3-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250326072140.172244-1-manikandan.m@microchip.com> References: <20250326072140.172244-1-manikandan.m@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250326_002225_246418_1091DECC X-CRM114-Status: UNSURE ( 9.06 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org update the QSPI partitions using "fixed-partition" binding Signed-off-by: Manikandan Muralidharan --- .../dts/microchip/at91-sama5d29_curiosity.dts | 54 ++++++++++--------- 1 file changed, 29 insertions(+), 25 deletions(-) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts index 7be215781549..35756cc01e68 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts @@ -469,8 +469,6 @@ &qspi1 { status = "okay"; flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <80000000>; @@ -480,34 +478,40 @@ flash@0 { label = "atmel_qspi1"; status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x40000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - bootloader@40000 { - label = "bootloader"; - reg = <0x40000 0xc0000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; - bootloaderenvred@100000 { - label = "bootloader env redundant"; - reg = <0x100000 0x40000>; - }; + bootloader@40000 { + label = "bootloader"; + reg = <0x40000 0xc0000>; + }; - bootloaderenv@140000 { - label = "bootloader env"; - reg = <0x140000 0x40000>; - }; + bootloaderenvred@100000 { + label = "bootloader env redundant"; + reg = <0x100000 0x40000>; + }; - dtb@180000 { - label = "device tree"; - reg = <0x180000 0x80000>; - }; + bootloaderenv@140000 { + label = "bootloader env"; + reg = <0x140000 0x40000>; + }; - kernel@200000 { - label = "kernel"; - reg = <0x200000 0x600000>; + dtb@180000 { + label = "device tree"; + reg = <0x180000 0x80000>; + }; + + kernel@200000 { + label = "kernel"; + reg = <0x200000 0x600000>; + }; }; }; }; From patchwork Wed Mar 26 07:21:40 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manikandan Muralidharan X-Patchwork-Id: 14029779 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 15381C3600D for ; Wed, 26 Mar 2025 07:33:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Wed, 26 Mar 2025 00:22:20 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , , CC: Subject: [PATCH v2 3/3] ARM: dts: microchip: sama5d29_curiosity: Add nvmem-layout in QSPI for EUI48 MAC Address Date: Wed, 26 Mar 2025 12:51:40 +0530 Message-ID: <20250326072140.172244-4-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250326072140.172244-1-manikandan.m@microchip.com> References: <20250326072140.172244-1-manikandan.m@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250326_002255_596058_6471E05D X-CRM114-Status: GOOD ( 11.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add nvmem-layout in QSPI to read the EUI48 Mac address by the net drivers using the nvmem property.The offset is set to 0x0 since the factory programmed address is available in the resource managed space and the size determine if the requested address is of EUI48 (0x6) or EUI-64 (0x8) type. This is useful for cases where U-Boot is skipped and the Ethernet MAC address is needed to be configured by the kernel Signed-off-by: Manikandan Muralidharan --- .../arm/boot/dts/microchip/at91-sama5d29_curiosity.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts index 35756cc01e68..6c5ff08f0b3f 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts @@ -478,6 +478,16 @@ flash@0 { label = "atmel_qspi1"; status = "okay"; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + mac_address_eui48: mac-address@0 { + reg = <0x0 0x6>; + }; + }; + partitions { compatible = "fixed-partitions"; #address-cells = <1>;