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Wed, 26 Mar 2025 06:13:46 -0700 (PDT) Received: from fedora.am.students.amrita.edu ([175.184.253.10]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3039e60f1f9sm108696a91.47.2025.03.26.06.13.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Mar 2025 06:13:45 -0700 (PDT) From: Siddharth Menon To: linux-iio@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, gregkh@linuxfoundation.org, jic23@kernel.org, Michael.Hennerich@analog.com, lars@metafoo.de, marcelo.schmitt1@gmail.com, Siddharth Menon Subject: [PATCH] iio: frequency: ad9832: Update bit manipulation macros to use FIELD_PREP and GENMASK Date: Wed, 26 Mar 2025 18:43:03 +0530 Message-ID: <20250326131338.21309-1-simeddon@gmail.com> X-Mailer: git-send-email 2.49.0 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Update AD9832_PHASE and RES_MASK to use FIELD_PREP and GENMASK for clean bitmask generation and improved maintainability. Suggested-by: Marcelo Schmitt Signed-off-by: Siddharth Menon --- drivers/staging/iio/frequency/ad9832.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/iio/frequency/ad9832.c b/drivers/staging/iio/frequency/ad9832.c index 07baa574aa46..1627b0d5de8a 100644 --- a/drivers/staging/iio/frequency/ad9832.c +++ b/drivers/staging/iio/frequency/ad9832.c @@ -62,7 +62,7 @@ #define AD9832_CMD_SLEEPRESCLR 0xC #define AD9832_FREQ BIT(11) -#define AD9832_PHASE(x) (((x) & 3) << 9) +#define AD9832_PHASE(x) FIELD_PREP(GENMASK(10, 9), x) #define AD9832_SYNC BIT(13) #define AD9832_SELSRC BIT(12) #define AD9832_SLEEP BIT(13) @@ -70,7 +70,7 @@ #define AD9832_CLR BIT(11) #define AD9832_FREQ_BITS 32 #define AD9832_PHASE_BITS 12 -#define RES_MASK(bits) ((1 << (bits)) - 1) +#define RES_MASK(bits) GENMASK((bits) - 1, 0) #define AD9832_CMD_MSK GENMASK(15, 12) #define AD9832_ADD_MSK GENMASK(11, 8) #define AD9832_DAT_MSK GENMASK(7, 0)