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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b79e33asm12254361f8f.66.2025.03.31.12.48.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:48:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Peter Maydell , Richard Henderson Subject: [PULL 01/23] hw/arm/armv7m: Expose and access System Control Space as little endian Date: Mon, 31 Mar 2025 21:47:59 +0200 Message-ID: <20250331194822.77309-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org We only build ARM system emulators using little endianness, so the MO_TE definition always expands to MO_LE, and DEVICE_TARGET_ENDIAN to DEVICE_LITTLE_ENDIAN. Replace the definitions by their expanded value, making it closer to the Armv7-M Architecture Reference Manual (ARM DDI 0403E) description: The System Control Space (SCS, address range 0xE000E000 to 0xE000EFFF) is a memory-mapped 4KB address space that provides 32-bit registers for configuration, status reporting and control. All accesses to the SCS are little endian. Fixes: d5d680cacc ("memory: Access MemoryRegion with endianness") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson Message-Id: <20250312104821.1012-1-philmd@linaro.org> --- hw/arm/armv7m.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index 98a69846119..64009174b97 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -140,7 +140,7 @@ static MemTxResult v7m_sysreg_ns_write(void *opaque, hwaddr addr, /* S accesses to the alias act like NS accesses to the real region */ attrs.secure = 0; return memory_region_dispatch_write(mr, addr, value, - size_memop(size) | MO_TE, attrs); + size_memop(size) | MO_LE, attrs); } else { /* NS attrs are RAZ/WI for privileged, and BusFault for user */ if (attrs.user) { @@ -160,7 +160,7 @@ static MemTxResult v7m_sysreg_ns_read(void *opaque, hwaddr addr, /* S accesses to the alias act like NS accesses to the real region */ attrs.secure = 0; return memory_region_dispatch_read(mr, addr, data, - size_memop(size) | MO_TE, attrs); + size_memop(size) | MO_LE, attrs); } else { /* NS attrs are RAZ/WI for privileged, and BusFault for user */ if (attrs.user) { @@ -174,7 +174,7 @@ static MemTxResult v7m_sysreg_ns_read(void *opaque, hwaddr addr, static const MemoryRegionOps v7m_sysreg_ns_ops = { .read_with_attrs = v7m_sysreg_ns_read, .write_with_attrs = v7m_sysreg_ns_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static MemTxResult v7m_systick_write(void *opaque, hwaddr addr, @@ -187,7 +187,7 @@ static MemTxResult v7m_systick_write(void *opaque, hwaddr addr, /* Direct the access to the correct systick */ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]), 0); return memory_region_dispatch_write(mr, addr, value, - size_memop(size) | MO_TE, attrs); + size_memop(size) | MO_LE, attrs); } static MemTxResult v7m_systick_read(void *opaque, hwaddr addr, @@ -199,14 +199,14 @@ static MemTxResult v7m_systick_read(void *opaque, hwaddr addr, /* Direct the access to the correct systick */ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]), 0); - return memory_region_dispatch_read(mr, addr, data, size_memop(size) | MO_TE, - attrs); + return memory_region_dispatch_read(mr, addr, data, + size_memop(size) | MO_LE, attrs); } static const MemoryRegionOps v7m_systick_ops = { .read_with_attrs = v7m_systick_read, .write_with_attrs = v7m_systick_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; /* From patchwork Mon Mar 31 19:48:00 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033872 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 41E56C3600B for ; Mon, 31 Mar 2025 19:50:16 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL7n-00026w-Dc; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d90000a09sm130314525e9.35.2025.03.31.12.48.32 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:48:32 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Bernhard Beschow , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL 02/23] hw/arm/imx8mp-evk: Fix reference count of SoC object Date: Mon, 31 Mar 2025 21:48:00 +0200 Message-ID: <20250331194822.77309-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bernhard Beschow TYPE_FSL_IMX8MP is created using object_new(), so must be realized with qdev_realize_and_unref() to keep the reference counting intact. Fixes: a4eefc69b237 "hw/arm: Add i.MX 8M Plus EVK board" Signed-off-by: Bernhard Beschow Reviewed-by: Peter Maydell Message-ID: <20250318205709.28862-2-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/imx8mp-evk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c index e1a7892fd7c..e1a21e52f96 100644 --- a/hw/arm/imx8mp-evk.c +++ b/hw/arm/imx8mp-evk.c @@ -37,7 +37,7 @@ static void imx8mp_evk_init(MachineState *machine) s = FSL_IMX8MP(object_new(TYPE_FSL_IMX8MP)); object_property_add_child(OBJECT(machine), "soc", OBJECT(s)); object_property_set_uint(OBJECT(s), "fec1-phy-num", 1, &error_fatal); - qdev_realize(DEVICE(s), NULL, &error_fatal); + qdev_realize_and_unref(DEVICE(s), NULL, &error_fatal); memory_region_add_subregion(get_system_memory(), FSL_IMX8MP_RAM_START, machine->ram); From patchwork Mon Mar 31 19:48:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033892 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CDF6FC3600B for ; Mon, 31 Mar 2025 19:54:37 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL7n-00027B-IJ; Mon, 31 Mar 2025 15:48:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL7j-000268-IP for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:48:43 -0400 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tzL7h-0003K6-Qj for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:48:43 -0400 Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-3914bc3e01aso2742792f8f.2 for ; Mon, 31 Mar 2025 12:48:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743450519; x=1744055319; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=txTiE4d1NZi9r9wcwRp40Op4LBLauweOXwjfQZIQKOA=; b=yoj4gDzz1Fq96zsWVZzBY5gBPgw7lLtSscE4jMT1HU7a5wc2859VqdfvKmpL4oncKO EkmZ1hsfYFMRMnYp4UBWjRyhigWACq7cK2iJpgMqtsArojHhg7sw3HhbrRDteX9X3Iu7 TT2IQ4leXD9M+lM77DGOPqZ60aTI8n4Vpf3tXUv7M86Qtff9rnKoFw4Qg3KNj4z9xyeO 2HEpR1NWhIc4MEJHUs6Wwc+7IKy9O17jjjBlOSFHrIUcEcSnGZ0AzdyHYbKhLXBp4/0E sVAljGNkpbiv4oT5pcnLttsLbYgtHKFcj0q9t1inTHlE20lsu5NF9hkkyNnayu7/jP2a Nidw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743450519; x=1744055319; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=txTiE4d1NZi9r9wcwRp40Op4LBLauweOXwjfQZIQKOA=; b=Y9dqVzTrkXpUEXZ8k94eFQptoyZikP7FUPTKvqNWt0NetmVpM/Vfegrmgil0b0jUor Vlma9tey6u6nWdkpL1u+tr5ANGhuVxglJoGDMlwJbLTJNRNvRNQd9vNf4v+PYA/TnDxg CY3ZLVe29lqJ8mJYubKdARF/7M/Fs5zQqQTMKQc/LLsZxvwMcq/GE27SS5r9Ot6nlTBu vKsdV8zm4cXeTE0LhQ0tMf3Rt9685M8PHTHkITROoE7XCkEn6blKVmlh3qGItnzehkhs +/AT8Z0vZShjz7JIy40+HNZnyFfvBJ/oyUSw9FP3SjNWMUJi+bAPpoxlPM6SJjeN0B13 S52A== X-Gm-Message-State: AOJu0YxnucULSdSWF3VMYR2UCLo45vn5qbmcTL+xLiK99J2dnR49FctN c8aVelt9q+LdcItsWTOL2opuVsrgi/lTRi+bcRMn2kiYYuHVYnM+1STy3IZcRjmZr6FGwM6Nr2c S X-Gm-Gg: ASbGnctSEldRx0hbDyZsNdF5O/127+YzM9V0rrN4+9qQzkFX/9vz9oKWcCGYSeMj1oE WwPllqj+ezO/nuuDoKwPnG48Yc5UoLc2q7U6KW34pdhreadFnDINVyQzpgbaHg4bXabGHucqod/ EeTcqbQPz64ccS7ssbZqhE1gEQpImN2CHgAVj6e9cBU7Jw43biyLRW2xl35HdMzD1ObUKdk8dIg 9hZW2vEhA7RO0dgOt+yDW+69Al06jIKiqDHtCXsP5wm4MHHoW0U91c9t683SEaXMNExOwXJuw7Y D04QLSXiqOiWsAY4yAW4wE2T3AxEMr8ZP4hGaU8zDGWYe/pIkJUTIJLeJOdmq2ST/HKpigKuyX5 BcthokNMKNtbrw1UeJTc= X-Google-Smtp-Source: AGHT+IHslVBC5LKP5M/RUIpHQXwJAiQovDPft1xjCARCwOnZRCIibW52WvqcQTfbqavuq2aeMsEdSg== X-Received: by 2002:a05:6000:2c4:b0:391:78a:33de with SMTP id ffacd0b85a97d-39c120dc8e5mr8805942f8f.12.1743450518730; Mon, 31 Mar 2025 12:48:38 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b658b5dsm11970208f8f.3.2025.03.31.12.48.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:48:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Bernhard Beschow , Thomas Huth , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL 03/23] hw/arm/fsl-imx8mp: Derive struct FslImx8mpState from TYPE_SYS_BUS_DEVICE Date: Mon, 31 Mar 2025 21:48:01 +0200 Message-ID: <20250331194822.77309-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bernhard Beschow Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset upon machine reset. It also makes the SoC implementation not user-creatable which can trigger the following crash: $ ./qemu-system-aarch64 -M virt -device fsl-imx8mp ** ERROR:../../devel/qemu/tcg/tcg.c:1006:tcg_register_thread: assertion failed: (n < tcg_max_ctxs) Bail out! ERROR:../../devel/qemu/tcg/tcg.c:1006:tcg_register_thread: assertion failed: (n < tcg_max_ctxs) Aborted (core dumped) Fixes: a4eefc69b237 "hw/arm: Add i.MX 8M Plus EVK board" Reported-by: Thomas Huth Suggested-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Signed-off-by: Bernhard Beschow Message-ID: <20250318205709.28862-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/arm/fsl-imx8mp.h | 3 ++- hw/arm/fsl-imx8mp.c | 2 +- hw/arm/imx8mp-evk.c | 2 +- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h index bc97fc416eb..22fdc0d67c2 100644 --- a/include/hw/arm/fsl-imx8mp.h +++ b/include/hw/arm/fsl-imx8mp.h @@ -26,6 +26,7 @@ #include "hw/timer/imx_gpt.h" #include "hw/usb/hcd-dwc3.h" #include "hw/watchdog/wdt_imx2.h" +#include "hw/sysbus.h" #include "qom/object.h" #include "qemu/units.h" @@ -49,7 +50,7 @@ enum FslImx8mpConfiguration { }; struct FslImx8mpState { - DeviceState parent_obj; + SysBusDevice parent_obj; ARMCPU cpu[FSL_IMX8MP_NUM_CPUS]; GICv3State gic; diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c index c3f6da63220..82edf61082a 100644 --- a/hw/arm/fsl-imx8mp.c +++ b/hw/arm/fsl-imx8mp.c @@ -702,7 +702,7 @@ static void fsl_imx8mp_class_init(ObjectClass *oc, void *data) static const TypeInfo fsl_imx8mp_types[] = { { .name = TYPE_FSL_IMX8MP, - .parent = TYPE_DEVICE, + .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(FslImx8mpState), .instance_init = fsl_imx8mp_init, .class_init = fsl_imx8mp_class_init, diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c index e1a21e52f96..f17d5db466d 100644 --- a/hw/arm/imx8mp-evk.c +++ b/hw/arm/imx8mp-evk.c @@ -37,7 +37,7 @@ static void imx8mp_evk_init(MachineState *machine) s = FSL_IMX8MP(object_new(TYPE_FSL_IMX8MP)); object_property_add_child(OBJECT(machine), "soc", OBJECT(s)); object_property_set_uint(OBJECT(s), "fec1-phy-num", 1, &error_fatal); - qdev_realize_and_unref(DEVICE(s), NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal); memory_region_add_subregion(get_system_memory(), FSL_IMX8MP_RAM_START, machine->ram); From patchwork Mon Mar 31 19:48:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033889 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0C47AC3600B for ; Mon, 31 Mar 2025 19:54:05 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL86-0002AM-FS; Mon, 31 Mar 2025 15:49:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL7n-00026x-78 for qemu-devel@nongnu.org; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c1845e66esm6049263f8f.18.2025.03.31.12.48.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:48:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Bernhard Beschow , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL 04/23] hw/arm/fsl-imx8mp: Remove unused define Date: Mon, 31 Mar 2025 21:48:02 +0200 Message-ID: <20250331194822.77309-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bernhard Beschow The SoC has three SPI controllers, not four. Remove the extra define of an SPI IRQ. Fixes: 06908a84f036 "hw/arm/fsl-imx8mp: Add SPI controllers" Reviewed-by: Peter Maydell Signed-off-by: Bernhard Beschow Message-ID: <20250318205709.28862-4-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/arm/fsl-imx8mp.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h index 22fdc0d67c2..d016f7d3371 100644 --- a/include/hw/arm/fsl-imx8mp.h +++ b/include/hw/arm/fsl-imx8mp.h @@ -238,7 +238,6 @@ enum FslImx8mpIrqs { FSL_IMX8MP_ECSPI1_IRQ = 31, FSL_IMX8MP_ECSPI2_IRQ = 32, FSL_IMX8MP_ECSPI3_IRQ = 33, - FSL_IMX8MP_ECSPI4_IRQ = 34, FSL_IMX8MP_I2C1_IRQ = 35, FSL_IMX8MP_I2C2_IRQ = 36, From patchwork Mon Mar 31 19:48:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033879 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C471BC3600B for ; Mon, 31 Mar 2025 19:52:21 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL80-00028s-9a; Mon, 31 Mar 2025 15:49:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL7r-00028N-MT for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:48:51 -0400 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tzL7q-0003LN-3L for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:48:51 -0400 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-39149bccb69so4283946f8f.2 for ; Mon, 31 Mar 2025 12:48:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743450528; x=1744055328; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bjfZMqY7kEtNVcowX1vqYv9wJwb4LYxFTdGWnR4E878=; b=zY/r19jOqiekSPTxVN998fKv9+qk2Im7py0eYIpkwioNd175VGcPKsirv+6uc7ciNp Kjtv4j22e/BAT8q5W+2RLI5wXyXRChBA2xB+3O2h1NVpziduvNc4VkIO93fpyAeWAdGz VFeNew4HeC1jdSEhGqbMAPJJIoGXml1P69sZOzcmLR/jWKU/SAyzDWdsDlSkKuZi36Yi YRzd5DiV7vxFCuf9DZTD6FMC96kKaqaPkn2u8zWexfioj5dJpK63TD+yVFPs0CGKN7II mIcgBBmQ4q0uf7YLgHbAp8SaXNLT+GeuVjrxp2FxIoJe4ZWbsUEZ5EOy9cKmmHLaMV9l p2hQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743450528; x=1744055328; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bjfZMqY7kEtNVcowX1vqYv9wJwb4LYxFTdGWnR4E878=; b=Ymsg2kUTi024Csw78WAupgivgV4YeM2Ir4Q8LYFHEJAMnbCoq3cEzd/5QWeOyr3QkR qns39TlWNDf5HMnlYfxjQ5ah3pdyfnwP6UdbvAxav1w269Rnu00Q+nOkE6rOfUNth4+W 9I/ABYkqd7Ax+7LrAJIxFNm5ycGXxkvwNYYPVi8m9PsxlDcYLeuNdfTlTY+j5FFleQd8 +1PHbvIf4PTTo2kXeQaafwvmFNpX0ZF/3tClN44trT/19lkoNIqnZCeE3mfREJFV/jGY VhEEGRxhLrLKRa7yrAbCKbqCyDGmX1vpm0ke2pAuPiXl3nDb7nNUz4dOQgHSU4yOSr3j 5Gwg== X-Gm-Message-State: AOJu0YxLxCaKpjjuSO9A9PQdG1P9PyH/ZHLhiQWIX62VChaTBlWiTMY+ G4of8FGtuKTbhbc/B+Uinpk43hMElNS0P5M9pi2f2y1GJM5IUEX8MuIbbV6UfmHtaWWG0TwEUtO t X-Gm-Gg: ASbGncvDYfBlcePfg/ECNNysflEjMiZqsfmdO87pIkMPQaqsW/+B/GcZ/Uon01Q180m ZbaKQ7VYoVHnpGwu4xnJSQxSJpLuw6ZhzpG4Ldsd3+rjvljnS+1PLCxac2JlshxOkQqmCihZQQX z2axBDlsFwV0dPBBGKJPw/UUwAZgF7770JR5SETj24kFUZTf3AL0gYG2bFxhEcvlvZkAIxE2Oom 6+9wrktTFRE8m7MZIaMEgWq2miamt3rgh6Sl31mMfLYYR12YyQ7YT9CZXnvq2SyC/1Oancb95CU 5mqCg8dpr8+tUL6P7/9D68sh8mSbLewRXb1G6FeXm//hWZZmxi3QhZUNwlUVmEQgnjNm6PFYLTq OcRwAMgNUwpqi1D/mwbk= X-Google-Smtp-Source: AGHT+IFVuRh6Z/n/bKcSOD4C6xxd7+fLXpm/gtS8wqzn2/xKTUCDamnCqfbuUE5kjN4LxV5jlTMavA== X-Received: by 2002:a5d:64ee:0:b0:391:2fe4:de0a with SMTP id ffacd0b85a97d-39c120ccabfmr9021886f8f.2.1743450528197; Mon, 31 Mar 2025 12:48:48 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b79e393sm12252633f8f.72.2025.03.31.12.48.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:48:47 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PULL 05/23] hw/core/cpu: Use size_t for memory_rw_debug len argument Date: Mon, 31 Mar 2025 21:48:03 +0200 Message-ID: <20250331194822.77309-6-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Match the prototype of cpu_memory_rw_debug(). Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson Message-Id: <20250325224403.4011975-4-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 2 +- target/sparc/cpu.h | 2 +- target/sparc/mmu_helper.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 5d11d26556a..abd8764e834 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -154,7 +154,7 @@ struct CPUClass { int (*mmu_index)(CPUState *cpu, bool ifetch); int (*memory_rw_debug)(CPUState *cpu, vaddr addr, - uint8_t *buf, int len, bool is_write); + uint8_t *buf, size_t len, bool is_write); void (*dump_state)(CPUState *cpu, FILE *, int flags); void (*query_cpu_fast)(CPUState *cpu, CpuInfoFast *value); int64_t (*get_arch_id)(CPUState *cpu); diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 462bcb6c0e6..68f8c21e7cb 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -604,7 +604,7 @@ void dump_mmu(CPUSPARCState *env); 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d90000a09sm130321915e9.35.2025.03.31.12.48.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:48:52 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth Subject: [PULL 06/23] hw/block/m25p80: Categorize and add description Date: Mon, 31 Mar 2025 21:48:04 +0200 Message-ID: <20250331194822.77309-7-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20250325224310.8785-3-philmd@linaro.org> --- hw/block/m25p80.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index b84c6afb327..0887c103e4f 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -1870,7 +1870,9 @@ static void m25p80_class_init(ObjectClass *klass, void *data) dc->vmsd = &vmstate_m25p80; device_class_set_props(dc, m25p80_properties); device_class_set_legacy_reset(dc, m25p80_reset); + set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); mc->pi = data; + dc->desc = "Serial Flash"; } static const TypeInfo m25p80_info = { From patchwork Mon Mar 31 19:48:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033870 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C6C76C3600B for ; Mon, 31 Mar 2025 19:49:44 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL89-0002Aw-C5; Mon, 31 Mar 2025 15:49:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL81-00029b-Op for qemu-devel@nongnu.org; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ea8df934esm263705e9.2.2025.03.31.12.48.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:48:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth Subject: [PULL 07/23] hw/display/dm163: Add description Date: Mon, 31 Mar 2025 21:48:05 +0200 Message-ID: <20250331194822.77309-8-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20250325224310.8785-4-philmd@linaro.org> --- hw/display/dm163.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/display/dm163.c b/hw/display/dm163.c index 75a91f62bd3..f6f0ec0c632 100644 --- a/hw/display/dm163.c +++ b/hw/display/dm163.c @@ -330,7 +330,7 @@ static void dm163_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); ResettableClass *rc = RESETTABLE_CLASS(klass); - dc->desc = "DM163"; + dc->desc = "DM163 8x3-channel constant current LED driver"; dc->vmsd = &vmstate_dm163; dc->realize = dm163_realize; rc->phases.hold = dm163_reset_hold; From patchwork Mon Mar 31 19:48:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033894 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 18B07C36013 for ; Mon, 31 Mar 2025 19:55:03 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL8E-0002CZ-26; Mon, 31 Mar 2025 15:49:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL86-0002AY-7G for qemu-devel@nongnu.org; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b658ac5sm11851493f8f.1.2025.03.31.12.49.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:49:01 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth Subject: [PULL 08/23] hw/dma/i82374: Categorize and add description Date: Mon, 31 Mar 2025 21:48:06 +0200 Message-ID: <20250331194822.77309-9-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20250325224310.8785-5-philmd@linaro.org> --- hw/dma/i82374.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c index 9652d47adcd..0bf69ef399b 100644 --- a/hw/dma/i82374.c +++ b/hw/dma/i82374.c @@ -150,6 +150,8 @@ static void i82374_class_init(ObjectClass *klass, void *data) dc->realize = i82374_realize; dc->vmsd = &vmstate_i82374; device_class_set_props(dc, i82374_properties); + dc->desc = "Intel 82374 DMA controller"; + set_bit(DEVICE_CATEGORY_MISC, dc->categories); } static const TypeInfo i82374_info = { From patchwork Mon Mar 31 19:48:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033874 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2A257C3600B for ; Mon, 31 Mar 2025 19:50:25 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL8G-0002Cs-Le; Mon, 31 Mar 2025 15:49:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL8B-0002CA-W1 for qemu-devel@nongnu.org; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b79e0d1sm12080196f8f.70.2025.03.31.12.49.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:49:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 09/23] hw/mips: Mark the "mipssim" machine as deprecated Date: Mon, 31 Mar 2025 21:48:07 +0200 Message-ID: <20250331194822.77309-10-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Thomas Huth We are not aware of anybody still using this machine, support for it has been withdrawn from the Linux kernel (i.e. there also won't be any future development anymore), and we are not aware of any binaries online that could be used for regression testing to avoid that the machine bitrots ... thus let's mark it as deprecated now. Signed-off-by: Thomas Huth Acked-by: Philippe Mathieu-Daudé Message-ID: <20250121103655.1285596-1-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- docs/about/deprecated.rst | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst index e2b4f077d45..76291fdfd62 100644 --- a/docs/about/deprecated.rst +++ b/docs/about/deprecated.rst @@ -292,6 +292,19 @@ Big-Endian variants of MicroBlaze ``petalogix-ml605`` and ``xlnx-zynqmp-pmu`` ma Both ``petalogix-ml605`` and ``xlnx-zynqmp-pmu`` were added for little endian CPUs. Big endian support is not tested. +Mips ``mipssim`` machine (since 10.0) +''''''''''''''''''''''''''''''''''''' + +Linux dropped support for this virtual machine type in kernel v3.7, and +there does not seem to be anybody around who is still using this board +in QEMU: Most former MIPS-related people are working on other architectures +in their everyday job nowadays, and we are also not aware of anybody still +using old binaries with this board (i.e. there is also no binary available +online to check that this board did not completely bitrot yet). It is +recommended to use another MIPS machine for future MIPS code development +instead. + + Backend options --------------- From patchwork Mon Mar 31 19:48:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033873 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 27E5DC36011 for ; Mon, 31 Mar 2025 19:50:17 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL8J-0002FP-N2; Mon, 31 Mar 2025 15:49:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL8I-0002DL-89 for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:18 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tzL8F-0003Oa-5h for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:17 -0400 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-39ac8e7688aso3835018f8f.2 for ; Mon, 31 Mar 2025 12:49:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743450553; x=1744055353; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mD0e9eaGkTJvGMcL9mwV8iKKrD2iOxihpH1h0trc4fc=; b=Ei8XRNFETqeH1A392YQZiVuoU7MqOuJ3VdvFKE4ra8aFvus1t1Lq95kdzAEsySFFtW 8qKHFS6JPXBhSyy28d2eAoN4G4X8QHcAYsaYyjEmrNQFx8IhLoYrXWQSAPpOUuH5RD26 JWNLUlZmXxdEVDG9BDrcXeAUdfPKi9thoZqSnFeb7044iiYX2SqgCcHT2Hyn+H6yAujQ 0PdH9UTuAoV8AK9V5fSlDKB6tNwKRFUkbU+bbi5eqycgQjVnz5fpwhFjHQQI3g19yf5f +63U9swgPGtqp+HnChnxnFN4Jgr7rrDmtwwJvQXfBMpiXad0c3h5FXA1ZxdmdqxJRA/3 cBbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743450553; x=1744055353; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mD0e9eaGkTJvGMcL9mwV8iKKrD2iOxihpH1h0trc4fc=; b=oBP1wRW/YlEy6plL3057Xo/dVj2z9wYE7X25t2XV4Q9kwIPYwxCzLgw8eBIfleEmDC dQrotX2AzjIbEELDSGbaMUbadpsVnnmFNzt6gma7OU7FYBmyDBOkGzQV1FxmUp00JTZj RInWiSsXieUZeao+4FUajaMci8FfD26caLKAXQgeehbaYnUjUxbjSQTFpvF1IK8nouNc krMXJr5IloiLkcbQ5NBWiDP6GXvzzhQF2X7+YVTnd7GnN7cxf979/oXUO1dUQhoQnRqI Zkd44rhjyDwTtRJhAyA0QKbEjxkmajMqiWl6Nl96ZtVQNqzplCn6Afo4ux4qZpUWr5+V DmSg== X-Gm-Message-State: AOJu0YyKnO//UCQqxaxuWOuxKbUjBFm120m4NzZHeiB2z0eqHKLUYxsJ KInWnsnIIzySPayxy3Oe1XYa6gJ6qeTy7F1UmdQyk7yykz1vEbv5Z4L9ffYpofHL1H15YZa7rQ7 + X-Gm-Gg: ASbGncvJscd/rWZ5Ey+qOTI4Jd4Q4XFdh0CvKaK5u2b8p5ISPboZunXdzdg7Cji9Ecd yyaXnY/iDY/KW9OEsdFQR70l0Ap705eZN3VYKqopGtgZ4NDs40JmA5SXymeG1YooAh5uVa8qL9h vgNmVUDA+q6bUbwJ0AFc06zRf41YX1b+WLhjmYgMi5Qn06eW4WRqny37soSO5hKuUCWQuazO/1A UtV8qpgutxLc3tpFdoVA2dmsKVvH2PcHMYinx/mrru1Wvl0p+VAZ69hiOPOOoNwyfP5BJDKXgHJ lTyzcWvW/Ke/ha+2Dzi/UBl3rdD/oL6fsJCHgNRy9UzhPL+1GA8ula2B42lYtgbIPXKVcbZXQqn E5wAKoLFvYDzT88q9IVs= X-Google-Smtp-Source: AGHT+IFXROkSkKz3JCfCd33F3RKZJxbLX7Wq5cUlH7iZqRTSZM/w7DJ9aGwNUgWT7xxlILsoabgmPg== X-Received: by 2002:a05:6000:2a12:b0:39c:1258:2dca with SMTP id ffacd0b85a97d-39c12582df9mr4812112f8f.59.1743450553193; Mon, 31 Mar 2025 12:49:13 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b79e097sm11895081f8f.80.2025.03.31.12.49.12 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:49:12 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Heinrich Schuchardt , qemu-stable@nongnu.org, Frederik Du Toit Lotter , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 10/23] hw/rtc/goldfish: keep time offset when resetting Date: Mon, 31 Mar 2025 21:48:08 +0200 Message-ID: <20250331194822.77309-11-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Heinrich Schuchardt Currently resetting the leads to resynchronizing the Goldfish RTC with the system clock of the host. In real hardware an RTC reset would not change the wall time. Other RTCs like pl031 do not show this behavior. Move the synchronization of the RTC with the system clock to the instance realization. Cc: qemu-stable@nongnu.org Reported-by: Frederik Du Toit Lotter Fixes: 9a5b40b8427 ("hw: rtc: Add Goldfish RTC device") Signed-off-by: Heinrich Schuchardt Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20250321221248.17764-1-heinrich.schuchardt@canonical.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/rtc/goldfish_rtc.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c index 0f1b53e0e4d..d83cc264814 100644 --- a/hw/rtc/goldfish_rtc.c +++ b/hw/rtc/goldfish_rtc.c @@ -239,15 +239,8 @@ static const VMStateDescription goldfish_rtc_vmstate = { static void goldfish_rtc_reset(DeviceState *dev) { GoldfishRTCState *s = GOLDFISH_RTC(dev); - struct tm tm; timer_del(s->timer); - - qemu_get_timedate(&tm, 0); - s->tick_offset = mktimegm(&tm); - s->tick_offset *= NANOSECONDS_PER_SECOND; - s->tick_offset -= qemu_clock_get_ns(rtc_clock); - s->tick_offset_vmstate = 0; s->alarm_next = 0; s->alarm_running = 0; s->irq_pending = 0; @@ -258,6 +251,7 @@ static void goldfish_rtc_realize(DeviceState *d, Error **errp) { SysBusDevice *dev = SYS_BUS_DEVICE(d); GoldfishRTCState *s = GOLDFISH_RTC(d); + struct tm tm; memory_region_init_io(&s->iomem, OBJECT(s), &goldfish_rtc_ops[s->big_endian], s, @@ -267,6 +261,11 @@ static void goldfish_rtc_realize(DeviceState *d, Error **errp) sysbus_init_irq(dev, &s->irq); s->timer = timer_new_ns(rtc_clock, goldfish_rtc_interrupt, s); + + qemu_get_timedate(&tm, 0); + s->tick_offset = mktimegm(&tm); + s->tick_offset *= NANOSECONDS_PER_SECOND; + s->tick_offset -= qemu_clock_get_ns(rtc_clock); } static const Property goldfish_rtc_properties[] = { From patchwork Mon Mar 31 19:48:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033871 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C892EC3600B for ; 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20250325224310.8785-9-philmd@linaro.org> --- hw/misc/bcm2835_cprman.c | 8 ++++++++ hw/misc/npcm_clk.c | 6 ++++++ hw/misc/stm32l4x5_rcc.c | 4 ++++ 3 files changed, 18 insertions(+) diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c index aa14cd931f5..0c4d4b7de50 100644 --- a/hw/misc/bcm2835_cprman.c +++ b/hw/misc/bcm2835_cprman.c @@ -137,6 +137,8 @@ static void pll_class_init(ObjectClass *klass, void *data) device_class_set_legacy_reset(dc, pll_reset); dc->vmsd = &pll_vmstate; + /* Reason: Part of BCM2835CprmanState component */ + dc->user_creatable = false; } static const TypeInfo cprman_pll_info = { @@ -241,6 +243,8 @@ static void pll_channel_class_init(ObjectClass *klass, void *data) device_class_set_legacy_reset(dc, pll_channel_reset); dc->vmsd = &pll_channel_vmstate; + /* Reason: Part of BCM2835CprmanState component */ + dc->user_creatable = false; } static const TypeInfo cprman_pll_channel_info = { @@ -362,6 +366,8 @@ static void clock_mux_class_init(ObjectClass *klass, void *data) device_class_set_legacy_reset(dc, clock_mux_reset); dc->vmsd = &clock_mux_vmstate; + /* Reason: Part of BCM2835CprmanState component */ + dc->user_creatable = false; } static const TypeInfo cprman_clock_mux_info = { @@ -416,6 +422,8 @@ static void dsi0hsck_mux_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); dc->vmsd = &dsi0hsck_mux_vmstate; + /* Reason: Part of BCM2835CprmanState component */ + dc->user_creatable = false; } static const TypeInfo cprman_dsi0hsck_mux_info = { diff --git a/hw/misc/npcm_clk.c b/hw/misc/npcm_clk.c index 0e85974cf96..b6a893ffb22 100644 --- a/hw/misc/npcm_clk.c +++ b/hw/misc/npcm_clk.c @@ -1108,6 +1108,8 @@ static void npcm7xx_clk_pll_class_init(ObjectClass *klass, void *data) dc->desc = "NPCM7xx Clock PLL Module"; dc->vmsd = &vmstate_npcm7xx_clk_pll; + /* Reason: Part of NPCMCLKState component */ + dc->user_creatable = false; } static void npcm7xx_clk_sel_class_init(ObjectClass *klass, void *data) @@ -1116,6 +1118,8 @@ static void npcm7xx_clk_sel_class_init(ObjectClass *klass, void *data) dc->desc = "NPCM7xx Clock SEL Module"; dc->vmsd = &vmstate_npcm7xx_clk_sel; + /* Reason: Part of NPCMCLKState component */ + dc->user_creatable = false; } static void npcm7xx_clk_divider_class_init(ObjectClass *klass, void *data) @@ -1124,6 +1128,8 @@ static void npcm7xx_clk_divider_class_init(ObjectClass *klass, void *data) dc->desc = "NPCM7xx Clock Divider Module"; dc->vmsd = &vmstate_npcm7xx_clk_divider; + /* Reason: Part of NPCMCLKState component */ + dc->user_creatable = false; } static void npcm_clk_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index fd8466dff34..158b743cae7 100644 --- a/hw/misc/stm32l4x5_rcc.c +++ b/hw/misc/stm32l4x5_rcc.c @@ -150,6 +150,8 @@ static void clock_mux_class_init(ObjectClass *klass, void *data) rc->phases.hold = clock_mux_reset_hold; rc->phases.exit = clock_mux_reset_exit; dc->vmsd = &clock_mux_vmstate; + /* Reason: Part of Stm32l4x5RccState component */ + dc->user_creatable = false; } static void clock_mux_set_enable(RccClockMuxState *mux, bool enabled) @@ -302,6 +304,8 @@ static void pll_class_init(ObjectClass *klass, void *data) rc->phases.hold = pll_reset_hold; rc->phases.exit = pll_reset_exit; dc->vmsd = &pll_vmstate; + /* Reason: Part of Stm32l4x5RccState component */ + dc->user_creatable = false; } static void pll_set_vco_multiplier(RccPllState *pll, uint32_t vco_multiplier) From patchwork Mon Mar 31 19:48:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033891 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2C25BC36013 for ; Mon, 31 Mar 2025 19:54:31 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL8t-0002uq-6f; Mon, 31 Mar 2025 15:49:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL8V-0002QO-M9 for qemu-devel@nongnu.org; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d8fba4c29sm136189505e9.5.2025.03.31.12.49.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:49:22 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth Subject: [PULL 12/23] hw/nvram/xlnx-efuse: Do not expose as user-creatable Date: Mon, 31 Mar 2025 21:48:10 +0200 Message-ID: <20250331194822.77309-13-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This device is part of SoC components thus can not be created manually. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20250325224310.8785-10-philmd@linaro.org> --- hw/nvram/xlnx-efuse.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/nvram/xlnx-efuse.c b/hw/nvram/xlnx-efuse.c index 29e7dd539ec..176e88fcd17 100644 --- a/hw/nvram/xlnx-efuse.c +++ b/hw/nvram/xlnx-efuse.c @@ -280,6 +280,8 @@ static void efuse_class_init(ObjectClass *klass, void *data) dc->realize = efuse_realize; device_class_set_props(dc, efuse_properties); + /* Reason: Part of Xilinx SoC */ + dc->user_creatable = false; } static const TypeInfo efuse_info = { From patchwork Mon Mar 31 19:48:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033893 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B6C86C3600B for ; Mon, 31 Mar 2025 19:55:02 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL8t-0002w4-9O; Mon, 31 Mar 2025 15:49:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL8X-0002QR-7l for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:42 -0400 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tzL8V-0003Q6-DD for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:32 -0400 Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-43d0359b1fcso31314675e9.0 for ; Mon, 31 Mar 2025 12:49:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743450569; x=1744055369; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RLKl/DQ934NXDgHaUVfID1TPnM6HcvqoUZCXZk9DXsw=; b=Lb2DmhycIw1arJdgtH1jjHJUPllHppY52Qm69/6nL5AVk26fxZKgjReKiGFWtyKWtm 4zRKph3qTqwtm5hhzBdNUfI6H+PH5+oMymL2b1AYzpI7Hz7t/V8IP4ykjl4+17cm5kbz eZ0LoMDP1nbXRWw322OzWbLAMgF1JibBCmdDSSwfYarwsQcDyLh6ECN3TYoe+DY8cO7e +yZ9BBnvyc7y0BX5NAbZFLw+00OCVza5WzMQzGTio0FUFbPk0oQQZc2LrmiTlPRIIp3z 8K3X3ouabtFN7wAnuDb4F4k/NXRNVrKxfki6yW2qtx07iP9kJ+6OU5YBp+N0gQ/rDgXY VZpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743450569; x=1744055369; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RLKl/DQ934NXDgHaUVfID1TPnM6HcvqoUZCXZk9DXsw=; b=uy8VhTaem3dW2X5OZKZ44W6DG+bQPLdNL1SaQnP9zibyqBaa6xmMstT8UR2cbXqGAb J2O6rd2d40wwpJOJyNB0iA6qnNFPzYLiD9uYWnHdHChc2lJSxs8aZ0wOTTGRdFbqE6Ru /PqTbQ5Q9YSa4sEkL1H15yfwpwQytLY28JMZjy0oACDJPH8LuMT2NyNQkh1iuNVmIH7K gVDeqssd3EC2qgxt1lNv5Vn1PW7tFzMN1QOApjOPnlL5avbRiLfjtxyPSIEfwmh8QHKP CthuFTz3qfELKGnz87FN/8xw9Aa9vomVGR+NUefbmov4dU0LaM4czgKZVAUZj1OPYzbC N1RQ== X-Gm-Message-State: AOJu0YxcckZHG1cDeaqdbEWEmK0RNFAVXADuUwmgTyMKl92STfRLxgCO f7glcjZjuLhE4H4wwgd+tYWhlBn9KbfecWiHfoN+qRS4xySllA1h7FPxozrxyPR7YdzW0B1z0db 4 X-Gm-Gg: ASbGncvuNY+MYexUu3ZpnaIafRjtWzYsPBTzIbt8026V4EcDiRpuTWfqLY1Pzn3XOcz DkwfZMDusbbcHRAisnNyTib9pwqGIJe4e1VX88poc6JQX/kX7KJzuckt+pDG3+yQTVdvLrR18Kl Dss0NUI1fenezpVBsDV7Xdj9cZvw6rR/QqEppUT60B8o3geubRPIXk0BVs0ZyW0iUdmXI37J8/3 PqcZ6xWt1Z4pVJUYAwDWsf2mL+Q0RQm2ESmkTYvaZMhlk1gUwrMl0r4HnLlbU4U/QdWQdIXbOav fqI4bMVK7PwL8dAWRRQcrXEeCgF2XSwlqkYPiATb8on2hpyR/VBJ30ej40FcWjF1Jq8TZ0vm7yi 2FIOutcO6iilcCX2WIaPSCo46lUdrVw== X-Google-Smtp-Source: AGHT+IEbLwBNPAU24yEFMIehDIm4aMBSHxKuX9Bha+tzrHrqpE16Mvs5G1nGv0jNAedOKS7XBK2MJg== X-Received: by 2002:a05:600c:c08:b0:439:8e95:796a with SMTP id 5b1f17b1804b1-43db62bda6cmr82376705e9.13.1743450568715; Mon, 31 Mar 2025 12:49:28 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d8fccfd9bsm132177175e9.20.2025.03.31.12.49.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:49:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Zheng Huang , Zheng Huang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL 13/23] hw/scsi/lsi53c895a: fix memory leak in lsi_scsi_realize() Date: Mon, 31 Mar 2025 21:48:11 +0200 Message-ID: <20250331194822.77309-14-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Zheng Huang Address a memory leak bug in the usages of timer_del(). The issue arises from the incorrect use of the ambiguous timer API timer_del(), which does not free the timer object. The LeakSanitizer report this issue during fuzzing. The correct API timer_free() freed the timer object instead. ================================================================= ==2586273==ERROR: LeakSanitizer: detected memory leaks Direct leak of 48 byte(s) in 1 object(s) allocated from: #0 0x55f2afd89879 in calloc /llvm-project/compiler-rt/lib/asan/asan_malloc_linux.cpp:75:3 #1 0x7f443b93ac50 in g_malloc0 (/lib/x86_64-linux-gnu/libglib-2.0.so.0+0x5ec50) #2 0x55f2b053962e in timer_new include/qemu/timer.h:542:12 #3 0x55f2b0514771 in timer_new_us include/qemu/timer.h:582:12 #4 0x55f2b0514288 in lsi_scsi_realize hw/scsi/lsi53c895a.c:2350:24 #5 0x55f2b0452d26 in pci_qdev_realize hw/pci/pci.c:2174:9 Signed-off-by: Zheng Huang Reviewed-by: Philippe Mathieu-Daudé Message-ID: <73cd69f9-ff9b-4cd4-b8aa-265f9d6067b9@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/scsi/lsi53c895a.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c index d85e384ad63..6689ebba25b 100644 --- a/hw/scsi/lsi53c895a.c +++ b/hw/scsi/lsi53c895a.c @@ -2372,7 +2372,7 @@ static void lsi_scsi_exit(PCIDevice *dev) LSIState *s = LSI53C895A(dev); address_space_destroy(&s->pci_io_as); - timer_del(s->scripts_timer); + timer_free(s->scripts_timer); } static void lsi_class_init(ObjectClass *klass, void *data) From patchwork Mon Mar 31 19:48:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033875 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1CA6BC3600B for ; Mon, 31 Mar 2025 19:50:46 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL9J-0004IB-Fy; Mon, 31 Mar 2025 15:50:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL8a-0002Tf-HH for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:49 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tzL8Z-0003Qm-0t for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:36 -0400 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-39141ffa9fcso4633703f8f.0 for ; Mon, 31 Mar 2025 12:49:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743450573; x=1744055373; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QeP6jQz4X7+XY7FtN/BipVDSziqVvseYgaJ7e11b81k=; b=xV5mj+FBzulAqGZz1AymvU/xLaZLOMQCCwNgFmlUQ3g2tmn7IqHFbmKxo27zKJSNJ+ F2MpfMpo8hZQlWbPIhKDkiCefKiGSxW9OUXRJyex4zZpC8Ihn8qWixfTw1SYziQdRZQn XMdMpHlJgjgb9j6vAa3BD0i9/z7av9rmRLhV4/bPKDailvw82W+gHvUrPGDyRWVqE4mq 9GPz4Lm95OXqEKRqkcFE22domYK43BgbRjXznl4yoo+5H2gszdtly+hoTei8J+yURSZq uQCnBWqQhtP8Puj0giX+LXsj2bS4uj3jA45XtcMBXpcoZF5EOIRf5FeT0Bn31WhUqyBa FaCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743450573; x=1744055373; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QeP6jQz4X7+XY7FtN/BipVDSziqVvseYgaJ7e11b81k=; b=xQV2j/OLld7bGTR7+0v2h+imm6E6UxZ4vBG01FUI5GtZO01ZLZz/kCHbvp8diHaPDl vX28ABYDeJoRtnZleF5UfcBSWtiN2DheUINJmOE9B4cDw+tTlnw6DFVJRf9g5CxKd8y+ qdBaehV/RVFZ5Hx9c5e+sBcGv0YtLtKB/N+mphZtqjLDl2DcU+W4D8GV2XOvhX97ZSYD znFWlstK6BSAyAzAaD+mYSre4ZRqrb+qLl0x8737iKlYHCwDzlY4dNQdVi6ueghQf0Gb qlZhDtHIknmU8sIyUt2V+DQ7CH+BBDFb9DnVWjooZ8ApsunVUt83gTCMUsiAH6M2ttwx 8BSg== X-Gm-Message-State: AOJu0YyOUpgly5IutG9DZpEi7uTs1jBRmI+0k4i4zgBG1mMijUGGiQiW oWiAkRIEW5L0rfSJ3BDIKIp+KGwC6ZGz+puLpE+N7s6WYP4HQ7Vs3gIfYzaSy+5nRZvXm7GdD6V / X-Gm-Gg: ASbGncugjNm/d6rIn0ievAorxH0GS9DQylA2yNgpugjreLO5TlLLiCGT3zrLHzfDmor d1xkw564wFmz8f2CQQ62PVceiQ+T0fbIpMjQahTigv0mRycpc4LA/08MY4KonYamYw9YR51dhdG 40Wpx+GG/O2tylASIuHyy//JCmcF92KImQRdiprN2ylPkFcOECM/pxpIZ244V26xSFdno5VSJ6P NI0xMRZquZ6DlLru4mmineXK2fTo2LE6RCDVskWouEmryWgd9rYPa5RKQaDEllVtUO/Zg1/7oQe w8wYEYcpf4GUQHmUGA+n/hvurVPeZpgaHz2A0uO2iT+C4FCuSImQ1LoxGAbmDpbpqqfPVRAGli+ Xg6e+IDAq3mplg9gsMuc= X-Google-Smtp-Source: AGHT+IHPkNX8mlPBJJVaShl76um6Dv5nAOBoqgSWsx+vME1rnw1bqT6PlOuDheO1psoGT4MPkQf3bQ== X-Received: by 2002:a5d:5f90:0:b0:391:2e0f:efce with SMTP id ffacd0b85a97d-39c120ccaa4mr8262930f8f.1.1743450573350; Mon, 31 Mar 2025 12:49:33 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d82efdff2sm174620815e9.17.2025.03.31.12.49.32 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:49:32 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Zheng Huang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL 14/23] hw/sd/sdhci: free irq on exit Date: Mon, 31 Mar 2025 21:48:12 +0200 Message-ID: <20250331194822.77309-15-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Zheng Huang Fix a memory leak bug in sdhci_pci_realize() due to s->irq not being freed in sdhci_pci_exit(). Signed-off-by: Zheng Huang Reviewed-by: Philippe Mathieu-Daudé Message-ID: <09ddf42b-a6db-42d5-954b-148d09d8d6cc@gmail.com> [PMD: Moved qemu_free_irq() call before sdhci_common_unrealize()] Signed-off-by: Philippe Mathieu-Daudé --- hw/sd/sdhci-pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/sd/sdhci-pci.c b/hw/sd/sdhci-pci.c index 5268c0dee50..bca149e8113 100644 --- a/hw/sd/sdhci-pci.c +++ b/hw/sd/sdhci-pci.c @@ -18,6 +18,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu/module.h" +#include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/sd/sdhci.h" #include "sdhci-internal.h" @@ -48,6 +49,7 @@ static void sdhci_pci_exit(PCIDevice *dev) { SDHCIState *s = PCI_SDHCI(dev); + qemu_free_irq(s->irq); sdhci_common_unrealize(s); sdhci_uninitfn(s); } From patchwork Mon Mar 31 19:48:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033888 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2695AC3600B for ; Mon, 31 Mar 2025 19:53:58 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL97-0003gT-TL; Mon, 31 Mar 2025 15:50:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL8f-0002Wt-Tj for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:51 -0400 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tzL8d-0003R7-Tj for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:41 -0400 Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-399749152b4so2011220f8f.3 for ; Mon, 31 Mar 2025 12:49:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743450578; x=1744055378; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=e7DpG1j0l2crn6m64hQcn/HA4bp5z0J1QxJNTGXkaR0=; b=zlZWvxTqVIlWvaIgPaECkImSOTlhb/z02Me7p0wW25UgIscov5n7QgmTJw1XYzQEIZ 6baCP2rajjmS8X/9N/mwqbE8nY0z6jhcTcNaMrMK6teI+/WDT746+oVce2hCDVL/KzpR dilFHpVD4+5MykE3mnRsOeY2vA0jOLdpUA2iufL7U+cWnWhx+0PkNceGfSYxDHfVhdvi RXVRIfKlBRi/kzPyd4SuZWaP1P2cHJMLpFfDpGjJcyIkkhwF5CZm7RfxJQHkVQeNGTEr slGT4NbdAxshEJPnOMmMutvvghMI3gZGIonMWD71d7rQRHaRkPxUyBc9kMD7sQkSoiby /Sbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743450578; x=1744055378; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e7DpG1j0l2crn6m64hQcn/HA4bp5z0J1QxJNTGXkaR0=; b=go/INrDjy4PIAUMj/TmfGLpNrjoGShSDfvGVYapeF7O9flf5krRjr0cdFyGgP8ShVc RiGxlm3vdrTPyCCIXmnHc0HN5tK/l+kqkBBKPOiz+GN4n1oesFdWNky5jYQXv93wRs4b LX9YTNwq7CJQ3boLMVadxLUnBerfQWh6l54xrg6cwJ3C6EnfihEUlfGp9OSUc3KPdJg/ dJXKd2Q6VigmqgsQyOK7YNy/7PG5+4iHVyL9MaV2QpZQ9WUwEbewK8VxfGsRQi20NIUo YSPsArQRY4unylo0hJdVLrluhvMOnANCG24I5acuGTTsZtfROXCLGayEIGMcyDrj1HiE XUjQ== X-Gm-Message-State: AOJu0YxP2h5cwrDHGsYNlnvtZJA+iqMfNst1N89hjO70hq8wcXmJMzP3 L8cm9fErqDZaNowwI41JD5vVjSSqGlSyAtkGViYY1vbrXYmdIW/6grFG8gUpTtfdnD38YXOiy0b o X-Gm-Gg: ASbGncsXfLc9ugnNdwMLxDaJtLSnyEf1NBb21u4sQYVb7NZAtFLJJSHTOviRo+/Mdsk hYT5FX5XaA+Bneg9X//QJOljWx4OgqrAJx6L1R/o5Z7QTqjpeHmlFBMGK2lJj8/bZErX4zu9i7E zE8hPPkIPRF3I6iKVdGVRaSP+cdqR/GmlX3mUODyvqX3Ua0vBef7Nc8g7dv4a6QlwmfGQDux9w8 U8J8aRHqndaJGaVc2eybOd0Rtf2oPvPTw0HjH5JxZxvVl2QILjx9o5NA/Wz9eup8YMYwlIKhg/M 4OITOthwdRuv3s7HF6Fox0skXA2OTEunlBb6oD4+HMkmPcT4KYa/jkQO9Sz8zQWkEnREkgXAQ7L S+qXB6LVSWRtpIa0UVno= X-Google-Smtp-Source: AGHT+IEWRXZXU9m2OrNLMJy3vLYS+wgKV7TyyNhWGIiqZlYRKszNjJSSNUITLl5v0FH3/Z/YBFBUow== X-Received: by 2002:a05:6000:240c:b0:391:ab2:9e80 with SMTP id ffacd0b85a97d-39c2364b666mr239869f8f.24.1743450577995; Mon, 31 Mar 2025 12:49:37 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b663860sm12251119f8f.39.2025.03.31.12.49.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:49:37 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Chung-Yi Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL 15/23] hw/char/bcm2835_aux: Fix incorrect interrupt ID when RX disabled Date: Mon, 31 Mar 2025 21:48:13 +0200 Message-ID: <20250331194822.77309-16-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Chung-Yi Chen Fix a misconfiguration issue in the read implementation of the AUX_MU_IIR_REG register. This issue can lead to a transmit interrupt being incorrectly interpreted as a receive interrupt when the receive interrupt is disabled and the receive FIFO holds valid bytes. The AUX_MU_IIR_REG register (interrupt ID bits [2:1]) indicates the status of mini UART interrupts: - 00: No interrupts - 01: Transmit FIFO is empty - 10: Receive FIFO is not empty - 11: When the transmit interrupt is enabled and the receive interrupt is disabled, the original code incorrectly sets the interrupt ID bits. Specifically: 1. Transmit FIFO empty, receive FIFO empty - Expected 0b01, returned 0b01 (correct) 2. Transmit FIFO empty, receive FIFO not empty - Expected 0b01, returned 0b10 (incorrect) In the second case, the code sets the interrupt ID to 0b10 (receive FIFO is not empty) even if the receive interrupt is disabled. To fix this, the patch adds additional condition for setting the interrupt ID bits to also check if the receive interrupt is enabled. Reference: BCM2835 ARM Peripherals, page 13. Available on https://datasheets.raspberrypi.com/bcm2835/bcm2835-peripherals.pdf Fixes: 97398d900ca ("bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) block") Signed-off-by: Chung-Yi Chen Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20250328123725.94176-1-yeechen0207@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/char/bcm2835_aux.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c index c6e7eccf7dd..9b073fc3308 100644 --- a/hw/char/bcm2835_aux.c +++ b/hw/char/bcm2835_aux.c @@ -98,7 +98,7 @@ static uint64_t bcm2835_aux_read(void *opaque, hwaddr offset, unsigned size) * interrupts are active, besides that this cannot occur. At * present, we choose to prioritise the rx interrupt, since * the tx fifo is always empty. */ - if (s->read_count != 0) { + if ((s->iir & RX_INT) && s->read_count != 0) { res |= 0x4; } else { res |= 0x2; From patchwork Mon Mar 31 19:48:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033887 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1266FC3600B for ; Mon, 31 Mar 2025 19:53:19 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL8x-0003Aw-Vd; Mon, 31 Mar 2025 15:50:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL8k-0002aq-GQ for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:51 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tzL8i-0003Rn-H6 for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:46 -0400 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-399737f4fa4so2378532f8f.0 for ; Mon, 31 Mar 2025 12:49:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743450582; x=1744055382; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5/jd9HigZUkvZ9mYhgB2s1hOlVQphymlZOIUStujzjg=; b=vjBGSYea+bnXAwcN8JSchUQ6vwB6Ie3pofc0NNfYb3um2QOStFQ6jRVmX/PvTtxrY4 AaMfYf3bRMj8RPgYhIPSvrMZC6qb9CIIMLN2xroFjAInQHD3LI4QpVUHFQQWCcg+82eN fvqnYBK5AWxgu/RE/UdAlgMWSEHxL37Bw0e7YU4hnk2zB8nGKe80JJrEL9tKUbuT7OTt F8HAexO0BUtsaGuxNnncVqw3sCQDKWRQMCCUIVdHtM4wTGIYXdv8D+dEizPzeyMkuIQY cPRYWS/jGfv4rXIrUEdGIsHXymxDK4I0cyUCQ8G1uKx0iFeFD+t0dACqBnSclR3fkENf AKXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743450582; x=1744055382; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5/jd9HigZUkvZ9mYhgB2s1hOlVQphymlZOIUStujzjg=; b=TftWO4qn+IpfKSDOPBz/sPqBj6da5AMgQdXa4j8nhYML4HL38lec6+gYiXt7+gZ9eD ji0mT5R8iqioOyTmjuEjPP682wZGY8GEF6fQnAdnLEeb1Af7BVHOCuuADpfZhLFLad2m aAhbJXVPiv8b6N045fOUYzOJJpBmROdc93UUkYMaJ0gIYg5gJwZ6hpx23wRePEJIoBoi AUtXLQqC5D6HEMSOSWw/DzL1127acggtG9FsNeA9sC4TK0510TwO496DSf5RK7o0dg9d l28fDUriEfDyVm6lw0GYs+L6HgtIK2IGcind38fa1YkmKXpqljJj+tz+Y3K3SAdTRpzF AeNA== X-Gm-Message-State: AOJu0YzxQskWQ8mX1TuQF70/uncpdx4FoLjcLufVoElWqCkBSCUG31yU NILOpTlEjkzJb7XbHGuBRLE1aBMg1uB7Loed7czJdQ+vl0xfHNah7qYRFRcFvVDqE2mzSPo21XK z X-Gm-Gg: ASbGncsYCvJIGDaxcDETknTfBUPWUJRd9vzpELpUELCuunm1CEGxfosWO9YT50jgjBR 4h9+d8gKK6SoHq56f9LgBn9ad50WXssQyMlCbWpW63ql3p6Fz96NHGKeUSMgPB1MZu25stjI/VV dkc3lwa4hiUZ1ITXGtFO4Xx8Cs3cKr2NO+SxFD+oLggSq5niTKPOxQH52bNVXyU6b+JgnZ6Zenj HDe0MRfkZzi2yjju1IUOiKn41z7m5TwI64CpbnFxc9nOw1ouRSQsqn9BUT6BaWSjAvm0ED3+1FN 1/dWEN/2aVZBL7yrS4oc6K0G2mx0His9UkKTFx5SGI3h9j2/2OT+lOayhWsda3bllg+2TooE4H7 9+nB2xkPS7roDyiemP+Y= X-Google-Smtp-Source: AGHT+IGlznRzHVVi6hbOwifE+N4TwtvHdOxQ3DAio6Zo4VKgn7rqwlfnxLhTxmuWntbnNWmb9uZdmQ== X-Received: by 2002:a5d:64c6:0:b0:38f:39e5:6b5d with SMTP id ffacd0b85a97d-39c12117d3emr8212094f8f.44.1743450582608; Mon, 31 Mar 2025 12:49:42 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d830f59d0sm173771505e9.28.2025.03.31.12.49.41 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:49:42 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Zheng Huang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL 16/23] hw/ufs: free irq on exit Date: Mon, 31 Mar 2025 21:48:14 +0200 Message-ID: <20250331194822.77309-17-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Zheng Huang Fix a memory leak bug in ufs_init_pci() due to u->irq not being freed in ufs_exit(). Signed-off-by: Zheng Huang Reviewed-by: Philippe Mathieu-Daudé Message-ID: <43ceb427-87aa-44ee-9007-dbaecc499bba@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/ufs/ufs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/ufs/ufs.c b/hw/ufs/ufs.c index 857de6e9c2c..ee13edacd8f 100644 --- a/hw/ufs/ufs.c +++ b/hw/ufs/ufs.c @@ -25,6 +25,7 @@ #include "qapi/error.h" #include "migration/vmstate.h" #include "scsi/constants.h" +#include "hw/irq.h" #include "trace.h" #include "ufs.h" @@ -1808,6 +1809,8 @@ static void ufs_exit(PCIDevice *pci_dev) { UfsHc *u = UFS(pci_dev); + qemu_free_irq(u->irq); + qemu_bh_delete(u->doorbell_bh); qemu_bh_delete(u->complete_bh); From patchwork Mon Mar 31 19:48:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033883 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F3747C3600B for ; Mon, 31 Mar 2025 19:52:49 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL96-0003c4-TS; Mon, 31 Mar 2025 15:50:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL8p-0002hz-N9 for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:52 -0400 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tzL8n-0003SH-UP for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:51 -0400 Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-43d0c18e84eso21920015e9.3 for ; Mon, 31 Mar 2025 12:49:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743450588; x=1744055388; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=b1rAoFw8FyG6NwD6es9o9iWAe5ykbL1RM+kN37mtk4M=; b=hJ4u3E6uyxbvRjd0UHvEkeIYiR1E/13EaW+veqoKHkaiGucdtDYX8Ft28WzubQrulO v5wSPpQvFsrGJ+2Y9SYmwzAJ3OgWQDMlZq01Nc6aw1vJ5UHvJk1kzh95lTvBf37jN6jy Pzm5q03eaK/xTkMM/4x54765lfPMstR8hpQBZR5uHaDRUnsVUOWWKEDG8sBVN/RgJiAr SymdsKJKNoCPBKkBEEF2nirsTxCR6Hcmv2T5e1NlPyHv5FJ5NuL3djR+9nQvHetl/TPr ij0horQ8xODIBaV/o94yfHbr6ylXaIJPLIZ+WeMNIZ9eYMwnmqYa4plyk4nQLqlybcN8 16Ow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743450588; x=1744055388; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=b1rAoFw8FyG6NwD6es9o9iWAe5ykbL1RM+kN37mtk4M=; b=qglBz2Wy5TF6gAUOcElTlwjCfXCrxJ4ogliiG3uGoo525phsVvuYa/zDVWBxxO/9it ORjSqiGOg/DGp56Rarl572eJ1nQ1mA17yfuODLYVEbv2tpKM63014ct5N78BLb5MT92v jz+v3PVoiNXYYt+VU/XShlgsPr6OW5PTZATWEY9MLMztx+QTlnxBpdnGcnHzdm3GRTDb F3io0gdPJ599nqxs8oNGWis0SgOuNvxczyNYRMFvs9PBpFVhExlNsInLSHP4JTUv07Za aFTUXoRCwsqq4llD5noTP8GL/WAUXjniv941o3JmxfPWD+jHxuSnRpL455wXez+QsR96 /RpA== X-Gm-Message-State: AOJu0YyoCpCawqfKT1rTNFpPMpMbaiefJ7qIihmnP+nMYZFvS9JAtoqI cQcYMghW/lPj2VyFqH1JNodoYxXzSujDMnqrXrtz2+24Ux1+owDj9D1MW1HOIIMkaFxsZKdeGXY S X-Gm-Gg: ASbGncv1u5PPOZJ1OL7C2E1ByQxATnbU3/W7RSz4qR5mbkmZ4XDAxAf3etIV6ytV9fL T7KboVGGUMQQZQmAFHHFg9PIabbdldounHI5vOuGYEMZKDASKEwVv+fLp7A1mBV0cnfZk5+/Csy jHRsHSuZqA3rgp8eCT+ZZ0+9FYGkVCWXq9ThBkv1W7oC+EiDfb2oEtAYjhOJQXdz+REJY87j9bt V1lAFhUxbwljghxk05+OHOuy4ALN5QFwO/pKciMtpeZzv1iIAkGhWhmtDrwntI2ThMaNlOuziXg vRzpzHu0X7popepfOmrVR2RrTMu6Fiv9Qe13vSVvEZH5o3XJdP85ZLuRyKFpAkcwHKM4Y/2o7RI PhYWQ46r7I5cOUVFwU44= X-Google-Smtp-Source: AGHT+IE+fSoHtmGLpdKLJSche7MhHuCLx8vQsi/hHC5wJFbsGh7ORDYphg0LlhjFxNjUgMF/dDj7zA== X-Received: by 2002:a05:600c:138d:b0:43c:f44c:72b7 with SMTP id 5b1f17b1804b1-43db61ff68bmr106197175e9.14.1743450588152; Mon, 31 Mar 2025 12:49:48 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d8fbc10f7sm132920615e9.14.2025.03.31.12.49.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:49:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-stable@nongnu.org, Joey , Gustavo Romero Subject: [PULL 17/23] hw/pci-host/designware: Fix ATU_UPPER_TARGET register access Date: Mon, 31 Mar 2025 21:48:15 +0200 Message-ID: <20250331194822.77309-18-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Fix copy/paste error writing to the ATU_UPPER_TARGET register, we want to update the upper 32 bits. Cc: qemu-stable@nongnu.org Reported-by: Joey Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2861 Fixes: d64e5eabc4c ("pci: Add support for Designware IP block") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Gustavo Romero Message-Id: <20250331152041.74533-2-philmd@linaro.org> --- hw/pci-host/designware.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index c07740bfaa4..5598d18f478 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -371,7 +371,7 @@ static void designware_pcie_root_config_write(PCIDevice *d, uint32_t address, case DESIGNWARE_PCIE_ATU_UPPER_TARGET: viewport->target &= 0x00000000FFFFFFFFULL; - viewport->target |= val; + viewport->target |= (uint64_t)val << 32; break; case DESIGNWARE_PCIE_ATU_LIMIT: From patchwork Mon Mar 31 19:48:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033884 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8A0A9C3600B for ; Mon, 31 Mar 2025 19:52:56 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL9D-0003xY-Ug; Mon, 31 Mar 2025 15:50:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL8u-000344-GJ for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:56 -0400 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tzL8s-0003T4-L5 for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:49:56 -0400 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-43ce71582e9so33830995e9.1 for ; Mon, 31 Mar 2025 12:49:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743450593; x=1744055393; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=edC8SjUvZyJ+hQNsoUTkUYXPs+9FX/UDXWtKI6uhvY4=; b=Djqi1TsivdxIMmtYpRgz1Y7fwkqC6be5WKaPAaV4MvmxeDiPY/VUkkBtth1ysQDDXV Gp5CtBMkmTlgX/+pqDPLh0lI+6mnmwlbdGBy+I5L+IJ1vKkYBSlEbC5qmvfzOxx4CNFT A8bjuwkE85+XRSSJY4ZuTuMTCEUSZ32I5l2t3aEUmWWooQ600/HAPLHPVmKOLjpEXeKQ QCMhxTG+nyS+2BSuRIgHmRdzS76nOW+3TXa3rnF6RtCHiBwkMZhSJJvhU+kHvH69DfJK WekcuzSva8EEgnHV2VpXNOaUk5jEU7O3+e9oSMLW/cwJFko6N7fGnp6xxzbGXyvi6vym cDwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743450593; x=1744055393; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=edC8SjUvZyJ+hQNsoUTkUYXPs+9FX/UDXWtKI6uhvY4=; b=DGmuL47CyaascDtocsfGyNFexXYKTccA13L2a0bOd9wxk0SQQluMNJZ7wcvUWUOy5g 6Ln5t8BP0fDh1HnEaWKl7ZUCD4y8sndZiUM6CQlYYduatc2aQpEKbxIz1oyS5lCVfbVH tmvrA/Axw3XCg1fM+M3qAw82CJVAHLljD9Mgd9OadDHGaz1N23SlRfuy8cPCpSVPvvNh lMOutLCNEo3ZANkaDQ9GEuARZ0EIrljwqAE+mGPVO+pR6MvqZvnFWxQoTeWb01cCltnd ODRYdp/oLEGMjVuoliOd5SXb/WUiokWFPBfhV3NezMVbCYcKpEUYFQbwhjqpRo+oRi2K +0NA== X-Gm-Message-State: AOJu0YxG7iwh0FSOFxvB/t8eA99V2V1M/VqP9V6W2MfXrDQby60avuZZ rMNiu8JaMzTSSzayTiF0N8aFRXg5X02kGMtfjulH4NOXx9cuBNPlgxLsQ0ttMBhh8yqmk5DzZqr H X-Gm-Gg: ASbGncu5qQ2rkv/qw6jQTacL4yzJsYggl8y8xOEJRD7KCJi5wcSTJwUJJWccjg31riI E1mdc4vP6CafzSXZpnYIE+wvKuhD6aIKsT4RA9a5ljz9LmZzw62cMgyFj3YA5/f0faxeF/oG3Gp nAmeytlveFR6gn1H0Crq3fryWFhDOuYkz9kujRqabvIpqXAI81guUfZcyp0FKJebje7+x/vUu2i laCZL7vsgXc+IvBFS0+z5fcRiasP8KnRFKsjjOejLQ+idp6bmQ7FrFgFb62fgo74cmfcqBLAHgO 2ZqDBadFywID0En0btfXYW8/tlXubVDPskjGWNohInlU3xP7CNSYAPfSEM9EFRybWyYW4+U5WrU ygjj9d0WqfjeYsvyeto0= X-Google-Smtp-Source: AGHT+IFEnhJS+2GTTiioocUzdKhb0TfqoE459dDnBlJOa8n5vx6sByDBYOs4E2HnbNkV+x/qFgSUZA== X-Received: by 2002:a05:600c:511a:b0:43d:683:8caa with SMTP id 5b1f17b1804b1-43db61ff43fmr102786595e9.15.1743450592739; Mon, 31 Mar 2025 12:49:52 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b6589e4sm12269140f8f.10.2025.03.31.12.49.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:49:52 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PULL 18/23] target/hppa: Remove duplicated CPU_RESOLVING_TYPE definition Date: Mon, 31 Mar 2025 21:48:16 +0200 Message-ID: <20250331194822.77309-19-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The CPU_RESOLVING_TYPE definition was added in commit 0dacec874fa ("cpu: add CPU_RESOLVING_TYPE macro"), but then added again in commit d3ae32d4d20. Remove the duplication. Fixes: d3ae32d4d20 ("target/hppa: Implement cpu_list") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20250321184200.4329-1-philmd@linaro.org> --- target/hppa/cpu.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 7be4a1d3800..8b36642b591 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -391,6 +391,4 @@ void hppa_cpu_alarm_timer(void *); #endif G_NORETURN void hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra); -#define CPU_RESOLVING_TYPE TYPE_HPPA_CPU - #endif /* HPPA_CPU_H */ From patchwork Mon Mar 31 19:48:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033880 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8E508C36013 for ; Mon, 31 Mar 2025 19:52:22 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL9S-0004QR-8E; Mon, 31 Mar 2025 15:50:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL90-0003NB-7S for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:50:03 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tzL8y-0003TZ-6t for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:50:01 -0400 Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-39141ffa9fcso4634068f8f.0 for ; Mon, 31 Mar 2025 12:49:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743450598; x=1744055398; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uHP3dfOw1csrD92NzXd1LjCikF/T0hdIj+cLpHi1vWc=; b=ihDOYyvFvBc7023UkZOcmVnuDoOixGZi15cKyogedQOlW58yvxyu2SduOPHt6XdHub StOZxmznlhhGFunxWX2K26T+E48TFlFADSE/RB3hytq5koh2JANRtNeqp3xuvs22rmr9 WfcMze2fZJtGS2j6+NrFoW0cr6tVIjBq8wcgZ0goyC3EKuK9ARiQH3mOaBmfkiG1Wyqo bZq1a3SjST1txcMXrhe3bQpQJD8jY2VmxKTOV4W7UIE8KxOzyyM01qNk7ILBGxqfoWhu 9Pn14kuEwvSbTfELoeyXUTLPuEfGMaw4rHF82a4PDWajltRNVlnHMFl2XMuCnRtsgEuk ccGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743450598; x=1744055398; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uHP3dfOw1csrD92NzXd1LjCikF/T0hdIj+cLpHi1vWc=; b=WzUI0emp3FN7L5Tlk4etDsfpVxPyGCjFB8Ol8AWyBRuIQRmXZq2zf3tbjtUT9NNtfu 5FipT/s5WEZ86su+plNi/JuKHNfyed4jVnhRXh9EFw17eQa9tEBsNTy7nULOok0Qd0bQ k0zJWhD5WeGcTp1xTmk8s/26MTUAdSxaOLSS8tXFye+Nnf1SmJmnR/uhjUlhkIYvnyKZ xVg2Bx/ofn7RKXN7RPUgkG3+D3OQtQNlmBerB6ejnfdPAwiOfxmC97BGEeiphyaKPjmI QYTGszTZdtdSE0DkoSrICo3cL2wQybPR4R/xtyvopU+tNUKGjcI6W6f64w9epWQsbCpy I3KA== X-Gm-Message-State: AOJu0YwAq3JCjBNoygZMcJVtB8549NrOHlVIDgoMSEDaPj0Oi/eMqxuw tNdD2mzaE1g8MVQ2RkK8YmqeoCDN8aMOjx7PYAk0AcrUPHx15O8spIBjqr4OZ1dC8P5zkYTXCbf O X-Gm-Gg: ASbGncsRHw1+C7jUNQ0LdLubZ2f485/Yvd5ZDB/OOCrlTaoqYs0PN8fPnDDH7wW3Ptk 9FLRzs10hhlTU1iCSssfD0Mf0txqm0wowWviW/ITbPZkw+VUxtwx8CzbWRQahIxd8Y/8itWEaPK Ludb5rZRf8M70rop7bQh+QeQuO8PRMIWxSrxlbVowv7clKlXhLdwX5w1TLZxyeJmV91zWnGZjbd pkU+NVXwUU3byTrP+EF/0EuTCoxs2911PsUE5Q5vhlLLFbAwxfcJ0Z4x8Rs1u0N4MNLuyGqRmJz pvdcBHWq6IlircltuszX/pc6LCvhr15RjhAAQLF+SYe7cgz5RhL03RA0UdnI9+meRRMFGzVOTdp OPv0YDb0ZCudfjLW8HOE= X-Google-Smtp-Source: AGHT+IHbWHYcSESUv3iuc4AkjfGh0xvKEzr5euY3wAA/wv/EBECiXUtqKs5rtXbmoKMko6+WkxQHzg== X-Received: by 2002:a5d:584a:0:b0:390:fbdd:994d with SMTP id ffacd0b85a97d-39c120e3cd6mr8539689f8f.27.1743450598206; Mon, 31 Mar 2025 12:49:58 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d8314bbf1sm172587425e9.38.2025.03.31.12.49.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:49:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , qemu-stable@nongnu.org, Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PULL 19/23] target/avr: Fix buffer read in avr_print_insn Date: Mon, 31 Mar 2025 21:48:17 +0200 Message-ID: <20250331194822.77309-20-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Do not unconditionally attempt to read 4 bytes, as there may only be 2 bytes remaining in the translator cache. Cc: qemu-stable@nongnu.org Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20250325224403.4011975-2-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- target/avr/disas.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/target/avr/disas.c b/target/avr/disas.c index b7689e8d7cd..d341030174f 100644 --- a/target/avr/disas.c +++ b/target/avr/disas.c @@ -68,28 +68,35 @@ static bool decode_insn(DisasContext *ctx, uint16_t insn); int avr_print_insn(bfd_vma addr, disassemble_info *info) { - DisasContext ctx; + DisasContext ctx = { info }; DisasContext *pctx = &ctx; bfd_byte buffer[4]; uint16_t insn; int status; - ctx.info = info; - - status = info->read_memory_func(addr, buffer, 4, info); + status = info->read_memory_func(addr, buffer, 2, info); if (status != 0) { info->memory_error_func(status, addr, info); return -1; } insn = bfd_getl16(buffer); - ctx.next_word = bfd_getl16(buffer + 2); - ctx.next_word_used = false; + + status = info->read_memory_func(addr + 2, buffer + 2, 2, info); + if (status == 0) { + ctx.next_word = bfd_getl16(buffer + 2); + } if (!decode_insn(&ctx, insn)) { output(".db", "0x%02x, 0x%02x", buffer[0], buffer[1]); } - return ctx.next_word_used ? 4 : 2; + if (!ctx.next_word_used) { + return 2; + } else if (status == 0) { + return 4; + } + info->memory_error_func(status, addr + 2, info); + return -1; } From patchwork Mon Mar 31 19:48:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033881 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8EB30C3600B for ; Mon, 31 Mar 2025 19:52:35 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL9i-0004v0-8q; Mon, 31 Mar 2025 15:50:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL96-0003d3-GL for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:50:08 -0400 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tzL94-0003UQ-Gt for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:50:08 -0400 Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-43cfe574976so33391145e9.1 for ; Mon, 31 Mar 2025 12:50:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743450604; x=1744055404; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=p5ZHjqmLDaEsy6AfHhvBBwdmYQrv+nX9DlxuV6Wd4ws=; b=CrKa71OCf4qF3PHdRFLFbzYB+JlfP39bg45Ge/1Bn6ixCep9rd1EfVHQ8n7u2dym8y FGeUXtXDXIeevoykdQEsjWzJpKfhupnemzHRkHEyYAf3RFpAhJuBK6h52208dIopv3zQ /G99DM+EB/tsbWavkTINC8XGgdnwjlGXYvFKiTS1lpYlSa4cBxKJvz4T8di2p+b3gSib nkfiS1jTi2M1N7Z6BJapcwL3+owIILWAoipDvHa+p6bSGu/JjzcibGeraNFtCtP1XICM dBBoGBMYtA5CgdQG1KcrjptpwBsMmYj2rj5cif96jKJf6A2LSuQ/szgJQbYDsIeRU9xK Uj8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743450604; x=1744055404; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=p5ZHjqmLDaEsy6AfHhvBBwdmYQrv+nX9DlxuV6Wd4ws=; b=X5l2Ru3n3iDZh9KVJv1VsFfBVgmVOoImRCuZKprWP8q2CmYO5PUvt6EPZbGks//fcp b8WmvRM7JHnNcZ7ItUlXE0bPiqX7Yq7o/c70yW88VvjidJXhrUxoZLRkKFXhW3+k9mPP lFokLcKdfskhC/aJlxpl7s7t0HqlDwD4fL98g05rGbFlh+u2G/JVZbta49f0lOYREx7i Dd5GCB/WyZRaEL+LB7vSo4EpIa7wLULd9i1aWI3uAtw2hMjF/wkZnN3D/TuLZ438xBnV j5Ipb7suR8zSIX+iGrZzfpv14vvnUyhkNXqa3sHfYvw0PGoOBJuQL8tpxxr7DCaenJM5 rrwA== X-Gm-Message-State: AOJu0Yz2LXIypz1uINe1jS/trhp6nnZ11qUN0iTdPzkrTIIPNY0nm0no glugssjsKffRIF2mKMh2VT5DUZKhO9saoyFstFCRoup0GyqW/NC7nQdv8dCeHJvbCMdQGe1PPJA 9 X-Gm-Gg: ASbGncsliEykFWr9Ys/J5T/RaHRitMfOT0UfKxrrWEWSqmvKtFU1nLArNQZhgPZhuDb jzhjrV54yIz09FpNzgpfRbuhb76BC1a1TY4U2STLYAMQ1VWrJdH/DHTL7puVUEWP9ocUCAAXLLp XxtADll+Pqw7NQVw7CCmShdgUYNI/pcrtQ/MAnH7smNGAbRdEXa/fh5/3SISqzhwcEqKYGg0OL3 X5qgqg3ctrpm7Rm9+TjSSA/WACx/s4rr2GSeWzmJJKKcf1F4kqIaIIMzFmOPrnt/PWFfokEP3n9 mmoDHBWOI/lQUuuI/Pyx5QICJ4RAgCa+DPBRRDJUwlbdSMQoiBBYRClMUyCdTVPqUWeUBt7U/F5 roHnuieHG3+4QomhfR+o= X-Google-Smtp-Source: AGHT+IH2Dsz2O/HyegmMzYX6SMS8/upMl5C4BT42F6CaD0c9wA50VYlh4PHDqDG8TyUp449d2sGKpQ== X-Received: by 2002:a05:600c:3b0d:b0:43c:e478:889 with SMTP id 5b1f17b1804b1-43ea7bf5717mr6007835e9.0.1743450604564; Mon, 31 Mar 2025 12:50:04 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d8314f5c6sm179823485e9.40.2025.03.31.12.50.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:50:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?C?= =?utf-8?q?l=C3=A9ment_Chigot?= Subject: [PULL 20/23] target/sparc: Log unimplemented ASI load/store accesses Date: Mon, 31 Mar 2025 21:48:18 +0200 Message-ID: <20250331194822.77309-21-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org When the cache-controller feature is not implemented, log potential ASI access as unimplemented. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Clément Chigot Message-Id: <20250325123927.74939-4-philmd@linaro.org> --- target/sparc/ldst_helper.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index b559afc9a94..45882e25db1 100644 --- a/target/sparc/ldst_helper.c +++ b/target/sparc/ldst_helper.c @@ -600,6 +600,9 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, case 0x0C: /* Leon3 Date Cache config */ if (env->def.features & CPU_FEATURE_CACHE_CTRL) { ret = leon3_cache_control_ld(env, addr, size); + } else { + qemu_log_mask(LOG_UNIMP, "0x" TARGET_FMT_lx ": unimplemented" + " address, size: %d\n", addr, size); } break; case 0x01c00a00: /* MXCC control register */ @@ -816,6 +819,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, case 0x0C: /* Leon3 Date Cache config */ if (env->def.features & CPU_FEATURE_CACHE_CTRL) { leon3_cache_control_st(env, addr, val, size); + } else { + qemu_log_mask(LOG_UNIMP, "0x" TARGET_FMT_lx ": unimplemented" + " address, size: %d\n", addr, size); } break; From patchwork Mon Mar 31 19:48:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033890 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6136DC3600B for ; Mon, 31 Mar 2025 19:54:29 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzL9U-0004Yn-R7; Mon, 31 Mar 2025 15:50:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzL9C-0003x8-9W for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:50:14 -0400 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tzL9A-0003gG-3J for qemu-devel@nongnu.org; Mon, 31 Mar 2025 15:50:13 -0400 Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-3914bc3e01aso2743410f8f.2 for ; Mon, 31 Mar 2025 12:50:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743450610; x=1744055410; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mW/LOTnTsMj5waRnbyiJBrlUqbYcaju/dZQD/CeCa/g=; b=clZSFJErFAdBWW9/eCcdY+8/CLu3NqTUUlAPTkyTDqCo1n8h/TbPFinrw6uVkODL4M g+/Cb049zt0J1DHNJ2YuVcdOqzAiDYd+Y+B8WEmn0vbjDR8CKBD+2RbphxOqSSno1Ebm 9ycNRwOaoOT9AMjYysE4vY3k7pR37RI8b/XORpSHD+Qo/pNSHkDvi6TZzTKUkzik9BDD YJhTi3IbDfIEKlgyNmvF+0nC8J01JHvrB9fRTRbpkkIBNoXp2BbwzxTBLLUECTW5Dp41 2PunXrENL/VTx1kSGs9qD10UaUGK3HKfZihs+Z1F3y49Wm0JN9Sq9lsrU9aUUkfEJamz wDEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743450610; x=1744055410; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mW/LOTnTsMj5waRnbyiJBrlUqbYcaju/dZQD/CeCa/g=; b=oV+wX0g+GGslHQPi3np5QduUO8I8+vCMUg/zPV1ch45eKgOGCT5JpQfRp/3D1IDmUY DSrZdP4v5azO+z+LPHZkELBSkew5i8JwEVbjU2i/HWo4JlWTMM3GuASFxpbkpseoJMVl 5pHMUPIT2ZRxyUH6NQxRYWivXpUKhPszeWoHNvYKPh5mslOoJCqwfoJWW4TMUA+D2qSi O3bNoAdiZSyCZg92MFDZ/22rGuBz3f/SxjaL0AacAb+qbjoq5DopTW04APyecsy0eim9 lK2g1k1M0/NhQ9MryhLCWkpsa3s7JpoBiU1sZoZrcm2ex9VgyNJImd72OcQbiFanqmcr rNnw== X-Gm-Message-State: AOJu0Yx2XpxsZT6RjELTYn5CRBREv2eMcVDvk0Gz/9MQrPvKqrwbyaSm F4UBpNGGzcFHNkY7fNluFUaq+W6byuyWB+NpQVroDaMgLKNhiCdZPvjOqxB+uLIXSaVnoiAIVJ1 A X-Gm-Gg: ASbGncuFg0OlUGiP7RFSsKWK0i49wbLhy17xcpe99z3fbNkyV/K8nxaams0xky2Epkh jclRNMRKiVlhuqaNghj4VKnJ+Dg6p8q71h6o6SUNXesoGEmQHkJphu77d+3bVLtDubAxfrpj4FV M9rIo7csMZZpB6KBcGa6ZjgNuKwvDAS/Gxo+Swu9q6Y8dfYBXnokJgZecVY+gM8fSUFa7mQ/gha 81a/pyXy+a+PVHqG3u9YpyZqw1A43XPQ5m7HbbxqeUc2uGZ6sPBOG08edg34iJdgAzRKpAunwfW 6XhjXs/OB9qcKRhhf2eyqrfnnrmgkSe4nVjCQnx4LWFHjiA9K2G9BImh/8ubzoxDhIZMGjNK1Sq R+OINAO1eXsNW++2/WRE= X-Google-Smtp-Source: AGHT+IFGjfflTjCvFw3S4vyuY6vdqcZEeyfkAOBgkSIoUGphtDRNkkKMf5XwifT29+IA1MGP/b6gKQ== X-Received: by 2002:a05:6000:2913:b0:39c:e14:cd70 with SMTP id ffacd0b85a97d-39c12115d6fmr8695093f8f.34.1743450610081; Mon, 31 Mar 2025 12:50:10 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b7a4239sm12269696f8f.94.2025.03.31.12.50.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:50:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PULL 21/23] target/mips: Revert TARGET_PAGE_BITS_VARY Date: Mon, 31 Mar 2025 21:48:19 +0200 Message-ID: <20250331194822.77309-22-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Revert ee3863b9d41 and a08d60bc6c2b. The logic behind changing the system page size because of what the Loongson kernel "prefers" is flawed. In the Loongson-2E manual, section 5.5, it is clear that the cpu supports a 4k page size (along with many others). Similarly for the Loongson-3 series CPUs, the 4k page size is mentioned in the section 7.7 (PageMask Register). Therefore we must continue to support a 4k page size. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20250328175526.368121-2-richard.henderson@linaro.org> [PMD: Mention Loongson-3 series CPUs] Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu-param.h | 5 ----- hw/mips/fuloong2e.c | 1 - hw/mips/loongson3_virt.c | 1 - target/mips/tcg/system/cp0_helper.c | 7 +------ target/mips/tcg/system/tlb_helper.c | 2 +- 5 files changed, 2 insertions(+), 14 deletions(-) diff --git a/target/mips/cpu-param.h b/target/mips/cpu-param.h index 11b3ac0ac63..8fcb1b4f5f2 100644 --- a/target/mips/cpu-param.h +++ b/target/mips/cpu-param.h @@ -18,12 +18,7 @@ # define TARGET_VIRT_ADDR_SPACE_BITS 32 #endif #endif -#ifdef CONFIG_USER_ONLY #define TARGET_PAGE_BITS 12 -#else -#define TARGET_PAGE_BITS_VARY -#define TARGET_PAGE_BITS_MIN 12 -#endif #define TCG_GUEST_DEFAULT_MO (0) diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index 646044e2749..2a8507b8b0a 100644 --- a/hw/mips/fuloong2e.c +++ b/hw/mips/fuloong2e.c @@ -334,7 +334,6 @@ static void mips_fuloong2e_machine_init(MachineClass *mc) mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E"); mc->default_ram_size = 256 * MiB; mc->default_ram_id = "fuloong2e.ram"; - mc->minimum_page_bits = 14; machine_add_audiodev_property(mc); } diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c index db1cc513147..1da20dccec4 100644 --- a/hw/mips/loongson3_virt.c +++ b/hw/mips/loongson3_virt.c @@ -677,7 +677,6 @@ static void loongson3v_machine_class_init(ObjectClass *oc, void *data) mc->max_cpus = LOONGSON_MAX_VCPUS; mc->default_ram_id = "loongson3.highram"; mc->default_ram_size = 1600 * MiB; - mc->minimum_page_bits = 14; mc->default_nic = "virtio-net-pci"; } diff --git a/target/mips/tcg/system/cp0_helper.c b/target/mips/tcg/system/cp0_helper.c index 01a07a169f6..8c2114c58a6 100644 --- a/target/mips/tcg/system/cp0_helper.c +++ b/target/mips/tcg/system/cp0_helper.c @@ -877,18 +877,13 @@ void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask) if ((mask >> maskbits) != 0) { goto invalid; } - /* We don't support VTLB entry smaller than target page */ - if ((maskbits + TARGET_PAGE_BITS_MIN) < TARGET_PAGE_BITS) { - goto invalid; - } env->CP0_PageMask = mask << CP0PM_MASK; return; invalid: /* When invalid, set to default target page size. */ - mask = (~TARGET_PAGE_MASK >> TARGET_PAGE_BITS_MIN); - env->CP0_PageMask = mask << CP0PM_MASK; + env->CP0_PageMask = 0; } void helper_mtc0_pagemask(CPUMIPSState *env, target_ulong arg1) diff --git a/target/mips/tcg/system/tlb_helper.c b/target/mips/tcg/system/tlb_helper.c index ca4d6b27bc9..123639fa18e 100644 --- a/target/mips/tcg/system/tlb_helper.c +++ b/target/mips/tcg/system/tlb_helper.c @@ -875,7 +875,7 @@ refill: break; } } - pw_pagemask = m >> TARGET_PAGE_BITS_MIN; + pw_pagemask = m >> TARGET_PAGE_BITS; update_pagemask(env, pw_pagemask << CP0PM_MASK, &pw_pagemask); pw_entryhi = (address & ~0x1fff) | (env->CP0_EntryHi & 0xFF); { From patchwork Mon Mar 31 19:48:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 14033877 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5CB14C3600B for ; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b6656a0sm12170928f8f.37.2025.03.31.12.50.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:50:14 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= , qemu-stable@nongnu.org Subject: [PULL 22/23] target/mips: Require even maskbits in update_pagemask Date: Mon, 31 Mar 2025 21:48:20 +0200 Message-ID: <20250331194822.77309-23-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson The number of bits set in PageMask must be even. Fixes: d40b55bc1b86 ("target/mips: Fix PageMask with variable page size") Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20250328175526.368121-3-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé Cc: qemu-stable@nongnu.org --- target/mips/tcg/system/cp0_helper.c | 23 ++++++++--------------- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/target/mips/tcg/system/cp0_helper.c b/target/mips/tcg/system/cp0_helper.c index 8c2114c58a6..5db8166d452 100644 --- a/target/mips/tcg/system/cp0_helper.c +++ b/target/mips/tcg/system/cp0_helper.c @@ -866,24 +866,17 @@ void helper_mtc0_memorymapid(CPUMIPSState *env, target_ulong arg1) void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask) { - uint32_t mask; - int maskbits; - /* Don't care MASKX as we don't support 1KB page */ - mask = extract32((uint32_t)arg1, CP0PM_MASK, 16); - maskbits = cto32(mask); + uint32_t mask = extract32((uint32_t)arg1, CP0PM_MASK, 16); + int maskbits = cto32(mask); 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d82dedd03sm174803455e9.3.2025.03.31.12.50.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 31 Mar 2025 12:50:19 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= , qemu-stable@nongnu.org Subject: [PULL 23/23] target/mips: Simplify and fix update_pagemask Date: Mon, 31 Mar 2025 21:48:21 +0200 Message-ID: <20250331194822.77309-24-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250331194822.77309-1-philmd@linaro.org> References: <20250331194822.77309-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson When update_pagemask was split from helper_mtc0_pagemask, we failed to actually write to the new parameter but continue to write to env->CP0_PageMask. Thus the use within page_table_walk_refill modifies cpu state and not the local variable as expected. Simplify by renaming to compute_pagemask and returning the value directly. No need for either env or pointer return. Fixes: 074cfcb4dae ("target/mips: Implement hardware page table walker for MIPS32") Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20250328175526.368121-4-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé Cc: qemu-stable@nongnu.org --- target/mips/tcg/tcg-internal.h | 2 +- target/mips/tcg/system/cp0_helper.c | 10 +++++----- target/mips/tcg/system/tlb_helper.c | 2 +- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/target/mips/tcg/tcg-internal.h b/target/mips/tcg/tcg-internal.h index 74fc1309a71..950e6afc3f2 100644 --- a/target/mips/tcg/tcg-internal.h +++ b/target/mips/tcg/tcg-internal.h @@ -47,7 +47,7 @@ bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req); void mmu_init(CPUMIPSState *env, const mips_def_t *def); -void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask); +uint32_t compute_pagemask(uint32_t val); void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra); uint32_t cpu_mips_get_random(CPUMIPSState *env); diff --git a/target/mips/tcg/system/cp0_helper.c b/target/mips/tcg/system/cp0_helper.c index 5db8166d452..78e422b0caf 100644 --- a/target/mips/tcg/system/cp0_helper.c +++ b/target/mips/tcg/system/cp0_helper.c @@ -864,24 +864,24 @@ void helper_mtc0_memorymapid(CPUMIPSState *env, target_ulong arg1) } } -void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask) +uint32_t compute_pagemask(uint32_t val) { /* Don't care MASKX as we don't support 1KB page */ - uint32_t mask = extract32((uint32_t)arg1, CP0PM_MASK, 16); + uint32_t mask = extract32(val, CP0PM_MASK, 16); int maskbits = cto32(mask); /* Ensure no more set bit after first zero, and maskbits even. */ if ((mask >> maskbits) == 0 && maskbits % 2 == 0) { - env->CP0_PageMask = mask << CP0PM_MASK; + return mask << CP0PM_MASK; } else { /* When invalid, set to default target page size. */ - env->CP0_PageMask = 0; + return 0; } } void helper_mtc0_pagemask(CPUMIPSState *env, target_ulong arg1) { - update_pagemask(env, arg1, &env->CP0_PageMask); + env->CP0_PageMask = compute_pagemask(arg1); } void helper_mtc0_pagegrain(CPUMIPSState *env, target_ulong arg1) diff --git a/target/mips/tcg/system/tlb_helper.c b/target/mips/tcg/system/tlb_helper.c index 123639fa18e..df80301a412 100644 --- a/target/mips/tcg/system/tlb_helper.c +++ b/target/mips/tcg/system/tlb_helper.c @@ -876,7 +876,7 @@ refill: } } pw_pagemask = m >> TARGET_PAGE_BITS; - update_pagemask(env, pw_pagemask << CP0PM_MASK, &pw_pagemask); + pw_pagemask = compute_pagemask(pw_pagemask << CP0PM_MASK); pw_entryhi = (address & ~0x1fff) | (env->CP0_EntryHi & 0xFF); { target_ulong tmp_entryhi = env->CP0_EntryHi;