From patchwork Tue Apr 1 15:32:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Gupta X-Patchwork-Id: 14035028 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98CBD20AF7B; Tue, 1 Apr 2025 15:36:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743521769; cv=none; b=Mno8WdZRQTcqC3C3EbzfofIQgpdhEw0+pdlb71we2WgIqt4cY42E6J9+mukLm4GrqvDWLRIyYQMBXIhnb2uWJXTNMgrhfJAW6xCzTMKfwS55IzTNSvpHqkHQ6tUWmMmvzDT6tCrtYs0gz1BUndnaz+lfl6W6W8TR+ysUdM5qh2E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743521769; c=relaxed/simple; bh=3Xc1RoVrx1nYSw+x5KzpjDT1p0v42K+S4ebdKYpd0w0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WM4kdfhdaK4M6eCnpH3sin7av/d1qAeXShhDa+JlJbzLEyTRI/Wm79LmJ3KMkrSs4F+gDPe5x/ahLPK9P9WqSQRl/z1ooRLbFeUH+1MtlRK6fmjDBV7aZi9ZSlZUyE/K9coe6E4pUUoBD16udR+bcixNmbx/fROZgIdkZ5/ihak= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OZkSQhRA; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OZkSQhRA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1743521768; x=1775057768; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3Xc1RoVrx1nYSw+x5KzpjDT1p0v42K+S4ebdKYpd0w0=; b=OZkSQhRAKyaK+YBFYy2ESuKN2vB1pc1YoXOm1L9drVlDc9wqlU3hFv4n 1CjdurgZQW3qw1wNnjbh0O1xRUx/F0gyflliVehBElez43PvhoxbF0qN+ MZvsFsCkhsRA8ve2RdX/zz8UFstSUVdW0lIaWETjONdLa0sUCAL+3uo4W V/hkGOWybqnvom66TBLmdczEWuaC1AGJ+Ktqr2MfXtY980ydySBVRY6yD Xp51XWAz/ciCRtCznMLUiRqGK2a2r9SJpUUWyeeqttledbv8b53I73JZw UXk/X9nAQELtKauv4pSoqa7bn8HnzBaUVy1b6oSzwLMNqwmXEOHFi/ezL g==; X-CSE-ConnectionGUID: 33aCiZbRS3iFoqMWqSxXEw== X-CSE-MsgGUID: cMgbBXtfQzWhjH0N+brNRg== X-IronPort-AV: E=McAfee;i="6700,10204,11391"; a="67324763" X-IronPort-AV: E=Sophos;i="6.14,293,1736841600"; d="scan'208";a="67324763" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2025 08:36:07 -0700 X-CSE-ConnectionGUID: moCALCC5RiOHEYJgni+WVQ== X-CSE-MsgGUID: DuAmBsOQTwiknMu08LfaCw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,293,1736841600"; d="scan'208";a="126410734" Received: from anshuma1-desk.iind.intel.com ([10.190.239.112]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2025 08:36:04 -0700 From: Anshuman Gupta To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, badal.nilawar@intel.com, anshuman.gupta@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH 01/12] PCI/ACPI: Add D3cold Aux Power Limit_DSM method Date: Tue, 1 Apr 2025 21:02:14 +0530 Message-ID: <20250401153225.96379-2-anshuman.gupta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250401153225.96379-1-anshuman.gupta@intel.com> References: <20250401153225.96379-1-anshuman.gupta@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Implement _DSM method 10 and _DSM Method 11 as per PCI firmware specs section 4.6.10 Rev 3.3. Note that this implementation assumes only a single device below the Downstream Port will request for Aux Power Limit under a given Root Port because it does not track and aggregate requests from all child devices below the Downstream Port as required by Section 4.6.10 Rev 3.3. One possible mitigation would be only allowing only first PCIe Non-Bridge Endpoint Function 0 driver to call_DSM method 10. Signed-off-by: Varun Gupta Signed-off-by: Badal Nilawar Signed-off-by: Anshuman Gupta --- drivers/pci/pci-acpi.c | 78 ++++++++++++++++++++++++++++++++++++++++ include/linux/pci-acpi.h | 6 ++++ 2 files changed, 84 insertions(+) diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index af370628e583..ebd49e43457e 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -1421,6 +1421,84 @@ static void pci_acpi_optimize_delay(struct pci_dev *pdev, ACPI_FREE(obj); } +/** + * pci_acpi_request_d3cold_aux_power - Request D3cold aux power via ACPI DSM + * @dev: PCI device instance + * @requested_power: Requested auxiliary power in milliwatts + * + * This function sends a request to the host BIOS via ACPI _DSM Function 10 + * to grant the required D3Cold Auxiliary power for the specified PCI device. + * It evaluates the _DSM (Device Specific Method) to request the Auxiliary + * power and handles the response accordingly. + * + * This function shall be only called by 1st non-bridge Endpoint driver + * on Function 0. For a Multi-Function Device, the driver for Function 0 is + * required to report an aggregate power requirement covering all + * functions contained within the device. + * + * Return: Returns 0 on success and errno on failure. + */ +int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power) +{ + union acpi_object in_obj = { + .integer.type = ACPI_TYPE_INTEGER, + .integer.value = requested_power, + }; + + union acpi_object *out_obj; + acpi_handle handle; + int result, ret = -EINVAL; + + if (!dev || !ACPI_HANDLE(&dev->dev)) + return -EINVAL; + + handle = ACPI_HANDLE(&dev->dev); + + out_obj = acpi_evaluate_dsm_typed(handle, + &pci_acpi_dsm_guid, + 4, + DSM_PCI_D3COLD_AUX_POWER_LIMIT, + &in_obj, + ACPI_TYPE_INTEGER); + if (!out_obj) + return -EINVAL; + + result = out_obj->integer.value; + + switch (result) { + case 0x0: + dev_dbg(&dev->dev, "D3cold Aux Power %umW request denied\n", + requested_power); + break; + case 0x1: + dev_info(&dev->dev, "D3cold Aux Power request granted: %umW\n", + requested_power); + ret = 0; + break; + case 0x2: + dev_info(&dev->dev, "D3cold Aux Power: Main power won't be removed\n"); + ret = -EBUSY; + break; + default: + if (result >= 0x11 && result <= 0x1F) { + int retry_interval = result & 0xF; + + dev_warn(&dev->dev, "D3cold Aux Power request needs retry." + "Interval: %d seconds.\n", retry_interval); + msleep(retry_interval * 1000); + ret = -EAGAIN; + } else { + dev_err(&dev->dev, "D3cold Aux Power: Reserved or " + "unsupported response: 0x%x.\n", result); + } + break; + } + + ACPI_FREE(out_obj); + return ret; +} +EXPORT_SYMBOL(pci_acpi_request_d3cold_aux_power); + static void pci_acpi_set_external_facing(struct pci_dev *dev) { u8 val; diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h index 078225b514d4..dbc4b0ed433c 100644 --- a/include/linux/pci-acpi.h +++ b/include/linux/pci-acpi.h @@ -121,6 +121,7 @@ extern const guid_t pci_acpi_dsm_guid; #define DSM_PCI_DEVICE_NAME 0x07 #define DSM_PCI_POWER_ON_RESET_DELAY 0x08 #define DSM_PCI_DEVICE_READINESS_DURATIONS 0x09 +#define DSM_PCI_D3COLD_AUX_POWER_LIMIT 0x0A #ifdef CONFIG_PCIE_EDR void pci_acpi_add_edr_notifier(struct pci_dev *pdev); @@ -132,10 +133,15 @@ static inline void pci_acpi_remove_edr_notifier(struct pci_dev *pdev) { } int pci_acpi_set_companion_lookup_hook(struct acpi_device *(*func)(struct pci_dev *)); void pci_acpi_clear_companion_lookup_hook(void); +int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power); #else /* CONFIG_ACPI */ static inline void acpi_pci_add_bus(struct pci_bus *bus) { } static inline void acpi_pci_remove_bus(struct pci_bus *bus) { } +int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power) +{ + return -EOPNOTSUPP; +} #endif /* CONFIG_ACPI */ #endif /* _PCI_ACPI_H_ */ From patchwork Tue Apr 1 15:32:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Gupta X-Patchwork-Id: 14035029 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 67BA420AF77; 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a="67324793" X-IronPort-AV: E=Sophos;i="6.14,293,1736841600"; d="scan'208";a="67324793" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2025 08:36:11 -0700 X-CSE-ConnectionGUID: etIrAIWtRnijZgdupovB6g== X-CSE-MsgGUID: jjcCTox1SyWZWOgMsdAKdA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,293,1736841600"; d="scan'208";a="126410769" Received: from anshuma1-desk.iind.intel.com ([10.190.239.112]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2025 08:36:08 -0700 From: Anshuman Gupta To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, badal.nilawar@intel.com, anshuman.gupta@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH 02/12] PCI/ACPI: Add PERST# Assertion Delay _DSM method Date: Tue, 1 Apr 2025 21:02:15 +0530 Message-ID: <20250401153225.96379-3-anshuman.gupta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250401153225.96379-1-anshuman.gupta@intel.com> References: <20250401153225.96379-1-anshuman.gupta@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Implement _DSM Method 11 as per PCI firmware specs section 4.6.11 Rev 3.3. Signed-off-by: Anshuman Gupta --- drivers/pci/pci-acpi.c | 53 ++++++++++++++++++++++++++++++++++++++++ include/linux/pci-acpi.h | 7 ++++++ 2 files changed, 60 insertions(+) diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index ebd49e43457e..04149f037664 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -1499,6 +1499,59 @@ int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power) } EXPORT_SYMBOL(pci_acpi_request_d3cold_aux_power); +/** + * pci_acpi_add_perst_assertion_delay - Request PERST# delay via ACPI DSM + * @dev: PCI device instance + * @delay_us: Requested delay_us + * + * This function sends a request to the host BIOS via ACPI _DSM to grant the + * required PERST# delay for the specified PCI device. It evaluates the _DSM + * to request the PERST# delay and handles the response accordingly. + * + * Return: returns 0 on success and errno on failure. + */ +int pci_acpi_add_perst_assertion_delay(struct pci_dev *dev, u32 delay_us) +{ + union acpi_object in_obj = { + .integer.type = ACPI_TYPE_INTEGER, + .integer.value = delay_us, + }; + + union acpi_object *out_obj; + acpi_handle handle; + int result, ret = -EINVAL; + + if (!dev || !ACPI_HANDLE(&dev->dev)) + return -EINVAL; + + handle = ACPI_HANDLE(&dev->dev); + + out_obj = acpi_evaluate_dsm_typed(handle, &pci_acpi_dsm_guid, 4, + DSM_PCI_PERST_ASSERTION_DELAY, + &in_obj, ACPI_TYPE_INTEGER); + if (!out_obj) + return -EINVAL; + + result = out_obj->integer.value; + + if (result == delay_us) { + dev_info(&dev->dev, "PERST# Assertion Delay set to" + "%u microseconds\n", delay_us); + ret = 0; + } else if (result == 0) { + dev_warn(&dev->dev, "PERST# Assertion Delay request failed," + "no previous valid request\n"); + } else { + dev_warn(&dev->dev, + "PERST# Assertion Delay request failed" + "Previous valid delay: %u microseconds\n", result); + } + + ACPI_FREE(out_obj); + return ret; +} +EXPORT_SYMBOL(pci_acpi_add_perst_assertion_delay); + static void pci_acpi_set_external_facing(struct pci_dev *dev) { u8 val; diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h index dbc4b0ed433c..4b7373f91a9a 100644 --- a/include/linux/pci-acpi.h +++ b/include/linux/pci-acpi.h @@ -122,6 +122,7 @@ extern const guid_t pci_acpi_dsm_guid; #define DSM_PCI_POWER_ON_RESET_DELAY 0x08 #define DSM_PCI_DEVICE_READINESS_DURATIONS 0x09 #define DSM_PCI_D3COLD_AUX_POWER_LIMIT 0x0A +#define DSM_PCI_PERST_ASSERTION_DELAY 0x0B #ifdef CONFIG_PCIE_EDR void pci_acpi_add_edr_notifier(struct pci_dev *pdev); @@ -134,6 +135,7 @@ static inline void pci_acpi_remove_edr_notifier(struct pci_dev *pdev) { } int pci_acpi_set_companion_lookup_hook(struct acpi_device *(*func)(struct pci_dev *)); void pci_acpi_clear_companion_lookup_hook(void); int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power); +int pci_acpi_add_perst_assertion_delay(struct pci_dev *dev, u32 delay_us); #else /* CONFIG_ACPI */ static inline void acpi_pci_add_bus(struct pci_bus *bus) { } @@ -142,6 +144,11 @@ int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power) { return -EOPNOTSUPP; } + +int pci_acpi_add_perst_assertion_delay(struct pci_dev *dev, u32 delay_us) +{ + return -EOPNOTSUPP; +} #endif /* CONFIG_ACPI */ #endif /* _PCI_ACPI_H_ */ From patchwork Tue Apr 1 15:32:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Gupta X-Patchwork-Id: 14035031 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7861E20B7EA; Tue, 1 Apr 2025 15:36:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743521787; 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01 Apr 2025 08:36:16 -0700 X-CSE-ConnectionGUID: RSa7Q1WpQxm3car1WNtayw== X-CSE-MsgGUID: 0JLK/ni1TCyRpmHZEfJr6g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,293,1736841600"; d="scan'208";a="126410797" Received: from anshuma1-desk.iind.intel.com ([10.190.239.112]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2025 08:36:12 -0700 From: Anshuman Gupta To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, badal.nilawar@intel.com, anshuman.gupta@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH 03/12] PCI/ACPI: Add aux power grant notifier Date: Tue, 1 Apr 2025 21:02:16 +0530 Message-ID: <20250401153225.96379-4-anshuman.gupta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250401153225.96379-1-anshuman.gupta@intel.com> References: <20250401153225.96379-1-anshuman.gupta@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Adding a notifier to notify all PCIe child devices about the block main power removal. It is needed because theoretically multiple PCIe Endpoint devices on same Root Port can request for AUX power and _DSM method can return with 80000000h signifies that the hierarchy connected via the slot cannot support main power removal when in D3Cold. This may disrupt functionality of other child device. Let's notify all PCIe devices requested Aux power resource and Let PCIe End Point driver handle it in its callback. Signed-off-by: Anshuman Gupta --- drivers/pci/pci-acpi.c | 34 +++++++++++++++++++++++++++++++--- include/linux/pci-acpi.h | 13 +++++++++++++ 2 files changed, 44 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index 04149f037664..d1ca1649e6e8 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -1421,6 +1421,32 @@ static void pci_acpi_optimize_delay(struct pci_dev *pdev, ACPI_FREE(obj); } +static BLOCKING_NOTIFIER_HEAD(pci_acpi_aux_power_notify_list); + +/** + * pci_acpi_register_aux_power_notifier - Register driver notifier + * @nb: notifier block + * + * This function shall be called by PCIe End Point device requested the Aux + * power resource in order to handle the any scenario gracefully when other + * child PCIe devices Aux power request returns with No main power removal. + * PCIe devices which register this notifier shall handle No main power + * removal scenario accordingly. + * + * Return: Returns 0 on success and errno on failure. + */ +int pci_acpi_register_aux_power_notifier(struct notifier_block *nb) +{ + return blocking_notifier_chain_register(&pci_acpi_aux_power_notify_list, nb); +} +EXPORT_SYMBOL_GPL(pci_acpi_register_aux_power_notifier); + +void pci_acpi_unregister_aux_power_notifier(struct notifier_block *nb) +{ + blocking_notifier_chain_unregister(&pci_acpi_aux_power_notify_list, nb); +} +EXPORT_SYMBOL_GPL(pci_acpi_unregister_aux_power_notifier); + /** * pci_acpi_request_d3cold_aux_power - Request D3cold aux power via ACPI DSM * @dev: PCI device instance @@ -1466,17 +1492,19 @@ int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power) result = out_obj->integer.value; switch (result) { - case 0x0: + case ACPI_AUX_PW_DENIED: dev_dbg(&dev->dev, "D3cold Aux Power %umW request denied\n", requested_power); break; - case 0x1: + case ACPI_AUX_PW_GRANTED: dev_info(&dev->dev, "D3cold Aux Power request granted: %umW\n", requested_power); ret = 0; break; - case 0x2: + case ACPI_NO_MAIN_PW_REMOVAL: dev_info(&dev->dev, "D3cold Aux Power: Main power won't be removed\n"); + blocking_notifier_call_chain(&pci_acpi_aux_power_notify_list, + ACPI_NO_MAIN_PW_REMOVAL, dev); ret = -EBUSY; break; default: diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h index 4b7373f91a9a..793b979af98b 100644 --- a/include/linux/pci-acpi.h +++ b/include/linux/pci-acpi.h @@ -124,6 +124,10 @@ extern const guid_t pci_acpi_dsm_guid; #define DSM_PCI_D3COLD_AUX_POWER_LIMIT 0x0A #define DSM_PCI_PERST_ASSERTION_DELAY 0x0B +#define ACPI_AUX_PW_DENIED 0x0 +#define ACPI_AUX_PW_GRANTED 0x1 +#define ACPI_NO_MAIN_PW_REMOVAL 0x2 + #ifdef CONFIG_PCIE_EDR void pci_acpi_add_edr_notifier(struct pci_dev *pdev); void pci_acpi_remove_edr_notifier(struct pci_dev *pdev); @@ -134,12 +138,21 @@ static inline void pci_acpi_remove_edr_notifier(struct pci_dev *pdev) { } int pci_acpi_set_companion_lookup_hook(struct acpi_device *(*func)(struct pci_dev *)); void pci_acpi_clear_companion_lookup_hook(void); +int pci_acpi_register_aux_power_notifier(struct notifier_block *nb); +void pci_acpi_unregister_aux_power_notifier(struct notifier_block *nb); int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power); int pci_acpi_add_perst_assertion_delay(struct pci_dev *dev, u32 delay_us); #else /* CONFIG_ACPI */ static inline void acpi_pci_add_bus(struct pci_bus *bus) { } static inline void acpi_pci_remove_bus(struct pci_bus *bus) { } +int pci_acpi_register_aux_power_notifier(struct notifier_block *nb) +{ + return -EOPNOTSUPP; +} + +void pci_acpi_unregister_aux_power_notifier(struct notifier_block *nb) { } + int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power) { return -EOPNOTSUPP; From patchwork Tue Apr 1 15:32:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Gupta X-Patchwork-Id: 14035030 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 83B1220B804; Tue, 1 Apr 2025 15:36:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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/** @info.has_usm: Device has unified shared memory support */ u8 has_usm:1; + /** @info.has_vrsr: Has capability to enter into VRAM self refresh */ + u8 has_vrsr:1; /** @info.is_dgfx: is discrete device */ u8 is_dgfx:1; /** diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index 772b6c81672c..70d4827f5821 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -68,6 +68,7 @@ struct xe_device_desc { u8 has_llc:1; u8 has_pxp:1; u8 has_sriov:1; + u8 has_vrsr:1; u8 skip_guc_pc:1; u8 skip_mtcfg:1; u8 skip_pcode:1; @@ -343,6 +344,7 @@ static const struct xe_device_desc bmg_desc = { .dma_mask_size = 46, .has_display = true, .has_fan_control = true, + .has_vrsr = true, .has_heci_cscfi = 1, }; @@ -589,6 +591,7 @@ static int xe_info_init_early(struct xe_device *xe, xe->info.has_llc = desc->has_llc; xe->info.has_pxp = desc->has_pxp; xe->info.has_sriov = desc->has_sriov; + xe->info.has_vrsr = desc->has_vrsr; xe->info.skip_guc_pc = desc->skip_guc_pc; xe->info.skip_mtcfg = desc->skip_mtcfg; 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01 Apr 2025 08:36:19 -0700 From: Anshuman Gupta To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, badal.nilawar@intel.com, anshuman.gupta@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH 05/12] drm/xe/vrsr: Detect VRSR Capability Date: Tue, 1 Apr 2025 21:02:18 +0530 Message-ID: <20250401153225.96379-6-anshuman.gupta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250401153225.96379-1-anshuman.gupta@intel.com> References: <20250401153225.96379-1-anshuman.gupta@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Detect VRAM Self Refresh(vrsr) Capability. Reviewed-by: Rodrigo Vivi Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/xe/regs/xe_regs.h | 3 +++ drivers/gpu/drm/xe/xe_device_types.h | 4 ++++ drivers/gpu/drm/xe/xe_pm.c | 27 +++++++++++++++++++++++++++ 3 files changed, 34 insertions(+) diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h index 3abb17d2ca33..4db486fb310a 100644 --- a/drivers/gpu/drm/xe/regs/xe_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_regs.h @@ -53,6 +53,9 @@ #define MTL_MPE_FREQUENCY XE_REG(0x13802c) #define MTL_RPE_MASK REG_GENMASK(8, 0) +#define VRAM_SR_CAPABILITY XE_REG(0x138144) +#define VRAM_SR_SUPPORTED REG_BIT(0) + #define VF_CAP_REG XE_REG(0x1901f8, XE_REG_OPTION_VF) #define VF_CAP REG_BIT(0) diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index b8ccf729f7c0..219800092b8d 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -498,6 +498,9 @@ struct xe_device { /** @d3cold.allowed: Indicates if d3cold is a valid device state */ bool allowed; + /** @d3cold.vrsr_capable: Indicates if d3cold VRAM Self Refresh is supported */ + bool vrsr_capable; + /** * @d3cold.vram_threshold: * @@ -508,6 +511,7 @@ struct xe_device { * Default threshold value is 300mb. */ u32 vram_threshold; + /** @d3cold.lock: protect vram_threshold */ struct mutex lock; } d3cold; diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index a7ddf45db886..c96be409de49 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -17,12 +17,15 @@ #include "xe_bo_evict.h" #include "xe_device.h" #include "xe_device_sysfs.h" +#include "xe_force_wake.h" #include "xe_ggtt.h" #include "xe_gt.h" #include "xe_guc.h" #include "xe_irq.h" +#include "xe_mmio.h" #include "xe_pcode.h" #include "xe_pxp.h" +#include "regs/xe_regs.h" #include "xe_trace.h" #include "xe_wa.h" @@ -236,6 +239,28 @@ static bool xe_pm_pci_d3cold_capable(struct xe_device *xe) return true; } +static bool xe_pm_vrsr_capable(struct xe_device *xe) +{ + struct xe_mmio *mmio = xe_root_tile_mmio(xe); + unsigned int fw_ref; + struct xe_gt *gt; + u32 val; + + gt = xe_root_mmio_gt(xe); + + if (!xe->info.probe_display) + return false; + + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL); + if (!fw_ref) + return false; + + val = xe_mmio_read32(mmio, VRAM_SR_CAPABILITY); + xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL); + + return val & VRAM_SR_SUPPORTED; +} + static void xe_pm_runtime_init(struct xe_device *xe) { struct device *dev = xe->drm.dev; @@ -310,6 +335,8 @@ int xe_pm_init(struct xe_device *xe) err = xe_pm_set_vram_threshold(xe, vram_threshold); if (err) return err; + + xe->d3cold.vrsr_capable = xe_pm_vrsr_capable(xe); } xe_pm_runtime_init(xe); From patchwork Tue Apr 1 15:32:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Gupta X-Patchwork-Id: 14035033 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D9DC1E6DC5; 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a="67324895" X-IronPort-AV: E=Sophos;i="6.14,293,1736841600"; d="scan'208";a="67324895" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2025 08:36:27 -0700 X-CSE-ConnectionGUID: qfTGjufFT5+w3VlqQHGFeA== X-CSE-MsgGUID: ds/5bU3WSIuanKJQEHZQfw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,293,1736841600"; d="scan'208";a="126410922" Received: from anshuma1-desk.iind.intel.com ([10.190.239.112]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2025 08:36:23 -0700 From: Anshuman Gupta To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, badal.nilawar@intel.com, anshuman.gupta@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH 06/12] drm/xe/vrsr: Initialize VRSR feature Date: Tue, 1 Apr 2025 21:02:19 +0530 Message-ID: <20250401153225.96379-7-anshuman.gupta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250401153225.96379-1-anshuman.gupta@intel.com> References: <20250401153225.96379-1-anshuman.gupta@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Badal Nilawar Initialize VRSR feature by requesting Auxilary Power and PERST# assertion delay. Include an API to enable VRSR feature. Signed-off-by: Badal Nilawar Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/xe/xe_device_types.h | 1 + drivers/gpu/drm/xe/xe_pcode_api.h | 8 +++ drivers/gpu/drm/xe/xe_pm.c | 92 +++++++++++++++++++++++++++- drivers/gpu/drm/xe/xe_pm.h | 1 + 4 files changed, 101 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index 219800092b8d..fd9dea207580 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -7,6 +7,7 @@ #define _XE_DEVICE_TYPES_H_ #include +#include #include #include diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h index e622ae17f08d..cffdf52495f9 100644 --- a/drivers/gpu/drm/xe/xe_pcode_api.h +++ b/drivers/gpu/drm/xe/xe_pcode_api.h @@ -42,6 +42,14 @@ #define POWER_SETUP_I1_SHIFT 6 /* 10.6 fixed point format */ #define POWER_SETUP_I1_DATA_MASK REG_GENMASK(15, 0) +#define PCODE_D3_VRAM_SELF_REFRESH 0x71 +#define PCODE_D3_VRSR_SC_DISABLE 0x0 +#define PCODE_D3_VRSR_SC_ENABLE 0x1 +#define PCODE_D3_VRSR_SC_AUX_PL_AND_PERST_DELAY 0x2 +#define PCODE_D3_VRSR_PERST_SHIFT 16 +#define POWER_D3_VRSR_PSERST_MASK REG_GENMASK(31, 16) +#define POWER_D3_VRSR_AUX_PL_MASK REG_GENMASK(15, 0) + #define PCODE_FREQUENCY_CONFIG 0x6e /* Frequency Config Sub Commands (param1) */ #define PCODE_MBOX_FC_SC_READ_FUSED_P0 0x0 diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index c96be409de49..abb5099475cb 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -23,6 +23,7 @@ #include "xe_guc.h" #include "xe_irq.h" #include "xe_mmio.h" +#include "xe_pcode_api.h" #include "xe_pcode.h" #include "xe_pxp.h" #include "regs/xe_regs.h" @@ -261,6 +262,95 @@ static bool xe_pm_vrsr_capable(struct xe_device *xe) return val & VRAM_SR_SUPPORTED; } +static int pci_acpi_aux_power_setup(struct xe_device *xe) +{ + struct xe_tile *root_tile = xe_device_get_root_tile(xe); + struct pci_dev *pdev = to_pci_dev(xe->drm.dev); + struct pci_dev *root_pdev; + int ret; + u32 uval; + u32 aux_pwr_limit; + u32 perst_delay; + + root_pdev = pcie_find_root_port(pdev); + if (!root_pdev) + return -EINVAL; + + ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_D3_VRAM_SELF_REFRESH, + PCODE_D3_VRSR_SC_AUX_PL_AND_PERST_DELAY, 0), + &uval, NULL); + + if (ret) + return ret; + + aux_pwr_limit = REG_FIELD_GET(POWER_D3_VRSR_AUX_PL_MASK, uval); + perst_delay = REG_FIELD_GET(POWER_D3_VRSR_PSERST_MASK, uval); + + drm_dbg(&xe->drm, "AUX power limit =%d\n", aux_pwr_limit); + drm_dbg(&xe->drm, "PERST Assertion delay =%d\n", perst_delay); + + ret = pci_acpi_request_d3cold_aux_power(root_pdev, aux_pwr_limit); + if (ret) + return ret; + + ret = pci_acpi_add_perst_assertion_delay(root_pdev, perst_delay); + + return ret; +} + +static void xe_pm_vrsr_init(struct xe_device *xe) +{ + int ret; + + /* Check if platform support d3cold vrsr */ + if (!xe->info.has_vrsr) + return; + + if (!xe_pm_vrsr_capable(xe)) + return; + + /* + * If the VRSR initialization fails, the device will proceed with the regular + * D3 Cold flow + */ + ret = pci_acpi_aux_power_setup(xe); + if (ret) { + drm_info(&xe->drm, "VRSR capable %s\n", "No"); + return; + } + + xe->d3cold.vrsr_capable = true; + drm_info(&xe->drm, "VRSR capable %s\n", "Yes"); +} + +/** + * xe_pm_vrsr_enable - Enable VRAM self refresh + * @xe: The xe device. + * @enable: true: Enable, false: Disable + * + * This function enables the VRSR feature in D3Cold path. + * + * Return: It returns 0 on success and errno on failure. + */ +int xe_pm_vrsr_enable(struct xe_device *xe, bool enable) +{ + struct xe_tile *root_tile = xe_device_get_root_tile(xe); + int ret; + u32 uval = 0; + + if (!xe->d3cold.vrsr_capable) + return -ENXIO; + + if (enable) + ret = xe_pcode_write(root_tile, PCODE_MBOX(PCODE_D3_VRAM_SELF_REFRESH, + PCODE_D3_VRSR_SC_ENABLE, 0), uval); + else + ret = xe_pcode_write(root_tile, PCODE_MBOX(PCODE_D3_VRAM_SELF_REFRESH, + PCODE_D3_VRSR_SC_DISABLE, 0), uval); + + return ret; +} + static void xe_pm_runtime_init(struct xe_device *xe) { struct device *dev = xe->drm.dev; @@ -336,7 +426,7 @@ int xe_pm_init(struct xe_device *xe) if (err) return err; - xe->d3cold.vrsr_capable = xe_pm_vrsr_capable(xe); + xe_pm_vrsr_init(xe); } xe_pm_runtime_init(xe); diff --git a/drivers/gpu/drm/xe/xe_pm.h b/drivers/gpu/drm/xe/xe_pm.h index 998d1ed64556..2b5df31db4c4 100644 --- a/drivers/gpu/drm/xe/xe_pm.h +++ b/drivers/gpu/drm/xe/xe_pm.h @@ -35,4 +35,5 @@ bool xe_rpm_reclaim_safe(const struct xe_device *xe); struct task_struct *xe_pm_read_callback_task(struct xe_device *xe); int xe_pm_module_init(void); +int xe_pm_vrsr_enable(struct xe_device *xe, bool enable); #endif From patchwork Tue Apr 1 15:32:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Gupta X-Patchwork-Id: 14035034 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A760E20AF92; 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a="67324926" X-IronPort-AV: E=Sophos;i="6.14,293,1736841600"; d="scan'208";a="67324926" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2025 08:36:31 -0700 X-CSE-ConnectionGUID: y1SxeoRtSbWcHn7jYDYxVw== X-CSE-MsgGUID: 7EuT3IHJRtSuUJ4MwScQmg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,293,1736841600"; d="scan'208";a="126410946" Received: from anshuma1-desk.iind.intel.com ([10.190.239.112]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2025 08:36:27 -0700 From: Anshuman Gupta To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, badal.nilawar@intel.com, anshuman.gupta@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH 07/12] drm/xe/vrsr: Enable VRSR on default VGA boot device Date: Tue, 1 Apr 2025 21:02:20 +0530 Message-ID: <20250401153225.96379-8-anshuman.gupta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250401153225.96379-1-anshuman.gupta@intel.com> References: <20250401153225.96379-1-anshuman.gupta@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Badal Nilawar The VRSR feature is to enhance the display screen refresh experience when the device exits from the D3Cold state. Therefore, apply the VRSR feature to the default VGA boot device and when a display is connected. Signed-off-by: Badal Nilawar Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/xe/display/xe_display.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/xe/display/xe_display.h | 2 ++ drivers/gpu/drm/xe/xe_pm.c | 5 +++++ 3 files changed, 29 insertions(+) diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c index 23937ed3b33d..a7a50f48f1c5 100644 --- a/drivers/gpu/drm/xe/display/xe_display.c +++ b/drivers/gpu/drm/xe/display/xe_display.c @@ -88,6 +88,28 @@ static void display_destroy(struct drm_device *dev, void *dummy) destroy_workqueue(xe->display.hotplug.dp_wq); } +bool xe_display_connected(struct xe_device *xe) +{ + struct drm_connector *list_connector; + struct drm_connector_list_iter iter; + bool ret = false; + + mutex_lock(&xe->drm.mode_config.mutex); + drm_connector_list_iter_begin(&xe->drm, &iter); + + drm_for_each_connector_iter(list_connector, &iter) { + if (list_connector->status == connector_status_connected) { + ret = true; + break; + } + } + + drm_connector_list_iter_end(&iter); + mutex_unlock(&xe->drm.mode_config.mutex); + + return ret; +} + /** * xe_display_create - create display struct * @xe: XE device instance diff --git a/drivers/gpu/drm/xe/display/xe_display.h b/drivers/gpu/drm/xe/display/xe_display.h index 46e14f8dee28..a432790d6d34 100644 --- a/drivers/gpu/drm/xe/display/xe_display.h +++ b/drivers/gpu/drm/xe/display/xe_display.h @@ -39,6 +39,7 @@ void xe_display_pm_resume(struct xe_device *xe); void xe_display_pm_runtime_suspend(struct xe_device *xe); void xe_display_pm_runtime_suspend_late(struct xe_device *xe); void xe_display_pm_runtime_resume(struct xe_device *xe); +bool xe_display_connected(struct xe_device *xe); #else @@ -71,5 +72,6 @@ static inline void xe_display_pm_runtime_suspend(struct xe_device *xe) {} static inline void xe_display_pm_runtime_suspend_late(struct xe_device *xe) {} static inline void xe_display_pm_runtime_resume(struct xe_device *xe) {} +static inline bool xe_display_connected(struct xe_device *xe) {} #endif /* CONFIG_DRM_XE_DISPLAY */ #endif /* _XE_DISPLAY_H_ */ diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index abb5099475cb..364b937e0ded 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include @@ -300,6 +301,7 @@ static int pci_acpi_aux_power_setup(struct xe_device *xe) static void xe_pm_vrsr_init(struct xe_device *xe) { + struct pci_dev *pdev = to_pci_dev(xe->drm.dev); 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This will ensure that BMG GPU does not explode if any other PCIe child device (under same Root Port) aux power request returns with No main power removal. Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/xe/xe_device_types.h | 3 ++ drivers/gpu/drm/xe/xe_pm.c | 41 ++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index fd9dea207580..9aacd5af7d0f 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -517,6 +517,9 @@ struct xe_device { struct mutex lock; } d3cold; + /** @nb: PCI ACPI Aux power notifier */ + struct notifier_block nb; + /** @pmt: Support the PMT driver callback interface */ struct { /** @pmt.lock: protect access for telemetry data */ diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index 364b937e0ded..ea93923d6671 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -87,6 +87,41 @@ static struct lockdep_map xe_pm_runtime_nod3cold_map = { }; #endif +static int aux_pwr_notifier(struct notifier_block *nb, + unsigned long val, void *data) +{ + struct pci_dev *root_pdev = data; + struct pci_dev *pdev; + struct xe_device *xe; + + xe = container_of(nb, struct xe_device, nb); + + pdev = pcie_find_root_port(to_pci_dev(xe->drm.dev)); + if (!pdev) + return -EINVAL; + + if (root_pdev != pdev) + return 0; + + xe_pm_runtime_get(xe); + + if (val == ACPI_NO_MAIN_PW_REMOVAL) { + drm_err(&xe->drm, "PCIe core blocked the removal of Main Supply\n"); + xe->d3cold.vrsr_capable = false; + } + + xe_pm_runtime_put(xe); + + return 0; +} + +static void xe_pm_vrsr_fini(void *arg) +{ + struct xe_device *xe = arg; + + pci_acpi_unregister_aux_power_notifier(&xe->nb); +} + /** * xe_rpm_reclaim_safe() - Whether runtime resume can be done from reclaim context * @xe: The xe device. @@ -295,6 +330,12 @@ static int pci_acpi_aux_power_setup(struct xe_device *xe) return ret; ret = pci_acpi_add_perst_assertion_delay(root_pdev, perst_delay); + if (ret) + return ret; + + xe->nb.notifier_call = aux_pwr_notifier; + pci_acpi_register_aux_power_notifier(&xe->nb); + devm_add_action_or_reset(xe->drm.dev, xe_pm_vrsr_fini, xe); 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01 Apr 2025 08:36:35 -0700 From: Anshuman Gupta To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, badal.nilawar@intel.com, anshuman.gupta@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH 09/12] drm/xe/vrsr: Refactor d3cold.allowed to a enum Date: Tue, 1 Apr 2025 21:02:22 +0530 Message-ID: <20250401153225.96379-10-anshuman.gupta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250401153225.96379-1-anshuman.gupta@intel.com> References: <20250401153225.96379-1-anshuman.gupta@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add xe_d3_state enum to add support for VRAM Self Refresh d3cold state. Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/xe/display/xe_display.c | 6 +++--- drivers/gpu/drm/xe/xe_device_types.h | 5 +++-- drivers/gpu/drm/xe/xe_pci.c | 6 +++--- drivers/gpu/drm/xe/xe_pm.c | 16 ++++++++-------- drivers/gpu/drm/xe/xe_pm.h | 8 +++++++- 5 files changed, 24 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c index a7a50f48f1c5..7877c2d61618 100644 --- a/drivers/gpu/drm/xe/display/xe_display.c +++ b/drivers/gpu/drm/xe/display/xe_display.c @@ -433,7 +433,7 @@ void xe_display_pm_runtime_suspend(struct xe_device *xe) if (!xe->info.probe_display) return; - if (xe->d3cold.allowed) { + if (xe->d3cold.target_state) { xe_display_enable_d3cold(xe); return; } @@ -459,7 +459,7 @@ void xe_display_pm_runtime_suspend_late(struct xe_device *xe) if (!xe->info.probe_display) return; - if (xe->d3cold.allowed) + if (xe->d3cold.target_state) xe_display_pm_suspend_late(xe); /* @@ -537,7 +537,7 @@ void xe_display_pm_runtime_resume(struct xe_device *xe) if (!xe->info.probe_display) return; - if (xe->d3cold.allowed) { + if (xe->d3cold.target_state) { xe_display_disable_d3cold(xe); return; } diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index 9aacd5af7d0f..9d97f2c84c33 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -20,6 +20,7 @@ #include "xe_memirq_types.h" #include "xe_oa_types.h" #include "xe_platform_types.h" +#include "xe_pm.h" #include "xe_pmu_types.h" #include "xe_pt_types.h" #include "xe_sriov_types.h" @@ -496,8 +497,8 @@ struct xe_device { /** @d3cold.capable: Indicates if root port is d3cold capable */ bool capable; - /** @d3cold.allowed: Indicates if d3cold is a valid device state */ - bool allowed; + /** @d3cold.target_state: Indicates d3cold target state */ + enum xe_d3_state target_state; /** @d3cold.vrsr_capable: Indicates if d3cold VRAM Self Refresh is supported */ bool vrsr_capable; diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index 70d4827f5821..fa2d43395129 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -976,7 +976,7 @@ static int xe_pci_runtime_suspend(struct device *dev) pci_save_state(pdev); - if (xe->d3cold.allowed) { + if (xe->d3cold.target_state) { d3cold_toggle(pdev, D3COLD_ENABLE); pci_disable_device(pdev); pci_ignore_hotplug(pdev); @@ -1001,7 +1001,7 @@ static int xe_pci_runtime_resume(struct device *dev) pci_restore_state(pdev); - if (xe->d3cold.allowed) { + if (xe->d3cold.target_state) { err = pci_enable_device(pdev); if (err) return err; @@ -1017,7 +1017,7 @@ static int xe_pci_runtime_idle(struct device *dev) struct pci_dev *pdev = to_pci_dev(dev); struct xe_device *xe = pdev_to_xe_device(pdev); - xe_pm_d3cold_allowed_toggle(xe); + xe_pm_d3cold_target_state_toggle(xe); return 0; } diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index ea93923d6671..d4149a2eace7 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -585,7 +585,7 @@ int xe_pm_runtime_suspend(struct xe_device *xe) xe_display_pm_runtime_suspend(xe); - if (xe->d3cold.allowed) { + if (xe->d3cold.target_state) { err = xe_bo_evict_all(xe); if (err) goto out_resume; @@ -632,7 +632,7 @@ int xe_pm_runtime_resume(struct xe_device *xe) xe_rpm_lockmap_acquire(xe); - if (xe->d3cold.allowed) { + if (xe->d3cold.target_state) { err = xe_pcode_ready(xe, true); if (err) goto out; @@ -655,7 +655,7 @@ int xe_pm_runtime_resume(struct xe_device *xe) xe_display_pm_runtime_resume(xe); - if (xe->d3cold.allowed) { + if (xe->d3cold.target_state) { err = xe_bo_restore_user(xe); if (err) goto out; @@ -897,13 +897,13 @@ int xe_pm_set_vram_threshold(struct xe_device *xe, u32 threshold) } /** - * xe_pm_d3cold_allowed_toggle - Check conditions to toggle d3cold.allowed + * xe_pm_d3cold_target_state_toggle - Check conditions to toggle target_state * @xe: xe device instance * * To be called during runtime_pm idle callback. * Check for all the D3Cold conditions ahead of runtime suspend. */ -void xe_pm_d3cold_allowed_toggle(struct xe_device *xe) +void xe_pm_d3cold_target_state_toggle(struct xe_device *xe) { struct ttm_resource_manager *man; u32 total_vram_used_mb = 0; @@ -911,7 +911,7 @@ void xe_pm_d3cold_allowed_toggle(struct xe_device *xe) int i; if (!xe->d3cold.capable) { - xe->d3cold.allowed = false; + xe->d3cold.target_state = XE_D3HOT; return; } @@ -926,9 +926,9 @@ void xe_pm_d3cold_allowed_toggle(struct xe_device *xe) mutex_lock(&xe->d3cold.lock); if (total_vram_used_mb < xe->d3cold.vram_threshold) - xe->d3cold.allowed = true; + xe->d3cold.target_state = XE_D3COLD_OFF; else - xe->d3cold.allowed = false; + xe->d3cold.target_state = XE_D3HOT; mutex_unlock(&xe->d3cold.lock); } diff --git a/drivers/gpu/drm/xe/xe_pm.h b/drivers/gpu/drm/xe/xe_pm.h index 2b5df31db4c4..803c82f50d77 100644 --- a/drivers/gpu/drm/xe/xe_pm.h +++ b/drivers/gpu/drm/xe/xe_pm.h @@ -12,6 +12,12 @@ struct xe_device; +enum xe_d3_state { + XE_D3HOT = 0, + XE_D3COLD_VRSR, + XE_D3COLD_OFF, +}; + int xe_pm_suspend(struct xe_device *xe); int xe_pm_resume(struct xe_device *xe); @@ -30,7 +36,7 @@ void xe_pm_runtime_get_noresume(struct xe_device *xe); bool xe_pm_runtime_resume_and_get(struct xe_device *xe); void xe_pm_assert_unbounded_bridge(struct xe_device *xe); int xe_pm_set_vram_threshold(struct xe_device *xe, u32 threshold); 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If vram usage is greater than vram_d3cold_threshold and GPU is VRSR capable target D3Cold state is D3Cold-VRSR otherwise target state is D3Cold-Off. Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/xe/xe_pm.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index d4149a2eace7..5db9313ae269 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -148,6 +148,14 @@ static void xe_rpm_lockmap_release(const struct xe_device *xe) &xe_pm_runtime_d3cold_map); } +static void xe_pm_suspend_prepare(struct xe_device *xe) +{ + if (pm_suspend_target_state == PM_SUSPEND_TO_IDLE) + xe_pm_d3cold_allowed_toggle(xe); + else + xe->d3cold.target_state = XE_D3COLD_OFF; +} + /** * xe_pm_suspend - Helper for System suspend, i.e. S0->S3 / S0->S2idle * @xe: xe device instance @@ -163,6 +171,8 @@ int xe_pm_suspend(struct xe_device *xe) drm_dbg(&xe->drm, "Suspending device\n"); trace_xe_pm_suspend(xe, __builtin_return_address(0)); + xe_pm_suspend_prepare(xe); + err = xe_pxp_pm_suspend(xe->pxp); if (err) goto err; @@ -927,10 +937,14 @@ void xe_pm_d3cold_target_state_toggle(struct xe_device *xe) if (total_vram_used_mb < xe->d3cold.vram_threshold) xe->d3cold.target_state = XE_D3COLD_OFF; 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d="scan'208";a="126410995" Received: from anshuma1-desk.iind.intel.com ([10.190.239.112]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2025 08:36:43 -0700 From: Anshuman Gupta To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, badal.nilawar@intel.com, anshuman.gupta@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH 11/12] drm/xe/vrsr: Enable VRSR Date: Tue, 1 Apr 2025 21:02:24 +0530 Message-ID: <20250401153225.96379-12-anshuman.gupta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250401153225.96379-1-anshuman.gupta@intel.com> References: <20250401153225.96379-1-anshuman.gupta@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enabling VRSR in runtime suspend and also in System wide suspend. Also fix couple of typo in xe_pm.c. Signed-off-by: Anshuman Gupta Signed-off-by: Badal Nilawar --- drivers/gpu/drm/xe/xe_pci.c | 4 +-- drivers/gpu/drm/xe/xe_pm.c | 51 +++++++++++++++++++++++++++---------- 2 files changed, 39 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index fa2d43395129..3317d475be79 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -925,7 +925,7 @@ static int xe_pci_suspend(struct device *dev) /* * Enabling D3Cold is needed for S2Idle/S0ix. - * It is save to allow here since xe_pm_suspend has evicted + * It is safe to allow here since xe_pm_suspend has evicted * the local memory and the direct complete optimization is disabled. */ d3cold_toggle(pdev, D3COLD_ENABLE); @@ -942,7 +942,7 @@ static int xe_pci_resume(struct device *dev) struct pci_dev *pdev = to_pci_dev(dev); int err; - /* Give back the D3Cold decision to the runtime P M*/ + /* Give back the D3Cold decision to the runtime PM */ d3cold_toggle(pdev, D3COLD_DISABLE); err = pci_set_power_state(pdev, PCI_D0); diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index 5db9313ae269..41b59c8b31b3 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -151,7 +151,7 @@ static void xe_rpm_lockmap_release(const struct xe_device *xe) static void xe_pm_suspend_prepare(struct xe_device *xe) { if (pm_suspend_target_state == PM_SUSPEND_TO_IDLE) - xe_pm_d3cold_allowed_toggle(xe); + xe_pm_d3cold_target_state_toggle(xe); else xe->d3cold.target_state = XE_D3COLD_OFF; } @@ -182,10 +182,12 @@ int xe_pm_suspend(struct xe_device *xe) xe_display_pm_suspend(xe); - /* FIXME: Super racey... */ - err = xe_bo_evict_all(xe); - if (err) - goto err_pxp; + if (xe->d3cold.target_state == XE_D3COLD_OFF) { + /* FIXME: Super racey... */ + err = xe_bo_evict_all(xe); + if (err) + goto err_pxp; + } for_each_gt(gt, xe, id) { err = xe_gt_suspend(gt); @@ -197,6 +199,12 @@ int xe_pm_suspend(struct xe_device *xe) xe_display_pm_suspend_late(xe); + if (xe->d3cold.target_state == XE_D3COLD_VRSR) { + err = xe_pm_vrsr_enable(xe, true); + if (err) + goto err_display; + } + drm_dbg(&xe->drm, "Device suspended\n"); return 0; @@ -238,9 +246,11 @@ int xe_pm_resume(struct xe_device *xe) * This only restores pinned memory which is the memory required for the * GT(s) to resume. */ - err = xe_bo_restore_kernel(xe); - if (err) - goto err; + if (xe->d3cold.target_state == XE_D3COLD_OFF) { + err = xe_bo_restore_kernel(xe); + if (err) + goto err; + } xe_irq_resume(xe); @@ -249,9 +259,11 @@ int xe_pm_resume(struct xe_device *xe) xe_display_pm_resume(xe); - err = xe_bo_restore_user(xe); - if (err) - goto err; + if (xe->d3cold.target_state == XE_D3COLD_OFF) { + err = xe_bo_restore_user(xe); + if (err) + goto err; + } xe_pxp_pm_resume(xe->pxp); @@ -595,7 +607,7 @@ int xe_pm_runtime_suspend(struct xe_device *xe) xe_display_pm_runtime_suspend(xe); - if (xe->d3cold.target_state) { + if (xe->d3cold.target_state == XE_D3COLD_OFF) { err = xe_bo_evict_all(xe); if (err) goto out_resume; @@ -611,6 +623,14 @@ int xe_pm_runtime_suspend(struct xe_device *xe) xe_display_pm_runtime_suspend_late(xe); + if (xe->d3cold.target_state == XE_D3COLD_VRSR) { + err = xe_pm_vrsr_enable(xe, true); + if (err) { + drm_err(&xe->drm, "Failed to enable VRSR: %d\n", err); + goto out_resume; + } + } + xe_rpm_lockmap_release(xe); xe_pm_write_callback_task(xe, NULL); return 0; @@ -642,7 +662,7 @@ int xe_pm_runtime_resume(struct xe_device *xe) xe_rpm_lockmap_acquire(xe); - if (xe->d3cold.target_state) { + if (xe->d3cold.target_state == XE_D3COLD_OFF) { err = xe_pcode_ready(xe, true); if (err) goto out; @@ -658,6 +678,9 @@ int xe_pm_runtime_resume(struct xe_device *xe) goto out; } + if (xe->d3cold.target_state == XE_D3COLD_VRSR) + xe_display_pm_resume_early(xe); + xe_irq_resume(xe); for_each_gt(gt, xe, id) @@ -665,7 +688,7 @@ int xe_pm_runtime_resume(struct xe_device *xe) xe_display_pm_runtime_resume(xe); - if (xe->d3cold.target_state) { + if (xe->d3cold.target_state == XE_D3COLD_OFF) { err = xe_bo_restore_user(xe); if (err) goto out; From patchwork Tue Apr 1 15:32:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Gupta X-Patchwork-Id: 14035039 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E63841EE019; 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a="67324999" X-IronPort-AV: E=Sophos;i="6.14,293,1736841600"; d="scan'208";a="67324999" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2025 08:36:50 -0700 X-CSE-ConnectionGUID: K+jpO5U1RgmjmUwqZV+vhg== X-CSE-MsgGUID: SBoJ7e8zQ1OlP/+wBFG1Bg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,293,1736841600"; d="scan'208";a="126411018" Received: from anshuma1-desk.iind.intel.com ([10.190.239.112]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2025 08:36:46 -0700 From: Anshuman Gupta To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, badal.nilawar@intel.com, anshuman.gupta@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH 12/12] drm/xe/vrsr: Introduce a debugfs node named vrsr_capable Date: Tue, 1 Apr 2025 21:02:25 +0530 Message-ID: <20250401153225.96379-13-anshuman.gupta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250401153225.96379-1-anshuman.gupta@intel.com> References: <20250401153225.96379-1-anshuman.gupta@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Badal Nilawar Add a debugfs node named vrsr_capable to check if the device supports VRSR Signed-off-by: Badal Nilawar --- drivers/gpu/drm/xe/xe_debugfs.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c index d0503959a8ed..9f8d635c750c 100644 --- a/drivers/gpu/drm/xe/xe_debugfs.c +++ b/drivers/gpu/drm/xe/xe_debugfs.c @@ -191,6 +191,23 @@ static const struct file_operations wedged_mode_fops = { .write = wedged_mode_set, }; +static ssize_t vrsr_capable_show(struct file *f, char __user *ubuf, + size_t size, loff_t *pos) +{ + struct xe_device *xe = file_inode(f)->i_private; + char buf[32]; + int len = 0; + + len = scnprintf(buf, sizeof(buf), "%s\n", xe->d3cold.vrsr_capable ? "true" : "false"); + + return simple_read_from_buffer(ubuf, size, pos, buf, len); +} + +static const struct file_operations vrsr_capable_fops = { + .owner = THIS_MODULE, + .read = vrsr_capable_show, +}; + void xe_debugfs_register(struct xe_device *xe) { struct ttm_device *bdev = &xe->ttm; @@ -211,6 +228,9 @@ void xe_debugfs_register(struct xe_device *xe) debugfs_create_file("wedged_mode", 0600, root, xe, &wedged_mode_fops); + debugfs_create_file("vrsr_capable", 0400, root, xe, + &vrsr_capable_fops); + for (mem_type = XE_PL_VRAM0; mem_type <= XE_PL_VRAM1; ++mem_type) { man = ttm_manager_type(bdev, mem_type);