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Tue, 01 Apr 2025 23:08:09 -0700 (PDT) Received: from mva-rohm ([2a10:a5c0:800d:dd00:8fdf:935a:2c85:d703]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-30dd2b4c82dsm19825911fa.72.2025.04.01.23.08.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 23:08:08 -0700 (PDT) Date: Wed, 2 Apr 2025 09:08:04 +0300 From: Matti Vaittinen To: Matti Vaittinen , Matti Vaittinen Cc: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , Nuno Sa , David Lechner , Javier Carrasco , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/7] dt-bindings: ROHM BD79104 ADC Message-ID: <7660772204c9f738bec680b2dda4e88173026214.1743573284.git.mazziesaccount@gmail.com> References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: The ROHM BD79104 is a 12-bit, 8-channel ADC with two power supply pins, connected to SPI. It's worth noting the IC requires SPI MODE 3, (CPHA = 1, CPOL = 1). I used an evaluation board "BD79104FV-EVK-001" from ROHM. With this board I had problems to have things working correctly with higher SPI clock frequencies. I didn't do thorough testing for maximum frequency though. First attempt was 40M, then 20M and finally 4M. With 20M it seemed as if the read values were shifted by 1 bit. With 4M it worked fine. The component data-sheet is not exact what comes to the maximum SPI frequency. It says SPI frequency is 20M - "unless othervice specified". Additionally, it says that maximum sampling rate is 1Mhz, and since reading a sample requires writing the channel (16 bits) and reading data (16 bits) - we get some upper limit from this. From the "frequency is 20M, unless othervice specified" I picked the maximum frequency 20M - and did assumption that my problems with 20M weren't related to the BD79104 - but to the evaluation board "BD79104FV-EVK-001". Add bindings for the ROHM BD79104 ADC. Signed-off-by: Matti Vaittinen Reviewed-by: Conor Dooley --- Revision history: v1 => - No changes --- .../bindings/iio/adc/rohm,bd79104.yaml | 69 +++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml diff --git a/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml b/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml new file mode 100644 index 000000000000..2a8ad4fdfc6b --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/rohm,bd79104.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM Semiconductor BD79104 ADC + +maintainers: + - Matti Vaittinen + +description: | + 12 bit SPI ADC with 8 channels. + +properties: + compatible: + const: rohm,bd79104 + + reg: + maxItems: 1 + + vdd-supply: true + iovdd-supply: true + +# The component data-sheet says the frequency is 20M. I, however, found +# that the ROHM evaluation board BD79104FV-EVK-001 had problems with 20M. +# I have successfully used it with 4M. My _assumption_ is that this is not +# the limitation of the component itself, but a limitation of the EVK. + spi-max-frequency: + maximum: 20000000 + + "#io-channel-cells": + const: 1 + + spi-cpha: true + spi-cpol: true + +required: + - compatible + - reg + - vdd-supply + - iovdd-supply + - spi-cpha + - spi-cpol + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "rohm,bd79104"; + reg = <0>; + vdd-supply = <&vdd_supply>; + iovdd-supply = <&iovdd_supply>; + spi-max-frequency = <4000000>; + spi-cpha; + spi-cpol; + #io-channel-cells = <1>; + }; + }; +... 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Tue, 01 Apr 2025 23:09:11 -0700 (PDT) Received: from mva-rohm ([2a10:a5c0:800d:dd00:8fdf:935a:2c85:d703]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54b095919f6sm1538533e87.208.2025.04.01.23.09.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 23:09:10 -0700 (PDT) Date: Wed, 2 Apr 2025 09:09:07 +0300 From: Matti Vaittinen To: Matti Vaittinen , Matti Vaittinen Cc: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , Nuno Sa , David Lechner , Javier Carrasco , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/7] iio: adc: ti-adc128s052: Simplify using be16_to_cpu() Message-ID: References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: The register data is 12-bit big-endian data. Use be16_to_cpu() to do the conversion, and simple bitwise AND for masking to make it more obvious. Signed-off-by: Matti Vaittinen --- Revision history: v1 => v2: - Fix commit msg to reflect the fact there was no bug - Drop Fixes tag - Use union for rx / tx buffer to avoid casting - Keep the shared message protected by the mutex --- drivers/iio/adc/ti-adc128s052.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c index a456ea78462f..3e69a5fce010 100644 --- a/drivers/iio/adc/ti-adc128s052.c +++ b/drivers/iio/adc/ti-adc128s052.c @@ -28,32 +28,34 @@ struct adc128 { struct regulator *reg; struct mutex lock; - u8 buffer[2] __aligned(IIO_DMA_MINALIGN); + union { + __be16 rx_buffer; + u8 tx_buffer[2]; + } __aligned(IIO_DMA_MINALIGN); }; static int adc128_adc_conversion(struct adc128 *adc, u8 channel) { int ret; + char *msg = &adc->tx_buffer[0]; mutex_lock(&adc->lock); - adc->buffer[0] = channel << 3; - adc->buffer[1] = 0; + msg[0] = channel << 3; + msg[1] = 0; - ret = spi_write(adc->spi, &adc->buffer, 2); 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Tue, 01 Apr 2025 23:09:27 -0700 (PDT) Received: from mva-rohm ([2a10:a5c0:800d:dd00:8fdf:935a:2c85:d703]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54b0957f9b7sm1568800e87.139.2025.04.01.23.09.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 23:09:26 -0700 (PDT) Date: Wed, 2 Apr 2025 09:09:23 +0300 From: Matti Vaittinen To: Matti Vaittinen , Matti Vaittinen Cc: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , Nuno Sa , David Lechner , Javier Carrasco , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/7] iio: adc: ti-adc128s052: Be consistent with arrays Message-ID: <2024394e033de7d0d1c92768de5e5de2273dce15.1743573284.git.mazziesaccount@gmail.com> References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: The ti-adc128s052 driver has NULL terminated ID arrays for the of_device_id, spi_device_id and acpi_device_id. All of these are terminated by having an empty string as the last member of an array. Only the of_device_id array uses the /* sentinel */ comment. It's better to be consistent. This /* sentinel */ comment serves no real purpose these days as people are used to seeing these ID lists terminated with an empty array element. Drop the /* sentinel */ from the of_device_id. Signed-off-by: Matti Vaittinen --- Revision history: v1 => v2: - Drop the comma from the end of the of_device_id list. --- drivers/iio/adc/ti-adc128s052.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c index 3e69a5fce010..861a35169196 100644 --- a/drivers/iio/adc/ti-adc128s052.c +++ b/drivers/iio/adc/ti-adc128s052.c @@ -186,7 +186,7 @@ static const struct of_device_id adc128_of_match[] = { { .compatible = "ti,adc124s021", .data = &adc128_config[2] }, { .compatible = "ti,adc124s051", .data = &adc128_config[2] }, { .compatible = "ti,adc124s101", .data = &adc128_config[2] }, - { /* sentinel */ }, + { } }; MODULE_DEVICE_TABLE(of, adc128_of_match); From patchwork Wed Apr 2 06:09:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matti Vaittinen X-Patchwork-Id: 14035553 Received: from mail-lf1-f49.google.com (mail-lf1-f49.google.com [209.85.167.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C941F230BE1; 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Tue, 01 Apr 2025 23:09:43 -0700 (PDT) Received: from mva-rohm ([2a10:a5c0:800d:dd00:8fdf:935a:2c85:d703]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54b09580011sm1532802e87.149.2025.04.01.23.09.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 23:09:41 -0700 (PDT) Date: Wed, 2 Apr 2025 09:09:38 +0300 From: Matti Vaittinen To: Matti Vaittinen , Matti Vaittinen Cc: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , Nuno Sa , David Lechner , Javier Carrasco , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/7] iio: adc: ti-adc128s052: Use devm_mutex_init() Message-ID: <469d5ab906c3c723cb657bbcf1ce200fae255ead.1743573284.git.mazziesaccount@gmail.com> References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Quoting Jonathan: "Whilst it doesn't bring huge advantage, now we have devm_mutex_init() it seems reasonable to use it and maybe catch a use after free for the lock" Switch to use devm_mutex_init() while working on this file. Signed-off-by: Matti Vaittinen --- v1 => v2: - Check the return value for the devm_mutex_init() --- drivers/iio/adc/ti-adc128s052.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c index 861a35169196..bef2d29c06af 100644 --- a/drivers/iio/adc/ti-adc128s052.c +++ b/drivers/iio/adc/ti-adc128s052.c @@ -173,7 +173,9 @@ static int adc128_probe(struct spi_device *spi) if (ret) return ret; - mutex_init(&adc->lock); + ret = devm_mutex_init(&spi->dev, &adc->lock); + if (ret) + return ret; return devm_iio_device_register(&spi->dev, indio_dev); } From patchwork Wed Apr 2 06:09:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matti Vaittinen X-Patchwork-Id: 14035554 Received: from mail-lj1-f175.google.com (mail-lj1-f175.google.com [209.85.208.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 68BBB230BE1; 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Tue, 01 Apr 2025 23:09:55 -0700 (PDT) Received: from mva-rohm ([2a10:a5c0:800d:dd00:8fdf:935a:2c85:d703]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-30dd2ad61f6sm18602791fa.60.2025.04.01.23.09.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 23:09:54 -0700 (PDT) Date: Wed, 2 Apr 2025 09:09:50 +0300 From: Matti Vaittinen To: Matti Vaittinen , Matti Vaittinen Cc: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , Nuno Sa , David Lechner , Javier Carrasco , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/7] iio: adc: ti-adc128s052: Simplify using guard(mutex) Message-ID: <37179be88b3ddf2ad4120c281f82d84fe497fb8e.1743573284.git.mazziesaccount@gmail.com> References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Error path in ADC reading function can be slighly simplified using the guard(mutex). Use guard(mutex) and document the mutex purpose. Signed-off-by: Matti Vaittinen --- Revision history: v1 => v2: - Protect the shared message data - Add message data protection to the mutex doc - Reword the commit message --- drivers/iio/adc/ti-adc128s052.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c index bef2d29c06af..a15b75fc067e 100644 --- a/drivers/iio/adc/ti-adc128s052.c +++ b/drivers/iio/adc/ti-adc128s052.c @@ -9,6 +9,7 @@ * https://www.ti.com/lit/ds/symlink/adc124s021.pdf */ +#include #include #include #include @@ -26,6 +27,10 @@ struct adc128 { struct spi_device *spi; struct regulator *reg; + /* + * Serialize the SPI 'write-channel + read data' accesses and protect + * the shared buffer. + */ struct mutex lock; union { @@ -39,19 +44,16 @@ static int adc128_adc_conversion(struct adc128 *adc, u8 channel) int ret; char *msg = &adc->tx_buffer[0]; - mutex_lock(&adc->lock); + guard(mutex)(&adc->lock); msg[0] = channel << 3; msg[1] = 0; ret = spi_write(adc->spi, msg, sizeof(adc->tx_buffer)); - if (ret < 0) { - mutex_unlock(&adc->lock); + if (ret < 0) return ret; - } ret = spi_read(adc->spi, &adc->rx_buffer, 2); - mutex_unlock(&adc->lock); if (ret < 0) return ret; From patchwork Wed Apr 2 06:10:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matti Vaittinen X-Patchwork-Id: 14035555 Received: from mail-lj1-f172.google.com (mail-lj1-f172.google.com [209.85.208.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7075A230BE3; Wed, 2 Apr 2025 06:10:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743574212; cv=none; b=TuX1zV4EkOFz/jFgNASqfLAADbRJ8BOpNzn5KEaLCPjza9M+aAz2dgu4odcy2oMfC2fZR/zJiOEmuokCE5UHfe69GD0YR24zsWr/DA02l4MQGEJ1v1lgxpPmM+tFOwyYktjd3Vq8QBUrh138wXcqe/6QzqDNAdkBhInqEX9V7mc= ARC-Message-Signature: i=1; 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Tue, 01 Apr 2025 23:10:08 -0700 (PDT) Received: from mva-rohm ([2a10:a5c0:800d:dd00:8fdf:935a:2c85:d703]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-30dd2b59686sm19681961fa.97.2025.04.01.23.10.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 23:10:07 -0700 (PDT) Date: Wed, 2 Apr 2025 09:10:04 +0300 From: Matti Vaittinen To: Matti Vaittinen , Matti Vaittinen Cc: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , Nuno Sa , David Lechner , Javier Carrasco , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/7] iio: adc: ti-adc128s052: Support ROHM BD79104 Message-ID: <7b7c8c8ae79224c5aa74ed084858d90df6bbad81.1743573284.git.mazziesaccount@gmail.com> References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: The ROHM BD79104 ADC has identical SPI communication logic as the ti-adc128s052. Eg, SPI transfer should be 16 clk cycles, conversion is started when the CS is pulled low, and channel selection is done by writing the channel ID after two zero bits. Data is contained in big-endian format in the last 12 bits. The BD79104 has two input voltage pins. Data sheet uses terms "vdd" and "iovdd". The "vdd" is used also as an analog reference voltage. Hence the driver expects finding these from the device-tree, instead of having the "vref" only as TI's driver. NOTE: The TI's data sheet[1] does show that the TI's IC does actually have two voltage inputs as well. Pins are called Va (analog reference) and Vd (digital supply pin) - but I keep the existing driver behaviour for the TI's IC "as is", because I have no HW to test changes, and because I have no real need to touch it. NOTE II: The BD79104 requires SPI MODE 3. NOTE III: I used evaluation board "BD79104FV-EVK-001" made by ROHM. With this board I had to drop the SPI speed below the 20M which is mentioned in the data-sheet [2]. This, however, may be a limitation of the EVK board, not the component itself. Signed-off-by: Matti Vaittinen Datasheet: https://www.ti.com/lit/ds/symlink/adc128s052.pdf # [1] Datasheet: https://fscdn.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bd79104fv-la-e.pdf # [2] --- Revision history: v1 => v2: - Use Datasheet tags in commit message. --- drivers/iio/adc/Kconfig | 2 +- drivers/iio/adc/ti-adc128s052.c | 40 +++++++++++++++++++++++++++++---- 2 files changed, 37 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 859c77f40f1d..045cd696a57d 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -1486,7 +1486,7 @@ config TI_ADC128S052 depends on SPI help If you say yes here you get support for Texas Instruments ADC128S052, - ADC122S021 and ADC124S021 chips. + ADC122S021, ADC124S021 and ROHM Semiconductor BD79104 chips. This driver can also be built as a module. If so, the module will be called ti-adc128s052. diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c index a15b75fc067e..0f93c6266527 100644 --- a/drivers/iio/adc/ti-adc128s052.c +++ b/drivers/iio/adc/ti-adc128s052.c @@ -21,6 +21,9 @@ struct adc128_configuration { const struct iio_chan_spec *channels; u8 num_channels; + const char *refname; + int num_other_regulators; + const char * const (*other_regulators)[]; }; struct adc128 { @@ -125,10 +128,28 @@ static const struct iio_chan_spec adc124s021_channels[] = { ADC128_VOLTAGE_CHANNEL(3), }; +static const char * const bd79104_regulators[] = { "iovdd" }; + static const struct adc128_configuration adc128_config[] = { - { adc128s052_channels, ARRAY_SIZE(adc128s052_channels) }, - { adc122s021_channels, ARRAY_SIZE(adc122s021_channels) }, - { adc124s021_channels, ARRAY_SIZE(adc124s021_channels) }, + { + .channels = adc128s052_channels, + .num_channels = ARRAY_SIZE(adc128s052_channels), + .refname = "vref", + }, { + .channels = adc122s021_channels, + .num_channels = ARRAY_SIZE(adc122s021_channels), + .refname = "vref", + }, { + .channels = adc124s021_channels, + .num_channels = ARRAY_SIZE(adc124s021_channels), + .refname = "vref", + }, { + .channels = adc128s052_channels, + .num_channels = ARRAY_SIZE(adc128s052_channels), + .refname = "vdd", + .other_regulators = &bd79104_regulators, + .num_other_regulators = 1, + }, }; static const struct iio_info adc128_info = { @@ -163,7 +184,7 @@ static int adc128_probe(struct spi_device *spi) indio_dev->channels = config->channels; indio_dev->num_channels = config->num_channels; - adc->reg = devm_regulator_get(&spi->dev, "vref"); + adc->reg = devm_regulator_get(&spi->dev, config->refname); if (IS_ERR(adc->reg)) return PTR_ERR(adc->reg); @@ -175,6 +196,15 @@ static int adc128_probe(struct spi_device *spi) if (ret) return ret; + if (config->num_other_regulators) { + ret = devm_regulator_bulk_get_enable(&spi->dev, + config->num_other_regulators, + *config->other_regulators); + if (ret) + return dev_err_probe(&spi->dev, ret, + "Failed to enable regulators\n"); + } + ret = devm_mutex_init(&spi->dev, &adc->lock); if (ret) return ret; @@ -190,6 +220,7 @@ static const struct of_device_id adc128_of_match[] = { { .compatible = "ti,adc124s021", .data = &adc128_config[2] }, { .compatible = "ti,adc124s051", .data = &adc128_config[2] }, { .compatible = "ti,adc124s101", .data = &adc128_config[2] }, + { .compatible = "rohm,bd79104", .data = &adc128_config[3] }, { } }; MODULE_DEVICE_TABLE(of, adc128_of_match); @@ -202,6 +233,7 @@ static const struct spi_device_id adc128_id[] = { { "adc124s021", (kernel_ulong_t)&adc128_config[2] }, { "adc124s051", (kernel_ulong_t)&adc128_config[2] }, { "adc124s101", (kernel_ulong_t)&adc128_config[2] }, + { "bd79104", (kernel_ulong_t)&adc128_config[3] }, { } }; MODULE_DEVICE_TABLE(spi, adc128_id); From patchwork Wed Apr 2 06:10:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matti Vaittinen X-Patchwork-Id: 14035556 Received: from mail-lj1-f175.google.com (mail-lj1-f175.google.com [209.85.208.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC446230BE3; Wed, 2 Apr 2025 06:10:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Tue, 01 Apr 2025 23:10:31 -0700 (PDT) Received: from mva-rohm ([2a10:a5c0:800d:dd00:8fdf:935a:2c85:d703]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-30dd2ad3cdfsm19169761fa.54.2025.04.01.23.10.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 23:10:30 -0700 (PDT) Date: Wed, 2 Apr 2025 09:10:26 +0300 From: Matti Vaittinen To: Matti Vaittinen , Matti Vaittinen Cc: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , Nuno Sa , David Lechner , Javier Carrasco , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH RFC v2 7/7] iio: ti-adc128s052: Drop variable vref Message-ID: References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: According to Jonathan, variable reference voltages are very rare. It is unlikely it is needed, and supporting it makes the code a bit more complex. Simplify the driver and drop the variable vref support. Suggested-by: Jonathan Cameron Signed-off-by: Matti Vaittinen --- Revision History: v2: - New patch --- drivers/iio/adc/ti-adc128s052.c | 29 ++++++----------------------- 1 file changed, 6 insertions(+), 23 deletions(-) diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c index 0f93c6266527..0bfe4e558c69 100644 --- a/drivers/iio/adc/ti-adc128s052.c +++ b/drivers/iio/adc/ti-adc128s052.c @@ -29,13 +29,12 @@ struct adc128_configuration { struct adc128 { struct spi_device *spi; - struct regulator *reg; /* * Serialize the SPI 'write-channel + read data' accesses and protect * the shared buffer. */ struct mutex lock; - + int vref; union { __be16 rx_buffer; u8 tx_buffer[2]; @@ -82,11 +81,7 @@ static int adc128_read_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_SCALE: - ret = regulator_get_voltage(adc->reg); - if (ret < 0) - return ret; - - *val = ret / 1000; + *val = adc->vref / 1000; *val2 = 12; return IIO_VAL_FRACTIONAL_LOG2; @@ -156,11 +151,6 @@ static const struct iio_info adc128_info = { .read_raw = adc128_read_raw, }; -static void adc128_disable_regulator(void *reg) -{ - regulator_disable(reg); -} - static int adc128_probe(struct spi_device *spi) { const struct adc128_configuration *config; @@ -184,17 +174,10 @@ static int adc128_probe(struct spi_device *spi) indio_dev->channels = config->channels; indio_dev->num_channels = config->num_channels; - adc->reg = devm_regulator_get(&spi->dev, config->refname); - if (IS_ERR(adc->reg)) - return PTR_ERR(adc->reg); - - ret = regulator_enable(adc->reg); - if (ret < 0) - return ret; - ret = devm_add_action_or_reset(&spi->dev, adc128_disable_regulator, - adc->reg); - if (ret) - return ret; + adc->vref = devm_regulator_get_enable_read_voltage(&spi->dev, + config->refname); + if (adc->vref < 0) + return adc->vref; if (config->num_other_regulators) { ret = devm_regulator_bulk_get_enable(&spi->dev,