From patchwork Thu Apr 3 08:58:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037453 Received: from mail-ed1-f52.google.com (mail-ed1-f52.google.com [209.85.208.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F247B19E7D1 for ; Thu, 3 Apr 2025 08:59:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670743; cv=none; b=qqh3r4RZL4DIev8DrDWpLwTzMEQD5BF1Q2irsoTgz1daCvD7+QlKxA1qZITX/McGxBk/mkC+yKiQPB5Ki8UFJoaDnqnJvJpG/LbOZo5HWANM3uE1qY+FIjkB+rpgb0w1yLp0x6/+tISoaNsFiJcEgXd4Z5I/72L8Hscht3r5/f4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670743; c=relaxed/simple; bh=eBSaOtqyWe991gSlYJyL39sE3ZfA8WvCAtDmKcJjlV8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BK8LyI1gwrykD6hm9wx8Hinkyqziu5UJsNScIj22WlVOSLbQkXWMGdNXDSY++5wZbhviQoLitktWUOj8HgX+NUGnWD18Q4YbLWvaxUVUIE515agpqQdDDS+WHH9yiOlXQkG9pISDd8ZwA1d/RmncdTngr7jr6Dc7xxcyuglKt7k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=cY0Nnwp5; arc=none smtp.client-ip=209.85.208.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="cY0Nnwp5" Received: by mail-ed1-f52.google.com with SMTP id 4fb4d7f45d1cf-5e61375c108so924113a12.1 for ; Thu, 03 Apr 2025 01:59:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670739; x=1744275539; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=a+M3GihTjnRn1Hrg1CuNjUwnXLbiE9TQN/WleV7zPWg=; b=cY0Nnwp5I/MG2UQCN5wjD7QuohUOEvoiHhMIN+hzvjQrqXl9zZhLAbYNUIlmW21ntU h8ZvVGIK02i8d+P7rKJDrlheKXoWqwT9pzHlpSgGQf4lBhunUQYp8t5wwGuB1jJ+y4/y DtDj7LuX+wqqqBNY07Tlp3U6yaSwSdKbD3Ing/VvZk+LJdL08Zlw0kygLvmoAarhmIDw 0DNhjyeV2wIu/2KqAoJL2MtbHONyihBtERWNemLxoEz2jJgNBX5cFAArbGDl8GySrQR0 jtL7T+Mcqlj2SmIJPWm3hrrYLNEC0PLrhuJ4C3KxVMhe4/j0VuViNtZv2YX8hnWO+GNY z8bA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670739; x=1744275539; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=a+M3GihTjnRn1Hrg1CuNjUwnXLbiE9TQN/WleV7zPWg=; b=euuFXBsBnxzpAsUlxb7XMhXwKZsgWL1MT5TyL0y7KZHcSDQVxmSscInEzFzYn0Bnc9 Mw6j99k7EI/gOd8tfwdofFNynMICBgxhry1UNNDmuP/zGLJSvS/xi44TlPHJxVMCB6iE v6EdZy7yaQBnTjl1MC9fovfLbBIG6JA6cWAPY+0e3bRMkXVUweIneyNhX21vTKjYLqGs L5CZSOHKUd5kd9Pepv+m5/w7hkC/WQdt3ga3y+VmsYOUnwdndIebkE4C9xKhKSYilms9 g+8ORuTPE8UwUYKH10x4wOw2lcfX5NGanvmMF7PIbaLR15GqQJ8x/u43M8Gch7EU58Ps SkyQ== X-Forwarded-Encrypted: i=1; AJvYcCW+g+Rj58LvXaOgirSZqlEDTuamXgUMZB3D/2gftnyg8TL1y+OCx67A8NIih5+8JDQohPNw77k0N76/SkMryabIXA==@vger.kernel.org X-Gm-Message-State: AOJu0Yx+Z7ulfknequL1yI/Zt52vyRU9G60AYEaN6nD39Bwhqs0jqFkt 3SHmGkx1fkwYIjTFxqaUXJjdjFjouEI0AutGfL10N+wQH9XlPm6HaN/NeJEY9ks= X-Gm-Gg: ASbGncuwVMCR8x9XVCIlt3iGLjz5rmlLw+VR4Vie3Hp4RUBpQ681mi6QI69vjo0Ai1g 6pP1UBqdBrGANYoeIAuiWNxpXu6AENVEB4pDIXfm2bxnenw8YMOqt3i2cQM2Flx0KDvY0wXxmDb qUZaX0Zs+CYMPJW2V1rW/kK5fpw9/O+8dx/BGUTUHCoCYq/1NPut14pek2QrbON7eO9+de0aLB/ 8S6Ue8sEEKyd+3FyOIBl9fbhBmMh4XjWOQOaxVLChN/XP4TsdY35wyclmHMQo0h4FJzKXDcKpEv xHFpIySCYKG352qajFz8CDei5Yi/V5mKSlL0zNHxdfCl2VbPHlB8+QV3MJTFICTFpqcbeyrNHgv eFyDx0zpSiFYzMFL9qjoMfZ/wXCiNKnYWvVuPSas= X-Google-Smtp-Source: AGHT+IEO1QurBQVznveFvWun3Jg1GT4794QiV4XVF3U5z9BB/kH5NvSDatCmfwTx4VFKQZlezuZZbw== X-Received: by 2002:a05:6402:3513:b0:5e5:e396:3f9a with SMTP id 4fb4d7f45d1cf-5edfdf1ce8emr15075770a12.31.1743670739159; Thu, 03 Apr 2025 01:58:59 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.58.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:58:58 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:58:53 +0100 Subject: [PATCH v3 01/32] dt-bindings: mfd: samsung,s2mps11: add s2mpg10 Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-1-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 The Samsung S2MPG10 PMIC is similar to the existing PMICs supported by this binding. It is a Power Management IC for mobile applications with buck converters, various LDOs, power meters, RTC, clock outputs, and additional GPIOs interfaces. Unlike other Samsung PMICs, communication is not via I2C, but via the Samsung ACPM firmware, it therefore doesn't need a 'reg' property but needs to be a child of the ACPM firmware node instead. S2MPG10 can also act as a system power controller allowing implementation of a true cold-reset of the system. Support for the other components like regulators and power meters will be added in subsequent future patches. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- v3: * keep 'regulators' subnode required even for s2mpg10 (Krzysztof) v2: * drop ACPM phandle 'exynos,acpm-ipc', and expect this to be a child node of ACPM directly instead * allow, but still don't enforce, regulators subnode, to ease adding it in the future * deny 'reg' property, it's incorrect to optionally have it for S2MPG10 * enforce 'interrupts' or 'interrupts-extended' property. S2MPG10 can not work without. Note this is done as-is using the oneOf, because dtschema's fixups.py doesn't handle this nesting itself --- .../devicetree/bindings/mfd/samsung,s2mps11.yaml | 26 +++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml b/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml index ac5d0c149796b6a4034b5d4245bfa8be0433cfab..d6b9e29147965b6d8eef786b0fb5b5f198ab69ab 100644 --- a/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml +++ b/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml @@ -20,6 +20,7 @@ description: | properties: compatible: enum: + - samsung,s2mpg10-pmic - samsung,s2mps11-pmic - samsung,s2mps13-pmic - samsung,s2mps14-pmic @@ -58,16 +59,39 @@ properties: reset (setting buck voltages to default values). type: boolean + system-power-controller: true + wakeup-source: true required: - compatible - - reg - regulators additionalProperties: false allOf: + - if: + properties: + compatible: + contains: + const: samsung,s2mpg10-pmic + then: + properties: + reg: false + samsung,s2mps11-acokb-ground: false + samsung,s2mps11-wrstbi-ground: false + + oneOf: + - required: [interrupts] + - required: [interrupts-extended] + + else: + properties: + system-power-controller: false + + required: + - reg + - if: properties: compatible: From patchwork Thu Apr 3 08:58:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037454 Received: from mail-ed1-f46.google.com (mail-ed1-f46.google.com [209.85.208.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C13A0241CB6 for ; Thu, 3 Apr 2025 08:59:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670744; cv=none; b=RAzf+AuAgK/hrvf1kR34S5sw8r4rSlS9o780+R2KgJsu7aPVJppXWgtX1q9290djSk9aDwalT/DIPZldX2w3UMcVmusvcMs+4Ax7t1eFCMauVB/ftCifNmLe/Vymni644sKp2uIrObYUvaS+Tf1sfpMRbZT6vCMgb2fZReWJTdo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670744; c=relaxed/simple; bh=GY5aflUP8HyQZVCvYH781i7uGwHWsWCKLpX/UgZ7jiM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lP1nWQv512VWAVg3IDGDmRCXA9iqubBH9UhRc7jrcH+hB5jblLp12ZISJPPHhVMLRPubgDHcHkFXV7cvndMEps/t7ukeqGXHcQNSVK/qQprUmcCtei4giiHU2MOHLcDC5Zm/HwWu50m+Ho3l+It66Jr1iJZFp/Yu9spOmb4QpYM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=zMfY6vZo; arc=none smtp.client-ip=209.85.208.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="zMfY6vZo" Received: by mail-ed1-f46.google.com with SMTP id 4fb4d7f45d1cf-5eb5ecf3217so1241060a12.3 for ; Thu, 03 Apr 2025 01:59:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670740; x=1744275540; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=r/wEh4QmLnuluQvbcZ6Yqq9yXOMvoeHgrUwhyH2g5L8=; b=zMfY6vZoeD+0C+rJjnkjVt3bDkOAdTXIiZAFKxQECBujQ8CEzEwgH5lM0KDR1GVhg4 IB6RmNOQnmB1sPJrzkIm90OxheOn1KBdZW4O6gcT9IQRszdJq3QbhfSPRb+w197+l3Iu a3hy4Hc+uX9th4a1/y+FVGMUQhI9w99XhPdBkO/osh+phqb+VxYZZm5Pxj98h/nAOCvO OaORvxhY3mmS/EX4ipCng5roXPVOyd1MQo9IEy4a4tWLFe2l1ghafJF/fQDb6XKhroYC jFPC4YbidkKnscT7zB4iO/RfH868ambV3SjiY0o8GTdLWFeeJQwn0ZZku+rhwcPoLpSy fzwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670740; x=1744275540; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=r/wEh4QmLnuluQvbcZ6Yqq9yXOMvoeHgrUwhyH2g5L8=; b=vEHYjyn1glOrQYAOGXafPoKpczUPJB9zn6wHUf27to1TZbmQ0z2hDU3PGp5yi9iN0+ zwS9MGCTIToWUofJkHJlrKe6g1z0BFVYYRt4k6/6sy8uxz8Lms4DXMaWdQCyZt47JlGM oCoOCIhY6L4eAtzwrMccXtB6nMcbeBIQy7YyBCJl2xS4oeyaDNnTd5uUe8QtMD5e8Z3L Cfonuo5ozAF7R99ak3mURtqm9E4KW97dbaXkNtpLmfM0odQ5iFMIG4QK5O5pQVCUp8ma gmbRG1eL72FFwmw4PmazTDcT5ZYDHo8FyoQAIkRzxRzxidlzhN3/jc6t77pAvI7sPid3 u+Jg== X-Forwarded-Encrypted: i=1; AJvYcCWJkiL4WlCg93T2/f6mAUM8Nob6By3WYG4JGZCbtOWiHGg+jL1kha6wvcsIeW509/FjWqUttERUHdaQ7oMAjzJsnQ==@vger.kernel.org X-Gm-Message-State: AOJu0Yy61l24wfuMEhUUE5wVc5zCvzHKRKgmz+BLsFe4us96dsa8sdsl caLZSY4uogtJpD6HBMgm4pxym5LbJMjeIfcv16g4Txd4WhwoBUOx5HIMwhfOz0c= X-Gm-Gg: ASbGncvgHeX2M4jQOfUb8DaCe/OAeC+xBt0AiURrHFMIKPnAow/oQoICyE9fnioGjJm CeJa7jysKHlC1Dq0pOGyczZbBJZgmW9vfuXIVM4jPEFgtXDpdHNxzak0XWYHvgCU2+nttUtCB7P dR4e4zfkaCozVwRVqYpAHFDjqp9zgsM5MCFf/pR8CvV6y/quXIpL5g5zrVPptWEGMv+FHo1hTi0 ZPfYEGe0E9M+5m6jABmsslVm3By8g4UH90lV04Dsz0ujJ9cyVOjeyspw7qRhrsL0xYD2ROPmYy2 YhdTLOzrWu1/MhUVbV9fUcyakBSq8fYkZztFXwfSYe9JNJwrCeV5Rouv+kG8cy/Ow2/0vqJ/3nY AkiuzU/WsqFJRyg6kuBUPexFtQ54s X-Google-Smtp-Source: AGHT+IFpNCgTUy3yn5kNBStSgNtkMlYeVkvi4R54YROwAonbhkdXCkRSsgfQeF745WZBnvMJR3nP5A== X-Received: by 2002:a05:6402:27cf:b0:5ec:958b:6f5a with SMTP id 4fb4d7f45d1cf-5f08726ef19mr1525065a12.28.1743670739930; Thu, 03 Apr 2025 01:58:59 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.58.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:58:59 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:58:54 +0100 Subject: [PATCH v3 02/32] dt-bindings: clock: samsung,s2mps11: add s2mpg10 Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-2-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 The Samsung S2MPG10 clock controller is similar to the existing clock controllers supported by this binding. Register offsets / layout are slightly different, so it needs its own compatible. Acked-by: Stephen Boyd Acked-by: Rob Herring (Arm) Signed-off-by: André Draszik --- Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml b/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml index d5296e6053a1881650b8e8ff2524ea01689b7395..91d455155a606a60ed2006e57709466ae8d72664 100644 --- a/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml @@ -25,6 +25,7 @@ description: | properties: compatible: enum: + - samsung,s2mpg10-clk - samsung,s2mps11-clk - samsung,s2mps13-clk # S2MPS13 and S2MPS15 - samsung,s2mps14-clk From patchwork Thu Apr 3 08:58:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037455 Received: from mail-ed1-f42.google.com (mail-ed1-f42.google.com [209.85.208.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C646324291A for ; Thu, 3 Apr 2025 08:59:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670745; cv=none; b=WHssKmIembqPrRsb1oP2ie4EfR+UpAwmj7HodgLG8u3gWNJBsCcnMPeCaLF8i7zXPXoOyiaqUKYrLtVrYoo5V+EcosyzDmdBMmHR6DPrC6b3UmuO8qAjkwWKZ/l0CuGyK4ZkSNkZkBofR0DQpHCnOdgtPcX4t8quURGXmJ8NOKw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670745; c=relaxed/simple; bh=8eAYSNpHmOf5cN1usNebO301BYKlN5Z6Sv3SjOw/R9E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ah8Pp2KjAbJNdPM/j+Jewp4eMcufpb/Tu0w18vnbozTLGTsWuHjSY/4685vsi1nRHS0g0eHwkEVOQ10kDZSk7HITMAV61ub6rjR5rbKFjws/pDBx9KM0uUf2nqTn5edr0fZFakbOBFDI1057Wqgpd8qh/aRR/R0QcyJ1pbHTzRU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=W7PYcnuA; arc=none smtp.client-ip=209.85.208.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="W7PYcnuA" Received: by mail-ed1-f42.google.com with SMTP id 4fb4d7f45d1cf-5e5c7d6b96fso1228180a12.3 for ; Thu, 03 Apr 2025 01:59:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670741; x=1744275541; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=TTxYh5RL8tOeSvhD/5hLspaDOdxe6ZuNdEjOA1UzBwY=; b=W7PYcnuAlZQsbDxO0WOqI7YMtU0x8oDPCpmXjmjbqbAxjaxT7e2cWS3ocQLK/69Zp2 MfEGGmraQpTaXxhhqsUryIAoWqTpsJ7JR7uxKSVH4GHJhnvUljs0zkPEFJWWpTZ+2cpf Fir41nqzNOigBPyxHZmeURSIL4iKpB8xoEgIqu53zcx76rCnubxtLdpjo8Px7X9OdPY7 YS/at1xd1qDdYbztZK4f7mn1a/GA4r/RAEGOwmcJcHuFSwBfjQ1R9Ois8he+EBB741H9 p3smz0KM5lpjtvgJEcz6Ot3Tl+lNg6+FSM7OYIdnIk3AekBugU9aZOyz0MD5QruyHMML 1N4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670741; x=1744275541; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TTxYh5RL8tOeSvhD/5hLspaDOdxe6ZuNdEjOA1UzBwY=; b=D6w2HxWdXui/Mw3pto2xyWMV3RruY1O1gfQ4giLjPe11mAk0vnJ6qYj/JkfD57f6Oo 36Rg1639SJT1IAMjsveM533WuQpXeMthLXCSktDaI5rEV2Swyz4WUaxtEhFaRiYh4iX+ mIbKu6Nvx4bDzHqD8HfxW0WVSXVfcXMYOZZFQ9VkTbMILbrnpSGX2pFbsiZz/PBp1bPM UtKCg2BZTL1cLd1EuNpRQtIIV0feuTmH30jbTCyyPYFdsFFxOXfUAWXqQldd3o8x15L7 KzqOBUwajBgQMFwZsm3J7NVvogWnFmiCynINirabnFwNcN4xcgvroatAT7h85RRk4TdU PREg== X-Forwarded-Encrypted: i=1; AJvYcCUzvgIVb34mvdr7KSjCoBETpsUsyF9grWWeg/InQJ2jWWkpoo9XkBO77zVeuUSAEsnWPLZQ5pmGsYdYeJ8xKWgLyQ==@vger.kernel.org X-Gm-Message-State: AOJu0Yx4xoyRDGMAxNf1EQnpEU5KqX9QgbdWiZayT1YDnpIIPKUOJ5Xx 8VUrXgosdiPv6SpdfkY+mMnIYDPAhNqIPtQGzqlvtKH7lIfx0F0bnEZEdUfHpzQ= X-Gm-Gg: ASbGncvUKm91DrK0lyoR8O6OHefINOwX3184yN4MAFTHBzL+ShsKY1hD0mW7KDrv4Ah +JzYk8O6V9Qzwp/y0jSQlMH8wSnsEEdoAsj0sZtmp/EeJQHoz2fvNqeKvoJIHqEd9b9dyg0j2qG 0T9QSj3KDcleItzAoZ2SeeM67dEK8tqXM1jJwtxYegnyKzeoHoLf7iF+uYm+pwnFPgWT3/P1BQQ fja2sj+zwB7Qy2EkVUu+ZjP+luphw8SsugB/le1js4hWL4FK7vNyDl2+Cc9Cl1xm63jQhogyIYz EryGmaSDMEQiGei4nQkqbMonK6TLs0oU0kQzal5EIfYwsFZGH+m85+oAPA50RTZ6meRyKXIboBs q5PLBW4PUaqAiXR8k4w3xoGQSXuCI X-Google-Smtp-Source: AGHT+IGqS+cHosPp545QR90MaWlJ7FylDhKCGqpl/xjJ8Dzzg8KkweIQ6IAoK4HbqAdErYyQhuV36w== X-Received: by 2002:a05:6402:3229:b0:5ee:486:ea34 with SMTP id 4fb4d7f45d1cf-5ee0486ebc0mr15642777a12.34.1743670740725; Thu, 03 Apr 2025 01:59:00 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:00 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:58:55 +0100 Subject: [PATCH v3 03/32] dt-bindings: firmware: google,gs101-acpm-ipc: add PMIC child node Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-3-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 The PMIC is supposed to be a child of ACPM, add it here to describe the connection. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- v3: - drop '$ref' and 'unevaluatedProperties' from pmic subnode, use 'additionalProperties' instead (Krzysztof) - add some regulators to examples since s2mpg10 requires them as of v3 --- .../bindings/firmware/google,gs101-acpm-ipc.yaml | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml index 2cdad1bbae73bb1795eccf47e1a58e270acd022c..9785aac3b5f34955bbfe2718eec48581d050954f 100644 --- a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml +++ b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml @@ -27,6 +27,15 @@ properties: mboxes: maxItems: 1 + pmic: + description: Child node describing the main PMIC. + type: object + additionalProperties: true + + properties: + compatible: + const: samsung,s2mpg10-pmic + shmem: description: List of phandle pointing to the shared memory (SHM) area. The memory @@ -43,8 +52,34 @@ additionalProperties: false examples: - | + #include + power-management { compatible = "google,gs101-acpm-ipc"; mboxes = <&ap2apm_mailbox>; shmem = <&apm_sram>; + + pmic { + compatible = "samsung,s2mpg10-pmic"; + interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>; + + regulators { + LDO1 { + regulator-name = "vdd_ldo1"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + }; + + // ... + + BUCK1 { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <450000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; }; From patchwork Thu Apr 3 08:58:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037456 Received: from mail-ed1-f44.google.com (mail-ed1-f44.google.com [209.85.208.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 78BC8241CA0 for ; Thu, 3 Apr 2025 08:59:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670745; cv=none; b=tfi61luiV26f/YkKeTBofr/7YIRLiT8sI0k0Hzpk3kcbuByGVtRjmyCb4cQn7I88aZS4YtDEeIaybmGcm7K7LKzOR+QxHRPI/UTvCDzIlLiRS4/fAYFYyT3QiTHT/NXfw+90RGtJ6HSlZWgwANnPjaxHUHlOMQzxQhDOgqBeTz0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670745; c=relaxed/simple; bh=rtY22MgptB+tLy3QVxclIgluL35Op8OhX0cRjsl/mJo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RRlmUBFH6AWmjK828nsOdK3k0H07ek/dP1d3VG1vfBZKUIb49evWQ78eVrUWri1Jdm1R+vcHI3jpnkhSp+oR6tNQdeCjPYPLE5HVdD49LGiwOgzXbu5Oz3w/qzt9AnrOIrw8alG/mU+68TWxbxBlLMXUf8tub+u01VRiVh/LzIM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=o0NweKEI; arc=none smtp.client-ip=209.85.208.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="o0NweKEI" Received: by mail-ed1-f44.google.com with SMTP id 4fb4d7f45d1cf-5ed1ac116e3so1183954a12.3 for ; Thu, 03 Apr 2025 01:59:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670741; x=1744275541; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=eMxQ7UQKMt0+Oaxy9pEE80XpNTXV7CL+WPCOZ4uzjjQ=; b=o0NweKEIpkWSH2jwsB74/XPrYsHAW13Na5HzWQ34OX2Ui5O/wl+6+9VOabs+k5g2Xd ORYcdHDJCXk3sGRL9TPgxSddIrQ1C/3yEq6pTHUtL0vAV1ruzHoSXV3zBGH/EoPgt967 wZLqemNLOurWbEOyIO+rzfczLEcU+5aaN5+mZKRW3cefKIpR/VXSRSZhyf96++Vc838m VqYRzbh0Kr3rWaD/wuhr7z7KllYhGHR2s+NqY3ZSKdRduqvcLsdWtdZ7COsBWofND93A 3VKEr4Ur/+97GJrZn38FtaHcig47HMMNgoxyfoJPFGEThbt7sPyYlM8+fp/pcwzMwfNP T/eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670741; x=1744275541; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eMxQ7UQKMt0+Oaxy9pEE80XpNTXV7CL+WPCOZ4uzjjQ=; b=Ow8CQKdkffrERBvh7KMeIzqxVP/HpU2blvbwdlr/K8OBuAsTYL/2SAvSoaKo7TVhn+ e2E55QONFSgOcPJsYFV0SZlT/S1zvDcIV0T2D2JBaWnmiBOclCbq75i9hCvZqbLzrrJa rqrZS0dirWy+7gLoDjo/hnP6QeXMFwJMC/UTIiE1BAFtn4BpQosUgU36Jz9BB5Kb1wBJ iocShHsb85QY5SpkNA44b4did+MzKCzQ3TlGPnnxgx9MhxvzR0SXej0p0GiuH6VckVJw lhGQJaatEIdSBZTKywsKPcRt7hk/NaGS8ISfgGYn6qFZp6AHNLr6QPUqXScJju5hOFkU Bklw== X-Forwarded-Encrypted: i=1; AJvYcCUiuy/sh6I+6c/z9NaTddc2sgMniPQ7tcQdBiYY+nh6MAO4GinEPFNr4QctKq5XT0luMIukNV4Jv3b0P8MPoYsRSg==@vger.kernel.org X-Gm-Message-State: AOJu0YzYfAKX8Y59OR9Yh13vQ9RsIuO0ekMGvQerbdFmtaFFmn1Gci+R 3caq39a+htuV9iEtX9aZqJNEf+FwEY5cEloYB3FWXFgGVUhF2I1/Y9yHkPR1UuE= X-Gm-Gg: ASbGncs7KdBR3C4bJuuQJJyN4xo5WHjDQ8xf0lEeMiXdsEBQonkMonj5pAkCKCO2K2G qN+i0JKT8j9fKhKayf9i3wWBIIkpuuGKzAMXrB5fBg6EPuLzWrcBM8TEsF9aHwedFe1/q4dmTEm HIpalF4Zy27uvQLeUGMB1V6FdvoG9THLXcxhyoc5pb6dfz2zwwKqWZPEmVZnsJYgmlt8HXbYBwo 2vjKfaw3Uoktg+plJfRG6b84WNG4t96gqL6aqFvDKxOyJrXiakmYTJJgFgHgd5HLJNwrZMD2m6V uXuPMV2W6TjJbfe2lgMCwCoQuqzy2F+uBXd4B5T9DGQ8Qy3vZxpYSUP1PM422BHK0oocGeNgLOC 21gR+Vm8bQ768GGXi5/O09pjiQfGX X-Google-Smtp-Source: AGHT+IHQrHf12EJNK/p+81ZjxQhmjVXLedkpjwoD4qMiwxw3fr2xU8zdguaJrZmoo26ZrVzwsXGVGA== X-Received: by 2002:a05:6402:2802:b0:5ec:cd7c:de55 with SMTP id 4fb4d7f45d1cf-5f08717ff38mr1640036a12.17.1743670741481; Thu, 03 Apr 2025 01:59:01 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:00 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:58:56 +0100 Subject: [PATCH v3 04/32] mfd: sec: drop non-existing forward declarations Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-4-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 sec_irq_resume() was removed in commit 6445b84abf91 ("mfd: Add s2mps11 irq driver") and sec_irq_exit() in commit 3dc6f4aaafbe ("mfd: sec: Use devm_mfd_add_devices and devm_regmap_add_irq_chip") while the prototypes were left. They should be removed. Do so. Reviewed-by: Krzysztof Kozlowski Signed-off-by: André Draszik --- include/linux/mfd/samsung/core.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h index f35314458fd22e43fa13034439406bea17a155c9..b7008b50392ab857751b89e0a05d2c27f6306906 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h @@ -72,8 +72,6 @@ struct sec_pmic_dev { }; int sec_irq_init(struct sec_pmic_dev *sec_pmic); -void sec_irq_exit(struct sec_pmic_dev *sec_pmic); -int sec_irq_resume(struct sec_pmic_dev *sec_pmic); struct sec_platform_data { struct sec_regulator_data *regulators; From patchwork Thu Apr 3 08:58:57 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037457 Received: from mail-ed1-f45.google.com (mail-ed1-f45.google.com [209.85.208.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F38E1241CAF for ; Thu, 3 Apr 2025 08:59:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670746; cv=none; b=q+cgbTOsWdDdBTBgxgEaTGldhHWVX2LB4CwGUSH5dB9dK8q+cuY9Wul/4qbCDNSNU0eM2evdkSrCsR/V3D1pJG8HFmNHB/BV37qTOhCJRquck1yq4yOmK3/U8vQY4Cx6UQkrrwJXrDvoWVT3rcKLkVbI7ESLhcHYy/KYUfP430M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670746; c=relaxed/simple; bh=UlkZld/wRLMptXmKQwcze511hrG+hJRq5bCGkApcG9o=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tdGkgzAvLP2/bWstSDq4j7rLkyjEP3MtNIz65VSN+aliVEovgd9egu0807+GL4/GNi2DVtwa5IuiY4qcts0QxlVSZpyxFNDVrxIG7xudPU9nDx5Uzy0MZv4ssuvIKbAFWO9WEpDFi9LEDjY5ss7BIW8MsqpM0Zi26HbC6Sz9gUY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=WiVmgiHj; arc=none smtp.client-ip=209.85.208.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="WiVmgiHj" Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-5e5c7d6b96fso1228232a12.3 for ; Thu, 03 Apr 2025 01:59:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670742; x=1744275542; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=zvnZunCYyaEwV4fUoehy+lbIydvSzIujDoR6jNNiKRw=; b=WiVmgiHjyHP/0yfIw3e1J63bfZPyDlI1cSJVkfOg4jncxVrNobdRoMwudiWOkj8blU W4ryDzIrec9tDVjxilifV2VFYuMuSBAj53NFZFcbhGWCuBS6Uyu2sRcpSK/YIBEgRQ7+ 2nSj2z7VNTb4YbZYGzuz1x3i2R9ecKapUeGGGofoCYJpwDAmQyeU6MJHi2hZ7mlHtauM rwIe0VSStT/Xejb0/F1SK3BlnSChpG8KX/oKntAIQ5RHgPKaIpfrZOvGuHjVX3aV2u7S XbApIj5pGLkqzx0Yt4GWIL95XUJ1/8jfINBdutltzW8nZo366R3btRaGVAgkcSXLLs2n sxtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670742; x=1744275542; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zvnZunCYyaEwV4fUoehy+lbIydvSzIujDoR6jNNiKRw=; b=NJ1UmNrJteo5ZMphiMalamcLyB0m5iXu/XyTAl4+HIWTfoSW2mFnPJLgo0vXFBExrd TNgBoHac1v3/2o9VxsrpCxLeVjRW04GHjNzn2x56GcrIFs8cO+Bq2CjnrSLLPp7vtoPX bVeAywLJdeawGLsYRULnZqsynryTtMi33S8GynyD2lIVLwnwBoTBT8VIDQLPSDvT1H92 t/D2WjJFfEC5vv0bZ/V+mRrB5VMmzMVXj6E+M3WQc9sSzHkmMMMky4+c2DUYgQeRJy2b x6nREBIP+e2lrlxblcwY8Td1ihnZ6jsj8Qw/V7LKHjTmdESbHR9ArRmPfhkqSAbXChDJ iTbw== X-Forwarded-Encrypted: i=1; AJvYcCUUDcd6jaor22R0umGr4FbBx+DZTLSwv61aSHdEeY+vgiR46CAWpum43TIYfuw0lyXCN6PiKNxEpLQmHknfOMkqqw==@vger.kernel.org X-Gm-Message-State: AOJu0Yx8AWu3HK7WYPnKybzTbEc/8poHFSqYtQXt5AVrBfwCd3yFp4vJ UnATiJWL1OhQsO8wR+6t+X0aw5IcMgGF7P28C86EFbtBI7FrSmosaiiKC3Uq4r8= X-Gm-Gg: ASbGncsmjmIFibEuQLnI9jlcrxdjqmd2hP+6SwpJP3Gs+q9bk2f1U9V+dBEAj89qX1s vEkXfpbR7lgNmTGHUUgAyYaqXLvMNdteOT8+s+HIc97gugWO9HAm7tdtPNxnqgizCoh0g2e8GRo oJhv0OSQENYK51jSr7CymwZygNpAXlB2f0wfKQ5aURC8dtI4cWQ3kdoce2mWz8xp+MRKIPCX9uE c32UBVHB3t4igp0TNiwUBff0YGLClkxsNsl8Gt/2Pr/GGXQvV8WIaUnAMpIj8t/bAwK2Adq4tZA CUQaP2us6cttsSLG3JvgIwVExFOmohMjpOkdyAtZRHusFLRDls6TA2Kxxwut57LrPBEGpA6E9UA wf3IXYDxGO6d34i/DLYUoyg470Z+B X-Google-Smtp-Source: AGHT+IHLPvSEymTsQ03JgORzrfz3sWcW5LSP8Sp0KzcMY46wC//GzsWqGdq35W45MXKHrK74iEdBWA== X-Received: by 2002:a05:6402:51ce:b0:5ec:f769:cfa1 with SMTP id 4fb4d7f45d1cf-5edfdd155cfmr14720447a12.29.1743670742249; Thu, 03 Apr 2025 01:59:02 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:01 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:58:57 +0100 Subject: [PATCH v3 05/32] mfd: sec: sort includes alphabetically Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-5-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Sorting headers alphabetically helps locating duplicates, and makes it easier to figure out where to insert new headers. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- drivers/mfd/sec-core.c | 14 +++++++------- drivers/mfd/sec-irq.c | 5 ++--- 2 files changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c index 3e9b65c988a7f08bf16d3703004a3d60cfcb1c75..e31b3a6fbc8922e04a8bfcb78c85b6dbaf395e37 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-core.c @@ -3,16 +3,10 @@ // Copyright (c) 2012 Samsung Electronics Co., Ltd // http://www.samsung.com -#include -#include -#include #include -#include #include -#include +#include #include -#include -#include #include #include #include @@ -23,7 +17,13 @@ #include #include #include +#include +#include +#include +#include +#include #include +#include static const struct mfd_cell s5m8767_devs[] = { { .name = "s5m8767-pmic", }, diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 047fc065fcf17f5bde84143d77a46749111ea5b8..5c0d949aa1a20f5538d8baf7a8aefc1160ffa14c 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -6,9 +6,6 @@ #include #include #include -#include -#include - #include #include #include @@ -16,6 +13,8 @@ #include #include #include +#include +#include static const struct regmap_irq s2mps11_irqs[] = { [S2MPS11_IRQ_PWRONF] = { From patchwork Thu Apr 3 08:58:58 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037458 Received: from mail-ed1-f53.google.com (mail-ed1-f53.google.com [209.85.208.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D0801244186 for ; Thu, 3 Apr 2025 08:59:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670747; cv=none; b=URr6/fyiVBWWzYZFfOMm3us8ZMyHJc+naJPqEWvhzzRAyfLWxooI5RP8pCGTJBn6wskUJt0ui1JbKanyCVgS8MEcl7RRVn6S31oUaYUyXCdxC5SAMrZ08Eu14AKu+Qc2do9BRy5VGBFIsKXKintbYpctZjiTRtpXB+OeiU4DhZ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670747; c=relaxed/simple; bh=3ZuAbxXX06ozk3Tfj9ghYJsYuA9BYsa2OTFam90KOhs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CSYnnZOAc45Rhp6y60UoKM4du/WpuIC1uPP7GGv7MuvfWGoqEvx26tlGVLwA3F8gJcoZDNmF6CCEfgNN4IaqcYz5eC18D7i5nL28mArJMK23UhnlSF7f1MSIlZx6dS5vx9KraPG9sAl2rfZJnSjqgP3oKHAVWF/kl04AetB9YQU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=sihtSJSP; arc=none smtp.client-ip=209.85.208.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="sihtSJSP" Received: by mail-ed1-f53.google.com with SMTP id 4fb4d7f45d1cf-5e5cd420781so1396015a12.2 for ; Thu, 03 Apr 2025 01:59:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670743; x=1744275543; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=+XJ0BnP9OZ8bJehCr0mEgQXneIq2z0WdureacdI7Rno=; b=sihtSJSP3ON/aTv636TQbOvlzBGpOe/n6JQef3T6U+e1+0o188jAM7AHpZsef9yAzR CD/PpZa4iM2RRS7Tgg1n2oobGtUAV9dTwx61Gmj4LglLUZz8twdRNcCu87zVDqpAu+BD /l07XXBx/GUjvjRZ3sAbVCUTwrLRGNr+bLVwUZDems0gKQLIb40HQGLG3eKsPiXZ+6so VjaUp0s2s7pS9ldY9EALtPXSvUcd0Dk4Tas8rzEGzssQWvcIFZ/Kvp0nv1Z0zMHMXR6r u6UQJZHgvtIiCI5gCCpNv9cYPhzDhzCXJWPsjx6v1hSzF6/TbttXnKf4S/f5YdUxtmXR /7pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670743; x=1744275543; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+XJ0BnP9OZ8bJehCr0mEgQXneIq2z0WdureacdI7Rno=; b=Yeqh16L/AUJ7JXdGgkrbFZXVrUes2c9LIy//L5TPGoLk6GT/lTSSb2bQ0rWtkTg0e5 LQe7H5Tw090C4MHh0Dc7RO6CDruMIyODN0JXtYjjk9wqN0BYzoCVg6A/Fjv9xX/eojfD x3uNIWF+G18Wy6Gtw70BNI5+qV0csKCigJllkIqSDDNsfiA3QX+X5tm9MvLrzMX+pDwl A9ETQRR26HT4MaJRP2xfsZrCoc6cGYs5G6hy6Rs1Ty9C/P5kEKdat3Z9HCVQCtEjCNlf ccYFzEITPQNNSE2xQQmT0TLBP2qQdc3Eq2fiqrbSbXkXQnYpKMbmV2flOM6R+4iw65xA wFPQ== X-Forwarded-Encrypted: i=1; AJvYcCXrwUX7LJYR8sq3HjxtOyMLS2gZj7jul7DC2An54MFyQZjxtIXcjutzlGio6/QGgAVnSIewtIX2gU8MZulb0Wx79Q==@vger.kernel.org X-Gm-Message-State: AOJu0YxmW4sJcqJva26cHPtIt6/cYqnWReZfCqoaIzFV0AARfTy4ZmJO qD8SHjYjNV73DDYMluQMUcCmRkKkNzfNU3l98xeibF8G+S+G/JHAXPDhqBEev0Y= X-Gm-Gg: ASbGnctxk5zNmlBvpSsAAmj+YBU5mbheKt76E+xtRJDuVyigaggca05j1xrbC/khFHK O3yUU5yoi5h5ls+0WusudfXwntvHwjHzoa3bB5bdetrTkt5sa5L7IXe1OrqTDc95wKbX4KmXpNQ Rm1Iy+pS97PfPtoWnCVZND0YE0IrqUveyzx12yXCc+1ejW/FFsiywcOFQfGPI0s2Ha7sGjfSr6x Eo1ei2rKaML2rzFRVyJsqGO9ieKdq5zTtdt1xIZu8PVXLrx38e+mPvALFQdcPiHr2A4MEYKquei etdHEmw0zkV2vCsZZOfRBup+dWdV02COFYNLpNQTbDGR1uYk3Bx+6Sm4tY7kkACVpCvtsYWqyKE DQtJmr1A6Cz/pp8LUfhBo6T/xL5+6 X-Google-Smtp-Source: AGHT+IGkZPSWp4lu5rUJK3n+QeS/CEFX/u4+R1iSLBAES5mqBRreTDwkWOuPbVChNdfUaTLO5xi3fg== X-Received: by 2002:a05:6402:278b:b0:5eb:4e69:2578 with SMTP id 4fb4d7f45d1cf-5f04eaceb11mr4573614a12.13.1743670743004; Thu, 03 Apr 2025 01:59:03 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:02 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:58:58 +0100 Subject: [PATCH v3 06/32] mfd: sec: update includes to add missing and remove superfluous ones Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-6-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 This driver misses to include some of the respective headers of some of the APIs used. It also includes headers that aren't needed (e.g. due to previous driver rework where includes weren't updated). It is good practice to directly include all headers used, which avoids implicit dependencies and spurious build breakage if someone rearranged headers, as this could cause the implicit includes to be dropped. Include the relevant headers explicitly and drop superfluous ones. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- drivers/mfd/sec-core.c | 7 +++---- drivers/mfd/sec-irq.c | 5 ++++- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c index e31b3a6fbc8922e04a8bfcb78c85b6dbaf395e37..b12020c416aa8bf552f3d3b7829f6a38a773f674 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-core.c @@ -3,9 +3,9 @@ // Copyright (c) 2012 Samsung Electronics Co., Ltd // http://www.samsung.com +#include #include #include -#include #include #include #include @@ -17,13 +17,12 @@ #include #include #include +#include #include -#include -#include #include +#include #include #include -#include static const struct mfd_cell s5m8767_devs[] = { { .name = "s5m8767-pmic", }, diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 5c0d949aa1a20f5538d8baf7a8aefc1160ffa14c..3ed2902c3a2634a6ea656d890ecea934053bd192 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -3,7 +3,10 @@ // Copyright (c) 2011-2014 Samsung Electronics Co., Ltd // http://www.samsung.com -#include +#include +#include +#include +#include #include #include #include From patchwork Thu Apr 3 08:58:59 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037459 Received: from mail-ej1-f47.google.com (mail-ej1-f47.google.com [209.85.218.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA2AF24291A for ; Thu, 3 Apr 2025 08:59:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670748; cv=none; b=FdQBzb1vlCJujSCzbjfevt7LQpX88FJbCetFwRZtiB19kNWCJdDV4JjLpaJnB7VQiIb/zbEwZ/Uni9mrLT2+uK9zP49ymHOEOK/JVDqHeZQlON5xEoHekvnRL6ALabajm6QDN2apHZDWrMVv3s1elVqg1n83G/BSOmVI2fLg1dw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670748; c=relaxed/simple; bh=IlL7av/XZ94MO9yKdjGRUMlQhb8Bpg73uC0VJ87ssYs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=STKM6G4n3D7SvA+ebtplSFomjRk5SPIDSeqGLBz+WDvLnZNNkmLNHy276s39AzHES+a6D7ZWuiwuf5X+3DnKbtpHPh7wJ566RXpUpCICWSbem8CsU54kTBHhZZpmndkePukFCUJ4OqCjkOQV5dFEckEtPJAu3jwymNbJf25tbTQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=levw/Q2B; arc=none smtp.client-ip=209.85.218.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="levw/Q2B" Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-ac41514a734so109025266b.2 for ; Thu, 03 Apr 2025 01:59:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670744; x=1744275544; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=6nQmrd18TxOApmP9ZbnJeIx1ckVKc9UGQ9P+sqT3y24=; b=levw/Q2BARYjso4u1EbIZt9wvNnTI1sRcgYNjuDoMU66nukLmh7AUGwFJ2nMQNk8E1 IZBYBrWgogNkLp+w0WoA4Rnwae6WrMZZLAJV6LW/PV6PaREwMj/Y7zkuaQdntxoYrboN +NwQOfrKEew0K7EhHJkSg9t07MrnCGpAyi4Lm+XHuTOCJz/ATffcU8r+U4g8hmrxxBNU sGgucLCRMNX1DbRoJzuxpaanT5XjWNZnDV4pnhgmdQ/Vi7xpWNno0ViMcVZ4Tfr6eYO8 1hoH1NCSd6jQBQMxWcgpH1rpEYINplQkHKsB+S8rxQR/ZAzPYsxaZWB9pO+esvU8wAE6 tUBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670744; x=1744275544; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6nQmrd18TxOApmP9ZbnJeIx1ckVKc9UGQ9P+sqT3y24=; b=L7RklbDspO8FGYKvU//n8gSFynFSJdxmJc/0oIQiHgrMLsA6kRUqtb3wnv+5Cti+10 o0lNUyqIvC+cOt0G6825tjWwNl6xCZcyFrv0lD5fWvqc6WrVcfJus8Gz874LaxJDcwap 1V9e4GcTPGgTi/TIRdceceAItZh64bN95rNpP6EpDFTRrDSek1650hDb2BzuqRNtRS4k 8RWnRUrRMziRuqBBl1sk6TzUu5vKK1VoaLCZI8K9CQlvFq0RxKfbwxi/6qcIe2vIGwSD 4Fw9265QPopJkT2/swD1B7HhoRBBiqEz3yl3em1ou9A2Scl2BU1Ys5GLqRk+vVxAZBq8 3P1w== X-Forwarded-Encrypted: i=1; AJvYcCWUQ3JsDcEVkNZ9MghSuDUIlnK3BM16o51HnSNcAPvdotKLvJXrVZszHTdXj1vtUqiYWBlUM5Bp/rWChVCYv4t9hA==@vger.kernel.org X-Gm-Message-State: AOJu0YwVw/SCo8TN10aOGX1nu5dDf0EZEBkqyKc6CGdqdoEDIek0ZqPm arSYnBPLSu0SsxewW8bp4JC8F5qpqJBw7Ezidsp/JCEqsVPH8YzKkP59o7Hph8E= X-Gm-Gg: ASbGncvipJgSsj/y5eLgwYafiGlcXIxY8UccTDBVDbiGitsKN6XdLkLr/5pjK2g2laW SqWMfwQcT0XOIwtG9H+Z2jFF1JdTi0b0qWzbqSWLqb37SybB28tucWe7TbdlHbF3SliiuxEv+Jv aC+9voOsXW40EF0lom2yRzH5wgDhNQ+wWszX5DG10iTGbm/JhuGyaNpk87JG5rIWCRZ9Pe/tDle fLmNBXMVD6SkecZtuh6ur/QxKKZ7yzceH0bIhlSphufSRq3k/MAp4EBfTTgwctsL3c3LngMEqnc AEUIzHTz8buwK9w//mWWy5OBfBqQ75Ideidrs/KBTtG7fBpZg2uaR39qFahdniResGaZIT3rvSI LoFOpXRMGzRjIUzi6O+lEkm+BHjJI X-Google-Smtp-Source: AGHT+IGIWTCEvGgQQzD/67aqQ+onG4uBURQ37h1HwUWRbYYu+VD7A44v+HEWQ+TW3vqt1mLDE4QMoQ== X-Received: by 2002:a17:906:c153:b0:ac6:fcdd:5a97 with SMTP id a640c23a62f3a-ac7a1972b9emr446196566b.48.1743670743773; Thu, 03 Apr 2025 01:59:03 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:03 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:58:59 +0100 Subject: [PATCH v3 07/32] mfd: sec: move private internal API to internal header Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-7-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 sec_irq_init() is an internal API for the core driver, and doesn't belong into the public header. Due to an upcoming split of the driver into a core and i2c driver, we'll also be adding more internal APIs, which again shouldn't be in the public header. Move it into a new internal include. Reviewed-by: Krzysztof Kozlowski Signed-off-by: André Draszik --- MAINTAINERS | 2 +- drivers/mfd/sec-core.c | 1 + drivers/mfd/sec-core.h | 15 +++++++++++++++ drivers/mfd/sec-irq.c | 1 + include/linux/mfd/samsung/core.h | 2 -- 5 files changed, 18 insertions(+), 3 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 322ee00547f6e494a96d2495092f72148da22bd0..d4d577b54d798938b7a8ff0c2bdbd0b61f87650f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21407,7 +21407,7 @@ F: Documentation/devicetree/bindings/mfd/samsung,s5m*.yaml F: Documentation/devicetree/bindings/regulator/samsung,s2m*.yaml F: Documentation/devicetree/bindings/regulator/samsung,s5m*.yaml F: drivers/clk/clk-s2mps11.c -F: drivers/mfd/sec*.c +F: drivers/mfd/sec*.[ch] F: drivers/regulator/s2m*.c F: drivers/regulator/s5m*.c F: drivers/rtc/rtc-s5m.c diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c index b12020c416aa8bf552f3d3b7829f6a38a773f674..83693686567df61b5e09f7129dc6b01d69156ff3 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-core.c @@ -23,6 +23,7 @@ #include #include #include +#include "sec-core.h" static const struct mfd_cell s5m8767_devs[] = { { .name = "s5m8767-pmic", }, diff --git a/drivers/mfd/sec-core.h b/drivers/mfd/sec-core.h new file mode 100644 index 0000000000000000000000000000000000000000..b3fded5f02a0ddc09a9508fd49a5d335f7ad0ee7 --- /dev/null +++ b/drivers/mfd/sec-core.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2012 Samsung Electronics Co., Ltd + * http://www.samsung.com + * Copyright 2025 Linaro Ltd. + * + * Samsung SxM core driver internal data + */ + +#ifndef __SEC_CORE_INT_H +#define __SEC_CORE_INT_H + +int sec_irq_init(struct sec_pmic_dev *sec_pmic); + +#endif /* __SEC_CORE_INT_H */ diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 3ed2902c3a2634a6ea656d890ecea934053bd192..4d49bb42bd0d109263f485c8b58e88cdd8d598d9 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -18,6 +18,7 @@ #include #include #include +#include "sec-core.h" static const struct regmap_irq s2mps11_irqs[] = { [S2MPS11_IRQ_PWRONF] = { diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h index b7008b50392ab857751b89e0a05d2c27f6306906..8a4e660854bbc955b812b4d61d4a52a0fc2f2899 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h @@ -71,8 +71,6 @@ struct sec_pmic_dev { struct regmap_irq_chip_data *irq_data; }; -int sec_irq_init(struct sec_pmic_dev *sec_pmic); - struct sec_platform_data { struct sec_regulator_data *regulators; struct sec_opmode_data *opmode; From patchwork Thu Apr 3 08:59:00 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037460 Received: from mail-ed1-f44.google.com (mail-ed1-f44.google.com [209.85.208.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97E4C24501F for ; Thu, 3 Apr 2025 08:59:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670751; cv=none; b=sDK/HrlSHnpScxZC37fcO95oeHNjXyvjnHEto4y4mVXZ8rRYKZbr/uarvGkPmwP7UgQnKI3CnUdMT+wB0e2g3T5c64l9RwifmfS5J0Qf9442N8EwEbiMnbL6/qv8AJxQFUO/Jy97dZXawBTFQRlEHwTcS8sCSMkoBdMex3Z9bZE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670751; c=relaxed/simple; bh=PI3U05hE1oIiZE6XppzEJEQtfSZFiinsebmK6V2enuM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rX6kdbnbcSfyt+tENzkosQNEKHlzlNSy8kUQ7YkPIfyvXX3BYlD2SQ+tA3lc2qO2+125zMU/cHi86G3R0943znCgHkf19iMHx6vEtXOOopBTUBA5fE7D8rjzT7uug3Zx4k94/ggeXgfJpX9uPN53aDpTx0rYGdBMTT7ODSC3n3c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=M4yOEDyc; arc=none smtp.client-ip=209.85.208.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="M4yOEDyc" Received: by mail-ed1-f44.google.com with SMTP id 4fb4d7f45d1cf-5e61375c108so924225a12.1 for ; Thu, 03 Apr 2025 01:59:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670745; x=1744275545; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=4CKjAMiD1RE7RTGUiJe9q7KbEFxCPs59yWp4xXVklQ0=; b=M4yOEDycM01vNeBl4Q9ypbzKMyfJoIRbLsPRSofK6qDUo99dzp6l76Kk9ECLrWsDM3 dEJMt9k6tP1Q74lqpQbxCgLiVJluZMfAV/QA2cpeU2ybK+82MWNoKuWyVDO/V607WGaB A8cJ7H2qpCjy6++IxmgTCbr881SZjEYMYHDaXLrGJaWbgPDQSF/A4C3ui9mytuikl6cg lqs3ZIwyoMW1qEJGL1fvTQOwNznz5vuhevy6wPHqrvIsN34nDe/ScmRo4Svw8pRHUaeo OG9FAuqXkqK9n83+z4zGmCoXAJ3iBdHhbcPcyRXGnbKfOhlFAhsBpdu8PF3aXUATEEwH HvEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670745; x=1744275545; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4CKjAMiD1RE7RTGUiJe9q7KbEFxCPs59yWp4xXVklQ0=; b=rdDsj1+0gVYKj/Lw4TXTRvxHX1PjT0MCrC8Hu5A5tX5m8Egkt0ZW8E5Sa40D4y/5VU EOXMIlaaIGywee1trGoUujxZB0gjsyDagwQ6OnQzVakUVGEzP0qkMEAwjqrNUJNFbqDN EKInFlcjBCAJ79AqVyHpGmzzHhhbZ3ahBP/P4nyAaheg7uGj5k+80hojAH1uC6EpgnGR DsKlPui594Hm6rZhCcDWSa60LoRtz8+KM/islN4RZQ60WKDJAhSbE7aTDHHmWEBgZWan FbAoDXdUypAi/8bIWGf61NCQIV6k/KT9KZ6doyCu653uKMkHAcnfX2+Upw34M8uKnQUG j+hw== X-Forwarded-Encrypted: i=1; AJvYcCW1h+7Xe3AclpNU4VobbJg8aRLPFBgTldqebNM6xmFX57wFSfkDmSXXUQj2Iah0wH/tzF48XJNvRq+WPrvn6twqYg==@vger.kernel.org X-Gm-Message-State: AOJu0YzHJf0tQyyYdVsfumPv1SvpzukaVoxxudZFU6mW1qoqB9/MyAsH PM6UbGfA9hiwITzrpuIW4cA4dICcohi4iNv0vzgiS7GDezJPIlHA0blmUg2JN/o= X-Gm-Gg: ASbGncviXNjQLOm7OefEm4+fDE3+NYw8Tn74GUT1/wgPsyMDj9jEJFm6d1Hj6kUJp+q obH8I6xhxLgF1fY4xvsInWWBVyi2J6l62xZWuO04ysEXzmykMWKYQ4VHo4jSTWSWOHWlGtMdWYr HqdliPXVqlG927l0ylDP9lRAnuMPRjlpWeDKH9qyXJG0iZDUy2UJO7uO2kns+pM3gjlFIDC+ND9 cO7ZeYj2+nme2tMfW2pAl2hJ+w5mPrCKBkaOqA37b2D/NlFQfocA0kH9fujnI6FAnm3KtbFqZGF yAjiiJPVqmR7oGtB3FFv3qZAW/MkDZEZm0jTxqsc9COf+Y8SgoD+wPUik1OVdJoVb9+AZH1Fogy azgTAumxwHb16NsextjDATzIfKOI8 X-Google-Smtp-Source: AGHT+IGl6BQvkjkQUqwZ3Fr/WtdqH/2OUS2EIBSd7b2JjB+krYkcqp4Vj+iXyq5LNeNuws6JOh+r/w== X-Received: by 2002:a05:6402:51c6:b0:5ec:c990:b578 with SMTP id 4fb4d7f45d1cf-5edfd15767bmr17482441a12.19.1743670744626; Thu, 03 Apr 2025 01:59:04 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:03 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:00 +0100 Subject: [PATCH v3 08/32] mfd: sec: split into core and transport (i2c) drivers Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-8-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 As a preparation for adding support for Samsung's S2MPG10, which is connected via SPEEDY / ACPM rather than I2C, split out (move) all I2C-specific driver code into its own kernel module, sec-i2c, and make the existing sec-core module be just the transport-agnostic core driver kernel module. At the same time, update all defconfigs that reference the old kconfig symbol name. While at it, also update file header comments and module description(s) to drop references to 'mfd', and update comments to be C-style, not C++. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- Note: checkpatch complains about missing help for MFD_SEC_I2C here, but that's a false-positive due to patch context. It also suggests to update MAINTAINERS, but the new file is covered already due to using a wildcard. v2: * split MODULE_AUTHOR update out of this patch (Krzysztof) * keep DT parsing in core, not in transport driver (sec_pmic_i2c_parse_dt_pdata / sec_pmic_parse_dt_pdata) * merge defconfig updates into this patch (Krzysztof) --- arch/arm/configs/exynos_defconfig | 2 +- arch/arm/configs/multi_v7_defconfig | 2 +- arch/arm/configs/pxa_defconfig | 2 +- arch/arm64/configs/defconfig | 2 +- drivers/mfd/Kconfig | 18 ++- drivers/mfd/Makefile | 1 + drivers/mfd/sec-core.c | 247 +++++------------------------------- drivers/mfd/sec-core.h | 9 ++ drivers/mfd/sec-i2c.c | 231 +++++++++++++++++++++++++++++++++ 9 files changed, 287 insertions(+), 227 deletions(-) diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index 7ad48fdda1dac69a4a9612eabb573729bed7b3a6..251f45be6c14af59263373f21b27b15f42ec7f61 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -167,7 +167,7 @@ CONFIG_MFD_MAX77686=y CONFIG_MFD_MAX77693=y CONFIG_MFD_MAX8997=y CONFIG_MFD_MAX8998=y -CONFIG_MFD_SEC_CORE=y +CONFIG_MFD_SEC_I2C=y CONFIG_MFD_STMPE=y CONFIG_STMPE_I2C=y CONFIG_MFD_TPS65090=y diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index ad037c175fdb0ec8601c9b3607aca0c0e5f3c145..7d06ac5369b1a2f325462f2cf5b54fe22061ca77 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -612,7 +612,7 @@ CONFIG_MFD_QCOM_RPM=y CONFIG_MFD_SPMI_PMIC=y CONFIG_MFD_RK8XX_I2C=y CONFIG_MFD_RN5T618=y -CONFIG_MFD_SEC_CORE=y +CONFIG_MFD_SEC_I2C=y CONFIG_MFD_STMPE=y CONFIG_MFD_PALMAS=y CONFIG_MFD_TPS65090=y diff --git a/arch/arm/configs/pxa_defconfig b/arch/arm/configs/pxa_defconfig index de0ac8f521d7612704ce327e9ac16ab9e999f3d3..064e79baf20da809c9ab1f1fa18282aaba11a41f 100644 --- a/arch/arm/configs/pxa_defconfig +++ b/arch/arm/configs/pxa_defconfig @@ -335,7 +335,7 @@ CONFIG_MFD_MAX77693=y CONFIG_MFD_MAX8907=m CONFIG_EZX_PCAP=y CONFIG_UCB1400_CORE=m -CONFIG_MFD_SEC_CORE=y +CONFIG_MFD_SEC_I2C=y CONFIG_MFD_PALMAS=y CONFIG_MFD_TPS65090=y CONFIG_MFD_TPS6586X=y diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 5bb8f09422a22116781169611482179b10798c14..f021fb29683be1a10720d7e6415daea771647879 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -769,7 +769,7 @@ CONFIG_MFD_MT6397=y CONFIG_MFD_SPMI_PMIC=y CONFIG_MFD_RK8XX_I2C=y CONFIG_MFD_RK8XX_SPI=y -CONFIG_MFD_SEC_CORE=y +CONFIG_MFD_SEC_I2C=y CONFIG_MFD_SL28CPLD=y CONFIG_RZ_MTU3=y CONFIG_MFD_TI_AM335X_TSCADC=m diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 22b93631003943c393d9fe704748bc23f1905397..62565dc89ec6d58611bbc1f31c65f757343b6453 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1292,21 +1292,25 @@ config MFD_RN5T618 functionality of the device. config MFD_SEC_CORE - tristate "Samsung Electronics PMIC Series Support" + tristate + select MFD_CORE + select REGMAP_IRQ + +config MFD_SEC_I2C + tristate "Samsung Electronics S2MPA/S2MPS1X/S2MPU/S5M series PMICs" depends on I2C=y depends on OF - select MFD_CORE + select MFD_SEC_CORE select REGMAP_I2C - select REGMAP_IRQ help - Support for the Samsung Electronics PMIC devices coming - usually along with Samsung Exynos SoC chipset. + Support for the Samsung Electronics PMIC devices with I2C interface + coming usually along with Samsung Exynos SoC chipset. This driver provides common support for accessing the device, additional drivers must be enabled in order to use the functionality - of the device + of the device. To compile this driver as a module, choose M here: the - module will be called sec-core. + module will be called sec-i2c. Have in mind that important core drivers (like regulators) depend on this driver so building this as a module might require proper initial ramdisk or might not boot up as well in certain scenarios. diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 948cbdf42a18b22a826f0b17fb8d5796a7ec8ba6..ab6c4b17a391946d4c88f52ccbfee5424b4fb2d2 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -229,6 +229,7 @@ obj-$(CONFIG_MFD_RK8XX_I2C) += rk8xx-i2c.o obj-$(CONFIG_MFD_RK8XX_SPI) += rk8xx-spi.o obj-$(CONFIG_MFD_RN5T618) += rn5t618.o obj-$(CONFIG_MFD_SEC_CORE) += sec-core.o sec-irq.o +obj-$(CONFIG_MFD_SEC_I2C) += sec-i2c.o obj-$(CONFIG_MFD_SYSCON) += syscon.o obj-$(CONFIG_MFD_LM3533) += lm3533-core.o lm3533-ctrlbank.o obj-$(CONFIG_MFD_VEXPRESS_SYSREG) += vexpress-sysreg.o diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c index 83693686567df61b5e09f7129dc6b01d69156ff3..bb664e052bf5198f2fc83a86bd6e1e72364fb8df 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-core.c @@ -1,23 +1,21 @@ // SPDX-License-Identifier: GPL-2.0+ -// -// Copyright (c) 2012 Samsung Electronics Co., Ltd -// http://www.samsung.com +/* + * Copyright 2012 Samsung Electronics Co., Ltd + * http://www.samsung.com + * Copyright 2025 Linaro Ltd. + * + * Samsung SxM core driver + */ #include #include -#include +#include #include #include #include #include -#include #include #include -#include -#include -#include -#include -#include #include #include #include @@ -88,144 +86,6 @@ static const struct mfd_cell s2mpu05_devs[] = { { .name = "s2mps15-rtc", }, }; -static const struct of_device_id sec_dt_match[] = { - { - .compatible = "samsung,s5m8767-pmic", - .data = (void *)S5M8767X, - }, { - .compatible = "samsung,s2dos05", - .data = (void *)S2DOS05, - }, { - .compatible = "samsung,s2mps11-pmic", - .data = (void *)S2MPS11X, - }, { - .compatible = "samsung,s2mps13-pmic", - .data = (void *)S2MPS13X, - }, { - .compatible = "samsung,s2mps14-pmic", - .data = (void *)S2MPS14X, - }, { - .compatible = "samsung,s2mps15-pmic", - .data = (void *)S2MPS15X, - }, { - .compatible = "samsung,s2mpa01-pmic", - .data = (void *)S2MPA01, - }, { - .compatible = "samsung,s2mpu02-pmic", - .data = (void *)S2MPU02, - }, { - .compatible = "samsung,s2mpu05-pmic", - .data = (void *)S2MPU05, - }, { - /* Sentinel */ - }, -}; -MODULE_DEVICE_TABLE(of, sec_dt_match); - -static bool s2mpa01_volatile(struct device *dev, unsigned int reg) -{ - switch (reg) { - case S2MPA01_REG_INT1M: - case S2MPA01_REG_INT2M: - case S2MPA01_REG_INT3M: - return false; - default: - return true; - } -} - -static bool s2mps11_volatile(struct device *dev, unsigned int reg) -{ - switch (reg) { - case S2MPS11_REG_INT1M: - case S2MPS11_REG_INT2M: - case S2MPS11_REG_INT3M: - return false; - default: - return true; - } -} - -static bool s2mpu02_volatile(struct device *dev, unsigned int reg) -{ - switch (reg) { - case S2MPU02_REG_INT1M: - case S2MPU02_REG_INT2M: - case S2MPU02_REG_INT3M: - return false; - default: - return true; - } -} - -static const struct regmap_config sec_regmap_config = { - .reg_bits = 8, - .val_bits = 8, -}; - -static const struct regmap_config s2mpa01_regmap_config = { - .reg_bits = 8, - .val_bits = 8, - - .max_register = S2MPA01_REG_LDO_OVCB4, - .volatile_reg = s2mpa01_volatile, - .cache_type = REGCACHE_FLAT, -}; - -static const struct regmap_config s2mps11_regmap_config = { - .reg_bits = 8, - .val_bits = 8, - - .max_register = S2MPS11_REG_L38CTRL, - .volatile_reg = s2mps11_volatile, - .cache_type = REGCACHE_FLAT, -}; - -static const struct regmap_config s2mps13_regmap_config = { - .reg_bits = 8, - .val_bits = 8, - - .max_register = S2MPS13_REG_LDODSCH5, - .volatile_reg = s2mps11_volatile, - .cache_type = REGCACHE_FLAT, -}; - -static const struct regmap_config s2mps14_regmap_config = { - .reg_bits = 8, - .val_bits = 8, - - .max_register = S2MPS14_REG_LDODSCH3, - .volatile_reg = s2mps11_volatile, - .cache_type = REGCACHE_FLAT, -}; - -static const struct regmap_config s2mps15_regmap_config = { - .reg_bits = 8, - .val_bits = 8, - - .max_register = S2MPS15_REG_LDODSCH4, - .volatile_reg = s2mps11_volatile, - .cache_type = REGCACHE_FLAT, -}; - -static const struct regmap_config s2mpu02_regmap_config = { - .reg_bits = 8, - .val_bits = 8, - - .max_register = S2MPU02_REG_DVSDATA, - .volatile_reg = s2mpu02_volatile, - .cache_type = REGCACHE_FLAT, -}; - -static const struct regmap_config s5m8767_regmap_config = { - .reg_bits = 8, - .val_bits = 8, - - .max_register = S5M8767_REG_LDO28CTRL, - .volatile_reg = s2mps11_volatile, - .cache_type = REGCACHE_FLAT, -}; - static void sec_pmic_dump_rev(struct sec_pmic_dev *sec_pmic) { unsigned int val; @@ -268,7 +128,7 @@ static void sec_pmic_configure(struct sec_pmic_dev *sec_pmic) * platform data. */ static struct sec_platform_data * -sec_pmic_i2c_parse_dt_pdata(struct device *dev) +sec_pmic_parse_dt_pdata(struct device *dev) { struct sec_platform_data *pd; @@ -283,68 +143,34 @@ sec_pmic_i2c_parse_dt_pdata(struct device *dev) return pd; } -static int sec_pmic_probe(struct i2c_client *i2c) +int sec_pmic_probe(struct device *dev, unsigned long device_type, + unsigned int irq, struct regmap *regmap, + struct i2c_client *client) { - const struct regmap_config *regmap; struct sec_platform_data *pdata; const struct mfd_cell *sec_devs; struct sec_pmic_dev *sec_pmic; int ret, num_sec_devs; - sec_pmic = devm_kzalloc(&i2c->dev, sizeof(struct sec_pmic_dev), - GFP_KERNEL); + sec_pmic = devm_kzalloc(dev, sizeof(struct sec_pmic_dev), GFP_KERNEL); if (sec_pmic == NULL) return -ENOMEM; - i2c_set_clientdata(i2c, sec_pmic); - sec_pmic->dev = &i2c->dev; - sec_pmic->i2c = i2c; - sec_pmic->irq = i2c->irq; + dev_set_drvdata(dev, sec_pmic); + sec_pmic->dev = dev; + sec_pmic->device_type = device_type; + sec_pmic->i2c = client; + sec_pmic->irq = irq; + sec_pmic->regmap_pmic = regmap; - pdata = sec_pmic_i2c_parse_dt_pdata(sec_pmic->dev); + pdata = sec_pmic_parse_dt_pdata(sec_pmic->dev); if (IS_ERR(pdata)) { ret = PTR_ERR(pdata); return ret; } - sec_pmic->device_type = (unsigned long)of_device_get_match_data(sec_pmic->dev); sec_pmic->pdata = pdata; - switch (sec_pmic->device_type) { - case S2MPA01: - regmap = &s2mpa01_regmap_config; - break; - case S2MPS11X: - regmap = &s2mps11_regmap_config; - break; - case S2MPS13X: - regmap = &s2mps13_regmap_config; - break; - case S2MPS14X: - regmap = &s2mps14_regmap_config; - break; - case S2MPS15X: - regmap = &s2mps15_regmap_config; - break; - case S5M8767X: - regmap = &s5m8767_regmap_config; - break; - case S2MPU02: - regmap = &s2mpu02_regmap_config; - break; - default: - regmap = &sec_regmap_config; - break; - } - - sec_pmic->regmap_pmic = devm_regmap_init_i2c(i2c, regmap); - if (IS_ERR(sec_pmic->regmap_pmic)) { - ret = PTR_ERR(sec_pmic->regmap_pmic); - dev_err(&i2c->dev, "Failed to allocate register map: %d\n", - ret); - return ret; - } - sec_irq_init(sec_pmic); pm_runtime_set_active(sec_pmic->dev); @@ -387,9 +213,9 @@ static int sec_pmic_probe(struct i2c_client *i2c) num_sec_devs = ARRAY_SIZE(s2mpu05_devs); break; default: - dev_err(&i2c->dev, "Unsupported device type (%lu)\n", + dev_err(sec_pmic->dev, "Unsupported device type %lu\n", sec_pmic->device_type); - return -ENODEV; + return -EINVAL; } ret = devm_mfd_add_devices(sec_pmic->dev, -1, sec_devs, num_sec_devs, NULL, 0, NULL); @@ -401,10 +227,11 @@ static int sec_pmic_probe(struct i2c_client *i2c) return ret; } +EXPORT_SYMBOL_GPL(sec_pmic_probe); -static void sec_pmic_shutdown(struct i2c_client *i2c) +void sec_pmic_shutdown(struct device *dev) { - struct sec_pmic_dev *sec_pmic = i2c_get_clientdata(i2c); + struct sec_pmic_dev *sec_pmic = dev_get_drvdata(dev); unsigned int reg, mask; if (!sec_pmic->pdata->manual_poweroff) @@ -428,11 +255,11 @@ static void sec_pmic_shutdown(struct i2c_client *i2c) regmap_update_bits(sec_pmic->regmap_pmic, reg, mask, 0); } +EXPORT_SYMBOL_GPL(sec_pmic_shutdown); static int sec_pmic_suspend(struct device *dev) { - struct i2c_client *i2c = to_i2c_client(dev); - struct sec_pmic_dev *sec_pmic = i2c_get_clientdata(i2c); + struct sec_pmic_dev *sec_pmic = dev_get_drvdata(dev); if (device_may_wakeup(dev)) enable_irq_wake(sec_pmic->irq); @@ -452,8 +279,7 @@ static int sec_pmic_suspend(struct device *dev) static int sec_pmic_resume(struct device *dev) { - struct i2c_client *i2c = to_i2c_client(dev); - struct sec_pmic_dev *sec_pmic = i2c_get_clientdata(i2c); + struct sec_pmic_dev *sec_pmic = dev_get_drvdata(dev); if (device_may_wakeup(dev)) disable_irq_wake(sec_pmic->irq); @@ -462,20 +288,9 @@ static int sec_pmic_resume(struct device *dev) return 0; } -static DEFINE_SIMPLE_DEV_PM_OPS(sec_pmic_pm_ops, - sec_pmic_suspend, sec_pmic_resume); - -static struct i2c_driver sec_pmic_driver = { - .driver = { - .name = "sec_pmic", - .pm = pm_sleep_ptr(&sec_pmic_pm_ops), - .of_match_table = sec_dt_match, - }, - .probe = sec_pmic_probe, - .shutdown = sec_pmic_shutdown, -}; -module_i2c_driver(sec_pmic_driver); +DEFINE_SIMPLE_DEV_PM_OPS(sec_pmic_pm_ops, sec_pmic_suspend, sec_pmic_resume); +EXPORT_SYMBOL_GPL(sec_pmic_pm_ops); MODULE_AUTHOR("Sangbeom Kim "); -MODULE_DESCRIPTION("Core support for the S5M MFD"); +MODULE_DESCRIPTION("Core driver for the Samsung S5M"); MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/sec-core.h b/drivers/mfd/sec-core.h index b3fded5f02a0ddc09a9508fd49a5d335f7ad0ee7..a0a3488924d96f69373e7569079cfefd0544ca26 100644 --- a/drivers/mfd/sec-core.h +++ b/drivers/mfd/sec-core.h @@ -10,6 +10,15 @@ #ifndef __SEC_CORE_INT_H #define __SEC_CORE_INT_H +struct i2c_client; + +extern const struct dev_pm_ops sec_pmic_pm_ops; + +int sec_pmic_probe(struct device *dev, unsigned long device_type, + unsigned int irq, struct regmap *regmap, + struct i2c_client *client); +void sec_pmic_shutdown(struct device *dev); + int sec_irq_init(struct sec_pmic_dev *sec_pmic); #endif /* __SEC_CORE_INT_H */ diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c new file mode 100644 index 0000000000000000000000000000000000000000..8e3a365ff3e5533e27d94fa8a15dbfa639518a5f --- /dev/null +++ b/drivers/mfd/sec-i2c.c @@ -0,0 +1,231 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2012 Samsung Electronics Co., Ltd + * http://www.samsung.com + * Copyright 2025 Linaro Ltd. + * + * Samsung SxM I2C driver + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "sec-core.h" + +static bool s2mpa01_volatile(struct device *dev, unsigned int reg) +{ + switch (reg) { + case S2MPA01_REG_INT1M: + case S2MPA01_REG_INT2M: + case S2MPA01_REG_INT3M: + return false; + default: + return true; + } +} + +static bool s2mps11_volatile(struct device *dev, unsigned int reg) +{ + switch (reg) { + case S2MPS11_REG_INT1M: + case S2MPS11_REG_INT2M: + case S2MPS11_REG_INT3M: + return false; + default: + return true; + } +} + +static bool s2mpu02_volatile(struct device *dev, unsigned int reg) +{ + switch (reg) { + case S2MPU02_REG_INT1M: + case S2MPU02_REG_INT2M: + case S2MPU02_REG_INT3M: + return false; + default: + return true; + } +} + +static const struct regmap_config sec_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static const struct regmap_config s2mpa01_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = S2MPA01_REG_LDO_OVCB4, + .volatile_reg = s2mpa01_volatile, + .cache_type = REGCACHE_FLAT, +}; + +static const struct regmap_config s2mps11_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = S2MPS11_REG_L38CTRL, + .volatile_reg = s2mps11_volatile, + .cache_type = REGCACHE_FLAT, +}; + +static const struct regmap_config s2mps13_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = S2MPS13_REG_LDODSCH5, + .volatile_reg = s2mps11_volatile, + .cache_type = REGCACHE_FLAT, +}; + +static const struct regmap_config s2mps14_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = S2MPS14_REG_LDODSCH3, + .volatile_reg = s2mps11_volatile, + .cache_type = REGCACHE_FLAT, +}; + +static const struct regmap_config s2mps15_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = S2MPS15_REG_LDODSCH4, + .volatile_reg = s2mps11_volatile, + .cache_type = REGCACHE_FLAT, +}; + +static const struct regmap_config s2mpu02_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = S2MPU02_REG_DVSDATA, + .volatile_reg = s2mpu02_volatile, + .cache_type = REGCACHE_FLAT, +}; + +static const struct regmap_config s5m8767_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = S5M8767_REG_LDO28CTRL, + .volatile_reg = s2mps11_volatile, + .cache_type = REGCACHE_FLAT, +}; + +static int sec_pmic_i2c_probe(struct i2c_client *client) +{ + const struct regmap_config *regmap; + unsigned long device_type; + struct regmap *regmap_pmic; + int ret; + + device_type = (unsigned long)of_device_get_match_data(&client->dev); + + switch (device_type) { + case S2MPA01: + regmap = &s2mpa01_regmap_config; + break; + case S2MPS11X: + regmap = &s2mps11_regmap_config; + break; + case S2MPS13X: + regmap = &s2mps13_regmap_config; + break; + case S2MPS14X: + regmap = &s2mps14_regmap_config; + break; + case S2MPS15X: + regmap = &s2mps15_regmap_config; + break; + case S5M8767X: + regmap = &s5m8767_regmap_config; + break; + case S2MPU02: + regmap = &s2mpu02_regmap_config; + break; + default: + regmap = &sec_regmap_config; + break; + } + + regmap_pmic = devm_regmap_init_i2c(client, regmap); + if (IS_ERR(regmap_pmic)) { + ret = PTR_ERR(regmap_pmic); + dev_err(&client->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + return sec_pmic_probe(&client->dev, device_type, client->irq, + regmap_pmic, client); +} + +static void sec_pmic_i2c_shutdown(struct i2c_client *i2c) +{ + sec_pmic_shutdown(&i2c->dev); +} + +static const struct of_device_id sec_pmic_i2c_of_match[] = { + { + .compatible = "samsung,s5m8767-pmic", + .data = (void *)S5M8767X, + }, { + .compatible = "samsung,s2dos05", + .data = (void *)S2DOS05, + }, { + .compatible = "samsung,s2mps11-pmic", + .data = (void *)S2MPS11X, + }, { + .compatible = "samsung,s2mps13-pmic", + .data = (void *)S2MPS13X, + }, { + .compatible = "samsung,s2mps14-pmic", + .data = (void *)S2MPS14X, + }, { + .compatible = "samsung,s2mps15-pmic", + .data = (void *)S2MPS15X, + }, { + .compatible = "samsung,s2mpa01-pmic", + .data = (void *)S2MPA01, + }, { + .compatible = "samsung,s2mpu02-pmic", + .data = (void *)S2MPU02, + }, { + .compatible = "samsung,s2mpu05-pmic", + .data = (void *)S2MPU05, + }, + { }, +}; +MODULE_DEVICE_TABLE(of, sec_pmic_i2c_of_match); + +static struct i2c_driver sec_pmic_i2c_driver = { + .driver = { + .name = "sec-pmic-i2c", + .pm = pm_sleep_ptr(&sec_pmic_pm_ops), + .of_match_table = sec_pmic_i2c_of_match, + }, + .probe = sec_pmic_i2c_probe, + .shutdown = sec_pmic_i2c_shutdown, +}; +module_i2c_driver(sec_pmic_i2c_driver); + +MODULE_AUTHOR("Sangbeom Kim "); +MODULE_DESCRIPTION("I2C driver for the Samsung S5M"); +MODULE_LICENSE("GPL"); From patchwork Thu Apr 3 08:59:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037463 Received: from mail-ed1-f43.google.com (mail-ed1-f43.google.com [209.85.208.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B56032451F3 for ; Thu, 3 Apr 2025 08:59:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670755; cv=none; b=cSJMo1kjCPlingZs54y65495yMhZ3fynbnOPBd7cdGmvIvU8CpSG1sERVMT4Y13U5UMM3ZXm0h1+Jx6TJBspWncY7WUr1WWDnHTQ3YmjkpcJAHUSSpeSakRc4y7gcz2KgBABBhn4b+D1S3WGgDzA73YALv2HaU8rJnwdCN9GQ/w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670755; c=relaxed/simple; bh=XYzKG9kSJwEZyEFBaa878iL2Fpju+KXHg1qE+X8xtAc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=k1qB/Ej5HQUfbL7Ny/fs8NaAlYp+U0uB8D9p7Z/DrdZynrcEBDvnbMI9AmvGVf+ZkTJmWgrU6KmVED9B1YKZSC67YSIuHMx4yjJa6+Vyo3EueT+O2sRLPUh+VLLB7Qv2nmJ+skuhyP+1OA1u6Rn/dm5pTc18TOpQ7go+eto9htM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=Q/3N7srh; arc=none smtp.client-ip=209.85.208.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Q/3N7srh" Received: by mail-ed1-f43.google.com with SMTP id 4fb4d7f45d1cf-5efe8d9ebdfso1351918a12.3 for ; Thu, 03 Apr 2025 01:59:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670746; x=1744275546; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=elOl/wLMPgL3DZlYsdlY03ep4x0voi0eoNQ32X8daa0=; b=Q/3N7srh6uihry1fhC/rU1OlBjsxMZrIx2ZrYr0xQJCM9ACWNud6SHe7kV5DbO/EFl Krxfg709lhd4//gQMAhehv9zemlMnZrmm58SkCAX/Ak8hVB9yjmlHWFYKLkz3X+zAWDv zTo/mAw5OXPGP+671P0qtUHMdBWvxVw+/lov2BNiO/69aorvow/eFHb48sOySxRVFOHX Fp3omh6ER/ebwOaYCHLXp0oCSyo6pYp5tAO1ajFyuEd7x0KJEyZsx2B7dQ4upDGtE/8L Lo+j9uztOl7zTaPVAUsa1C31iLaNfwHeA3mHhkehIKsfJ5dV3SpwoqGDNdQ7dn/KlU5p Izkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670746; x=1744275546; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=elOl/wLMPgL3DZlYsdlY03ep4x0voi0eoNQ32X8daa0=; b=iH+5eSSWf+lkz5P6bXjZyAJ7TUw2xWvRdZ8LX/Q3a5ptBKBDqZsT/V30/h7jYYZ/iu yeF80GYunEVrPa53taErKdGVTGbmOGz6tYchoglr4uPP+eRFobQ+3sCvbUX7tsa9hmGG M1tFkkgHL1Pvj56GTHsx/67Rb2TpmSI6HXH5Ui5DL+yIrMv2qdpeby0UkeyUeP92Z07y JVCZvqZJ4dNfInPy8s5lpYdgVkaHPVKEwgMgKVuGVWbBV+j1RYeZ8DoChY4gePZVxeXo PleqTUmw2OwUGEnRYQ4IfJaSjN7xOWAaX4qPwYscCSwqR9Vwc4lLuPexBjEE8ZMQgmRv Lbvw== X-Forwarded-Encrypted: i=1; AJvYcCUmslZLciDkrzRjmjnYvJhBNYj1Wn3bdb04OSN0E4XWDCVDAjbsW07hGbueetwdt3R6H23zwcCm7teyrfLO1ukKHQ==@vger.kernel.org X-Gm-Message-State: AOJu0YxyQ8TL80qHbyQG9CxJxLGyo8uBf87DRzLcAOMWBn/ue8QiowBH EaKcg8GeuREGKnHL89iVw6qbMCICe+0ip0vD3zpG0b6F9gtjPPnj73ZVgRKKdog= X-Gm-Gg: ASbGnctqR965NSIAiDW9iB1iawBuuPp0TbCw1mlBAwu82yq7gxA1iKn6js9bQNKNGwA 0ZcFrFZyIq3lDOygJAmRwy/1k1DNHFfYx0Q0flDTPW/X6Hkao+OD5iTyyfwz4ybiiGgVDOzR1r0 LJmnx7JoE3sComvj4khN+EpP5AeM0NOvJ0x+rLFw/6yjsSv7XLgeNNnUwokCVGYXQmrFlU+FoNf ifV+VL0Ic7CdXM1HxcB3dd+h8uZrnOrQUJV1zZ9aoOZcuVApWM5Tt66+7zkerDTTwa/oyqHTsOq x9FU85WLUb60I5HbcvYXC6jyC9MHVOt0bk+DjZR4JIUJk4CyiAGmO+2gEqMoBSfTSwP3S7kP0kA M5AnWxnGF43wKNl8TYeqjvjadcqXN X-Google-Smtp-Source: AGHT+IF9LFK4LpyO+Q2gN6q8SgOcJEijpKwKmwc+jxa/vfcOPhuUPVDkP9h3kKlIkIP8I+d/46mIhA== X-Received: by 2002:a05:6402:4013:b0:5ed:1262:c607 with SMTP id 4fb4d7f45d1cf-5f0872464dbmr1554683a12.31.1743670745580; Thu, 03 Apr 2025 01:59:05 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:04 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:01 +0100 Subject: [PATCH v3 09/32] mfd: sec: add support for S2MPG10 PMIC Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-9-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Add support for Samsung's S2MPG10 PMIC, which is a Power Management IC for mobile applications with buck converters, various LDOs, power meters, RTC, clock outputs, and additional GPIOs interfaces. Contrary to existing Samsung S2M series PMICs supported, communication is not via I2C, but via the Samsung ACPM firmware. This commit adds the core driver. Signed-off-by: André Draszik --- Checkpatch suggests to update MAINTAINERS, but the new file is covered already due to using a wildcard. v3: * use an enum for struct sec_acpm_bus_context::type * consistent name space for all functions sec_pmic_acpm_... to be similar to i2c and consistent in this file v2: * update to using devm_acpm_get_by_node() instead of devm_acpm_get_by_phandle() as this is now expected to be a child of the ACPM node * use c-type file header * updates to error messages * drop s2mpg10_rtc_wr_table as everything in RTC is writeable * rename s2mpg10_volatile_registers -> s2mpg10_rtc_volatile_registers * fix incorrect regmap range in common block * add comments to regmap ranges * add all registers to header for all IP blocks --- drivers/mfd/Kconfig | 17 ++ drivers/mfd/Makefile | 1 + drivers/mfd/sec-acpm.c | 465 ++++++++++++++++++++++++++++++++++++ drivers/mfd/sec-core.c | 16 ++ drivers/mfd/sec-irq.c | 68 ++++++ include/linux/mfd/samsung/core.h | 1 + include/linux/mfd/samsung/irq.h | 103 ++++++++ include/linux/mfd/samsung/rtc.h | 37 +++ include/linux/mfd/samsung/s2mpg10.h | 454 +++++++++++++++++++++++++++++++++++ 9 files changed, 1162 insertions(+) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 62565dc89ec6d58611bbc1f31c65f757343b6453..e146b28240e731557f34ebe6dea99016b6d19f6b 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1296,6 +1296,23 @@ config MFD_SEC_CORE select MFD_CORE select REGMAP_IRQ +config MFD_SEC_ACPM + tristate "Samsung Electronics S2MPG1x PMICs" + depends on EXYNOS_ACPM_PROTOCOL + depends on OF + select MFD_SEC_CORE + help + Support for the Samsung Electronics PMICs with ACPM interface. + This is a Power Management IC for mobile applications with buck + converters, various LDOs, power meters, RTC, clock outputs, and + additional GPIOs interfaces. + This driver provides common support for accessing the device; + additional drivers must be enabled in order to use the functionality + of the device. + + To compile this driver as a module, choose M here: the module will be + called sec-acpm. + config MFD_SEC_I2C tristate "Samsung Electronics S2MPA/S2MPS1X/S2MPU/S5M series PMICs" depends on I2C=y diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index ab6c4b17a391946d4c88f52ccbfee5424b4fb2d2..b617782eca436e34084a9cd24c309801c5680390 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -229,6 +229,7 @@ obj-$(CONFIG_MFD_RK8XX_I2C) += rk8xx-i2c.o obj-$(CONFIG_MFD_RK8XX_SPI) += rk8xx-spi.o obj-$(CONFIG_MFD_RN5T618) += rn5t618.o obj-$(CONFIG_MFD_SEC_CORE) += sec-core.o sec-irq.o +obj-$(CONFIG_MFD_SEC_ACPM) += sec-acpm.o obj-$(CONFIG_MFD_SEC_I2C) += sec-i2c.o obj-$(CONFIG_MFD_SYSCON) += syscon.o obj-$(CONFIG_MFD_LM3533) += lm3533-core.o lm3533-ctrlbank.o diff --git a/drivers/mfd/sec-acpm.c b/drivers/mfd/sec-acpm.c new file mode 100644 index 0000000000000000000000000000000000000000..39dbb968086ac835b96ed3e4efa68868fda63429 --- /dev/null +++ b/drivers/mfd/sec-acpm.c @@ -0,0 +1,465 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright 2020 Google Inc + * Copyright 2025 Linaro Ltd. + * + * Samsung S2MPG1x ACPM driver + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "sec-core.h" + +#define ACPM_MAX_BULK_DATA 8 + +struct sec_pmic_acpm_platform_data { + int device_type; + + unsigned int acpm_chan_id; + u8 speedy_channel; + + const struct regmap_config *regmap_cfg_common; + const struct regmap_config *regmap_cfg_pmic; + const struct regmap_config *regmap_cfg_rtc; + const struct regmap_config *regmap_cfg_meter; +}; + +static const struct regmap_range s2mpg10_common_registers[] = { + regmap_reg_range(0x00, 0x02), /* CHIP_ID_M, INT, INT_MASK */ + regmap_reg_range(0x0a, 0x0c), /* speedy control */ + regmap_reg_range(0x1a, 0x2a), /* debug */ +}; + +static const struct regmap_range s2mpg10_common_ro_registers[] = { + regmap_reg_range(0x00, 0x01), + regmap_reg_range(0x28, 0x2a), +}; + +static const struct regmap_range s2mpg10_common_nonvolatile_registers[] = { + regmap_reg_range(0x00, 0x00), + regmap_reg_range(0x02, 0x02), + regmap_reg_range(0x0a, 0x0c), +}; + +static const struct regmap_range s2mpg10_common_precious_registers[] = { + regmap_reg_range(0x01, 0x01), +}; + +static const struct regmap_access_table s2mpg10_common_wr_table = { + .yes_ranges = s2mpg10_common_registers, + .n_yes_ranges = ARRAY_SIZE(s2mpg10_common_registers), + .no_ranges = s2mpg10_common_ro_registers, + .n_no_ranges = ARRAY_SIZE(s2mpg10_common_ro_registers), +}; + +static const struct regmap_access_table s2mpg10_common_rd_table = { + .yes_ranges = s2mpg10_common_registers, + .n_yes_ranges = ARRAY_SIZE(s2mpg10_common_registers), +}; + +static const struct regmap_access_table s2mpg10_common_volatile_table = { + .no_ranges = s2mpg10_common_nonvolatile_registers, + .n_no_ranges = ARRAY_SIZE(s2mpg10_common_nonvolatile_registers), +}; + +static const struct regmap_access_table s2mpg10_common_precious_table = { + .yes_ranges = s2mpg10_common_precious_registers, + .n_yes_ranges = ARRAY_SIZE(s2mpg10_common_precious_registers), +}; + +static const struct regmap_config s2mpg10_regmap_config_common = { + .name = "common", + .reg_bits = 8, + .val_bits = 8, + .max_register = S2MPG10_COMMON_SPD_DEBUG4, + .wr_table = &s2mpg10_common_wr_table, + .rd_table = &s2mpg10_common_rd_table, + .volatile_table = &s2mpg10_common_volatile_table, + .precious_table = &s2mpg10_common_precious_table, + .num_reg_defaults_raw = S2MPG10_COMMON_SPD_DEBUG4 + 1, + .cache_type = REGCACHE_FLAT, +}; + +static const struct regmap_range s2mpg10_pmic_registers[] = { + regmap_reg_range(0x00, 0xf6), +}; + +static const struct regmap_range s2mpg10_pmic_ro_registers[] = { + regmap_reg_range(0x00, 0x05), /* INTx */ + regmap_reg_range(0x0c, 0x0f), /* STATUSx PWRONSRC OFFSRC */ + regmap_reg_range(0xc7, 0xc7), /* GPIO input */ +}; + +static const struct regmap_range s2mpg10_pmic_nonvolatile_registers[] = { + regmap_reg_range(0x06, 0x0b), /* INTxM */ +}; + +static const struct regmap_range s2mpg10_pmic_precious_registers[] = { + regmap_reg_range(0x00, 0x05), /* INTx */ +}; + +static const struct regmap_access_table s2mpg10_pmic_wr_table = { + .yes_ranges = s2mpg10_pmic_registers, + .n_yes_ranges = ARRAY_SIZE(s2mpg10_pmic_registers), + .no_ranges = s2mpg10_pmic_ro_registers, + .n_no_ranges = ARRAY_SIZE(s2mpg10_pmic_ro_registers), +}; + +static const struct regmap_access_table s2mpg10_pmic_rd_table = { + .yes_ranges = s2mpg10_pmic_registers, + .n_yes_ranges = ARRAY_SIZE(s2mpg10_pmic_registers), +}; + +static const struct regmap_access_table s2mpg10_pmic_volatile_table = { + .no_ranges = s2mpg10_pmic_nonvolatile_registers, + .n_no_ranges = ARRAY_SIZE(s2mpg10_pmic_nonvolatile_registers), +}; + +static const struct regmap_access_table s2mpg10_pmic_precious_table = { + .yes_ranges = s2mpg10_pmic_precious_registers, + .n_yes_ranges = ARRAY_SIZE(s2mpg10_pmic_precious_registers), +}; + +static const struct regmap_config s2mpg10_regmap_config_pmic = { + .name = "pmic", + .reg_bits = 8, + .val_bits = 8, + .max_register = S2MPG10_PMIC_LDO_SENSE4, + .wr_table = &s2mpg10_pmic_wr_table, + .rd_table = &s2mpg10_pmic_rd_table, + .volatile_table = &s2mpg10_pmic_volatile_table, + .precious_table = &s2mpg10_pmic_precious_table, + .num_reg_defaults_raw = S2MPG10_PMIC_LDO_SENSE4 + 1, + .cache_type = REGCACHE_FLAT, +}; + +static const struct regmap_range s2mpg10_rtc_registers[] = { + regmap_reg_range(0x00, 0x2b), /* RTC */ +}; + +static const struct regmap_range s2mpg10_rtc_volatile_registers[] = { + regmap_reg_range(0x01, 0x01), /* RTC_UPDATE */ + regmap_reg_range(0x05, 0x0c), /* time / date */ +}; + +static const struct regmap_access_table s2mpg10_rtc_rd_table = { + .yes_ranges = s2mpg10_rtc_registers, + .n_yes_ranges = ARRAY_SIZE(s2mpg10_rtc_registers), +}; + +static const struct regmap_access_table s2mpg10_rtc_volatile_table = { + .yes_ranges = s2mpg10_rtc_volatile_registers, + .n_yes_ranges = ARRAY_SIZE(s2mpg10_rtc_volatile_registers), +}; + +static const struct regmap_config s2mpg10_regmap_config_rtc = { + .name = "rtc", + .reg_bits = 8, + .val_bits = 8, + .reg_stride = 1, + .max_register = S2MPG10_RTC_OSC_CTRL, + .rd_table = &s2mpg10_rtc_rd_table, + .volatile_table = &s2mpg10_rtc_volatile_table, + .num_reg_defaults_raw = S2MPG10_RTC_OSC_CTRL + 1, + .cache_type = REGCACHE_FLAT, +}; + +static const struct regmap_range s2mpg10_meter_registers[] = { + regmap_reg_range(0x00, 0x21), /* meter config */ + regmap_reg_range(0x40, 0x8a), /* meter data */ + regmap_reg_range(0xee, 0xee), /* offset */ + regmap_reg_range(0xf1, 0xf1), /* trim */ +}; + +static const struct regmap_range s2mpg10_meter_ro_registers[] = { + regmap_reg_range(0x40, 0x8a), +}; + +static const struct regmap_access_table s2mpg10_meter_wr_table = { + .yes_ranges = s2mpg10_meter_registers, + .n_yes_ranges = ARRAY_SIZE(s2mpg10_meter_registers), + .no_ranges = s2mpg10_meter_ro_registers, + .n_no_ranges = ARRAY_SIZE(s2mpg10_meter_ro_registers), +}; + +static const struct regmap_access_table s2mpg10_meter_rd_table = { + .yes_ranges = s2mpg10_meter_registers, + .n_yes_ranges = ARRAY_SIZE(s2mpg10_meter_registers), +}; + +static const struct regmap_access_table s2mpg10_meter_volatile_table = { + .yes_ranges = s2mpg10_meter_ro_registers, + .n_yes_ranges = ARRAY_SIZE(s2mpg10_meter_ro_registers), +}; + +static const struct regmap_config s2mpg10_regmap_config_meter = { + .name = "meter", + .reg_bits = 8, + .val_bits = 8, + .reg_stride = 1, + .max_register = S2MPG10_METER_BUCK_METER_TRIM3, + .wr_table = &s2mpg10_meter_wr_table, + .rd_table = &s2mpg10_meter_rd_table, + .volatile_table = &s2mpg10_meter_volatile_table, + .num_reg_defaults_raw = S2MPG10_METER_BUCK_METER_TRIM3 + 1, + .cache_type = REGCACHE_FLAT, +}; + +struct sec_pmic_acpm_shared_bus_context { + const struct acpm_handle *acpm; + unsigned int acpm_chan_id; + u8 speedy_channel; +}; + +enum sec_pmic_acpm_accesstype { + SEC_PMIC_ACPM_ACCESSTYPE_COMMON = 0x00, + SEC_PMIC_ACPM_ACCESSTYPE_PMIC = 0x01, + SEC_PMIC_ACPM_ACCESSTYPE_RTC = 0x02, + SEC_PMIC_ACPM_ACCESSTYPE_METER = 0x0a, + SEC_PMIC_ACPM_ACCESSTYPE_WLWP = 0x0b, + SEC_PMIC_ACPM_ACCESSTYPE_TRIM = 0x0f, +}; + +struct sec_pmic_acpm_bus_context { + struct sec_pmic_acpm_shared_bus_context *shared; + enum sec_pmic_acpm_accesstype type; +}; + +static int sec_pmic_acpm_bus_write(void *context, const void *data, + size_t count) +{ + struct sec_pmic_acpm_bus_context *ctx = context; + const struct acpm_handle *acpm = ctx->shared->acpm; + const struct acpm_pmic_ops *pmic_ops = &acpm->ops.pmic_ops; + u8 reg; + + if (count < 2 || count > (ACPM_MAX_BULK_DATA + 1)) + return -EINVAL; + + reg = *(u8 *)data; + ++data; + --count; + + return pmic_ops->bulk_write(acpm, ctx->shared->acpm_chan_id, + ctx->type, reg, + ctx->shared->speedy_channel, count, data); +} + +static int sec_pmic_acpm_bus_read(void *context, const void *reg_buf, + size_t reg_size, void *val_buf, + size_t val_size) +{ + struct sec_pmic_acpm_bus_context *ctx = context; + const struct acpm_handle *acpm = ctx->shared->acpm; + const struct acpm_pmic_ops *pmic_ops = &acpm->ops.pmic_ops; + u8 reg; + + if (reg_size != 1 || !val_size || val_size > ACPM_MAX_BULK_DATA) + return -EINVAL; + + reg = *(u8 *)reg_buf; + + return pmic_ops->bulk_read(acpm, ctx->shared->acpm_chan_id, + ctx->type, reg, + ctx->shared->speedy_channel, + val_size, val_buf); +} + +static int sec_pmic_acpm_bus_reg_update_bits(void *context, unsigned int reg, + unsigned int mask, + unsigned int val) +{ + struct sec_pmic_acpm_bus_context *ctx = context; + const struct acpm_handle *acpm = ctx->shared->acpm; + const struct acpm_pmic_ops *pmic_ops = &acpm->ops.pmic_ops; + + return pmic_ops->update_reg(acpm, ctx->shared->acpm_chan_id, + ctx->type, reg & 0xff, + ctx->shared->speedy_channel, val, mask); +} + +static const struct regmap_bus sec_pmic_acpm_regmap_bus = { + .write = sec_pmic_acpm_bus_write, + .read = sec_pmic_acpm_bus_read, + .reg_update_bits = sec_pmic_acpm_bus_reg_update_bits, + .max_raw_read = ACPM_MAX_BULK_DATA, + .max_raw_write = ACPM_MAX_BULK_DATA, +}; + +static struct regmap * +sec_pmic_acpm_regmap_init(struct device *dev, + struct sec_pmic_acpm_shared_bus_context *shared_ctx, + enum sec_pmic_acpm_accesstype type, + const struct regmap_config *cfg, bool do_attach) +{ + struct sec_pmic_acpm_bus_context *ctx; + struct regmap *regmap; + + ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return ERR_PTR(-ENOMEM); + + ctx->shared = shared_ctx; + ctx->type = type; + + regmap = devm_regmap_init(dev, &sec_pmic_acpm_regmap_bus, ctx, cfg); + if (IS_ERR(regmap)) + return ERR_PTR(dev_err_probe(dev, PTR_ERR(regmap), + "regmap init (%s) failed\n", + cfg->name)); + + if (do_attach) { + int ret; + + ret = regmap_attach_dev(dev, regmap, cfg); + if (ret) + return ERR_PTR(dev_err_probe(dev, ret, + "regmap attach (%s) failed\n", + cfg->name)); + } + + return regmap; +} + +static void sec_pmic_acpm_mask_common_irqs(void *regmap_common) +{ + regmap_write(regmap_common, S2MPG10_COMMON_INT_MASK, + S2MPG10_COMMON_INT_SRC); +} + +static int sec_pmic_acpm_probe(struct platform_device *pdev) +{ + struct regmap *regmap_common, *regmap_pmic, *regmap; + const struct sec_pmic_acpm_platform_data *pdata; + struct sec_pmic_acpm_shared_bus_context *shared_ctx; + const struct acpm_handle *acpm; + struct device *dev; + int ret, irq; + + dev = &pdev->dev; + + pdata = device_get_match_data(dev); + if (!pdata) + return dev_err_probe(dev, -ENODEV, + "unsupported device type\n"); + + acpm = devm_acpm_get_by_node(dev, pdev->dev.parent->of_node); + if (IS_ERR(acpm)) + return dev_err_probe(dev, PTR_ERR(acpm), + "failed to get acpm (2)\n"); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + shared_ctx = devm_kzalloc(dev, sizeof(*shared_ctx), GFP_KERNEL); + if (!shared_ctx) + return -ENOMEM; + + shared_ctx->acpm = acpm; + shared_ctx->acpm_chan_id = pdata->acpm_chan_id; + shared_ctx->speedy_channel = pdata->speedy_channel; + + regmap_common = sec_pmic_acpm_regmap_init(dev, shared_ctx, + SEC_PMIC_ACPM_ACCESSTYPE_COMMON, + pdata->regmap_cfg_common, false); + if (IS_ERR(regmap_common)) + return PTR_ERR(regmap_common); + + /* Mask all interrupts from 'common' block, until successful init */ + ret = regmap_write(regmap_common, S2MPG10_COMMON_INT_MASK, + S2MPG10_COMMON_INT_SRC); + if (ret) + return dev_err_probe(dev, ret, + "failed to mask common block interrupts\n"); + + regmap_pmic = sec_pmic_acpm_regmap_init(dev, shared_ctx, + SEC_PMIC_ACPM_ACCESSTYPE_PMIC, + pdata->regmap_cfg_pmic, false); + if (IS_ERR(regmap_pmic)) + return PTR_ERR(regmap_pmic); + + regmap = sec_pmic_acpm_regmap_init(dev, shared_ctx, + SEC_PMIC_ACPM_ACCESSTYPE_RTC, + pdata->regmap_cfg_rtc, true); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + regmap = sec_pmic_acpm_regmap_init(dev, shared_ctx, + SEC_PMIC_ACPM_ACCESSTYPE_METER, + pdata->regmap_cfg_meter, true); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + ret = sec_pmic_probe(dev, pdata->device_type, irq, regmap_pmic, NULL); + if (ret) + return ret; + + if (device_property_read_bool(dev, "wakeup-source")) + devm_device_init_wakeup(dev); + + /* + * Unmask PMIC interrupt from 'common' block, now that everything is in + * place. + */ + ret = regmap_clear_bits(regmap_common, S2MPG10_COMMON_INT_MASK, + S2MPG10_COMMON_INT_SRC_PMIC); + if (ret) + return dev_err_probe(dev, ret, + "failed to unmask PMIC interrupt\n"); + + /* Mask all interrupts from 'common' block on shutdown */ + ret = devm_add_action_or_reset(dev, sec_pmic_acpm_mask_common_irqs, + regmap_common); + if (ret) + return ret; + + return 0; +} + +static void sec_pmic_acpm_shutdown(struct platform_device *pdev) +{ + sec_pmic_shutdown(&pdev->dev); +} + +static const struct sec_pmic_acpm_platform_data s2mpg10_data = { + .device_type = S2MPG10, + .acpm_chan_id = 2, + .speedy_channel = 0, + .regmap_cfg_common = &s2mpg10_regmap_config_common, + .regmap_cfg_pmic = &s2mpg10_regmap_config_pmic, + .regmap_cfg_rtc = &s2mpg10_regmap_config_rtc, + .regmap_cfg_meter = &s2mpg10_regmap_config_meter, +}; + +static const struct of_device_id sec_pmic_acpm_of_match[] = { + { .compatible = "samsung,s2mpg10-pmic", .data = &s2mpg10_data, }, + { }, +}; +MODULE_DEVICE_TABLE(of, sec_pmic_acpm_of_match); + +static struct platform_driver sec_pmic_acpm_driver = { + .driver = { + .name = "sec-pmic-acpm", + .pm = pm_sleep_ptr(&sec_pmic_pm_ops), + .of_match_table = sec_pmic_acpm_of_match, + }, + .probe = sec_pmic_acpm_probe, + .shutdown = sec_pmic_acpm_shutdown, +}; +module_platform_driver(sec_pmic_acpm_driver); + +MODULE_AUTHOR("André Draszik "); +MODULE_DESCRIPTION("ACPM driver for the Samsung S2MPG1x"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c index bb664e052bf5198f2fc83a86bd6e1e72364fb8df..c4b7abe511090d8f5ff2eb501f325cc8173b9bf5 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-core.c @@ -36,6 +36,14 @@ static const struct mfd_cell s2dos05_devs[] = { { .name = "s2dos05-regulator", }, }; +static const struct mfd_cell s2mpg10_devs[] = { + MFD_CELL_NAME("s2mpg10-meter"), + MFD_CELL_NAME("s2mpg10-regulator"), + MFD_CELL_NAME("s2mpg10-rtc"), + MFD_CELL_OF("s2mpg10-clk", NULL, NULL, 0, 0, "samsung,s2mpg10-clk"), + MFD_CELL_OF("s2mpg10-gpio", NULL, NULL, 0, 0, "samsung,s2mpg10-gpio"), +}; + static const struct mfd_cell s2mps11_devs[] = { { .name = "s2mps11-regulator", }, { .name = "s2mps14-rtc", }, @@ -90,6 +98,10 @@ static void sec_pmic_dump_rev(struct sec_pmic_dev *sec_pmic) { unsigned int val; + /* For s2mpg1x, the revision is in a different regmap */ + if (sec_pmic->device_type == S2MPG10) + return; + /* For each device type, the REG_ID is always the first register */ if (!regmap_read(sec_pmic->regmap_pmic, S2MPS11_REG_ID, &val)) dev_dbg(sec_pmic->dev, "Revision: 0x%x\n", val); @@ -188,6 +200,10 @@ int sec_pmic_probe(struct device *dev, unsigned long device_type, sec_devs = s2mpa01_devs; num_sec_devs = ARRAY_SIZE(s2mpa01_devs); break; + case S2MPG10: + sec_devs = s2mpg10_devs; + num_sec_devs = ARRAY_SIZE(s2mpg10_devs); + break; case S2MPS11X: sec_devs = s2mps11_devs; num_sec_devs = ARRAY_SIZE(s2mps11_devs); diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 4d49bb42bd0d109263f485c8b58e88cdd8d598d9..bf86281401ac6ff05c90c2d71c84744709ed79cb 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -20,6 +21,60 @@ #include #include "sec-core.h" +static const struct regmap_irq s2mpg10_irqs[] = { + REGMAP_IRQ_REG(S2MPG10_IRQ_PWRONF, 0, S2MPG10_IRQ_PWRONF_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWRONR, 0, S2MPG10_IRQ_PWRONR_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_JIGONBF, 0, S2MPG10_IRQ_JIGONBF_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_JIGONBR, 0, S2MPG10_IRQ_JIGONBR_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_ACOKBF, 0, S2MPG10_IRQ_ACOKBF_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_ACOKBR, 0, S2MPG10_IRQ_ACOKBR_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWRON1S, 0, S2MPG10_IRQ_PWRON1S_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_MRB, 0, S2MPG10_IRQ_MRB_MASK), + + REGMAP_IRQ_REG(S2MPG10_IRQ_RTC60S, 1, S2MPG10_IRQ_RTC60S_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_RTCA1, 1, S2MPG10_IRQ_RTCA1_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_RTCA0, 1, S2MPG10_IRQ_RTCA0_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_RTC1S, 1, S2MPG10_IRQ_RTC1S_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_WTSR_COLDRST, 1, S2MPG10_IRQ_WTSR_COLDRST_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_WTSR, 1, S2MPG10_IRQ_WTSR_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_WRST, 1, S2MPG10_IRQ_WRST_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_SMPL, 1, S2MPG10_IRQ_SMPL_MASK), + + REGMAP_IRQ_REG(S2MPG10_IRQ_120C, 2, S2MPG10_IRQ_INT120C_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_140C, 2, S2MPG10_IRQ_INT140C_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_TSD, 2, S2MPG10_IRQ_TSD_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PIF_TIMEOUT1, 2, S2MPG10_IRQ_PIF_TIMEOUT1_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PIF_TIMEOUT2, 2, S2MPG10_IRQ_PIF_TIMEOUT2_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_SPD_PARITY_ERR, 2, S2MPG10_IRQ_SPD_PARITY_ERR_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_SPD_ABNORMAL_STOP, 2, S2MPG10_IRQ_SPD_ABNORMAL_STOP_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PMETER_OVERF, 2, S2MPG10_IRQ_PMETER_OVERF_MASK), + + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B1M, 3, S2MPG10_IRQ_OCP_B1M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B2M, 3, S2MPG10_IRQ_OCP_B2M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B3M, 3, S2MPG10_IRQ_OCP_B3M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B4M, 3, S2MPG10_IRQ_OCP_B4M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B5M, 3, S2MPG10_IRQ_OCP_B5M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B6M, 3, S2MPG10_IRQ_OCP_B6M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B7M, 3, S2MPG10_IRQ_OCP_B7M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B8M, 3, S2MPG10_IRQ_OCP_B8M_MASK), + + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B9M, 4, S2MPG10_IRQ_OCP_B9M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B10M, 4, S2MPG10_IRQ_OCP_B10M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_WLWP_ACC, 4, S2MPG10_IRQ_WLWP_ACC_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_SMPL_TIMEOUT, 4, S2MPG10_IRQ_SMPL_TIMEOUT_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_WTSR_TIMEOUT, 4, S2MPG10_IRQ_WTSR_TIMEOUT_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_SPD_SRP_PKT_RST, 4, S2MPG10_IRQ_SPD_SRP_PKT_RST_MASK), + + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH0, 5, S2MPG10_IRQ_PWR_WARN_CH0_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH1, 5, S2MPG10_IRQ_PWR_WARN_CH1_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH2, 5, S2MPG10_IRQ_PWR_WARN_CH2_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH3, 5, S2MPG10_IRQ_PWR_WARN_CH3_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH4, 5, S2MPG10_IRQ_PWR_WARN_CH4_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH5, 5, S2MPG10_IRQ_PWR_WARN_CH5_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH6, 5, S2MPG10_IRQ_PWR_WARN_CH6_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH7, 5, S2MPG10_IRQ_PWR_WARN_CH7_MASK), +}; + static const struct regmap_irq s2mps11_irqs[] = { [S2MPS11_IRQ_PWRONF] = { .reg_offset = 0, @@ -320,6 +375,16 @@ static const struct regmap_irq s5m8767_irqs[] = { }, }; +static const struct regmap_irq_chip s2mpg10_irq_chip = { + .name = "s2mpg10", + .irqs = s2mpg10_irqs, + .num_irqs = ARRAY_SIZE(s2mpg10_irqs), + .num_regs = 6, + .status_base = S2MPG10_PMIC_INT1, + .mask_base = S2MPG10_PMIC_INT1M, + /* all interrupt sources are read-to-clear */ +}; + static const struct regmap_irq_chip s2mps11_irq_chip = { .name = "s2mps11", .irqs = s2mps11_irqs, @@ -402,6 +467,9 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) case S2MPA01: sec_irq_chip = &s2mps14_irq_chip; break; + case S2MPG10: + sec_irq_chip = &s2mpg10_irq_chip; + break; case S2MPS11X: sec_irq_chip = &s2mps11_irq_chip; break; diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h index 8a4e660854bbc955b812b4d61d4a52a0fc2f2899..c1102324172a9b6bd6072b5929a4866d6c9653fa 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h @@ -39,6 +39,7 @@ enum sec_device_type { S5M8767X, S2DOS05, S2MPA01, + S2MPG10, S2MPS11X, S2MPS13X, S2MPS14X, diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/irq.h index 978f7af66f74842c4f8dd62c0f58a7a45aba7c34..b4805cbd949bd605004bd88cf361109d1cbbc3bf 100644 --- a/include/linux/mfd/samsung/irq.h +++ b/include/linux/mfd/samsung/irq.h @@ -57,6 +57,109 @@ enum s2mpa01_irq { #define S2MPA01_IRQ_B24_TSD_MASK (1 << 4) #define S2MPA01_IRQ_B35_TSD_MASK (1 << 5) +enum s2mpg10_irq { + /* PMIC */ + S2MPG10_IRQ_PWRONF, + S2MPG10_IRQ_PWRONR, + S2MPG10_IRQ_JIGONBF, + S2MPG10_IRQ_JIGONBR, + S2MPG10_IRQ_ACOKBF, + S2MPG10_IRQ_ACOKBR, + S2MPG10_IRQ_PWRON1S, + S2MPG10_IRQ_MRB, +#define S2MPG10_IRQ_PWRONF_MASK BIT(0) +#define S2MPG10_IRQ_PWRONR_MASK BIT(1) +#define S2MPG10_IRQ_JIGONBF_MASK BIT(2) +#define S2MPG10_IRQ_JIGONBR_MASK BIT(3) +#define S2MPG10_IRQ_ACOKBF_MASK BIT(4) +#define S2MPG10_IRQ_ACOKBR_MASK BIT(5) +#define S2MPG10_IRQ_PWRON1S_MASK BIT(6) +#define S2MPG10_IRQ_MRB_MASK BIT(7) + + S2MPG10_IRQ_RTC60S, + S2MPG10_IRQ_RTCA1, + S2MPG10_IRQ_RTCA0, + S2MPG10_IRQ_RTC1S, + S2MPG10_IRQ_WTSR_COLDRST, + S2MPG10_IRQ_WTSR, + S2MPG10_IRQ_WRST, + S2MPG10_IRQ_SMPL, +#define S2MPG10_IRQ_RTC60S_MASK BIT(0) +#define S2MPG10_IRQ_RTCA1_MASK BIT(1) +#define S2MPG10_IRQ_RTCA0_MASK BIT(2) +#define S2MPG10_IRQ_RTC1S_MASK BIT(3) +#define S2MPG10_IRQ_WTSR_COLDRST_MASK BIT(4) +#define S2MPG10_IRQ_WTSR_MASK BIT(5) +#define S2MPG10_IRQ_WRST_MASK BIT(6) +#define S2MPG10_IRQ_SMPL_MASK BIT(7) + + S2MPG10_IRQ_120C, + S2MPG10_IRQ_140C, + S2MPG10_IRQ_TSD, + S2MPG10_IRQ_PIF_TIMEOUT1, + S2MPG10_IRQ_PIF_TIMEOUT2, + S2MPG10_IRQ_SPD_PARITY_ERR, + S2MPG10_IRQ_SPD_ABNORMAL_STOP, + S2MPG10_IRQ_PMETER_OVERF, +#define S2MPG10_IRQ_INT120C_MASK BIT(0) +#define S2MPG10_IRQ_INT140C_MASK BIT(1) +#define S2MPG10_IRQ_TSD_MASK BIT(2) +#define S2MPG10_IRQ_PIF_TIMEOUT1_MASK BIT(3) +#define S2MPG10_IRQ_PIF_TIMEOUT2_MASK BIT(4) +#define S2MPG10_IRQ_SPD_PARITY_ERR_MASK BIT(5) +#define S2MPG10_IRQ_SPD_ABNORMAL_STOP_MASK BIT(6) +#define S2MPG10_IRQ_PMETER_OVERF_MASK BIT(7) + + S2MPG10_IRQ_OCP_B1M, + S2MPG10_IRQ_OCP_B2M, + S2MPG10_IRQ_OCP_B3M, + S2MPG10_IRQ_OCP_B4M, + S2MPG10_IRQ_OCP_B5M, + S2MPG10_IRQ_OCP_B6M, + S2MPG10_IRQ_OCP_B7M, + S2MPG10_IRQ_OCP_B8M, +#define S2MPG10_IRQ_OCP_B1M_MASK BIT(0) +#define S2MPG10_IRQ_OCP_B2M_MASK BIT(1) +#define S2MPG10_IRQ_OCP_B3M_MASK BIT(2) +#define S2MPG10_IRQ_OCP_B4M_MASK BIT(3) +#define S2MPG10_IRQ_OCP_B5M_MASK BIT(4) +#define S2MPG10_IRQ_OCP_B6M_MASK BIT(5) +#define S2MPG10_IRQ_OCP_B7M_MASK BIT(6) +#define S2MPG10_IRQ_OCP_B8M_MASK BIT(7) + + S2MPG10_IRQ_OCP_B9M, + S2MPG10_IRQ_OCP_B10M, + S2MPG10_IRQ_WLWP_ACC, + S2MPG10_IRQ_SMPL_TIMEOUT, + S2MPG10_IRQ_WTSR_TIMEOUT, + S2MPG10_IRQ_SPD_SRP_PKT_RST, +#define S2MPG10_IRQ_OCP_B9M_MASK BIT(0) +#define S2MPG10_IRQ_OCP_B10M_MASK BIT(1) +#define S2MPG10_IRQ_WLWP_ACC_MASK BIT(2) +#define S2MPG10_IRQ_SMPL_TIMEOUT_MASK BIT(5) +#define S2MPG10_IRQ_WTSR_TIMEOUT_MASK BIT(6) +#define S2MPG10_IRQ_SPD_SRP_PKT_RST_MASK BIT(7) + + S2MPG10_IRQ_PWR_WARN_CH0, + S2MPG10_IRQ_PWR_WARN_CH1, + S2MPG10_IRQ_PWR_WARN_CH2, + S2MPG10_IRQ_PWR_WARN_CH3, + S2MPG10_IRQ_PWR_WARN_CH4, + S2MPG10_IRQ_PWR_WARN_CH5, + S2MPG10_IRQ_PWR_WARN_CH6, + S2MPG10_IRQ_PWR_WARN_CH7, +#define S2MPG10_IRQ_PWR_WARN_CH0_MASK BIT(0) +#define S2MPG10_IRQ_PWR_WARN_CH1_MASK BIT(1) +#define S2MPG10_IRQ_PWR_WARN_CH2_MASK BIT(2) +#define S2MPG10_IRQ_PWR_WARN_CH3_MASK BIT(3) +#define S2MPG10_IRQ_PWR_WARN_CH4_MASK BIT(4) +#define S2MPG10_IRQ_PWR_WARN_CH5_MASK BIT(5) +#define S2MPG10_IRQ_PWR_WARN_CH6_MASK BIT(6) +#define S2MPG10_IRQ_PWR_WARN_CH7_MASK BIT(7) + + S2MPG10_IRQ_NR, +}; + enum s2mps11_irq { S2MPS11_IRQ_PWRONF, S2MPS11_IRQ_PWRONR, diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/rtc.h index 0204decfc9aacbf4bc93d98a256f1d956bbcd19c..51c4239a1fa6f28155711a0756b0e071b010d848 100644 --- a/include/linux/mfd/samsung/rtc.h +++ b/include/linux/mfd/samsung/rtc.h @@ -72,6 +72,37 @@ enum s2mps_rtc_reg { S2MPS_RTC_REG_MAX, }; +enum s2mpg10_rtc_reg { + S2MPG10_RTC_CTRL, + S2MPG10_RTC_UPDATE, + S2MPG10_RTC_SMPL, + S2MPG10_RTC_WTSR, + S2MPG10_RTC_CAP_SEL, + S2MPG10_RTC_MSEC, + S2MPG10_RTC_SEC, + S2MPG10_RTC_MIN, + S2MPG10_RTC_HOUR, + S2MPG10_RTC_WEEK, + S2MPG10_RTC_DAY, + S2MPG10_RTC_MON, + S2MPG10_RTC_YEAR, + S2MPG10_RTC_A0SEC, + S2MPG10_RTC_A0MIN, + S2MPG10_RTC_A0HOUR, + S2MPG10_RTC_A0WEEK, + S2MPG10_RTC_A0DAY, + S2MPG10_RTC_A0MON, + S2MPG10_RTC_A0YEAR, + S2MPG10_RTC_A1SEC, + S2MPG10_RTC_A1MIN, + S2MPG10_RTC_A1HOUR, + S2MPG10_RTC_A1WEEK, + S2MPG10_RTC_A1DAY, + S2MPG10_RTC_A1MON, + S2MPG10_RTC_A1YEAR, + S2MPG10_RTC_OSC_CTRL, +}; + #define RTC_I2C_ADDR (0x0C >> 1) #define HOUR_12 (1 << 7) @@ -124,10 +155,16 @@ enum s2mps_rtc_reg { #define ALARM_ENABLE_SHIFT 7 #define ALARM_ENABLE_MASK (1 << ALARM_ENABLE_SHIFT) +/* WTSR & SMPL registers */ #define SMPL_ENABLE_SHIFT 7 #define SMPL_ENABLE_MASK (1 << SMPL_ENABLE_SHIFT) #define WTSR_ENABLE_SHIFT 6 #define WTSR_ENABLE_MASK (1 << WTSR_ENABLE_SHIFT) +#define S2MPG10_WTSR_COLDTIMER GENMASK(6, 5) +#define S2MPG10_WTSR_COLDRST BIT(4) +#define S2MPG10_WTSR_WTSRT GENMASK(3, 1) +#define S2MPG10_WTSR_WTSR_EN BIT(0) + #endif /* __LINUX_MFD_SEC_RTC_H */ diff --git a/include/linux/mfd/samsung/s2mpg10.h b/include/linux/mfd/samsung/s2mpg10.h new file mode 100644 index 0000000000000000000000000000000000000000..778ff16ef6668ded514e8dc7242f369cb9c2d0e6 --- /dev/null +++ b/include/linux/mfd/samsung/s2mpg10.h @@ -0,0 +1,454 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2015 Samsung Electronics + * Copyright 2020 Google Inc + * Copyright 2025 Linaro Ltd. + */ + +#ifndef __LINUX_MFD_S2MPG10_H +#define __LINUX_MFD_S2MPG10_H + +/* Common registers (type 0x000) */ +enum s2mpg10_common_reg { + S2MPG10_COMMON_CHIPID, + S2MPG10_COMMON_INT, + S2MPG10_COMMON_INT_MASK, + S2MPG10_COMMON_SPD_CTRL1 = 0x0a, + S2MPG10_COMMON_SPD_CTRL2, + S2MPG10_COMMON_SPD_CTRL3, + S2MPG10_COMMON_MON1SEL = 0x1a, + S2MPG10_COMMON_MON2SEL, + S2MPG10_COMMON_MONR, + S2MPG10_COMMON_DEBUG_CTRL1, + S2MPG10_COMMON_DEBUG_CTRL2, + S2MPG10_COMMON_DEBUG_CTRL3, + S2MPG10_COMMON_DEBUG_CTRL4, + S2MPG10_COMMON_DEBUG_CTRL5, + S2MPG10_COMMON_DEBUG_CTRL6, + S2MPG10_COMMON_DEBUG_CTRL7, + S2MPG10_COMMON_DEBUG_CTRL8, + S2MPG10_COMMON_TEST_MODE1, + S2MPG10_COMMON_TEST_MODE2, + S2MPG10_COMMON_SPD_DEBUG1, + S2MPG10_COMMON_SPD_DEBUG2, + S2MPG10_COMMON_SPD_DEBUG3, + S2MPG10_COMMON_SPD_DEBUG4, +}; + +/* for S2MPG10_COMMON_INT and S2MPG10_COMMON_INT_MASK */ +#define S2MPG10_COMMON_INT_SRC GENMASK(7, 0) +#define S2MPG10_COMMON_INT_SRC_PMIC BIT(0) + +/* PMIC registers (type 0x100) */ +enum s2mpg10_pmic_reg { + S2MPG10_PMIC_INT1, + S2MPG10_PMIC_INT2, + S2MPG10_PMIC_INT3, + S2MPG10_PMIC_INT4, + S2MPG10_PMIC_INT5, + S2MPG10_PMIC_INT6, + S2MPG10_PMIC_INT1M, + S2MPG10_PMIC_INT2M, + S2MPG10_PMIC_INT3M, + S2MPG10_PMIC_INT4M, + S2MPG10_PMIC_INT5M, + S2MPG10_PMIC_INT6M, + S2MPG10_PMIC_STATUS1, + S2MPG10_PMIC_STATUS2, + S2MPG10_PMIC_PWRONSRC, + S2MPG10_PMIC_OFFSRC, + S2MPG10_PMIC_BU_CHG, + S2MPG10_PMIC_RTCBUF, + S2MPG10_PMIC_COMMON_CTRL1, + S2MPG10_PMIC_COMMON_CTRL2, + S2MPG10_PMIC_COMMON_CTRL3, + S2MPG10_PMIC_COMMON_CTRL4, + S2MPG10_PMIC_SMPL_WARN_CTRL, + S2MPG10_PMIC_MIMICKING_CTRL, + S2MPG10_PMIC_B1M_CTRL, + S2MPG10_PMIC_B1M_OUT1, + S2MPG10_PMIC_B1M_OUT2, + S2MPG10_PMIC_B2M_CTRL, + S2MPG10_PMIC_B2M_OUT1, + S2MPG10_PMIC_B2M_OUT2, + S2MPG10_PMIC_B3M_CTRL, + S2MPG10_PMIC_B3M_OUT1, + S2MPG10_PMIC_B3M_OUT2, + S2MPG10_PMIC_B4M_CTRL, + S2MPG10_PMIC_B4M_OUT1, + S2MPG10_PMIC_B4M_OUT2, + S2MPG10_PMIC_B5M_CTRL, + S2MPG10_PMIC_B5M_OUT1, + S2MPG10_PMIC_B5M_OUT2, + S2MPG10_PMIC_B6M_CTRL, + S2MPG10_PMIC_B6M_OUT1, + S2MPG10_PMIC_B6M_OUT2, + S2MPG10_PMIC_B7M_CTRL, + S2MPG10_PMIC_B7M_OUT1, + S2MPG10_PMIC_B7M_OUT2, + S2MPG10_PMIC_B8M_CTRL, + S2MPG10_PMIC_B8M_OUT1, + S2MPG10_PMIC_B8M_OUT2, + S2MPG10_PMIC_B9M_CTRL, + S2MPG10_PMIC_B9M_OUT1, + S2MPG10_PMIC_B9M_OUT2, + S2MPG10_PMIC_B10M_CTRL, + S2MPG10_PMIC_B10M_OUT1, + S2MPG10_PMIC_B10M_OUT2, + S2MPG10_PMIC_BUCK1M_USONIC, + S2MPG10_PMIC_BUCK2M_USONIC, + S2MPG10_PMIC_BUCK3M_USONIC, + S2MPG10_PMIC_BUCK4M_USONIC, + S2MPG10_PMIC_BUCK5M_USONIC, + S2MPG10_PMIC_BUCK6M_USONIC, + S2MPG10_PMIC_BUCK7M_USONIC, + S2MPG10_PMIC_BUCK8M_USONIC, + S2MPG10_PMIC_BUCK9M_USONIC, + S2MPG10_PMIC_BUCK10M_USONIC, + S2MPG10_PMIC_L1M_CTRL, + S2MPG10_PMIC_L2M_CTRL, + S2MPG10_PMIC_L3M_CTRL, + S2MPG10_PMIC_L4M_CTRL, + S2MPG10_PMIC_L5M_CTRL, + S2MPG10_PMIC_L6M_CTRL, + S2MPG10_PMIC_L7M_CTRL, + S2MPG10_PMIC_L8M_CTRL, + S2MPG10_PMIC_L9M_CTRL, + S2MPG10_PMIC_L10M_CTRL, + S2MPG10_PMIC_L11M_CTRL1, + S2MPG10_PMIC_L11M_CTRL2, + S2MPG10_PMIC_L12M_CTRL1, + S2MPG10_PMIC_L12M_CTRL2, + S2MPG10_PMIC_L13M_CTRL1, + S2MPG10_PMIC_L13M_CTRL2, + S2MPG10_PMIC_L14M_CTRL, + S2MPG10_PMIC_L15M_CTRL1, + S2MPG10_PMIC_L15M_CTRL2, + S2MPG10_PMIC_L16M_CTRL, + S2MPG10_PMIC_L17M_CTRL, + S2MPG10_PMIC_L18M_CTRL, + S2MPG10_PMIC_L19M_CTRL, + S2MPG10_PMIC_L20M_CTRL, + S2MPG10_PMIC_L21M_CTRL, + S2MPG10_PMIC_L22M_CTRL, + S2MPG10_PMIC_L23M_CTRL, + S2MPG10_PMIC_L24M_CTRL, + S2MPG10_PMIC_L25M_CTRL, + S2MPG10_PMIC_L26M_CTRL, + S2MPG10_PMIC_L27M_CTRL, + S2MPG10_PMIC_L28M_CTRL, + S2MPG10_PMIC_L29M_CTRL, + S2MPG10_PMIC_L30M_CTRL, + S2MPG10_PMIC_L31M_CTRL, + S2MPG10_PMIC_LDO_CTRL1, + S2MPG10_PMIC_LDO_CTRL2, + S2MPG10_PMIC_LDO_DSCH1, + S2MPG10_PMIC_LDO_DSCH2, + S2MPG10_PMIC_LDO_DSCH3, + S2MPG10_PMIC_LDO_DSCH4, + S2MPG10_PMIC_LDO_BUCK7M_HLIMIT, + S2MPG10_PMIC_LDO_BUCK7M_LLIMIT, + S2MPG10_PMIC_LDO_LDO21M_HLIMIT, + S2MPG10_PMIC_LDO_LDO21M_LLIMIT, + S2MPG10_PMIC_LDO_LDO11M_HLIMIT, + S2MPG10_PMIC_DVS_RAMP1, + S2MPG10_PMIC_DVS_RAMP2, + S2MPG10_PMIC_DVS_RAMP3, + S2MPG10_PMIC_DVS_RAMP4, + S2MPG10_PMIC_DVS_RAMP5, + S2MPG10_PMIC_DVS_RAMP6, + S2MPG10_PMIC_DVS_SYNC_CTRL1, + S2MPG10_PMIC_DVS_SYNC_CTRL2, + S2MPG10_PMIC_DVS_SYNC_CTRL3, + S2MPG10_PMIC_DVS_SYNC_CTRL4, + S2MPG10_PMIC_DVS_SYNC_CTRL5, + S2MPG10_PMIC_DVS_SYNC_CTRL6, + S2MPG10_PMIC_OFF_CTRL1, + S2MPG10_PMIC_OFF_CTRL2, + S2MPG10_PMIC_OFF_CTRL3, + S2MPG10_PMIC_OFF_CTRL4, + S2MPG10_PMIC_SEQ_CTRL1, + S2MPG10_PMIC_SEQ_CTRL2, + S2MPG10_PMIC_SEQ_CTRL3, + S2MPG10_PMIC_SEQ_CTRL4, + S2MPG10_PMIC_SEQ_CTRL5, + S2MPG10_PMIC_SEQ_CTRL6, + S2MPG10_PMIC_SEQ_CTRL7, + S2MPG10_PMIC_SEQ_CTRL8, + S2MPG10_PMIC_SEQ_CTRL9, + S2MPG10_PMIC_SEQ_CTRL10, + S2MPG10_PMIC_SEQ_CTRL11, + S2MPG10_PMIC_SEQ_CTRL12, + S2MPG10_PMIC_SEQ_CTRL13, + S2MPG10_PMIC_SEQ_CTRL14, + S2MPG10_PMIC_SEQ_CTRL15, + S2MPG10_PMIC_SEQ_CTRL16, + S2MPG10_PMIC_SEQ_CTRL17, + S2MPG10_PMIC_SEQ_CTRL18, + S2MPG10_PMIC_SEQ_CTRL19, + S2MPG10_PMIC_SEQ_CTRL20, + S2MPG10_PMIC_SEQ_CTRL21, + S2MPG10_PMIC_SEQ_CTRL22, + S2MPG10_PMIC_SEQ_CTRL23, + S2MPG10_PMIC_SEQ_CTRL24, + S2MPG10_PMIC_SEQ_CTRL25, + S2MPG10_PMIC_SEQ_CTRL26, + S2MPG10_PMIC_SEQ_CTRL27, + S2MPG10_PMIC_SEQ_CTRL28, + S2MPG10_PMIC_SEQ_CTRL29, + S2MPG10_PMIC_SEQ_CTRL30, + S2MPG10_PMIC_SEQ_CTRL31, + S2MPG10_PMIC_SEQ_CTRL32, + S2MPG10_PMIC_SEQ_CTRL33, + S2MPG10_PMIC_SEQ_CTRL34, + S2MPG10_PMIC_SEQ_CTRL35, + S2MPG10_PMIC_OFF_SEQ_CTRL1, + S2MPG10_PMIC_OFF_SEQ_CTRL2, + S2MPG10_PMIC_OFF_SEQ_CTRL3, + S2MPG10_PMIC_OFF_SEQ_CTRL4, + S2MPG10_PMIC_OFF_SEQ_CTRL5, + S2MPG10_PMIC_OFF_SEQ_CTRL6, + S2MPG10_PMIC_OFF_SEQ_CTRL7, + S2MPG10_PMIC_OFF_SEQ_CTRL8, + S2MPG10_PMIC_OFF_SEQ_CTRL9, + S2MPG10_PMIC_OFF_SEQ_CTRL10, + S2MPG10_PMIC_OFF_SEQ_CTRL11, + S2MPG10_PMIC_OFF_SEQ_CTRL12, + S2MPG10_PMIC_OFF_SEQ_CTRL13, + S2MPG10_PMIC_OFF_SEQ_CTRL14, + S2MPG10_PMIC_OFF_SEQ_CTRL15, + S2MPG10_PMIC_OFF_SEQ_CTRL16, + S2MPG10_PMIC_OFF_SEQ_CTRL17, + S2MPG10_PMIC_OFF_SEQ_CTRL18, + S2MPG10_PMIC_PCTRLSEL1, + S2MPG10_PMIC_PCTRLSEL2, + S2MPG10_PMIC_PCTRLSEL3, + S2MPG10_PMIC_PCTRLSEL4, + S2MPG10_PMIC_PCTRLSEL5, + S2MPG10_PMIC_PCTRLSEL6, + S2MPG10_PMIC_PCTRLSEL7, + S2MPG10_PMIC_PCTRLSEL8, + S2MPG10_PMIC_PCTRLSEL9, + S2MPG10_PMIC_PCTRLSEL10, + S2MPG10_PMIC_PCTRLSEL11, + S2MPG10_PMIC_PCTRLSEL12, + S2MPG10_PMIC_PCTRLSEL13, + S2MPG10_PMIC_DCTRLSEL1, + S2MPG10_PMIC_DCTRLSEL2, + S2MPG10_PMIC_DCTRLSEL3, + S2MPG10_PMIC_DCTRLSEL4, + S2MPG10_PMIC_DCTRLSEL5, + S2MPG10_PMIC_DCTRLSEL6, + S2MPG10_PMIC_DCTRLSEL7, + S2MPG10_PMIC_GPIO_CTRL1, + S2MPG10_PMIC_GPIO_CTRL2, + S2MPG10_PMIC_GPIO_CTRL3, + S2MPG10_PMIC_GPIO_CTRL4, + S2MPG10_PMIC_GPIO_CTRL5, + S2MPG10_PMIC_GPIO_CTRL6, + S2MPG10_PMIC_GPIO_CTRL7, + S2MPG10_PMIC_B2M_OCP_WARN, + S2MPG10_PMIC_B2M_OCP_WARN_X, + S2MPG10_PMIC_B2M_OCP_WARN_Y, + S2MPG10_PMIC_B2M_OCP_WARN_Z, + S2MPG10_PMIC_B3M_OCP_WARN, + S2MPG10_PMIC_B3M_OCP_WARN_X, + S2MPG10_PMIC_B3M_OCP_WARN_Y, + S2MPG10_PMIC_B3M_OCP_WARN_Z, + S2MPG10_PMIC_B10M_OCP_WARN, + S2MPG10_PMIC_B10M_OCP_WARN_X, + S2MPG10_PMIC_B10M_OCP_WARN_Y, + S2MPG10_PMIC_B10M_OCP_WARN_Z, + S2MPG10_PMIC_B2M_SOFT_OCP_WARN, + S2MPG10_PMIC_B2M_SOFT_OCP_WARN_X, + S2MPG10_PMIC_B2M_SOFT_OCP_WARN_Y, + S2MPG10_PMIC_B2M_SOFT_OCP_WARN_Z, + S2MPG10_PMIC_B3M_SOFT_OCP_WARN, + S2MPG10_PMIC_B3M_SOFT_OCP_WARN_X, + S2MPG10_PMIC_B3M_SOFT_OCP_WARN_Y, + S2MPG10_PMIC_B3M_SOFT_OCP_WARN_Z, + S2MPG10_PMIC_B10M_SOFT_OCP_WARN, + S2MPG10_PMIC_B10M_SOFT_OCP_WARN_X, + S2MPG10_PMIC_B10M_SOFT_OCP_WARN_Y, + S2MPG10_PMIC_B10M_SOFT_OCP_WARN_Z, + S2MPG10_PMIC_BUCK_OCP_EN1, + S2MPG10_PMIC_BUCK_OCP_EN2, + S2MPG10_PMIC_BUCK_OCP_PD_EN1, + S2MPG10_PMIC_BUCK_OCP_PD_EN2, + S2MPG10_PMIC_BUCK_OCP_CTRL1, + S2MPG10_PMIC_BUCK_OCP_CTRL2, + S2MPG10_PMIC_BUCK_OCP_CTRL3, + S2MPG10_PMIC_BUCK_OCP_CTRL4, + S2MPG10_PMIC_BUCK_OCP_CTRL5, + S2MPG10_PMIC_PIF_CTRL, + S2MPG10_PMIC_BUCK_HR_MODE1, + S2MPG10_PMIC_BUCK_HR_MODE2, + S2MPG10_PMIC_FAULTOUT_CTRL, + S2MPG10_PMIC_LDO_SENSE1, + S2MPG10_PMIC_LDO_SENSE2, + S2MPG10_PMIC_LDO_SENSE3, + S2MPG10_PMIC_LDO_SENSE4, +}; + +/* Meter registers (type 0xa00) */ +enum s2mpg10_meter_reg { + S2MPG10_METER_CTRL1, + S2MPG10_METER_CTRL2, + S2MPG10_METER_CTRL3, + S2MPG10_METER_CTRL4, + S2MPG10_METER_BUCKEN1, + S2MPG10_METER_BUCKEN2, + S2MPG10_METER_MUXSEL0, + S2MPG10_METER_MUXSEL1, + S2MPG10_METER_MUXSEL2, + S2MPG10_METER_MUXSEL3, + S2MPG10_METER_MUXSEL4, + S2MPG10_METER_MUXSEL5, + S2MPG10_METER_MUXSEL6, + S2MPG10_METER_MUXSEL7, + S2MPG10_METER_LPF_C0_0, + S2MPG10_METER_LPF_C0_1, + S2MPG10_METER_LPF_C0_2, + S2MPG10_METER_LPF_C0_3, + S2MPG10_METER_LPF_C0_4, + S2MPG10_METER_LPF_C0_5, + S2MPG10_METER_LPF_C0_6, + S2MPG10_METER_LPF_C0_7, + S2MPG10_METER_PWR_WARN0, + S2MPG10_METER_PWR_WARN1, + S2MPG10_METER_PWR_WARN2, + S2MPG10_METER_PWR_WARN3, + S2MPG10_METER_PWR_WARN4, + S2MPG10_METER_PWR_WARN5, + S2MPG10_METER_PWR_WARN6, + S2MPG10_METER_PWR_WARN7, + S2MPG10_METER_PWR_HYS1, + S2MPG10_METER_PWR_HYS2, + S2MPG10_METER_PWR_HYS3, + S2MPG10_METER_PWR_HYS4, + S2MPG10_METER_ACC_DATA_CH0_1 = 0x40, + S2MPG10_METER_ACC_DATA_CH0_2, + S2MPG10_METER_ACC_DATA_CH0_3, + S2MPG10_METER_ACC_DATA_CH0_4, + S2MPG10_METER_ACC_DATA_CH0_5, + S2MPG10_METER_ACC_DATA_CH0_6, + S2MPG10_METER_ACC_DATA_CH1_1, + S2MPG10_METER_ACC_DATA_CH1_2, + S2MPG10_METER_ACC_DATA_CH1_3, + S2MPG10_METER_ACC_DATA_CH1_4, + S2MPG10_METER_ACC_DATA_CH1_5, + S2MPG10_METER_ACC_DATA_CH1_6, + S2MPG10_METER_ACC_DATA_CH2_1, + S2MPG10_METER_ACC_DATA_CH2_2, + S2MPG10_METER_ACC_DATA_CH2_3, + S2MPG10_METER_ACC_DATA_CH2_4, + S2MPG10_METER_ACC_DATA_CH2_5, + S2MPG10_METER_ACC_DATA_CH2_6, + S2MPG10_METER_ACC_DATA_CH3_1, + S2MPG10_METER_ACC_DATA_CH3_2, + S2MPG10_METER_ACC_DATA_CH3_3, + S2MPG10_METER_ACC_DATA_CH3_4, + S2MPG10_METER_ACC_DATA_CH3_5, + S2MPG10_METER_ACC_DATA_CH3_6, + S2MPG10_METER_ACC_DATA_CH4_1, + S2MPG10_METER_ACC_DATA_CH4_2, + S2MPG10_METER_ACC_DATA_CH4_3, + S2MPG10_METER_ACC_DATA_CH4_4, + S2MPG10_METER_ACC_DATA_CH4_5, + S2MPG10_METER_ACC_DATA_CH4_6, + S2MPG10_METER_ACC_DATA_CH5_1, + S2MPG10_METER_ACC_DATA_CH5_2, + S2MPG10_METER_ACC_DATA_CH5_3, + S2MPG10_METER_ACC_DATA_CH5_4, + S2MPG10_METER_ACC_DATA_CH5_5, + S2MPG10_METER_ACC_DATA_CH5_6, + S2MPG10_METER_ACC_DATA_CH6_1, + S2MPG10_METER_ACC_DATA_CH6_2, + S2MPG10_METER_ACC_DATA_CH6_3, + S2MPG10_METER_ACC_DATA_CH6_4, + S2MPG10_METER_ACC_DATA_CH6_5, + S2MPG10_METER_ACC_DATA_CH6_6, + S2MPG10_METER_ACC_DATA_CH7_1, + S2MPG10_METER_ACC_DATA_CH7_2, + S2MPG10_METER_ACC_DATA_CH7_3, + S2MPG10_METER_ACC_DATA_CH7_4, + S2MPG10_METER_ACC_DATA_CH7_5, + S2MPG10_METER_ACC_DATA_CH7_6, + S2MPG10_METER_ACC_COUNT_1, + S2MPG10_METER_ACC_COUNT_2, + S2MPG10_METER_ACC_COUNT_3, + S2MPG10_METER_LPF_DATA_CH0_1, + S2MPG10_METER_LPF_DATA_CH0_2, + S2MPG10_METER_LPF_DATA_CH0_3, + S2MPG10_METER_LPF_DATA_CH1_1, + S2MPG10_METER_LPF_DATA_CH1_2, + S2MPG10_METER_LPF_DATA_CH1_3, + S2MPG10_METER_LPF_DATA_CH2_1, + S2MPG10_METER_LPF_DATA_CH2_2, + S2MPG10_METER_LPF_DATA_CH2_3, + S2MPG10_METER_LPF_DATA_CH3_1, + S2MPG10_METER_LPF_DATA_CH3_2, + S2MPG10_METER_LPF_DATA_CH3_3, + S2MPG10_METER_LPF_DATA_CH4_1, + S2MPG10_METER_LPF_DATA_CH4_2, + S2MPG10_METER_LPF_DATA_CH4_3, + S2MPG10_METER_LPF_DATA_CH5_1, + S2MPG10_METER_LPF_DATA_CH5_2, + S2MPG10_METER_LPF_DATA_CH5_3, + S2MPG10_METER_LPF_DATA_CH6_1, + S2MPG10_METER_LPF_DATA_CH6_2, + S2MPG10_METER_LPF_DATA_CH6_3, + S2MPG10_METER_LPF_DATA_CH7_1, + S2MPG10_METER_LPF_DATA_CH7_2, + S2MPG10_METER_LPF_DATA_CH7_3, + S2MPG10_METER_DSM_TRIM_OFFSET = 0xee, + S2MPG10_METER_BUCK_METER_TRIM3 = 0xf1, +}; + +/* S2MPG10 regulator IDs */ +enum s2mpg10_regulators { + S2MPG10_LDO1, + S2MPG10_LDO2, + S2MPG10_LDO3, + S2MPG10_LDO4, + S2MPG10_LDO5, + S2MPG10_LDO6, + S2MPG10_LDO7, + S2MPG10_LDO8, + S2MPG10_LDO9, + S2MPG10_LDO10, + S2MPG10_LDO11, + S2MPG10_LDO12, + S2MPG10_LDO13, + S2MPG10_LDO14, + S2MPG10_LDO15, + S2MPG10_LDO16, + S2MPG10_LDO17, + S2MPG10_LDO18, + S2MPG10_LDO19, + S2MPG10_LDO20, + S2MPG10_LDO21, + S2MPG10_LDO22, + S2MPG10_LDO23, + S2MPG10_LDO24, + S2MPG10_LDO25, + S2MPG10_LDO26, + S2MPG10_LDO27, + S2MPG10_LDO28, + S2MPG10_LDO29, + S2MPG10_LDO30, + S2MPG10_LDO31, + S2MPG10_BUCK1, + S2MPG10_BUCK2, + S2MPG10_BUCK3, + S2MPG10_BUCK4, + S2MPG10_BUCK5, + S2MPG10_BUCK6, + S2MPG10_BUCK7, + S2MPG10_BUCK8, + S2MPG10_BUCK9, + S2MPG10_BUCK10, + S2MPG10_REGULATOR_MAX, +}; + +#endif /* __LINUX_MFD_S2MPG10_H */ From patchwork Thu Apr 3 08:59:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037461 Received: from mail-ed1-f46.google.com (mail-ed1-f46.google.com [209.85.208.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A92BE2459E5 for ; Thu, 3 Apr 2025 08:59:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670752; cv=none; b=APOU7FiV7HP0xwIANBphLWts/tceBhFULmrTqmCW8NZQD+VFF/Nve37VQ3pOD6865B5TGxKUtUQslpMDmanbef9IRpZTLmJVrwYApfoZa43HGQwQIxWgETk30bs5sEaC+DXcIQQ8e82Z8mt+NHxbjZS8Y5MZ+nQPDMm/eJ7v48A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670752; c=relaxed/simple; bh=ch+tVjxpZDhWADsqi2xUerCCp822EcsZf6tgYWcJO4o=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=n3li6yl9DeuP5kczwerCc/qD1qP/LXbswC+r24omIeHzPjeDJ0Wt8wvdmDM/GiO3+SPRQFXYSe7YfE7IWeF9b2WHHH5DKh+1PxqS1gHA6pSoJEKehUDRLbI2SROJ8D8gU3moxEI9r/e1Cqn3oSejs6gJXRgiBzjBcin13iRJeAU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=ptlSkSXF; arc=none smtp.client-ip=209.85.208.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ptlSkSXF" Received: by mail-ed1-f46.google.com with SMTP id 4fb4d7f45d1cf-5efe8d9eb1eso1220680a12.0 for ; Thu, 03 Apr 2025 01:59:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670747; x=1744275547; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=p70205lv5Ahwks+JMv232ptcGxJ9M60C9dRMMYjFwHs=; b=ptlSkSXFOxes8PFKZTNsPmG4JKU3A8nitxbBxCUvLZEx2US8bKSaqo92AgnRE1CVKc y+XTjdqTHgZMVC75aX5BsEw3y61XgwmBOdDrssgRtFNtMLJEedjjxTLbjRM0x73cJkK0 FuVy+PG1lBDU43UViPHmGO41PiVdLYSgmyoZGeaqLVEEwCnjUmmKmK3Vnvjp/fbrWucT 4rSrAtYDcCkWK0H3NcH+zDIEmuHxd1Tj/a94+ZA0IyN2HbpVnCRgfLAzvrz1PPJ+AnHI z6LSsGO+pJLh7gB0KSkeZ3D7YzxM2qybNPcSCpd6G22qPx0Wce1QmuPxtLXLzySSclK4 tkMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670747; x=1744275547; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=p70205lv5Ahwks+JMv232ptcGxJ9M60C9dRMMYjFwHs=; b=fw8JaU2uT3xh0hWD4lBXLs4T8hUb32AiuT21EWx6VwD6t3mldXu4snhIi+ZHl/3TCv 09YOkwqbjfGrRoPh7bbl1qQUH4z7sG0kFlpy0LfOe6vVQY+QZEjTmX+WWqXdEGafTXjX kMt0YL2vuUOZiQ3KT1lS7i/lXQAYC1VyXQnv3GrI7unJnu1Cn53ilRv8D4/W52msaRkI 2uw4wH0onAKLjbF64pRwI0R7cpBaLOaUXGb9f0OG9LIDTGioM1ArPaXoNTiG6XBzPQAK XWkFpYp9MbmImhH6pLTZjHId8m7nlxENEJ6Mjjod4IbCyFpawVa0s2quXo05QuEJvouU c8AA== X-Forwarded-Encrypted: i=1; AJvYcCW+2yKxVaxuLFICylt+H+Z21GfsKXWBUQFhfB8ll4aiXfjPmXmEuAUjUJO5Ul1HBqI6t8LEpa6ZvcTPfLhg82GnAw==@vger.kernel.org X-Gm-Message-State: AOJu0YyVQa4n9s6AjtcdLKx2hLjb2xW2Kp4qFcpN/WdR+uNsbIW2F4gb CP+lXSryPwSQuW0c/BUAKbrP5Y7hdzhAf0Aef3GqMXnLxmd1/JmX7PT8zEvW5i4= X-Gm-Gg: ASbGnctHrzXyOApJsrMqZyrtwDTiOn1GYsB6H6e58dZlhix+RtTq49JvFlYNzLdCjdL HfiWN1FNaG5G3DB/gjjRdveGbuz0++Cb6gbuIHYk+9Dt0E9ZbHmD2Die6+A8hYz9iJV8naQWsva 78rguvoZSf1ffJGX+2rFSuBbHPrNAz7VAAvmr/Rd3d0zV7E55W7QQSPmcXqfJXgGmqwubrJcCuH SBc61jbSVymqACFBApxyDl+WU6/KpAx1NnBPRcfDymhO6RBldAZ4Bm/oe7eOXS5CZ969bMsEGja C4dpZXyil5A8ZELakxZ3TCpdlI4urg44gnm9b9hogS7penVIhpmOM6pTN0FvnRqc8GmGVCmzkis F2F5qsznfn5CtGWRUaJJULk+9Gu7t X-Google-Smtp-Source: AGHT+IHQHM6p/MAOKJQd3/sqq0s5Pmh71tqwvfrmV/m7Z/Cso9FWL+o5hSWX6vucaMzTOkvAI4hVoQ== X-Received: by 2002:a05:6402:274c:b0:5ed:16a9:c333 with SMTP id 4fb4d7f45d1cf-5f08412c8dfmr2413316a12.2.1743670746820; Thu, 03 Apr 2025 01:59:06 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:05 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:02 +0100 Subject: [PATCH v3 10/32] mfd: sec: merge separate core and irq modules Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-10-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 There is no reason to have these two kernel modules separate. Having them merged into one kernel module also slightly reduces memory consumption and module load times a little. mapped size (lsmod): before: after: sec_core 20480 sec_core 24576 sec_irq 16384 ---------------- total 36864 Section sizes (size -A): before: after: sec_core 6780 sec_core 13239 sec_irq 8046 ---------------- Total 14826 Reviewed-by: Krzysztof Kozlowski Signed-off-by: André Draszik --- Checkpatch suggests to update MAINTAINERS, but the new file is covered already due to using a wildcard. --- drivers/mfd/Makefile | 3 ++- drivers/mfd/{sec-core.c => sec-common.c} | 2 ++ drivers/mfd/sec-irq.c | 9 --------- 3 files changed, 4 insertions(+), 10 deletions(-) diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index b617782eca436e34084a9cd24c309801c5680390..8f315298b32a2a9ee114ed5e49e760bd8f930aee 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -228,7 +228,8 @@ obj-$(CONFIG_MFD_RK8XX) += rk8xx-core.o obj-$(CONFIG_MFD_RK8XX_I2C) += rk8xx-i2c.o obj-$(CONFIG_MFD_RK8XX_SPI) += rk8xx-spi.o obj-$(CONFIG_MFD_RN5T618) += rn5t618.o -obj-$(CONFIG_MFD_SEC_CORE) += sec-core.o sec-irq.o +sec-core-objs := sec-common.o sec-irq.o +obj-$(CONFIG_MFD_SEC_CORE) += sec-core.o obj-$(CONFIG_MFD_SEC_ACPM) += sec-acpm.o obj-$(CONFIG_MFD_SEC_I2C) += sec-i2c.o obj-$(CONFIG_MFD_SYSCON) += syscon.o diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-common.c similarity index 98% rename from drivers/mfd/sec-core.c rename to drivers/mfd/sec-common.c index c4b7abe511090d8f5ff2eb501f325cc8173b9bf5..782dec1956a5fd7bf0dbb2159f9d222ad3fea942 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-common.c @@ -307,6 +307,8 @@ static int sec_pmic_resume(struct device *dev) DEFINE_SIMPLE_DEV_PM_OPS(sec_pmic_pm_ops, sec_pmic_suspend, sec_pmic_resume); EXPORT_SYMBOL_GPL(sec_pmic_pm_ops); +MODULE_AUTHOR("Chanwoo Choi "); +MODULE_AUTHOR("Krzysztof Kozlowski "); MODULE_AUTHOR("Sangbeom Kim "); MODULE_DESCRIPTION("Core driver for the Samsung S5M"); MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index bf86281401ac6ff05c90c2d71c84744709ed79cb..aa467e488fb5ef79d5bc7110e1ba7c26fcfa9892 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -6,7 +6,6 @@ #include #include #include -#include #include #include #include @@ -17,7 +16,6 @@ #include #include #include -#include #include #include "sec-core.h" @@ -510,10 +508,3 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) return 0; } -EXPORT_SYMBOL_GPL(sec_irq_init); - -MODULE_AUTHOR("Sangbeom Kim "); -MODULE_AUTHOR("Chanwoo Choi "); -MODULE_AUTHOR("Krzysztof Kozlowski "); -MODULE_DESCRIPTION("Interrupt support for the S5M MFD"); -MODULE_LICENSE("GPL"); From patchwork Thu Apr 3 08:59:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037465 Received: from mail-ej1-f48.google.com (mail-ej1-f48.google.com [209.85.218.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 610562459DD for ; Thu, 3 Apr 2025 08:59:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670755; cv=none; b=bh/skqsJ/2hB/89DnAdcU2I+5lFq3yth2eJ8V+sUmCuTMHeLcOJdaI86pLuJyeNa9nJjxypuQnQyaEZW0P3cabqzMDtEDxuo/uvlmqVAcdltJS3WStxMmOklJe3ZHsEJLdQRad2laSbphaSlG+0RBUOAoGdbf2a1diFPOWFsuw8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670755; c=relaxed/simple; bh=l1zcOTqbAXM+6Af1i6qiSSUmTQ2DiJduP75aVq1nYPQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=uM0tSClJNfjV9ex8PAW3B5vt7DMd6mNa6EnZMG/e0dHUivlsb+L1YvZUGyeOpfb8heSOexF5PowKhRh9qUb5xtFP4arEplZeU1MKqB61J5e2IARfk0jB52pvEUZ0PnwH3S00W4NjNuHWZs0lzGytDkX6AAQ1aCWf6xoOrmcE06E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=Zup1W2ke; arc=none smtp.client-ip=209.85.218.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Zup1W2ke" Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-ac2bfcd2a70so88024766b.0 for ; Thu, 03 Apr 2025 01:59:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670747; x=1744275547; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=2UDpkJYTJ8+02Ga55OV2M/CiQAcpkegARGuSb5F8VZs=; b=Zup1W2keMOnRI00TDDGp9mzIxTwY5O5DJoUCbFSCkkuvmr2PJ10IN1u5wCZI/LZP48 UErPPHbYO/NFzKIdomHCR+0WMJxAizOMefapfK9LnLRD3ZI+l4Y9VaRMUHUXG47P6gJX OXXMMSAXEZh/JPi1KQIQtgmXxowJnIQ8nznrnSMa9wdsnWyweOs7lh8F+H9+fQAAYvOl OY1ComBPd7d2ovpwHZWuxb/xQ2NP5owvqHI0JBvymSG2oSlhf1txnGdj5ROmr1Ie7mej 0amnOK8Ut4NyC/igZJfAxS52hFp9Ge5BF1iFzdJp6SfM3pqr8vOk1Hbi7TBWNEMy5aU4 Mwuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670747; x=1744275547; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2UDpkJYTJ8+02Ga55OV2M/CiQAcpkegARGuSb5F8VZs=; b=tN3aUc2uQuNRQmNeM94mglBn7/48qKsuSUGKYREug3VcONJLEI32em1GzKgU9mBysS AY/fLvbhnr92vkrG8tVqp2xKUT+RIBvxRXAXdPX7DtBDWAqB7mxNNfnPJw52ROmT81YC /7mTPEnD/lOUNAlZAxUfyxLjnyThiukkh0Wr72LFfNNV+kBC7hL4w/olOzKt7Tcb9cmN /Et3hf6Z22qbLLCw3DZ+KTZ9brr+J+9HDdvCD5ftfTXi7IwDbS/eL1BhgWAkXpvAloQ7 vigJOBi6LwnVMtz7k40VdawGiZ+2pzQB0Uhyifp74tZjjcGcewDFvR3g2F8l3jvX8Wxz HuoA== X-Forwarded-Encrypted: i=1; AJvYcCX3+1zhOHGtVOft1s3GeNLHm3mAozEFfL4UY7mnvLF+lxbN6QFsv4YXD49O/9EfEzN+0TlAbHrQc1s5mRLcm++/Xg==@vger.kernel.org X-Gm-Message-State: AOJu0Yy9CKeDwZO5BNTqg2eaNttIIOH1MrNGEF54a4ogfHyO5YFGnPVF WlS/opH05xx+1VDRrluHhWBGwfjg7lrN9TiZaCjw8elGhGfol0VjBU0LnX7C4rI= X-Gm-Gg: ASbGncviSCG0BqTcw+KNBGi3aD951X+NADXpeUsx6S22O2ww1mPHT4xcogroYCiW2o8 2hh8hUKItQgzvS4MAqKvPXmYd8sA9rZCyJnlevPAkzYjo9OEf0eSmQWU8uwSWF9+wPOKZsKAQ/2 uNiNnJMRq9b+MDYG8GOE/N4NIEnDc8yWqs2FrAOUARcX0kahBa4UW8jJf6mJ0c2z/M62YpEAVf8 otPCXnltGLvlidsv/ZqNNtWesA6emDVDmu2ZcS6S71K6BWM8K59g46rr6/EA5InKiNPDzI5uFDv DSe1n8+oxjrjwPhhGpni6dk9FrsvxepPfKmkDeMKXK4MTzrnRjLfZOO1dKDCCwSdPdA/fkT55Xk eX4MxJD2OWf8q3zTl3y+OsBmAp3O6 X-Google-Smtp-Source: AGHT+IFNqZWOvo+Tv4vLHdGRFBjU8kF7IIgTkc+Bnj5l7bb5nmPkogO1xX8561qZ+CITxdN2Zb0Cyg== X-Received: by 2002:a17:907:9710:b0:ac2:cf0b:b806 with SMTP id a640c23a62f3a-ac7bc26ec1cmr186829666b.56.1743670747337; Thu, 03 Apr 2025 01:59:07 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:07 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:03 +0100 Subject: [PATCH v3 11/32] mfd: sec: fix open parenthesis alignment (multiple) Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-11-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 checkpatch complains about unexpected alignment issues in this file - update the code accordingly. Signed-off-by: André Draszik --- v2: * make new alignment more readable (Krzysztof) --- drivers/mfd/sec-common.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index 782dec1956a5fd7bf0dbb2159f9d222ad3fea942..1a6f14dda825adeaeee1a677459c7399c144d553 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -149,9 +149,9 @@ sec_pmic_parse_dt_pdata(struct device *dev) return ERR_PTR(-ENOMEM); pd->manual_poweroff = of_property_read_bool(dev->of_node, - "samsung,s2mps11-acokb-ground"); + "samsung,s2mps11-acokb-ground"); pd->disable_wrstbi = of_property_read_bool(dev->of_node, - "samsung,s2mps11-wrstbi-ground"); + "samsung,s2mps11-wrstbi-ground"); return pd; } @@ -264,8 +264,8 @@ void sec_pmic_shutdown(struct device *dev) * ignore the rest. */ dev_warn(sec_pmic->dev, - "Unsupported device %lu for manual power off\n", - sec_pmic->device_type); + "Unsupported device %lu for manual power off\n", + sec_pmic->device_type); return; } From patchwork Thu Apr 3 08:59:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037462 Received: from mail-ej1-f52.google.com (mail-ej1-f52.google.com [209.85.218.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 149852475C2 for ; Thu, 3 Apr 2025 08:59:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670755; cv=none; b=LLPDol8p6jt/i3K5r+AnE28TpoUuB6TysGsfSVNTBaJrbKmFLKxJTk51HGasbaEpx2nU5OCa8xgFRtnqIykb/PoBHW9Lru0Og/aq1lwRGdpFLjFye3faPMVcLTWBF0vdWfcHuRZ4ulq3h+0RY1HgBCzXyYlUljahmMfH3D6xgPM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670755; c=relaxed/simple; bh=y6yU6lYRyqEHU2RYOfcRxwcasP7T27SnGV4OR5isOHE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rQpP75hWw4/sVKjNNh3IMbzLAyAIvbFik0ICJu1VP3LkDgiVZXH9n3kr7jGo4Xvdv+LB07fZlEz1rzTxrlQ2ZHPLsf4F7OTvEA81rmkFaHfIs2LS058DG4VyUDON+BzYdFQR9rum133ygjKeSITP3Ki9yxssBmTXIgb3eACuLaE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=g070MNra; arc=none smtp.client-ip=209.85.218.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="g070MNra" Received: by mail-ej1-f52.google.com with SMTP id a640c23a62f3a-ac34257295dso124387066b.2 for ; Thu, 03 Apr 2025 01:59:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670748; x=1744275548; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=pB7gFyupIzWsX2vSOEGK7q4UbjZdy1MRwKTSd+TQnVk=; b=g070MNraLUu9C+TbpnMBlzKxN/8ckq+vfpi6i2v7e2IfEW66QjhDjw2e3vyMuw5G4A Sh/4V0dCc7MpUs9VHiLL97WtrYMgj+dCOQXTKItOZrsyEx6RbIZjhX4wsAIhXCypARga BQQmlrYMejWYoYvFKyjcRzECEOHF9p3Yn8UorQ2wGQAwBwoeFYfzxehbHgcEMO/LsYc7 pgs9+mbQd5GJUbcnVCPCdotUdlWfWF5XCbb5vUhdDHz+yWfZKSXPyOOIxKnjrLG7KtVu xJHWgfbt1jpSE8AVPbQ/zw8+xfdbVFAEZzQjzHtpaOckeWoDNPtczPqKlOY5a2LE2C73 wJPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670748; x=1744275548; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pB7gFyupIzWsX2vSOEGK7q4UbjZdy1MRwKTSd+TQnVk=; b=Lp5A+8TS6BInbSb3unQlG9q+TzlsBmVzyNWbWw571hFS0y/SXRI9C8TuirMq2Q2Lto sNyRaNO4DuALE4rNJ+QF3twyyRe/VuFLJ+lLzf5FFmQdizX3WiqnpcLpwsxULgvNf+uL 2r9sgDyc7GbK080DBsXH4AR+SBh7mY64T8JVO5c0eSmRz7ZpEj4QoodecEAWeR0TLo+E SWRcsURdZZTZPjCpzmQwB6hAr/i5furhSO9Ssa/UaSos9jdZOa8qdY1Ov9YbPYxNpWvt ycYkaL97hiVIacC0d0JEddOpnrsBC0bdgDywvB1MdwjwXuqt7Zt1jlCsrrLwJSaLF5Og oidg== X-Forwarded-Encrypted: i=1; AJvYcCUtMJvcFmp6mr5/ZywbVauYT+a0nuDR1XbQV/0bnyiyk38Bg0rvT3ppKp2KIDTGmGh6NRSlqQd1Vyz7/2CIktoQzA==@vger.kernel.org X-Gm-Message-State: AOJu0YzMZa8T/fcR3HBLDKp9V8xnCFU/k8hyr5tpy0H8SdzvTKj5U4ly 3o+RHKtT1iHtVTNqCiSS/7KbxW+IcEyIyhtMxpZlKTcUQPvbl3BXEOF6JyOQzfk= X-Gm-Gg: ASbGncvNnX57VTZD2W6HfsFMIdkMMtYSYjJWa1o+8iI/nng6YaO1gw8rGeblarx1TRp T5D/UoLoajA4h6Yd/8mqTqkJeNsOyyrx4CptGA1mYxS3cpcSxEyUaDC6Q+f0b+gVdMH06iVXbze kpjwnZJ2f78oCGnuRbV9/W7D2PJYRxNkuV38S/7VFSaHqDKgZaOiCLB4BCeYSlUs41TtxwYIQ7O cppHyw4Wp88w1Xd9gGEpTFAqzx8ZnHE7YWZUuHuPxqXsJphf0JhRWN04a1VH5qr1g1W/Z1lBn8L 9jB4iyq/dMBHRG74XVapH79Wh2iAQYJvKdtoEpO5juETU9js+7UP23vAgjP28uVEXYK+TzQnCmW PsIlFkZdOMzIVkuNCl80NSaU9kX+Ga/t8kKvODa4= X-Google-Smtp-Source: AGHT+IHJBM6wgjWYZps6ri5VFfxoUgvh5j0PdsJYHzhGp7CXuLgrnxXEuXRPTmCkvL8y435madc/FA== X-Received: by 2002:a17:907:9708:b0:ac1:fab4:a83 with SMTP id a640c23a62f3a-ac738a50828mr1837746066b.25.1743670747866; Thu, 03 Apr 2025 01:59:07 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:07 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:04 +0100 Subject: [PATCH v3 12/32] mfd: sec: sort struct of_device_id entries and the device type switch Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-12-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 Sort struct of_device_id entries and the device type switch in _probe() alphabetically, which makes it easier to find the right place where to insert new entries in the future. Reviewed-by: Krzysztof Kozlowski Signed-off-by: André Draszik --- drivers/mfd/sec-i2c.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c index 8e3a365ff3e5533e27d94fa8a15dbfa639518a5f..966d116dd781ac6ab63453f641b2a68bba3945a9 100644 --- a/drivers/mfd/sec-i2c.c +++ b/drivers/mfd/sec-i2c.c @@ -154,12 +154,12 @@ static int sec_pmic_i2c_probe(struct i2c_client *client) case S2MPS15X: regmap = &s2mps15_regmap_config; break; - case S5M8767X: - regmap = &s5m8767_regmap_config; - break; case S2MPU02: regmap = &s2mpu02_regmap_config; break; + case S5M8767X: + regmap = &s5m8767_regmap_config; + break; default: regmap = &sec_regmap_config; break; @@ -184,11 +184,11 @@ static void sec_pmic_i2c_shutdown(struct i2c_client *i2c) static const struct of_device_id sec_pmic_i2c_of_match[] = { { - .compatible = "samsung,s5m8767-pmic", - .data = (void *)S5M8767X, - }, { .compatible = "samsung,s2dos05", .data = (void *)S2DOS05, + }, { + .compatible = "samsung,s2mpa01-pmic", + .data = (void *)S2MPA01, }, { .compatible = "samsung,s2mps11-pmic", .data = (void *)S2MPS11X, @@ -201,15 +201,15 @@ static const struct of_device_id sec_pmic_i2c_of_match[] = { }, { .compatible = "samsung,s2mps15-pmic", .data = (void *)S2MPS15X, - }, { - .compatible = "samsung,s2mpa01-pmic", - .data = (void *)S2MPA01, }, { .compatible = "samsung,s2mpu02-pmic", .data = (void *)S2MPU02, }, { .compatible = "samsung,s2mpu05-pmic", .data = (void *)S2MPU05, + }, { + .compatible = "samsung,s5m8767-pmic", + .data = (void *)S5M8767X, }, { }, }; From patchwork Thu Apr 3 08:59:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037464 Received: from mail-ed1-f50.google.com (mail-ed1-f50.google.com [209.85.208.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D6CF8248176 for ; Thu, 3 Apr 2025 08:59:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670755; cv=none; b=Fd0WfBbmMwN+T+TrxNHawUfaIwm7xGMod7qqs+OqQoYihkEv1CmR52+ab5ZBCUONuXyBDOB9ZDh4n9LRQI0D3L4bCC0jEOsi5MlBfiQtRC8ejOsrgI0OplGUmqZHDwBXbtHA8S0LinZR6tSXD8YITFUrTriiMOia+NTYx+hmkiE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670755; c=relaxed/simple; bh=NTgWVUrUYjaObzH0fsi/8He5KrYlIX0x8gD4jTNG9uA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OpINbZ6wD8JVX84K/b4J1JShoVMLeV3xEGnG1sekBPeKtrZNt1PulKutpcD0PzIq2oHY/ERKkwtonx+GTnlVbBIQEzGO2bhrquGi1xNXLao9LEYtOH5Sb5EtVWKXfiQtrokKm4PpdghVvkWgKH334HHjbZm9WOfhYgW4tK8B2So= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=stMJ668h; arc=none smtp.client-ip=209.85.208.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="stMJ668h" Received: by mail-ed1-f50.google.com with SMTP id 4fb4d7f45d1cf-5e8be1bdb7bso1131654a12.0 for ; Thu, 03 Apr 2025 01:59:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670748; x=1744275548; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=+VoGJVSU0pPXxfOhXBJG1TDUozXlWar2eJ++GWdYkqc=; b=stMJ668hBUruoNQosv6bNYKoCg/TQpJSc1KL1HVaA+7gGZzZy9V7BAqcAYRrX98pa1 DjoPAdzaPb38J3N5dmgBHrCVMyhobkFcd8pzHPsUPFr6rawzuZNXFthreBDabhFXaRtD vbZLOx2JdHjRJC26mA7FV+TnOmlPxfrpBLyMPxv++KOTtlzI9TQfHwAFg4xQCD6CpVYk WdvchYKeNGCj7zelqouw6yU+hBFRJUFs63JoXB+9UyGjQsJvQyt8zYKlgy9fGS831WUu AtpXQOJJq8YhxdLVvWCxlffZJLVyB/kECYcaJerkSdsrxVuTdpcsU3/KN1pnC17Qbr7p 8lhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670748; x=1744275548; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+VoGJVSU0pPXxfOhXBJG1TDUozXlWar2eJ++GWdYkqc=; b=peUfxuGIrrs9yWmXaSpdUrzh4/mtB/cNTz20S0cl69SwXw9uVqWj28W+ZAwqjf3j73 SzlQisThSPqtRfpPCj03hSSfuI6IC8LP/b5IlXLLH1pIwMLUI6tAgRHs5SAsEMXes0yQ mXErBQdEWPzHs/5+FHw9Tr4AfIccocCE+3HdikK/Y1Qa1RGlfK+eWD/oIwbniiBq+GhU LAgbHJ37C8/wp9VIU2zJD+dGEYYeN4bK2MTx58UQdbhiqp+UT5IKcWkU67xmITzb9AT5 FQSzsbxI9dNWZGQaP+r1IExiSYh6AuczmRFhIGKH7JX1dM6YfiKAMpp8opQao1F1+GwB AXwQ== X-Forwarded-Encrypted: i=1; AJvYcCU4kHsEgDY+84ESJ9uz+ZGjzUTJvzzlJYVWDU9nb01kUTnYlvyRg1vr3n+PWU8ovAvsLQGhxIPZRnvi7bA+b6GMeg==@vger.kernel.org X-Gm-Message-State: AOJu0YzpJclIJAQOdffghNSV5D1IXf/KVK6UPB3MVlAN6PKBe1wsOPX8 8h/FiLGHNaZNBnZJ8DkiqPKlAYVzXIr4LgsfyXC7vnXEjxzrm6J+be0scdsLIyY= X-Gm-Gg: ASbGnctyXU//vlMDDOYj5BeuF/4a6aSmCPzqSQdgsv+rxYxy9z2s7oS2Y4nthoV4Wg6 BKFm/5/A/rb/Czzv/8UKOxqFTVSAbSgBVc9EPYW/OI/iuFsmp3o2P1D6J/7h7qJO3NlLwufW76/ 6oP9gxM1xWLGajBDM01wjjv4i60hfkpbkh70ea/sjIf5HHC0HWPRqlBMat9lsYdEUu2lemVOLNo lSWCzRbk8iwTK0RMi68I9/7iLeP+JIWMSvaZ1bIiLde0THjV8WTBoVtgGSwuU6QkG4Xw968LWhc tnH5kmh2azxY+K83xdSUpv2teU/YUF5idNQgVCNycfKgA2d9hdZ5ut0SbZcCU5tNiIFD6IL7wXz xpVDn0DJAGa86zuF38sxt2oj5sZm8 X-Google-Smtp-Source: AGHT+IHqXiYq96qJtZ3yqV0dm+q8a7Y9OXDNzTpX/U8kjT+jFNIA0/WaLQE/aqJwj+78Op+QK5nrPQ== X-Received: by 2002:a05:6402:3495:b0:5e4:9348:72c3 with SMTP id 4fb4d7f45d1cf-5f04eacb1a8mr4769024a12.10.1743670748486; Thu, 03 Apr 2025 01:59:08 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:08 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:05 +0100 Subject: [PATCH v3 13/32] mfd: sec: use dev_err_probe() where appropriate Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-13-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 dev_err_probe() exists to simplify code and harmonise error messages, there's no reason not to use it here. While at it, harmonise some error messages. Reviewed-by: Krzysztof Kozlowski Signed-off-by: André Draszik --- drivers/mfd/sec-common.c | 6 +++--- drivers/mfd/sec-i2c.c | 10 +++------- drivers/mfd/sec-irq.c | 14 +++++++------- 3 files changed, 13 insertions(+), 17 deletions(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index 1a6f14dda825adeaeee1a677459c7399c144d553..f4c606c5ee5a809a106b13e947464f35a926b199 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -229,9 +229,9 @@ int sec_pmic_probe(struct device *dev, unsigned long device_type, num_sec_devs = ARRAY_SIZE(s2mpu05_devs); break; default: - dev_err(sec_pmic->dev, "Unsupported device type %lu\n", - sec_pmic->device_type); - return -EINVAL; + return dev_err_probe(sec_pmic->dev, -EINVAL, + "Unsupported device type %lu\n", + sec_pmic->device_type); } ret = devm_mfd_add_devices(sec_pmic->dev, -1, sec_devs, num_sec_devs, NULL, 0, NULL); diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c index 966d116dd781ac6ab63453f641b2a68bba3945a9..a107a9c1e760f90fcb59a9944b74e9a39a0d946c 100644 --- a/drivers/mfd/sec-i2c.c +++ b/drivers/mfd/sec-i2c.c @@ -134,7 +134,6 @@ static int sec_pmic_i2c_probe(struct i2c_client *client) const struct regmap_config *regmap; unsigned long device_type; struct regmap *regmap_pmic; - int ret; device_type = (unsigned long)of_device_get_match_data(&client->dev); @@ -166,12 +165,9 @@ static int sec_pmic_i2c_probe(struct i2c_client *client) } regmap_pmic = devm_regmap_init_i2c(client, regmap); - if (IS_ERR(regmap_pmic)) { - ret = PTR_ERR(regmap_pmic); - dev_err(&client->dev, "Failed to allocate register map: %d\n", - ret); - return ret; - } + if (IS_ERR(regmap_pmic)) + return dev_err_probe(&client->dev, PTR_ERR(regmap_pmic), + "regmap init failed\n"); return sec_pmic_probe(&client->dev, device_type, client->irq, regmap_pmic, client); diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index aa467e488fb5ef79d5bc7110e1ba7c26fcfa9892..9f0173c48b0c8186a2cdc1d2179db081ef2e09c4 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -487,18 +487,18 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) sec_irq_chip = &s2mpu05_irq_chip; break; default: - dev_err(sec_pmic->dev, "Unknown device type %lu\n", - sec_pmic->device_type); - return -EINVAL; + return dev_err_probe(sec_pmic->dev, -EINVAL, + "Unsupported device type %lu\n", + sec_pmic->device_type); } ret = devm_regmap_add_irq_chip(sec_pmic->dev, sec_pmic->regmap_pmic, sec_pmic->irq, IRQF_ONESHOT, 0, sec_irq_chip, &sec_pmic->irq_data); - if (ret != 0) { - dev_err(sec_pmic->dev, "Failed to register IRQ chip: %d\n", ret); - return ret; - } + if (ret != 0) + return dev_err_probe(sec_pmic->dev, ret, + "Failed to add %s IRQ chip\n", + sec_irq_chip->name); /* * The rtc-s5m driver requests S2MPS14_IRQ_RTCA0 also for S2MPS11 From patchwork Thu Apr 3 08:59:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037469 Received: from mail-ej1-f41.google.com (mail-ej1-f41.google.com [209.85.218.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25887248864 for ; Thu, 3 Apr 2025 08:59:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670758; cv=none; b=UFgeYlHWvd4QO7+Rpnq61gSd+4YumJslc6NxjEaJrljyew2DKP0EbNf3ZjWHKbgzUut3ZHmIkBh3kv8j6F42pp29eQTDWcx3UGITGAkxiGbLwScGotZZ/0FNi4xWQs8jk5ysVXYlNe/2BzvB+Q9ImZPCwXhLZXt0mhR0CaLlYE4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670758; c=relaxed/simple; bh=acDeJKyeAKIRosg5ADxV9Zz9Wij86n9v8Z9fpq/Qhv4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=c3leTLywZ6DZcT7GARJAFlvZb2eEtyqvf4JIOQwqT7R8vxBp158EdJlCdBlqpmyASFwu8ihRWsrOZBE9n53hy9U7gH59HUhW71HTV5f2TgaWd2PBOsGJu6CQuv/6W6EA6c9cpMVLGYlnJZQtRJGiqOFs8NLwGzCzPB7FSaoO/4U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=b8vvVP5n; arc=none smtp.client-ip=209.85.218.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="b8vvVP5n" Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-ac2a9a74d9cso115698366b.1 for ; Thu, 03 Apr 2025 01:59:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670749; x=1744275549; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=GcW1mWBfWGvNcEl9sJWjMnkVLrjIE7eEENFwEaEA4Go=; b=b8vvVP5n3VQ/7xgndVI4/3Mc1UEnjaBRmBKWVLRViB9QlnvgD8W35fGmn5PhpNSfDc wpgyPOr2uKWevcFFFjFyPFeRsYheQdZKuYy5iyPBViwcIoiuoEV+IYOlra5oJFydozFu iKw7LlGBOixRlHNvlSl+fGDVVgz/kUACKD1LNyr7NIHtRPpYlxKwtKHifKgkADnltbPR WmAk76V9abSSn6XS2BYO5GKH0DAxEnBMGQsy3Z7bNTsvLN0yXMmmTB3yolyMO/r7F1Fo NUHKWdu9DPl+vM7cOZWzHwKRkY5ad+7/rYe8MvgT3h9p9iEm85cJHB97ru8icOfjxZI6 rxgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670749; x=1744275549; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GcW1mWBfWGvNcEl9sJWjMnkVLrjIE7eEENFwEaEA4Go=; b=oU3ciwQwZ8q7SAY5Uwlf9c84rtOKXuSCvmzQjOSH3TllCe79AiIGb2mFpNE+jv+BUz 6EZ2YGfN0XePPa1YdYj6rEJZcFy9NMhbbDfFTY9nJrnzhOC/0DgP0Zj15HJNV0IwaAGI Q3ji4Y3x5nx+cqdDZM2cxJPO94T61HcV88HWH9bPhCwAtXuVLvQ5Zvvp4Z2SCrulkvEb l9QDX+QXrPGZfh72qYHedaCBAZtfTqzqTVVcwCN/kfBJPNSv9kfCOAKpuXuYKwQVGMTF qwJR7EL5/r1iOyd4PbDaCACsnQOJxFs0vha2Ie4dvgtIeIwQgj3Ar0MJFyCKrLhObMBE Wf3A== X-Forwarded-Encrypted: i=1; AJvYcCVKcu++IUm3iD49CCxkJDqK1bgHT6UYTWpk2R15DO37lUS3T5o9drwWU3LzYtBgl8Nf27cA9PzX32rZ/T9tUuQcQw==@vger.kernel.org X-Gm-Message-State: AOJu0YzNaFwIe0MooKSTFkUqPKAi9ktUKoUee8X4Nlv6svNO7wPtZQ2e w7iWLd+2Gg9ABeNIkuiYt7DF3PsK9DmHpkxIpgmVPPcXJ3t2Y5XxeAq9+PkOKVw= X-Gm-Gg: ASbGncuJwAa8pL8xF6uT0pSwA2RoG4GOac+2yf1AtrV+nGXg+dRQx5MonUWPeACkzgh l/Qpx7Tct68ylZZ80742EP5Q0zMI9hBhxEU7y9SduyR9QzDxZlwh3xSR2vyX7w/+GYUhjgtjVc6 +JPHk+6oOWqpjGVeLmPmpx8XbyCXdAl7KNat0hXuKXxTg1qMjVhkQ4BB3x9Bst/DMqGN9Tp1Hcp +6bpXA0Q0dOGYunw0zFBqmlh9EPyXVy2jB8ynJUBqEBCcrdLUEIfW/NxfBx6fdJTLtncoxovXeo bQSb4WabDgs3S4ANVmAPkN7etBpO9PUDGPQidOu4DzmoZ9IFvyQL/OsaJeuyRPpC5FWzZzTW5oF 1vU+ek52YzZ6LnmPry0x6p7Oe/6U/ X-Google-Smtp-Source: AGHT+IGavhoPGzCabBNLBzdbL3jiat+xI87iDC+wiboHJiUvbmM/Wprhewp9oSPfUMvc9gVC8l54GA== X-Received: by 2002:a17:907:6e87:b0:ac7:3911:35e7 with SMTP id a640c23a62f3a-ac7c0a97bb3mr143560466b.59.1743670749216; Thu, 03 Apr 2025 01:59:09 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:08 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:06 +0100 Subject: [PATCH v3 14/32] mfd: sec: s2dos05/s2mpu05: use explicit regmap config and drop default Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-14-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 When support for PMICs without compatibles was removed in commit f736d2c0caa8 ("mfd: sec: Remove PMICs without compatibles"), sec_regmap_config effectively became an orphan, because S5M8763X was the only user left of it before removal, using the default: case of the switch statement. When s2dos05 and s2mpu05 support was added in commit bf231e5febcf ("mfd: sec-core: Add support for the Samsung s2dos05") and commit ed33479b7beb ("mfd: sec: Add support for S2MPU05 PMIC"), they ended up using that orphaned regmap_config in a non-obvious way due to the default: case of the device type switch matching statement taking effect again. To make things more obvious, and to help the reader of this code while reasoning about what the intention might be here, and to ensure future additions to support new devices in this driver don't forget to add a regmap config, add an explicit regmap config for these two devices, and completely remove the generic regmap config as it becomes an orphan again that shouldn't be used by any device. Note that this commit doesn't fix the issue that s2dos05_regmap_config ands2mpu05_regmap_config really are incomplete, but I have no documentation on them. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- v2: * squash two previously separate patches into this one (Krzysztof) --- drivers/mfd/sec-i2c.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c index a107a9c1e760f90fcb59a9944b74e9a39a0d946c..81f90003eea2a40f2caaebb49fc9494b89370e7f 100644 --- a/drivers/mfd/sec-i2c.c +++ b/drivers/mfd/sec-i2c.c @@ -61,7 +61,7 @@ static bool s2mpu02_volatile(struct device *dev, unsigned int reg) } } -static const struct regmap_config sec_regmap_config = { +static const struct regmap_config s2dos05_regmap_config = { .reg_bits = 8, .val_bits = 8, }; @@ -120,6 +120,11 @@ static const struct regmap_config s2mpu02_regmap_config = { .cache_type = REGCACHE_FLAT, }; +static const struct regmap_config s2mpu05_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + static const struct regmap_config s5m8767_regmap_config = { .reg_bits = 8, .val_bits = 8, @@ -138,6 +143,9 @@ static int sec_pmic_i2c_probe(struct i2c_client *client) device_type = (unsigned long)of_device_get_match_data(&client->dev); switch (device_type) { + case S2DOS05: + regmap = &s2dos05_regmap_config; + break; case S2MPA01: regmap = &s2mpa01_regmap_config; break; @@ -156,12 +164,16 @@ static int sec_pmic_i2c_probe(struct i2c_client *client) case S2MPU02: regmap = &s2mpu02_regmap_config; break; + case S2MPU05: + regmap = &s2mpu05_regmap_config; + break; case S5M8767X: regmap = &s5m8767_regmap_config; break; default: - regmap = &sec_regmap_config; - break; + return dev_err_probe(&client->dev, -ENODEV, + "Unsupported device type %lu\n", + device_type); } regmap_pmic = devm_regmap_init_i2c(client, regmap); From patchwork Thu Apr 3 08:59:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037467 Received: from mail-ed1-f42.google.com (mail-ed1-f42.google.com [209.85.208.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9906F248887 for ; Thu, 3 Apr 2025 08:59:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670756; cv=none; b=e1CBKaDqPcSkWUi9Cwe/QMurXd10UV6bHFW1pdNNyIo7IZvg0TOghCHhTLSDf6ag7oDqttke2erkXVb6+0qMKmD8uhonTY30bq92WUhTUE2eMK+/xKmZAteGuyAw73PQzEvt0DTSmKl9neWT2q9GnSHIKzN1GtsbSyztpdE7s8s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670756; c=relaxed/simple; bh=G2VDOjAPimv/kPRtxt/LX8SDH6NDkA0IsfX7EDPKEaQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=oqwoop5xRvYRQlkXnLanRT0NwlKetcoVo4NuHpBeceV1obupRVk3SFK3uIxr0qj/PlwP2x6nnI15J+vGSb7tioSm/SnmwR8VuP/syiaYKhpFSmZjuY0zPjehdT3uzYPdwIRVPR4ELBmP1t47ZPdImU+kn9PsFz6ILLm9ye6VYwk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=kLk3EfJW; arc=none smtp.client-ip=209.85.208.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="kLk3EfJW" Received: by mail-ed1-f42.google.com with SMTP id 4fb4d7f45d1cf-5e5dce099f4so946659a12.1 for ; Thu, 03 Apr 2025 01:59:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670750; x=1744275550; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=EqGhx5PJ7AN26XxBcQwRDT/hvBtSHvxnm6hLozkr74A=; b=kLk3EfJWTjU2iYikUQe+drlwEuNkbxBQ97uf6xS+cs5zxyJJCuNPPxKtI6KgboUVRB hUx/NaLTndbrIG7BXMT5d+8FLxjSDuBFGqP0ElQ4ENIBHfpKL01ZyzUfH0dxgsYQAazv Mftq+n10tP0TxIubR7wRbi7BzHIq+v/FimHjsSb7b5Ip3A4poiQcB7FO9P7DqOTTDN9n g4GP0pIIXrSekkrHAvpWMQ868+Frmwxfp/Ycmy/cMsNhUbk7acgZ/YNXYVQ2P+tFxNPO IWGT/9VYZLNh4nngk/j3Ir58K82dR+zIVYzGL9H3KgcI8ZtdHuxlEw3kxZhxWt4FXGja d+Gw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670750; x=1744275550; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EqGhx5PJ7AN26XxBcQwRDT/hvBtSHvxnm6hLozkr74A=; b=qBYtdyS50KV/y1CHR7jc5HKIDv4xJY66uwj4FqCPJzt/DSflykIVhd/CiGqBlKLraQ 10zWXCrMZdV7DK4eX27QXX2zVzrf8XT/1ygvopnUW6IOQm7RyMNOfbEoAbNwmb7wMXZq AU1+r5LMo4gBxSAKckA9On25QZMJOdSua++lM8SIiGzMthCykieVprMDTxL7Qx8Q3lnX fcU7rfEvqdX/croZU0YUZn+0mXKAxKyVlSnqFNH/hkWkBVAbv8Fdk+8VX2JtBFbdxM1E An0yiawJ0oXK21bwdiJrfc61b8Zu/Q+I/efXjupduxJPxciV1wxfvKZNEePF/7uCMi2l tkjw== X-Forwarded-Encrypted: i=1; AJvYcCUYaesdY4AaI1MHPzx2TDI4TR2fC+sBrdH29JRezqnSg3QwT4tP0eggmWfdTFn2bP4SbxOkt+qa/tosFOrpAb61Dg==@vger.kernel.org X-Gm-Message-State: AOJu0YwPt49m/SKhWBL4wLs5XvKq/ZrjJY/LWtOoW9bm8pUwGMStJlNQ CToM02v7EyBu0EKInVBdwqJfAJluUKkSpqM6nO1LZ7GBZnWkBut+R+Jyw1OYz/0= X-Gm-Gg: ASbGncvQK0BGhfYacrbC3KXETpS5kcH2xzbbzzWTZAMS0LektsSHS53bpwnRCRtJWKA USPJ89R8dQA79VENAPf3qIetjCI22YFcZrJN/+oyBQO57nknnplW8SrPJjy4vWGrLTcKrIf9c1R roy5QbCuhfmADImCy/Jw013DN0UMRiNZuHNul7AMxrlJJqXcKk3llGEqIcFRgpXT9xJZ94r4xQB ioGVgNb+J7jmnPeLFZ9G/hFDSn01nyxwTlwld/B7b7/Mi03AMjM0PEgKYojD5LqYIMFxB0xzuVj S34DqHtHrbxDc6xSgSn7cgw5aqSwaoLbE7t1S3gARyW2UODudnfrusliafza4+JQxP+rH8Ygte6 ujHhiTa8KBESE6O0soMQdSEyEV5c6 X-Google-Smtp-Source: AGHT+IHqq5xE17qMmS1fs14R51Ih6MAYPGlP5NH+CbKlyAqH2jZK+FRszx7kpSpBogd0Ourruy0TcQ== X-Received: by 2002:a05:6402:40cc:b0:5ed:1444:7914 with SMTP id 4fb4d7f45d1cf-5edfdd23b76mr19122813a12.28.1743670749730; Thu, 03 Apr 2025 01:59:09 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:09 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:07 +0100 Subject: [PATCH v3 15/32] mfd: sec: s2dos05: doesn't support interrupts (it seems) Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-15-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 The commit bf231e5febcf ("mfd: sec-core: Add support for the Samsung s2dos05") adding s2dos05 support didn't add anything related to IRQ support, so I assume this works without IRQs. Rather than printing a warning message in sec_irq_init() due to the missing IRQ number, or returning an error due to a missing irq chip regmap, just return early explicitly. This will become particularly important once errors from sec_irq_init() aren't ignored anymore in an upcoming patch and helps the reader of this code while reasoning about what the intention might be here. Reviewed-by: Krzysztof Kozlowski Signed-off-by: André Draszik --- drivers/mfd/sec-irq.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 9f0173c48b0c8186a2cdc1d2179db081ef2e09c4..79a3b33441fa5ab48b4b233eb8d89b4c20c142ed 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -452,16 +452,12 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) int type = sec_pmic->device_type; const struct regmap_irq_chip *sec_irq_chip; - if (!sec_pmic->irq) { - dev_warn(sec_pmic->dev, - "No interrupt specified, no interrupts\n"); - return 0; - } - switch (type) { case S5M8767X: sec_irq_chip = &s5m8767_irq_chip; break; + case S2DOS05: + return 0; case S2MPA01: sec_irq_chip = &s2mps14_irq_chip; break; @@ -492,6 +488,12 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) sec_pmic->device_type); } + if (!sec_pmic->irq) { + dev_warn(sec_pmic->dev, + "No interrupt specified, no interrupts\n"); + return 0; + } + ret = devm_regmap_add_irq_chip(sec_pmic->dev, sec_pmic->regmap_pmic, sec_pmic->irq, IRQF_ONESHOT, 0, sec_irq_chip, &sec_pmic->irq_data); From patchwork Thu Apr 3 08:59:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037468 Received: from mail-ed1-f47.google.com (mail-ed1-f47.google.com [209.85.208.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5CCE3248881 for ; Thu, 3 Apr 2025 08:59:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670758; cv=none; b=m8xNuDAU2OLbqaQ9ifl/R/IdZaAGv+PrUz8fJdxeOiUlFyx47JxwkjmEU/LeeLZk/uwcRgTO/vEhu1UIDHhl+ghb51a7TjJlXEzVvn3S1W3K9o4Wr/CSajR0Rv+s7oin7NjmmW5y2Uf2nBMtyZ7zlJLWWTu9vrMXeGjP6I9NO8s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670758; c=relaxed/simple; bh=cUTy7Xx1YiX1UnRa4JT4b9qKBeo7MuQLQSe/ooLtKqM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OGh4h9mwNiBGlsYzT416o5IzAepf+BPVpzjP1c62zySYv26ZC+8bcM3Jy5Cny/iS5MoK4YXnd8EvrONlsNgtD/FbbPcfqw//gdzzzEcQe+DyW8N5eRqpEMK1xZGSTebhulrr4FdNXLpZR/qDcQvgWkRRlmBR7XwJ1W8nP03pjF8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=AjHHOqvH; arc=none smtp.client-ip=209.85.208.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="AjHHOqvH" Received: by mail-ed1-f47.google.com with SMTP id 4fb4d7f45d1cf-5e535e6739bso1045197a12.1 for ; Thu, 03 Apr 2025 01:59:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670750; x=1744275550; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=EOEB7IVKZaW1PZ6sIgI8umGsLZ0fzThiODmAgEs2dvM=; b=AjHHOqvHENCRlXPk94D5ol/0f3FDlfN75O8DcrWoeUFpHApwRG1syizNhakbRO5fd9 TDldk5wN9yEWwM91+A/7wrcsgtlYWH7NJclHDGw/YCmoqq34vnKJxKf+kf2XGsUvQ4U0 xiZXtlcQoLA96MXAestzlj1qh/U/HKvumc3cqkvpe9bbs3UUNrR/qHXiqQKOpZjjtGhU tfiljiY5j7J4O5kzHSEbShO0vzTEAuvMqPYHpWM8baPIf/a3LCoYpZp9U/SJhxWlT9yH sJbeHa2m7EI+TWTyBHbqcp3TiIR+ZiHXMsrV4zLwEbJ3RMyOlU+POuNiyufq7N57pTrx Pz4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670750; x=1744275550; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EOEB7IVKZaW1PZ6sIgI8umGsLZ0fzThiODmAgEs2dvM=; b=p5LIcX5Y+NWmCOdagcTGw2adr6iq4a/2OiEKIami/PulH6hbNDKe0gf/juqC7WHIvb pZtTRqCAOG0fd6q50cX5gfkbIadnSWnhU5Np2xmyTnql9E33fABiInjlsFh9c1aLp488 8DqZ88ekrKDPdQP9N35vDDn9ynH6JyaCSQUPYopP8zsBO2lcKkxXUj1fnACnQDG7OTGY Hwo14zJ06Tgtc5SYdy50IXGL0krda+r7i7xrG7dpva0sMI4IzOme28IbRgEB6hSHpTZr gwtnlfV7Cx6HV8m4iNbRbq4uQh19YpR5vC8cEy6pmQKzgwVAxQGEmOq2qUKnIcU/yTTY cVZw== X-Forwarded-Encrypted: i=1; AJvYcCXAp4NgDe9HA7GVpPsNjofCS9/mNhFiESb8pF+acxoGP9JVb2rqZMVbTcwMbTOsP0KFHa08SLnRoz1Wx2WMWt+zIA==@vger.kernel.org X-Gm-Message-State: AOJu0Yzh0gAMskGCc2+Cfmj1Ll8f5aSkT/Ku5yM5KfR8db4nXVAcMt2k 8oKJEoIm2kHw8mR1n0xL8qCod0wrYCh1WPmmdPSB1KypNJxu7yJ33aF3RNFnKds= X-Gm-Gg: ASbGncuL6BAX2q2X4LQX/06dPluocmjTY7Xk4Xdl6woouV4k6zkoziBJ+viTE7Giwzq rY5uMfOAMF7/73KgwYbjq7p6xy7g/NRqYP28ALzszyyM/ktaED4s07YNKvZMWPZUiKzYXTV3CKN xMiIae9CaLIPAOq1ta7QVf5oigq2xqQxYgVc8m7oEyXEIVzOU9YtO6WQ1Ay403gDPTDHIgk9wFK MOWjjfpwXrfVlqs5lnDVyjYK35MKqK8jPl2q1uuymhMpouzr7MQPV3KP4idXcxWh9Ltw+QZaZEQ lkgr2DNd9JQw/0nfRPFZgPa+1BXLhJo4t3ighxTe3iXmuDYeVB5oCd8/JMCxap8R9L1Zt8KRYbD OdN4VfIzu4JDGYV0n0vpYE7mS33kR X-Google-Smtp-Source: AGHT+IF/mj/FrJ8Kxms7tCENqFVdFFdcidKVA2nEXR0Y75YsHneWseB8Fi5sl71j96aNLNBmEO4yJQ== X-Received: by 2002:a05:6402:2682:b0:5e7:7262:2b75 with SMTP id 4fb4d7f45d1cf-5f087184cddmr1440611a12.11.1743670750284; Thu, 03 Apr 2025 01:59:10 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:09 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:08 +0100 Subject: [PATCH v3 16/32] mfd: sec: don't ignore errors from sec_irq_init() Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-16-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 sec_irq_init() can fail, we shouldn't continue and ignore the error in that case, but actually error out. Reviewed-by: Krzysztof Kozlowski Signed-off-by: André Draszik --- drivers/mfd/sec-common.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index f4c606c5ee5a809a106b13e947464f35a926b199..bb0eb3c2d9a260ddf2fb110cc255f08a0d25230d 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -183,7 +183,9 @@ int sec_pmic_probe(struct device *dev, unsigned long device_type, sec_pmic->pdata = pdata; - sec_irq_init(sec_pmic); + ret = sec_irq_init(sec_pmic); + if (ret) + return ret; pm_runtime_set_active(sec_pmic->dev); From patchwork Thu Apr 3 08:59:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037466 Received: from mail-ed1-f47.google.com (mail-ed1-f47.google.com [209.85.208.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0DCC243374 for ; Thu, 3 Apr 2025 08:59:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670758; cv=none; b=KRyzyHXrJfgtc8IC66QcPK9X+bD0EHRD/RFh5LWjSSe9sh5hDc0NdKhDX/nUzWNXcwvMihr5mBTn5j9jEtPz5yqbx2FppjvEJZeZXnUWozvvEjRp6h/6JZKsim9JRwK6F8FH9c9gxFCgjCMhVNNxDEKru3Y8XxicX3tsvedwgRo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670758; c=relaxed/simple; bh=i+oEXaY8LAt9v5xfTUnPr4X70I4bkLZ4jOwueXnpnOU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RJhtcg9dgVe2cPekilnqK8KFvHOKMw+9cMMk1KWvmg9CAPP5qIsz6UDwd0MO4wCW0YWDfR3AU7XfuADaYWvT/SHhOpvOvxw2vw6PCkCnHmNZs3Qknh15auTmk0HvAloGhjkPif/hltaeEtrqwty/Z0sNYZSBvVKPFTxAnQYgWKc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=UE7mn0jN; arc=none smtp.client-ip=209.85.208.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="UE7mn0jN" Received: by mail-ed1-f47.google.com with SMTP id 4fb4d7f45d1cf-5e5bc066283so1078584a12.0 for ; Thu, 03 Apr 2025 01:59:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670751; x=1744275551; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=RlfAg/7rLSoS1Ke1F+8yA+aiyZO+gcbIufljerVjsNI=; b=UE7mn0jNB92gkHdDr2/StUvd61e8fuMU/Z2A21gQaXjGIMNPKTg/rJxLaGsh6aCbB8 06XIH0t+vRbOxYLFojY358aU8/ldTrpITtld6InDN3117jlTXvOu1Tlf12Xh3KjwxnlD 6mZvBDvvGEYoSIgvait/F4Ka1dK4Mt3VeelmwmrrmEZKytItWkyogxlmsP03MSyB/8Mt VA7TKjO8fPSM2X1SipXPcZzP5JiFTTdxUAkN8s8+Ppo1ytiPBsk6DPKs3WlFj6Oaww1G xqjh77LfwJsaD8hoEdGLowq6E7vZ6UI8FgTsbvh5OHj+tieO7IoBjrSYq8G048/vW9ks MUAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670751; x=1744275551; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RlfAg/7rLSoS1Ke1F+8yA+aiyZO+gcbIufljerVjsNI=; b=v5BDDFQA5dibde3eyUihJUuYH2+8BxRCKeU7RTurEotmJC6BmRB/D+S+1VCmUCXMkH Cbs9A/Ff2XZvLmLQNp3oJFbNGI3iAN7cH7M1sYK1wHhusQ9r2fIYKGA0QElHsTC9iX0I 0UH1t6oXVx94YE2euZ47KrXT9hQ5/Hl7z4qIjqQjWkORmlyk6P76f21I7q2LEpUVg6aC gV1yP2rvxkaOjSlCaqxQTkGpddXqs28OolzynNXS1JJV0BIins9lsmA4Z0weNr59PuoD wcWgUqntUL4dRHqH6fmCrCgbl+HqMMSD/0lATHUkTqXI8wMpuI3mbLUAe76Xb42kZgUX 71kw== X-Forwarded-Encrypted: i=1; AJvYcCUaHGVQI/dOlqOt6FODb1rx/rDD2MQN3OxSHlL0lnS51KT4bl91UulCHNn9oeHLg6X6vExLNynHvQ+xYh55GG6/iQ==@vger.kernel.org X-Gm-Message-State: AOJu0YxtPYgEkA4tZZtAqJTh3Veh+ClEDPWKlt+RRGt/ubj9D/uavyzX 0TNXD3zu2tQATHEc9MN3+shQxtb0jvb9l1fgbvfQv5Z+JEsfB3ADPZI9LlZky+Y= X-Gm-Gg: ASbGncvpn1/epewzjJI9QpFChZAK0VQaWEcBVTtg+TXTZ8G//IoV4qQnddXdfxFOKov m6n7VV6SrmJ9c3ZCuRBPUXRndsMA2jJO5vaIyggtvKybfrNS291Q5WVzAi5OgVCBAHCbL/gtrTG xTbozXRz2K1V0agcXaaOEA+3wf/VVET1NTHdUHs6hoBceHpcelsYtgt585tvuc70rfjzhdWxvO6 Lgn8Lj13Tmpc+BWUT5GlgD51x+qevTYGbKFFcPGvwLjm4iEInBuLHIAb8qpYkvYXtU+2V0LKtzh jTGln7talmuOlZgigvk+BJ4uEroPwl2cl0HifcIB4g1LotMfnbNlRaMX7/p/cFkJZo6opMO65a3 awAjonPIO9ndvOTYzjDMcsUbvlxMUFNnoUslzmn8= X-Google-Smtp-Source: AGHT+IFZLX87fvmQWgnxfZnoDAktzthuhMaNhoMnhSakNJiyYGcGUTZY/GTW98KUU5BWYKgMrjz3Pg== X-Received: by 2002:a05:6402:51c6:b0:5ec:c990:b578 with SMTP id 4fb4d7f45d1cf-5edfd15767bmr17482749a12.19.1743670750843; Thu, 03 Apr 2025 01:59:10 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:10 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:09 +0100 Subject: [PATCH v3 17/32] mfd: sec: rework platform data and regmap instantiating Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-17-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Instead of a large open-coded switch statement, just add both regmap config and device type to the OF match data. This allows us to have all related information in one place, and avoids a long switch() statement. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- v2: fix typo in platform data for "samsung,s2mps14-pmic" --- drivers/mfd/sec-i2c.c | 133 +++++++++++++++++++++++++------------------------- 1 file changed, 66 insertions(+), 67 deletions(-) diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c index 81f90003eea2a40f2caaebb49fc9494b89370e7f..41b09f5e3c49f410604a5d47e625cbb37d7f5fa2 100644 --- a/drivers/mfd/sec-i2c.c +++ b/drivers/mfd/sec-i2c.c @@ -20,11 +20,16 @@ #include #include #include -#include #include +#include #include #include "sec-core.h" +struct sec_pmic_i2c_platform_data { + const struct regmap_config *regmap_cfg; + unsigned long device_type; +}; + static bool s2mpa01_volatile(struct device *dev, unsigned int reg) { switch (reg) { @@ -136,52 +141,20 @@ static const struct regmap_config s5m8767_regmap_config = { static int sec_pmic_i2c_probe(struct i2c_client *client) { - const struct regmap_config *regmap; - unsigned long device_type; + const struct sec_pmic_i2c_platform_data *pdata; struct regmap *regmap_pmic; - device_type = (unsigned long)of_device_get_match_data(&client->dev); - - switch (device_type) { - case S2DOS05: - regmap = &s2dos05_regmap_config; - break; - case S2MPA01: - regmap = &s2mpa01_regmap_config; - break; - case S2MPS11X: - regmap = &s2mps11_regmap_config; - break; - case S2MPS13X: - regmap = &s2mps13_regmap_config; - break; - case S2MPS14X: - regmap = &s2mps14_regmap_config; - break; - case S2MPS15X: - regmap = &s2mps15_regmap_config; - break; - case S2MPU02: - regmap = &s2mpu02_regmap_config; - break; - case S2MPU05: - regmap = &s2mpu05_regmap_config; - break; - case S5M8767X: - regmap = &s5m8767_regmap_config; - break; - default: + pdata = device_get_match_data(&client->dev); + if (!pdata) return dev_err_probe(&client->dev, -ENODEV, - "Unsupported device type %lu\n", - device_type); - } + "Unsupported device type\n"); - regmap_pmic = devm_regmap_init_i2c(client, regmap); + regmap_pmic = devm_regmap_init_i2c(client, pdata->regmap_cfg); if (IS_ERR(regmap_pmic)) return dev_err_probe(&client->dev, PTR_ERR(regmap_pmic), "regmap init failed\n"); - return sec_pmic_probe(&client->dev, device_type, client->irq, + return sec_pmic_probe(&client->dev, pdata->device_type, client->irq, regmap_pmic, client); } @@ -190,35 +163,61 @@ static void sec_pmic_i2c_shutdown(struct i2c_client *i2c) sec_pmic_shutdown(&i2c->dev); } +static const struct sec_pmic_i2c_platform_data s2dos05_data = { + .regmap_cfg = &s2dos05_regmap_config, + .device_type = S2DOS05 +}; + +static const struct sec_pmic_i2c_platform_data s2mpa01_data = { + .regmap_cfg = &s2mpa01_regmap_config, + .device_type = S2MPA01, +}; + +static const struct sec_pmic_i2c_platform_data s2mps11_data = { + .regmap_cfg = &s2mps11_regmap_config, + .device_type = S2MPS11X, +}; + +static const struct sec_pmic_i2c_platform_data s2mps13_data = { + .regmap_cfg = &s2mps13_regmap_config, + .device_type = S2MPS13X, +}; + +static const struct sec_pmic_i2c_platform_data s2mps14_data = { + .regmap_cfg = &s2mps14_regmap_config, + .device_type = S2MPS14X, +}; + +static const struct sec_pmic_i2c_platform_data s2mps15_data = { + .regmap_cfg = &s2mps15_regmap_config, + .device_type = S2MPS15X, +}; + +static const struct sec_pmic_i2c_platform_data s2mpu02_data = { + .regmap_cfg = &s2mpu02_regmap_config, + .device_type = S2MPU02, +}; + +static const struct sec_pmic_i2c_platform_data s2mpu05_data = { + .regmap_cfg = &s2mpu05_regmap_config, + .device_type = S2MPU05, +}; + +static const struct sec_pmic_i2c_platform_data s5m8767_data = { + .regmap_cfg = &s5m8767_regmap_config, + .device_type = S5M8767X, +}; + static const struct of_device_id sec_pmic_i2c_of_match[] = { - { - .compatible = "samsung,s2dos05", - .data = (void *)S2DOS05, - }, { - .compatible = "samsung,s2mpa01-pmic", - .data = (void *)S2MPA01, - }, { - .compatible = "samsung,s2mps11-pmic", - .data = (void *)S2MPS11X, - }, { - .compatible = "samsung,s2mps13-pmic", - .data = (void *)S2MPS13X, - }, { - .compatible = "samsung,s2mps14-pmic", - .data = (void *)S2MPS14X, - }, { - .compatible = "samsung,s2mps15-pmic", - .data = (void *)S2MPS15X, - }, { - .compatible = "samsung,s2mpu02-pmic", - .data = (void *)S2MPU02, - }, { - .compatible = "samsung,s2mpu05-pmic", - .data = (void *)S2MPU05, - }, { - .compatible = "samsung,s5m8767-pmic", - .data = (void *)S5M8767X, - }, + { .compatible = "samsung,s2dos05", .data = &s2dos05_data, }, + { .compatible = "samsung,s2mpa01-pmic", .data = &s2mpa01_data, }, + { .compatible = "samsung,s2mps11-pmic", .data = &s2mps11_data, }, + { .compatible = "samsung,s2mps13-pmic", .data = &s2mps13_data, }, + { .compatible = "samsung,s2mps14-pmic", .data = &s2mps14_data, }, + { .compatible = "samsung,s2mps15-pmic", .data = &s2mps15_data, }, + { .compatible = "samsung,s2mpu02-pmic", .data = &s2mpu02_data, }, + { .compatible = "samsung,s2mpu05-pmic", .data = &s2mpu05_data, }, + { .compatible = "samsung,s5m8767-pmic", .data = &s5m8767_data, }, { }, }; MODULE_DEVICE_TABLE(of, sec_pmic_i2c_of_match); From patchwork Thu Apr 3 08:59:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037476 Received: from mail-ed1-f49.google.com (mail-ed1-f49.google.com [209.85.208.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0AEB5245006 for ; Thu, 3 Apr 2025 08:59:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670763; cv=none; b=hh+55QmLHEzwzh3aE4dCoIjlESbC4BT1uC7dG8ysLj0yhuoXh0WJ7Dh1YAjR/NLF2+czWienDnSwxbW++7rrPGn+BoW4sYZRrileHgCCesutBzt0wbbw44OArUPgYf9MIACtRgvYEWdWBO9LGf34O9OcQmhAfs+RcEC2jvmYUVc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670763; c=relaxed/simple; bh=bllvwGesgocAPfPa0BvtiRJ2XbMS7FrEApqy00ZsPPo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XMncxukMYviTiNYX/F9TNAumrnWNogTCevv2TBPoDzsXRNeEWxG0GvIiZGt88BzH33MLQi31+HQGNCkiPNRzHK6X0jTuT72RymsoOAzR8Wh5wUYIiqz/W2Y7iGm+QX5fUz2syeDRZZAHvKT17vUzFg32BXvZkIxpgaDyfcr+CfI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=PWR6o2sH; arc=none smtp.client-ip=209.85.208.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="PWR6o2sH" Received: by mail-ed1-f49.google.com with SMTP id 4fb4d7f45d1cf-5e5b6f3025dso1030149a12.1 for ; Thu, 03 Apr 2025 01:59:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670751; x=1744275551; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=KZ+pWW3wwfoO36sbVjoQMpP7epgDk59E8mIno/3xwfk=; b=PWR6o2sHqfKlE52pGxQ6nvDwYPz3CPIsHrOarlJ9HgaRtlTIHnf62vxvWsYJOiVFcU Vi8Bi/Y2DFThyRjtR6vNiggomRAYOpD4dSymCjJSfALCB672k6brKMjtIwS7RVC7AGdw 0aCsIDqRblRmEhIao5bUaf+NuTnfnp6kDDZK4WRdZvW1L2beo6Xt5CJ/67Adp3YzzkX2 jTkIz0/X3BFIfgrtVGPdg/TPs9zEG/5Iwpg59HEGmLwhv4lqlrxwwVAT5Xn8a52hXJa0 HZWAd+sbuhVcSAZdkVMmidglSaN9kNa8h/y9OZXW4tnnGXhhvpkXB0Pmhm/ZOzOOGCkB uHtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670751; x=1744275551; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KZ+pWW3wwfoO36sbVjoQMpP7epgDk59E8mIno/3xwfk=; b=iFPFynbHKdTdSiqTSU9/v2Ci4PhgxGqAd7u2WlrxyeR+k/Cuby2IjyneL8utDhWYR6 9B/JWWwbn4JqpJ7GQ3LI7aV7qxIWATg0MGSibWc02+ngpylBcfJldIKJMwoAfPlo+VOX PEGQPXpLM3HA6DYU4aFyEkDKzgU8DFCpxCFtVn5L54rZWKXs106aUJ1/X08K2LnVux3D +FrLxgiaKvj/80tJ+8a4nHwcSrV54CK9VNL/KXV58nGXZwyuy66kmi6p4TARJyggHTBK /k+9VCddOwI47m0G7BlXaPCS3Q1o7O41d67ZVJNYoStLV5HunYAfrNqwwLaAeB0P7Om2 o4mw== X-Forwarded-Encrypted: i=1; AJvYcCXBapi8ge4340f7XqZYxy9usz25CIdeEm5LPDxDZyvMokYGXkwl4gMst2wLyN5RKp3HvSeLHR6K2G42PfRzNUkH+A==@vger.kernel.org X-Gm-Message-State: AOJu0YzM5S9sxYu2a+MzXUY5nfGVtcBrvlwlE1oLTUsd04Ho6Gss1Klg o3/J5e/7/xC8v6zYdMNykuzzzF448v5nZnW7pjnEDgF+9GZcjvM9M/86zIIfyc8= X-Gm-Gg: ASbGncvVZUJ+qwJHYPlKMEaAvs2JQPr0eGvp3+H6uRDZmU1WJubRS3I6JRXyT3EpzXL z/9nt6gCIJh4/9/dypomhJhz1W+wkIE0sG+poN4TWp0QG0HjjtejI33zbsd7x0S9vsalFrSvgxE TsxiDEhESG04OXv7eS04woWLlb1SgBFIy6lwmRoOFx27sQ91O2E5FWkPThdOpH7gQkeUYZ9pxvI tUdy7nnvYWa31Ghs0UThPSGWMpaApKWebL16nb6o3Ffd11lJx15Of1cQ3jAuUkCeHfzz+zA2Yk5 5wdXmJS0ttRUpzIv24y00SFMKv1S8tL1KueMxz7dipHUI+hm8nL0yhOi65sLOiCZP5+hov5BzG2 7Ie416O35nNprCTqZ2/6T4GLrebX+ X-Google-Smtp-Source: AGHT+IEDq89x3CpslTyM0zp7dklQdXkDh51EcU1TCoWVePJqp1R3stB2nQM7HgpHJAOZguo5Gm2LWg== X-Received: by 2002:a05:6402:3204:b0:5f0:82cd:500b with SMTP id 4fb4d7f45d1cf-5f082cd5216mr2774791a12.19.1743670751382; Thu, 03 Apr 2025 01:59:11 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:11 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:10 +0100 Subject: [PATCH v3 18/32] mfd: sec: change device_type to int Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-18-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Now that sec-i2c doesn't match device type by pointer casting anymore, we can switch the device type from unsigned long to int easily. This saves a few bytes in struct sec_pmic_dev due to member alignment. Signed-off-by: André Draszik --- drivers/mfd/sec-common.c | 9 ++++----- drivers/mfd/sec-core.h | 5 ++--- drivers/mfd/sec-i2c.c | 2 +- drivers/mfd/sec-irq.c | 5 ++--- include/linux/mfd/samsung/core.h | 2 +- 5 files changed, 10 insertions(+), 13 deletions(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index bb0eb3c2d9a260ddf2fb110cc255f08a0d25230d..4871492548f5efde4248b5b3db74045ec8c9d676 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -155,9 +155,8 @@ sec_pmic_parse_dt_pdata(struct device *dev) return pd; } -int sec_pmic_probe(struct device *dev, unsigned long device_type, - unsigned int irq, struct regmap *regmap, - struct i2c_client *client) +int sec_pmic_probe(struct device *dev, int device_type, unsigned int irq, + struct regmap *regmap, struct i2c_client *client) { struct sec_platform_data *pdata; const struct mfd_cell *sec_devs; @@ -232,7 +231,7 @@ int sec_pmic_probe(struct device *dev, unsigned long device_type, break; default: return dev_err_probe(sec_pmic->dev, -EINVAL, - "Unsupported device type %lu\n", + "Unsupported device type %d\n", sec_pmic->device_type); } ret = devm_mfd_add_devices(sec_pmic->dev, -1, sec_devs, num_sec_devs, @@ -266,7 +265,7 @@ void sec_pmic_shutdown(struct device *dev) * ignore the rest. */ dev_warn(sec_pmic->dev, - "Unsupported device %lu for manual power off\n", + "Unsupported device %d for manual power off\n", sec_pmic->device_type); return; } diff --git a/drivers/mfd/sec-core.h b/drivers/mfd/sec-core.h index a0a3488924d96f69373e7569079cfefd0544ca26..92c7558ab8b0de44a52e028eeb7998e38358cb4c 100644 --- a/drivers/mfd/sec-core.h +++ b/drivers/mfd/sec-core.h @@ -14,9 +14,8 @@ struct i2c_client; extern const struct dev_pm_ops sec_pmic_pm_ops; -int sec_pmic_probe(struct device *dev, unsigned long device_type, - unsigned int irq, struct regmap *regmap, - struct i2c_client *client); +int sec_pmic_probe(struct device *dev, int device_type, unsigned int irq, + struct regmap *regmap, struct i2c_client *client); void sec_pmic_shutdown(struct device *dev); int sec_irq_init(struct sec_pmic_dev *sec_pmic); diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c index 41b09f5e3c49f410604a5d47e625cbb37d7f5fa2..2ccb494c8c024361c78e92be71ce9c215757dd89 100644 --- a/drivers/mfd/sec-i2c.c +++ b/drivers/mfd/sec-i2c.c @@ -27,7 +27,7 @@ struct sec_pmic_i2c_platform_data { const struct regmap_config *regmap_cfg; - unsigned long device_type; + int device_type; }; static bool s2mpa01_volatile(struct device *dev, unsigned int reg) diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 79a3b33441fa5ab48b4b233eb8d89b4c20c142ed..c4db58813059f07372679223ec570ed07f52cd73 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -449,10 +449,9 @@ static const struct regmap_irq_chip s5m8767_irq_chip = { int sec_irq_init(struct sec_pmic_dev *sec_pmic) { int ret = 0; - int type = sec_pmic->device_type; const struct regmap_irq_chip *sec_irq_chip; - switch (type) { + switch (sec_pmic->device_type) { case S5M8767X: sec_irq_chip = &s5m8767_irq_chip; break; @@ -484,7 +483,7 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) break; default: return dev_err_probe(sec_pmic->dev, -EINVAL, - "Unsupported device type %lu\n", + "Unsupported device type %d\n", sec_pmic->device_type); } diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h index c1102324172a9b6bd6072b5929a4866d6c9653fa..d785e101fe795a5d8f9cccf4ccc4232437e89416 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h @@ -67,7 +67,7 @@ struct sec_pmic_dev { struct regmap *regmap_pmic; struct i2c_client *i2c; - unsigned long device_type; + int device_type; int irq; struct regmap_irq_chip_data *irq_data; }; From patchwork Thu Apr 3 08:59:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037472 Received: from mail-ed1-f43.google.com (mail-ed1-f43.google.com [209.85.208.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1648724A074 for ; Thu, 3 Apr 2025 08:59:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670760; cv=none; b=dSsGMaM6ufYM6knS7pf9xMZ6tVD7c+iXDT15Y5hD/BFv9kgo/15dt6s8CdYnU1NyC79+AU9vrWk7sVMd/jINjqsSllOSZ8eFgxAELCTMqAT5bk3At62LLh4+I/WpJRSYBPcn/yr3BK8go9W9uXOXVg3deF8wm32dNUteJkP9nmo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670760; c=relaxed/simple; bh=3HQSCKKi1fwFRVm95IbU9t5Hr7ITyiskN+9xAwmrKhQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=M8SMAEqBxI0YF2OZ2QIeUmt89KVk4g1OK/lZuJnFSjL6acc58rfdIZQB8uj97xp8PHNcOdY7kgjlU0f1nkuHBa6woztZv2Yf7NNZGkJqaQSqYOhPHk2J5AofiO2NIRpxDQJFx2i3auwb6970Q1LGQrkZrpYGgJ2M/74NOefye50= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=inbk4I+r; arc=none smtp.client-ip=209.85.208.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="inbk4I+r" Received: by mail-ed1-f43.google.com with SMTP id 4fb4d7f45d1cf-5e5e8274a74so1099668a12.1 for ; Thu, 03 Apr 2025 01:59:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670752; x=1744275552; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=c021jwV5dbsG8JoPrCRgjZmmvCnTfk3Xe/yBggRzooI=; b=inbk4I+r/k4ykJ/Nugo2yeQ4wXSJAhl8r0L/UHumax8beFQaeSG7wW4K6eYJdwPJwZ Op0as6SlDG2WVK8j7/uNNJJbIaJPNoo2yCKtf/Vfl9PbHDO2KR5MRn1lEqCbQciktX61 VLwdEtLQjuWnmdTveoWv+1/5eY/w/E8A9MK8knRh7CK7gR7dTvRGlsifjdN1mhQ3Rc/v OL66GgE4HbECZJwJDdT48ZKXQcD0Mp21Mn0x+xsLlROFznQ1mT4WX82yuzac997GeFdV geLKIEl2t2qixDmGw3o4SSPEM4mZPXUfp24PUpgVGntda4dXhgJ/87dGlGS/vq/xYcFJ fc4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670752; x=1744275552; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=c021jwV5dbsG8JoPrCRgjZmmvCnTfk3Xe/yBggRzooI=; b=dBku7uPAaYFiSJg9sHGB4cj/lDNO+T9KH+T52nVM+zfuMGnUws7CDTno+jIY4GU5jy WPSt41TWEA4/O4ayDDfZDS8+sJqeIl7nX/z9IexN03PKBUIIgitHI7LAioEBlmAPeVoJ PJoTDa7Avgjm77SSiY6JJnTuSMe6tKl/DApe6oYcKhCvHM1jLZmN3K+jvePab7kQ1fNK atKmFS53M2TIlm5pyJcZM5hUZGq1Gopgh8WoEkRmSmbIKyu30d8Sqpew8gaAXkcsNa6Q v7sxyBUV2jhBj7C4rASVTWRNf0hUAamYKqYBA3j3CpF5Z8hQom6jlI7LTG1ZqozAP0Uk MVkA== X-Forwarded-Encrypted: i=1; AJvYcCU7Is6SQPzG8LRmoeMF5JglYwQ2CPr+nt0FzqNqeRhYRxol+Mo2LsdQTPE6itUvi7qPxKHbncDNmv4pzM8Wc9QASQ==@vger.kernel.org X-Gm-Message-State: AOJu0YzzIoKcHxkoJeZO5g0dWUJTWcMJxYJbxbpL1W0eKhlf/dywck7l miO1edMpwf00cFFMTLLRrCxpIqfKcUGU5rXN+IotZPBoHgEJi1it+mZTtzmOL7M= X-Gm-Gg: ASbGnctF0jCTFqtAvJGJ7J1ot/wQ6KZDie5K1/a0nkqEDUQyb1EZOnVGat2DlKKBfRQ fi5efja76BJWZKdL3uapilTXszwV8i6DICK3FKKvzHGiMpYnVJ+xz9mdMMxoo4IP5qe/zrIaqzh 3vQprRM6Qexichd1sR8MvPivhrmO0berKT+nx/1Elb8EnlrrPoC1cG7UvAqTfsnpMkZDS8mXsVe n8cKxJW2zmVfGCFhT9HytaGBTG34TRVnoPZN7NOBBy1izeSAh7n0jLu7Q0QSD6Xvz8ynSX9ego6 PJhdsFSHrU1a/kBYJ2f774Tx0t9bG1QbJyWWqD7xFJ8P/VSVGxk8yyJHkIMTEFkOkeD2fjj9nej OFcAGbqqiPpUkvXNL4tN8K1cNrupLHI461HBF/DM= X-Google-Smtp-Source: AGHT+IHCv1y/iOD6tATf8l6JbAVP7nosxikaub6pMGAtowLVbGuj8LVxbHPFWCZvGPjo74E5dX1Kfg== X-Received: by 2002:a05:6402:90e:b0:5e8:c0a7:4244 with SMTP id 4fb4d7f45d1cf-5f08716b5edmr1415400a12.9.1743670751910; Thu, 03 Apr 2025 01:59:11 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:11 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:11 +0100 Subject: [PATCH v3 19/32] mfd: sec: don't compare against NULL / 0 for errors, use ! Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-19-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Follow general style and use if (!arg) instead of comparing against NULL. While at it, drop a useless init in sec-irq.c. Signed-off-by: André Draszik --- drivers/mfd/sec-common.c | 2 +- drivers/mfd/sec-irq.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index 4871492548f5efde4248b5b3db74045ec8c9d676..55edeb0f73ff4643f23b9759b115658d3bf03e9a 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -164,7 +164,7 @@ int sec_pmic_probe(struct device *dev, int device_type, unsigned int irq, int ret, num_sec_devs; sec_pmic = devm_kzalloc(dev, sizeof(struct sec_pmic_dev), GFP_KERNEL); - if (sec_pmic == NULL) + if (!sec_pmic) return -ENOMEM; dev_set_drvdata(dev, sec_pmic); diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index c4db58813059f07372679223ec570ed07f52cd73..5cd9667a21e9e8b052b2ef0b5d2991369bffe8bb 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -448,8 +448,8 @@ static const struct regmap_irq_chip s5m8767_irq_chip = { int sec_irq_init(struct sec_pmic_dev *sec_pmic) { - int ret = 0; const struct regmap_irq_chip *sec_irq_chip; + int ret; switch (sec_pmic->device_type) { case S5M8767X: @@ -496,7 +496,7 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) ret = devm_regmap_add_irq_chip(sec_pmic->dev, sec_pmic->regmap_pmic, sec_pmic->irq, IRQF_ONESHOT, 0, sec_irq_chip, &sec_pmic->irq_data); - if (ret != 0) + if (ret) return dev_err_probe(sec_pmic->dev, ret, "Failed to add %s IRQ chip\n", sec_irq_chip->name); From patchwork Thu Apr 3 08:59:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037470 Received: from mail-ed1-f52.google.com (mail-ed1-f52.google.com [209.85.208.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8AD7824A066 for ; Thu, 3 Apr 2025 08:59:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670762; cv=none; b=MVp+3US7WgbBf84c+r5JbGHsUrH/ADBBerp2yV+STxcsRhdFy8QAVBxEaN9Tag4ZaifWqdAuNBcvhucn5/IWjg3Fg0h7w9CcX1AfSl5Qc3IcBqL2n4XCVYbk9FZ43mLHImPJnWrACo/P8ugRwDSsUZzeJtAV9N538RMRpUGCr/8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670762; c=relaxed/simple; bh=X0QQTgyZyBPIURJ3v2tympUyOwlqSVYuYyMtIMSpfpo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=sjfcMjlDuyFbHMEq1gzpeCBqIVA9az0BRF2vXRsu6FYTAJ9689Jl/uRgHjzWCDAgSdQa25wvL538h3X4Wge6zrtgBZtYsLujshF3Askp9SQt3thS6k7r2JFymCLIyILnWZZp+W7orepsNstORWM/71o/P0FwrUZcQO3yu43TLMI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=URzP2DcC; arc=none smtp.client-ip=209.85.208.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="URzP2DcC" Received: by mail-ed1-f52.google.com with SMTP id 4fb4d7f45d1cf-5eb92df4fcbso1267002a12.0 for ; Thu, 03 Apr 2025 01:59:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670753; x=1744275553; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=kV75c5wurwfdiB4LfjbAT+jBLqgbz3xs0SfJTGIePwA=; b=URzP2DcCIIAiVaxYYoMP73MU7SEV97+smhklH5zWxCElfDYlenJFBlbTeXnyL8euh9 yojM2ojq8gpYSFUyO2o2EhhfuWdSdqE6duPdeILAc6qZkUMbuqsv9XxgL6bSEzE+mK/E EtiCau9LX0kSw5SH1+t27TYBgm6G4/KfA0GmLOdOjst66COPikk+kVdmsVqbe8w56XwL BwIa8v3iuxg3ViEGY1horI+IRPXbyVb1QEIeUvyTu133yDODP3FjYSed/DTCOBw0Qcdq bMNZ/3xs8eqL/QQJHld6leDsJAG29QtCUVMndeGfgnxz1KwMzppjXf+8PoXaPWKvrDaJ wfHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670753; x=1744275553; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kV75c5wurwfdiB4LfjbAT+jBLqgbz3xs0SfJTGIePwA=; b=MB85Cu2dCmpkPxSTHQj+wZwBCK73x84wNZxYOqUvlQe3i7WnbeUbWV4tlav5yNxL6o r5RxucVAeCg3OfNos3FCb2qAzic6N5PMC9+WOiuanOygCoDe80cxFGrfLqwcEtLfmtzC R0GJ/ve2iz5lmNRTFq8JRu78Iddi2hsD7LpyuV2ZCkcSsCepVtPiEPkRIUwRFgCT5NQg QwkioD1611t6kMnkqmgMwQ1E8+z4h+SOgL9nHqFpg/TJqy9yYTr4P32tQCXWI+BXLuaG bgSo7hKZFb8gw9FUrOoI6irkahQJFtlaWJ7U5eVso9xzG36tiswV+93wzpXWkxy2BnDb DK3g== X-Forwarded-Encrypted: i=1; AJvYcCXbcti+S1Igt5Blh1v9WM28YM4osBcuQMLvTHAZKlWVzED+c/TQ15Xk9OLed5LiGkl+cmVPyaVnhxlErA1BVcN4Og==@vger.kernel.org X-Gm-Message-State: AOJu0YxB63vpF1G97SOcDTD3DeU7zhJLrpTgaJYXFgedbfK90Dc5bjpx FPhYCuqz/+ZtE8THvj0VnHptyv1UR+zvRFeoHi/Lu4fHtdQ+DuosSFuifv63fQ8= X-Gm-Gg: ASbGncsJP7L/9gcgk94av5sd/0adDs75NJNfJExbvkKAi6yPAiSb1+1hTpaALeUZlG6 PGr3VYrgmsRy9ECyMbQQ65NtBaRGhfYEtmiBBMxoloFM4t2mTPgUkmX0oyCk63KI1R3fCARaLA6 RBAX4FjaLfGrRH333xEvTinLuEFqDtfpkY1t9SUKfWhhhlRsiRiJQTOxODeMrhhzYnUFXNmCMQL ZBJPXLIb0EHBjWXafA15br1auGVlfR0z0Nj7pQOCo+NdcFxF2PRCDHARFJ7Apqa7RenXIB5Eck4 VlmNGfTLgTmIF0ggbtbOmTluxja9gMdFbsiILUEBAe/Sxk+Sm6UoybaUiEfQWaIwM0j8zVcN5iv wj5wWSl3zxGvmgRSGdgYpnN/KTEId X-Google-Smtp-Source: AGHT+IGcX+tYkvLIpCQDt/tVecCK/2rtCpUV2gBjKE/E/xLa7G15uMrlM8X/q+3JmlSAkeK9HlD3fA== X-Received: by 2002:a17:907:9692:b0:ac3:49f0:4d10 with SMTP id a640c23a62f3a-ac7bc259458mr148490166b.38.1743670752608; Thu, 03 Apr 2025 01:59:12 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:12 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:12 +0100 Subject: [PATCH v3 20/32] mfd: sec: use sizeof(*var), not sizeof(struct type_of_var) Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-20-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Using sizeof(*var) is generally preferred over using the size of its open-coded type when allocating memory. This helps avoiding bugs when the variable type changes but the memory allocation isn't updated, and it simplifies renaming of the struct if ever necessary. No functional change. Signed-off-by: André Draszik --- drivers/mfd/sec-common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index 55edeb0f73ff4643f23b9759b115658d3bf03e9a..e8e35f7d5f06b522a953e8f21603e6904401c983 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -163,7 +163,7 @@ int sec_pmic_probe(struct device *dev, int device_type, unsigned int irq, struct sec_pmic_dev *sec_pmic; int ret, num_sec_devs; - sec_pmic = devm_kzalloc(dev, sizeof(struct sec_pmic_dev), GFP_KERNEL); + sec_pmic = devm_kzalloc(dev, sizeof(*sec_pmic), GFP_KERNEL); if (!sec_pmic) return -ENOMEM; From patchwork Thu Apr 3 08:59:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037471 Received: from mail-ej1-f41.google.com (mail-ej1-f41.google.com [209.85.218.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 909F724BBE3 for ; Thu, 3 Apr 2025 08:59:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670761; cv=none; b=L1yHSYFrrSUeq1SoluZaasLWjvALCkr57Ukd98HdBgNepGFmcA/0F6p+73NiYaQsOx4I7V9PgSbXAogiUImtZ2vtNxdSSPskWPWV4McO8OOQGfpfveQOcIhHAhKQ/5qOuuM8Dbt95mCGFcPCES6IpScqV/VbE/Oobj0YQxRK/V4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670761; c=relaxed/simple; bh=uZPaCVbPHBGfSgOGE/h2z8oZIqJdXRNHkC3wOcm11eI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=oSwJf2WBZcnyZJQTxgb5Gb1SZXA44gWlGGlOl9o8dZ2U5LPlo8V1wxOkz79s32KF3CzsS0yCU/eUc/UkA0hxUs0Is0IoURtUYlBUa5qpcvaFoRcEuNu2o+CsBv2qV3s4bL6jHBkJCA7/eSkH5WnleOCvixfarvZ8E5n434b/myc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=r5DHmoiO; arc=none smtp.client-ip=209.85.218.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="r5DHmoiO" Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-ac345bd8e13so108742366b.0 for ; Thu, 03 Apr 2025 01:59:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670753; x=1744275553; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=AGZF3iY+lrce/peuoGWoI8dxWV9rSVtCllywJ68wEfI=; b=r5DHmoiODxaHsy2jUz9U6uGinpNsTG8t7Rgx05pLFXLsh1Vr5scyqvahIQXq9i776e h+v0ITFLa9aNuN03UKLIF6Jlq9A7/AHbxUlKN4UyNHV3DimYKzdd9I/StgLnRjbJDj6P rnbrMTpFM0ecFIHTtj5E+A+E8ANw3BynCMNDJtoKhQqxVIMgAKbAO5lEkNf0tv/3WeYl 950Um8azpVGsFWTSJA44Y8yDZ8Bj+q4Lxt/839vNZ4XXYJKaMvhgAGhsI9FVri9eKE0o YIVo7OAKu5AWKKTfbuqUqenu0E+pwq+8fIjnUzM7WqR1gh3qYSAO4p3uuDgshPaQ0RRh W6Iw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670753; x=1744275553; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AGZF3iY+lrce/peuoGWoI8dxWV9rSVtCllywJ68wEfI=; b=TBSAVkeO/4X1wk0EfPI0sBAQmJI3hwt1QjjNPm7o5JEVhnUYaY5ITAvLFCE/Mz2Z6X eLtPDRhj+H+edh1JQQioOGDfqseivVQnlSoDs/9JIcsqQNiOrb8H7S9hhbNek1ywCyH+ S60+QJzIVZ8LrGySOwuwcubrnbrGzb6QgnbdZm+2jiKeBRRrYHHEH7yTOJ03M4W036Of 06a8XmcmWBz5Fwl8AlNQsrevnkMXNW5f/rruOwq9lVG9rUxMwWif+WNsLA5vzosTZnBY 5uXiUgLxrKTl7cwd18tzxbxkaPs1anCbkRka1DclS21CYj3Tehr/UNq0/yZD8zNBYBzY EOEQ== X-Forwarded-Encrypted: i=1; AJvYcCXEwsUwCgyY4qvlSc9RGiZ8nT7jEr+qcihA17FXt2WP3xhUeLfvgLkMIDphpE7VCxYAvxh/Ti3PFX7Ae879/cVmPA==@vger.kernel.org X-Gm-Message-State: AOJu0YxPmxmqI/SFEZoL9Czhh/B81FK+b5r1zvLrY7XxyjzDTNSCsrBc 1JnraqsgeRfrYZ7fEge7phpGvYR/uTTYPGL5kF8EvimdQhG5ZvQ7d6O+pma9dPE= X-Gm-Gg: ASbGncu5v86pKY6XHfc4MnYhS4r0VHKugGicfkS2pDcrjKUoOP6tXhcQr/DeK80V+WS YfL1FtRpXKP1pFHgSegHMMNKkVZM4ijM8tXtmeLPa857rVZklwKuhHPDx9NICWb9kK2UwWLUwGk OeLfRrf0wDItm2zgK19iaMFLWmnl4/JqdyC15smejDgRRHI2ONNohk23BYGV/I6E0V5A+rWkWt2 syof2Jse9A894LvCI8MCvNlWNgHrG6/NO/1wPl6mNPbxf5oxeHSna8UjmZ/616tFaqW6DIHurAb vd40sqNiyTW40MSmAMkQiXskUJPuqrHQGo+XWK4NdyMf5+gxp6Q1qLGvIIHDqpIJjybxC7PWUdS grX99apJfinkdbRRiKrdt+L0kgR9x X-Google-Smtp-Source: AGHT+IFRyOdwPcEz80NSYeNSO9OIEAqrNZz0SsyzqP2x0gvOEZiZralRMKMAb8SO2ti+oPAesT2BCw== X-Received: by 2002:a17:907:cc1a:b0:ac7:c59e:fc3e with SMTP id a640c23a62f3a-ac7c59efdf6mr46064366b.25.1743670753150; Thu, 03 Apr 2025 01:59:13 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:12 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:13 +0100 Subject: [PATCH v3 21/32] mfd: sec: convert to using MFD_CELL macros Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-21-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Use MFD_CELL macro helpers instead of open coding. This makes the code a bit shorter and more obvious. Signed-off-by: André Draszik --- drivers/mfd/sec-common.c | 57 ++++++++++++++++++------------------------------ 1 file changed, 21 insertions(+), 36 deletions(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index e8e35f7d5f06b522a953e8f21603e6904401c983..448300ab547c10d81f9f2b2798d54c8a03c714d8 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -24,16 +24,13 @@ #include "sec-core.h" static const struct mfd_cell s5m8767_devs[] = { - { .name = "s5m8767-pmic", }, - { .name = "s5m-rtc", }, - { - .name = "s5m8767-clk", - .of_compatible = "samsung,s5m8767-clk", - }, + MFD_CELL_NAME("s5m8767-pmic"), + MFD_CELL_NAME("s5m-rtc"), + MFD_CELL_OF("s5m8767-clk", NULL, NULL, 0, 0, "samsung,s5m8767-clk"), }; static const struct mfd_cell s2dos05_devs[] = { - { .name = "s2dos05-regulator", }, + MFD_CELL_NAME("s2dos05-regulator"), }; static const struct mfd_cell s2mpg10_devs[] = { @@ -45,53 +42,41 @@ static const struct mfd_cell s2mpg10_devs[] = { }; static const struct mfd_cell s2mps11_devs[] = { - { .name = "s2mps11-regulator", }, - { .name = "s2mps14-rtc", }, - { - .name = "s2mps11-clk", - .of_compatible = "samsung,s2mps11-clk", - }, + MFD_CELL_NAME("s2mps11-regulator"), + MFD_CELL_NAME("s2mps14-rtc"), + MFD_CELL_OF("s2mps11-clk", NULL, NULL, 0, 0, "samsung,s2mps11-clk"), }; static const struct mfd_cell s2mps13_devs[] = { - { .name = "s2mps13-regulator", }, - { .name = "s2mps13-rtc", }, - { - .name = "s2mps13-clk", - .of_compatible = "samsung,s2mps13-clk", - }, + MFD_CELL_NAME("s2mps13-regulator"), + MFD_CELL_NAME("s2mps13-rtc"), + MFD_CELL_OF("s2mps13-clk", NULL, NULL, 0, 0, "samsung,s2mps13-clk"), }; static const struct mfd_cell s2mps14_devs[] = { - { .name = "s2mps14-regulator", }, - { .name = "s2mps14-rtc", }, - { - .name = "s2mps14-clk", - .of_compatible = "samsung,s2mps14-clk", - }, + MFD_CELL_NAME("s2mps14-regulator"), + MFD_CELL_NAME("s2mps14-rtc"), + MFD_CELL_OF("s2mps14-clk", NULL, NULL, 0, 0, "samsung,s2mps14-clk"), }; static const struct mfd_cell s2mps15_devs[] = { - { .name = "s2mps15-regulator", }, - { .name = "s2mps15-rtc", }, - { - .name = "s2mps13-clk", - .of_compatible = "samsung,s2mps13-clk", - }, + MFD_CELL_NAME("s2mps15-regulator"), + MFD_CELL_NAME("s2mps15-rtc"), + MFD_CELL_OF("s2mps13-clk", NULL, NULL, 0, 0, "samsung,s2mps13-clk"), }; static const struct mfd_cell s2mpa01_devs[] = { - { .name = "s2mpa01-pmic", }, - { .name = "s2mps14-rtc", }, + MFD_CELL_NAME("s2mpa01-pmic"), + MFD_CELL_NAME("s2mps14-rtc"), }; static const struct mfd_cell s2mpu02_devs[] = { - { .name = "s2mpu02-regulator", }, + MFD_CELL_NAME("s2mpu02-regulator"), }; static const struct mfd_cell s2mpu05_devs[] = { - { .name = "s2mpu05-regulator", }, - { .name = "s2mps15-rtc", }, + MFD_CELL_NAME("s2mpu05-regulator"), + MFD_CELL_NAME("s2mps15-rtc"), }; static void sec_pmic_dump_rev(struct sec_pmic_dev *sec_pmic) From patchwork Thu Apr 3 08:59:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037481 Received: from mail-ed1-f46.google.com (mail-ed1-f46.google.com [209.85.208.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5CB7B24BC1C for ; Thu, 3 Apr 2025 08:59:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670767; cv=none; b=SPaco918Y+o+N5NpB5Es01gMJHUTXLZsq7u2qSYCCZ18cztU5ZpHTQIoQnhxt/Drehkx0+QYCV68rHZg7rAF5VZZvpfOSS8J+c0qWu63JCsyQVOn7+YQtifis9g6EwYyLu5LPeYoRSD2TNNRYOQRaBxfW7v4GGlDCJaGSTyApdo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670767; c=relaxed/simple; bh=MZ30T8KMJXBJoDDM3cr1kCmHXcpVB3LCx1uy4q775s8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pD+0OP2MS7oz+bXMxOn3XdkfSoKO/0yCM9Eitah59/B9+gDA3tgjvoPyQhNe+ijbVtEPJ7yyEE6VwYtZSZlwiY47FnS8sG1z/7GuQC6vPfZOoGOmMomFc4H12NWk9pkLekA0hvlL7fbViiWCW2R3gQgbmGhVdVo3sLVrocK5IlQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=nCuKztsJ; arc=none smtp.client-ip=209.85.208.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="nCuKztsJ" Received: by mail-ed1-f46.google.com with SMTP id 4fb4d7f45d1cf-5e6f4b3ebe5so1229901a12.0 for ; Thu, 03 Apr 2025 01:59:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670754; x=1744275554; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Op+5mEOgNYYFAMowJxBfybjaNESu4Eako9395vK9N0c=; b=nCuKztsJOwVZ+l74OPqvInr+LbkOUaG+Mc4RjAlpXfS5WWYnf+BuuScaeLHNDUSoC+ ibAP8ek9/oeauOAuXstLsQeveROR5n7JQ9vBmCGo7GuQxi96/aP1wqA3wPifbgIbJ9hQ qrKYL13b1wyjsr/b6n6jVAGV7JQCWXMJKxJwE2o1TY3DqeshHIiA4wYJO5SAEUSdpxBm synGqyDxM0vEqLi0M4e86vXERFQe3OB3/w+u+/pUeOz0k/9ZRkR6tKgJwjiHOLFhWu/v QFY3RRcIcA4vIBk5VVfmzcOoSZBymQ+UIijb4iTOtMF9uohzU79iDxHK+CwPGd4CkrhS 7Olw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670754; x=1744275554; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Op+5mEOgNYYFAMowJxBfybjaNESu4Eako9395vK9N0c=; b=UZrT6NL060ilR1HWGczyWbVRysK1SvJD8rgx3Qrkxs8uWGIsbKvY/q4De8EbPGkTk5 TRzKhvMOM5iemxHDwfTD6Ps5DqcceDlA55BXpm+Oau2hJAozKMO3piXD6C2rhAOX2ONU E/7bIX2Qd38NQTiSpV2n+LFErwQPl5VdSb+4HdWw9B78fihY0aPYRoa2NmTIbcOThbaQ XOKZomDuNCPLUbaFQBTZ1IdaEFsHpK2t0AmkWzYtltO5dNsZCJw0tODIyRVHDn24kDHx yCrThcRaLhPzo9T/UnUAPMy5vhFtHNvcDuBMeM5TiBu6QKUNIUT39rdEIn3TpBJc/P88 0Zzw== X-Forwarded-Encrypted: i=1; AJvYcCX1nxhRZTNB37fA1a+bH8fuR4K6tihHEWNKM0L9Rh+Z4j1IYEsutnEi4cnr3nyX2DAGW2Z3eeju7ax5Cb5M/u235g==@vger.kernel.org X-Gm-Message-State: AOJu0YwfEhahjSYtL4A7Tww+rk3SY/WZbObcXMxwJCfo1eA45fOn+QC8 4nPX3i1zuX9GQH6mxV28NL2y9hCKbRFuSiQM/JN5m3qLgZhPL+rhoWyY2AiBZXo= X-Gm-Gg: ASbGncubqdVj8HCJBtEcZoWjQgoTemtCFzVm8kPsNT/+zMajaoOuBzqVN3S57OrvfZd gDnX3a3o3KzInz2PSkOG9T+JO9vYUr5NY451NvUZJjHRiMN3rSX7iY+6iogF3fRdHbAcSqCIRaP pRq/7txEJLWlPjb8JLyl0KHEUAsfbScxEUkkaJXmhpl+aH/aPoSAOnJHmZuT14z8i3fWdhK6YK4 iC6vsr2I+zFBFoHvdlePDhY+Sd2n+eSY3be0DloACdEFChdXZP28+F351KeHcFE4PqTS/gNg6Na Sz736K6k5S6nyoJPX+qvLLXcwhxCNZtVuN4h6A2fAd4YYggC8q0YULR/ofkmNUghF0Z52FUUV1n XsNs0P+H3J5cKzf9XKsFdL6yESpuF X-Google-Smtp-Source: AGHT+IHje6/Aj3m3WFy82BhNMOZ83g9HkkSQjWHGqlCFxMgpj6dst82siBK7kkVhW9a2sxdihxbs6A== X-Received: by 2002:a05:6402:4307:b0:5e7:b02b:6430 with SMTP id 4fb4d7f45d1cf-5f087224bedmr1275094a12.23.1743670753725; Thu, 03 Apr 2025 01:59:13 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:13 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:14 +0100 Subject: [PATCH v3 22/32] mfd: sec: convert to using REGMAP_IRQ_REG() macros Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-22-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Use REGMAP_IRQ_REG macro helpers instead of open coding. This makes the code a bit shorter and more obvious. Signed-off-by: André Draszik --- drivers/mfd/sec-irq.c | 343 +++++++++++--------------------------------------- 1 file changed, 75 insertions(+), 268 deletions(-) diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 5cd9667a21e9e8b052b2ef0b5d2991369bffe8bb..a2c821704b771a9f8a10c7efc900812684771862 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -74,212 +74,68 @@ static const struct regmap_irq s2mpg10_irqs[] = { }; static const struct regmap_irq s2mps11_irqs[] = { - [S2MPS11_IRQ_PWRONF] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_PWRONF_MASK, - }, - [S2MPS11_IRQ_PWRONR] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_PWRONR_MASK, - }, - [S2MPS11_IRQ_JIGONBF] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_JIGONBF_MASK, - }, - [S2MPS11_IRQ_JIGONBR] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_JIGONBR_MASK, - }, - [S2MPS11_IRQ_ACOKBF] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_ACOKBF_MASK, - }, - [S2MPS11_IRQ_ACOKBR] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_ACOKBR_MASK, - }, - [S2MPS11_IRQ_PWRON1S] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_PWRON1S_MASK, - }, - [S2MPS11_IRQ_MRB] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_MRB_MASK, - }, - [S2MPS11_IRQ_RTC60S] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_RTC60S_MASK, - }, - [S2MPS11_IRQ_RTCA1] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_RTCA1_MASK, - }, - [S2MPS11_IRQ_RTCA0] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_RTCA0_MASK, - }, - [S2MPS11_IRQ_SMPL] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_SMPL_MASK, - }, - [S2MPS11_IRQ_RTC1S] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_RTC1S_MASK, - }, - [S2MPS11_IRQ_WTSR] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_WTSR_MASK, - }, - [S2MPS11_IRQ_INT120C] = { - .reg_offset = 2, - .mask = S2MPS11_IRQ_INT120C_MASK, - }, - [S2MPS11_IRQ_INT140C] = { - .reg_offset = 2, - .mask = S2MPS11_IRQ_INT140C_MASK, - }, + REGMAP_IRQ_REG(S2MPS11_IRQ_PWRONF, 0, S2MPS11_IRQ_PWRONF_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_PWRONR, 0, S2MPS11_IRQ_PWRONR_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_JIGONBF, 0, S2MPS11_IRQ_JIGONBF_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_JIGONBR, 0, S2MPS11_IRQ_JIGONBR_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_ACOKBF, 0, S2MPS11_IRQ_ACOKBF_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_ACOKBR, 0, S2MPS11_IRQ_ACOKBR_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_PWRON1S, 0, S2MPS11_IRQ_PWRON1S_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_MRB, 0, S2MPS11_IRQ_MRB_MASK), + + REGMAP_IRQ_REG(S2MPS11_IRQ_RTC60S, 1, S2MPS11_IRQ_RTC60S_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_RTCA1, 1, S2MPS11_IRQ_RTCA1_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_RTCA0, 1, S2MPS11_IRQ_RTCA0_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_SMPL, 1, S2MPS11_IRQ_SMPL_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_RTC1S, 1, S2MPS11_IRQ_RTC1S_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_WTSR, 1, S2MPS11_IRQ_WTSR_MASK), + + REGMAP_IRQ_REG(S2MPS11_IRQ_INT120C, 2, S2MPS11_IRQ_INT120C_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_INT140C, 2, S2MPS11_IRQ_INT140C_MASK), }; static const struct regmap_irq s2mps14_irqs[] = { - [S2MPS14_IRQ_PWRONF] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_PWRONF_MASK, - }, - [S2MPS14_IRQ_PWRONR] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_PWRONR_MASK, - }, - [S2MPS14_IRQ_JIGONBF] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_JIGONBF_MASK, - }, - [S2MPS14_IRQ_JIGONBR] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_JIGONBR_MASK, - }, - [S2MPS14_IRQ_ACOKBF] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_ACOKBF_MASK, - }, - [S2MPS14_IRQ_ACOKBR] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_ACOKBR_MASK, - }, - [S2MPS14_IRQ_PWRON1S] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_PWRON1S_MASK, - }, - [S2MPS14_IRQ_MRB] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_MRB_MASK, - }, - [S2MPS14_IRQ_RTC60S] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_RTC60S_MASK, - }, - [S2MPS14_IRQ_RTCA1] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_RTCA1_MASK, - }, - [S2MPS14_IRQ_RTCA0] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_RTCA0_MASK, - }, - [S2MPS14_IRQ_SMPL] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_SMPL_MASK, - }, - [S2MPS14_IRQ_RTC1S] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_RTC1S_MASK, - }, - [S2MPS14_IRQ_WTSR] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_WTSR_MASK, - }, - [S2MPS14_IRQ_INT120C] = { - .reg_offset = 2, - .mask = S2MPS11_IRQ_INT120C_MASK, - }, - [S2MPS14_IRQ_INT140C] = { - .reg_offset = 2, - .mask = S2MPS11_IRQ_INT140C_MASK, - }, - [S2MPS14_IRQ_TSD] = { - .reg_offset = 2, - .mask = S2MPS14_IRQ_TSD_MASK, - }, + REGMAP_IRQ_REG(S2MPS14_IRQ_PWRONF, 0, S2MPS11_IRQ_PWRONF_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_PWRONR, 0, S2MPS11_IRQ_PWRONR_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_JIGONBF, 0, S2MPS11_IRQ_JIGONBF_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_JIGONBR, 0, S2MPS11_IRQ_JIGONBR_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_ACOKBF, 0, S2MPS11_IRQ_ACOKBF_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_ACOKBR, 0, S2MPS11_IRQ_ACOKBR_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_PWRON1S, 0, S2MPS11_IRQ_PWRON1S_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_MRB, 0, S2MPS11_IRQ_MRB_MASK), + + REGMAP_IRQ_REG(S2MPS14_IRQ_RTC60S, 1, S2MPS11_IRQ_RTC60S_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_RTCA1, 1, S2MPS11_IRQ_RTCA1_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_RTCA0, 1, S2MPS11_IRQ_RTCA0_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_SMPL, 1, S2MPS11_IRQ_SMPL_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_RTC1S, 1, S2MPS11_IRQ_RTC1S_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_WTSR, 1, S2MPS11_IRQ_WTSR_MASK), + + REGMAP_IRQ_REG(S2MPS14_IRQ_INT120C, 2, S2MPS11_IRQ_INT120C_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_INT140C, 2, S2MPS11_IRQ_INT140C_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_TSD, 2, S2MPS14_IRQ_TSD_MASK), }; static const struct regmap_irq s2mpu02_irqs[] = { - [S2MPU02_IRQ_PWRONF] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_PWRONF_MASK, - }, - [S2MPU02_IRQ_PWRONR] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_PWRONR_MASK, - }, - [S2MPU02_IRQ_JIGONBF] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_JIGONBF_MASK, - }, - [S2MPU02_IRQ_JIGONBR] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_JIGONBR_MASK, - }, - [S2MPU02_IRQ_ACOKBF] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_ACOKBF_MASK, - }, - [S2MPU02_IRQ_ACOKBR] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_ACOKBR_MASK, - }, - [S2MPU02_IRQ_PWRON1S] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_PWRON1S_MASK, - }, - [S2MPU02_IRQ_MRB] = { - .reg_offset = 0, - .mask = S2MPS11_IRQ_MRB_MASK, - }, - [S2MPU02_IRQ_RTC60S] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_RTC60S_MASK, - }, - [S2MPU02_IRQ_RTCA1] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_RTCA1_MASK, - }, - [S2MPU02_IRQ_RTCA0] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_RTCA0_MASK, - }, - [S2MPU02_IRQ_SMPL] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_SMPL_MASK, - }, - [S2MPU02_IRQ_RTC1S] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_RTC1S_MASK, - }, - [S2MPU02_IRQ_WTSR] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_WTSR_MASK, - }, - [S2MPU02_IRQ_INT120C] = { - .reg_offset = 2, - .mask = S2MPS11_IRQ_INT120C_MASK, - }, - [S2MPU02_IRQ_INT140C] = { - .reg_offset = 2, - .mask = S2MPS11_IRQ_INT140C_MASK, - }, - [S2MPU02_IRQ_TSD] = { - .reg_offset = 2, - .mask = S2MPS14_IRQ_TSD_MASK, - }, + REGMAP_IRQ_REG(S2MPU02_IRQ_PWRONF, 0, S2MPS11_IRQ_PWRONF_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_PWRONR, 0, S2MPS11_IRQ_PWRONR_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_JIGONBF, 0, S2MPS11_IRQ_JIGONBF_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_JIGONBR, 0, S2MPS11_IRQ_JIGONBR_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_ACOKBF, 0, S2MPS11_IRQ_ACOKBF_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_ACOKBR, 0, S2MPS11_IRQ_ACOKBR_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_PWRON1S, 0, S2MPS11_IRQ_PWRON1S_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_MRB, 0, S2MPS11_IRQ_MRB_MASK), + + REGMAP_IRQ_REG(S2MPU02_IRQ_RTC60S, 1, S2MPS11_IRQ_RTC60S_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_RTCA1, 1, S2MPS11_IRQ_RTCA1_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_RTCA0, 1, S2MPS11_IRQ_RTCA0_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_SMPL, 1, S2MPS11_IRQ_SMPL_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_RTC1S, 1, S2MPS11_IRQ_RTC1S_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_WTSR, 1, S2MPS11_IRQ_WTSR_MASK), + + REGMAP_IRQ_REG(S2MPU02_IRQ_INT120C, 2, S2MPS11_IRQ_INT120C_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_INT140C, 2, S2MPS11_IRQ_INT140C_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_TSD, 2, S2MPS14_IRQ_TSD_MASK), }; static const struct regmap_irq s2mpu05_irqs[] = { @@ -303,74 +159,25 @@ static const struct regmap_irq s2mpu05_irqs[] = { }; static const struct regmap_irq s5m8767_irqs[] = { - [S5M8767_IRQ_PWRR] = { - .reg_offset = 0, - .mask = S5M8767_IRQ_PWRR_MASK, - }, - [S5M8767_IRQ_PWRF] = { - .reg_offset = 0, - .mask = S5M8767_IRQ_PWRF_MASK, - }, - [S5M8767_IRQ_PWR1S] = { - .reg_offset = 0, - .mask = S5M8767_IRQ_PWR1S_MASK, - }, - [S5M8767_IRQ_JIGR] = { - .reg_offset = 0, - .mask = S5M8767_IRQ_JIGR_MASK, - }, - [S5M8767_IRQ_JIGF] = { - .reg_offset = 0, - .mask = S5M8767_IRQ_JIGF_MASK, - }, - [S5M8767_IRQ_LOWBAT2] = { - .reg_offset = 0, - .mask = S5M8767_IRQ_LOWBAT2_MASK, - }, - [S5M8767_IRQ_LOWBAT1] = { - .reg_offset = 0, - .mask = S5M8767_IRQ_LOWBAT1_MASK, - }, - [S5M8767_IRQ_MRB] = { - .reg_offset = 1, - .mask = S5M8767_IRQ_MRB_MASK, - }, - [S5M8767_IRQ_DVSOK2] = { - .reg_offset = 1, - .mask = S5M8767_IRQ_DVSOK2_MASK, - }, - [S5M8767_IRQ_DVSOK3] = { - .reg_offset = 1, - .mask = S5M8767_IRQ_DVSOK3_MASK, - }, - [S5M8767_IRQ_DVSOK4] = { - .reg_offset = 1, - .mask = S5M8767_IRQ_DVSOK4_MASK, - }, - [S5M8767_IRQ_RTC60S] = { - .reg_offset = 2, - .mask = S5M8767_IRQ_RTC60S_MASK, - }, - [S5M8767_IRQ_RTCA1] = { - .reg_offset = 2, - .mask = S5M8767_IRQ_RTCA1_MASK, - }, - [S5M8767_IRQ_RTCA2] = { - .reg_offset = 2, - .mask = S5M8767_IRQ_RTCA2_MASK, - }, - [S5M8767_IRQ_SMPL] = { - .reg_offset = 2, - .mask = S5M8767_IRQ_SMPL_MASK, - }, - [S5M8767_IRQ_RTC1S] = { - .reg_offset = 2, - .mask = S5M8767_IRQ_RTC1S_MASK, - }, - [S5M8767_IRQ_WTSR] = { - .reg_offset = 2, - .mask = S5M8767_IRQ_WTSR_MASK, - }, + REGMAP_IRQ_REG(S5M8767_IRQ_PWRR, 0, S5M8767_IRQ_PWRR_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_PWRF, 0, S5M8767_IRQ_PWRF_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_PWR1S, 0, S5M8767_IRQ_PWR1S_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_JIGR, 0, S5M8767_IRQ_JIGR_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_JIGF, 0, S5M8767_IRQ_JIGF_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_LOWBAT2, 0, S5M8767_IRQ_LOWBAT2_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_LOWBAT1, 0, S5M8767_IRQ_LOWBAT1_MASK), + + REGMAP_IRQ_REG(S5M8767_IRQ_MRB, 1, S5M8767_IRQ_MRB_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_DVSOK2, 1, S5M8767_IRQ_DVSOK2_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_DVSOK3, 1, S5M8767_IRQ_DVSOK3_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_DVSOK4, 1, S5M8767_IRQ_DVSOK4_MASK), + + REGMAP_IRQ_REG(S5M8767_IRQ_RTC60S, 2, S5M8767_IRQ_RTC60S_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_RTCA1, 2, S5M8767_IRQ_RTCA1_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_RTCA2, 2, S5M8767_IRQ_RTCA2_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_SMPL, 2, S5M8767_IRQ_SMPL_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_RTC1S, 2, S5M8767_IRQ_RTC1S_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_WTSR, 2, S5M8767_IRQ_WTSR_MASK), }; static const struct regmap_irq_chip s2mpg10_irq_chip = { From patchwork Thu Apr 3 08:59:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037473 Received: from mail-ed1-f45.google.com (mail-ed1-f45.google.com [209.85.208.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6318A2475CE for ; Thu, 3 Apr 2025 08:59:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670763; cv=none; b=r9ZH6VJCRvZbVJ1NC3aSo0O6A6vLPuJkMDXhLkbsqjJdYDcI0+dDcliu/UPO6LZMTQhJnUYgnMGi0qfRkl4RGZ3iE3OLsRNNmcfEy00DO0UKUVAqsrWb8zzWjvdRaSzP3hST8wblA3kYzxox0bK+AQL4+KBre3iAa6Zi0cjIhA8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670763; c=relaxed/simple; bh=kEDFa+8UVBQzgPmv5eunRw1YTfTPcSizj/QHfDecNE8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kE3jxIySJf4xCjpXhNB5YScxMXIdp6oxioz0N+r0ynsl7uj7p2TicHG2V6hn6XKyYiVyxQHzulfxMnKP7at7gvV/xs7vR2DIPCF01icPxaMo4SjnnwFsbifaydAys7IfME6yqnARxN2auIyyQD5loi45OttTBrm/GUgEJcn9MWc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=f8WdtEU9; arc=none smtp.client-ip=209.85.208.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="f8WdtEU9" Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-5e66407963fso1296095a12.2 for ; Thu, 03 Apr 2025 01:59:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670754; x=1744275554; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=zep9f0d4foFUFHvL7+wCfhcQlnrOmBCem8a0X84Q4jI=; b=f8WdtEU9vO+BsAgldDW/lpOndPTa42kz0y+sHYdaQf5AqJBGzuENzPhiGdb/7TBlNg mcqbzmsZtGLzYoH4qkKw/ExxjDY4a5fUn4BV9S9QYinkUtXM8l76t3vncInOVTJVe3sO lavU/MyOYretXqAtBUsyfhuHHNjLOSWi5Wo5se+z+aEie9xvjLSjeMIIBSWdAIwwxWRA 70O7G+LSOdBauY6bI5R/b8Fur/ZZZ9cMJ8jMBOW1hDLNxp3PTG1WzgONdtnr8XCxvgfU 64tEBAQdjG2T3CVsPYwXzklq0C8S6haeaw7sWLWC9Mgr6BgzoY7V4pKlW3WDuEpdYWC3 nctA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670754; x=1744275554; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zep9f0d4foFUFHvL7+wCfhcQlnrOmBCem8a0X84Q4jI=; b=tIjpivNPX9gqbnazn2J+zgzxaQCXnWFHjfMnJZBT3yO1Iwnr3ZXFniNORB7OJO1P5b A/rDO6Dnj0l2ODwo6F6jt3B6TLq1GIrYhqW8ENWV+TmKOAfgfmfSkI2nfihr1tXQk+wo gOOyqPI6+s8pNeR+NXy8yiWVz1ZuguP6qhush6Op+v0EcsId5yalIjCEPtdDYoJE3aeV umJeuvb9oeJQnjZK416+wFS9W9jTEbVuQaWJ1aUeaWBaeKLjme0xa8FJRWuxPMY25n3z i8ElzTNavd3LXrrWxmL5pqJMai3Nr0VSLr7/7U9JnPrOnk5dL8oSQrweEH6s0v6GnNj0 /c/A== X-Forwarded-Encrypted: i=1; AJvYcCUto0ofBwsmXB0q3nUU2eNq3M7mpoHCInM7DfN4gq9plFotBP+bxp24WabLCQQNbInlpnstgWBKGNTBQNV+t4M7zQ==@vger.kernel.org X-Gm-Message-State: AOJu0YyRI6V6sPHeEWVoFEoI0zKRUWqNtV0RTnIGQ2s+hqe5gMlAAr3W 0wYDyarIoAl006gVLus/8aJ7hTdK71cNNpbLuUDgAuBMEoUf8UBNzeXAlv1ceBE= X-Gm-Gg: ASbGncuyM0QJyDR5ucix11X2/T0OinT/h0mo/62d/aT/AMRc2mYC/zD3qF5eSbzH9m7 VKYk54n3AZr4utuTTuiH6UqApiETfVMPNHP/HTffQm4B5y3Y7gpYvo4pDOzlrpISDjpcWX5IA1g m8f92WH5MSzmEx9K0p6knFi40nZ7fT7fUx5ik92nYV7p6GYN+F1atTTd7sQqEU6JfH/FEAw1Okf KlV+Z0sTP6xnsOFyAFVpuw719QpFpARWhitLxZyzAayo/GUoIjlkGjrmVz/ysoESihRHOjLyqqm Z0myZT60LWo901sjG6oq4PIwQne+PcoMjSFmiAV/hblegJAHUb0vF25oi+fhmdbJvjhsC14HnlA 3znXRW4ExNZZJwL7+vHHv42Axjkut X-Google-Smtp-Source: AGHT+IHPaEYedqVEDLo93ujbRrtVNCm/mxpEYABRhJlFkwLFXs8WrbrWDofWHLr/5jqHegGOehX8ag== X-Received: by 2002:a05:6402:5112:b0:5e6:17e6:9510 with SMTP id 4fb4d7f45d1cf-5edfcbe92b8mr15687119a12.6.1743670754243; Thu, 03 Apr 2025 01:59:14 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:13 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:15 +0100 Subject: [PATCH v3 23/32] mfd: sec: add myself as module author Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-23-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Add myself as module author, so people know whom to complain to about after the recent updates :-) Signed-off-by: André Draszik --- drivers/mfd/sec-common.c | 1 + drivers/mfd/sec-i2c.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index 448300ab547c10d81f9f2b2798d54c8a03c714d8..05658f05cb857a784c7d01b1cf25de4870e1a95e 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -293,6 +293,7 @@ static int sec_pmic_resume(struct device *dev) DEFINE_SIMPLE_DEV_PM_OPS(sec_pmic_pm_ops, sec_pmic_suspend, sec_pmic_resume); EXPORT_SYMBOL_GPL(sec_pmic_pm_ops); +MODULE_AUTHOR("André Draszik "); MODULE_AUTHOR("Chanwoo Choi "); MODULE_AUTHOR("Krzysztof Kozlowski "); MODULE_AUTHOR("Sangbeom Kim "); diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c index 2ccb494c8c024361c78e92be71ce9c215757dd89..74fd28a6bc9a42879fc1eb05546777f60e0062e9 100644 --- a/drivers/mfd/sec-i2c.c +++ b/drivers/mfd/sec-i2c.c @@ -233,6 +233,7 @@ static struct i2c_driver sec_pmic_i2c_driver = { }; module_i2c_driver(sec_pmic_i2c_driver); +MODULE_AUTHOR("André Draszik "); MODULE_AUTHOR("Sangbeom Kim "); MODULE_DESCRIPTION("I2C driver for the Samsung S5M"); MODULE_LICENSE("GPL"); From patchwork Thu Apr 3 08:59:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037480 Received: from mail-ed1-f41.google.com (mail-ed1-f41.google.com [209.85.208.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A9B624BC13 for ; Thu, 3 Apr 2025 08:59:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670766; cv=none; b=P2KMFsruchUB7zUPb6gpq9YwXXyvidcoZheaLu1XrcYbEN2lE0xww6lp20qbJn4PgDTqAdF78ISt/ul0SyudUCpXWyPFSnI+K2RwGygfszDuQB9dqdBoatBqcu2EJCP8Lmrn6USkayjpWyMAfUrz1pISLOLvU+gkwzNxrSxs/5k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670766; c=relaxed/simple; bh=YO4AyBJQaRYJNR3M/qB00qaKZDbH/de1lTqDCM4IY8M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=aid/ClUbb7kRu8YwNXgjUP4PyUT20GZKL0ddgy/H0/SxoEhXhdPg8+8FnZD7PT1230EXG4S5/LASd5rLIAkpa08zhx7UQFJ3wZcbVByvlJGQZQwGM7ENaju1KNgjVrtqq3WAJRJoxID+662LxWHLAY5cs6HK9rajznAALAzqCVc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=X1RH6upS; arc=none smtp.client-ip=209.85.208.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="X1RH6upS" Received: by mail-ed1-f41.google.com with SMTP id 4fb4d7f45d1cf-5e5bc066283so1078668a12.0 for ; Thu, 03 Apr 2025 01:59:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670755; x=1744275555; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=6KRr6Qm0gpuwraE+pyT1hJyit2ZkidoO0SCeL3UgR+0=; b=X1RH6upSsdAkhrGpjvWV0AGKa7tgjMzroifdz8pTqH6ypmDij0g7wIDQtWMZiEOleN iGwfYIBvgmhPs9fdN+NJcRskFUpHJhvpjwuCZFmG+t8m6qSoX7ut5vmuKHsadcArO45r +VQr+eSDc15poiMUVuzlqxKD9zielLTF8BaZwG2n/HC1s5PWdwmOw/Kdvc0EW/aJc2Qb 9Z+OkwRrAJ1ZhVxffceK2m5Kr7bTvsTosDHahGF73rWXiRfyt6AB7wMGZeOT5/cPqt2C Kake5TGuBnd7Wg9cn6L8yi9BVCiVxp8Sd+YvsYHNAlmMT+3CbtB1bHfszg5hMfYoDsOt ttDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670755; x=1744275555; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6KRr6Qm0gpuwraE+pyT1hJyit2ZkidoO0SCeL3UgR+0=; b=SayemSJgC8lO+1CGkgs9gZ7nPYW5zrm2nRvkZJixu9HlM7QlF309FCnaq8SOLbmZIu Ck7DBLxw/oN8gJMR8KJ7wxGJFlxbEDOoGwqaykxJixkisOkb7B9RdxbaK+kVDlGq4VqY jXqCP5O4yEYQerp8Vg9DE57nostrmaW1FvMoBVdqUCpSL8kaXaSjN9XCk1/DG6lvKQga 43mr5AITlsfRRjIUPX3bVw1zQKbfE9IcpxwTrKyjVSBy+tNRJL3HiweggZo/kNmNuL88 WziBtzYfmTBhhmuV3EwV1CVbkWArM3cTiqYGDXOWVHRwHeoV+JX5N8WgK9JGgH9mvAqD aY0Q== X-Forwarded-Encrypted: i=1; AJvYcCXBwP2/mTjr17i2BA78TUR8slPvKC/+M3ORoplLFvzbu39XdsvdZsPu1qzRpP+8ArP/qUa7pAkt8vQwtNGvHHvxzw==@vger.kernel.org X-Gm-Message-State: AOJu0Yz9RJVX++LCzAD0jNYFnNgLMCTV2fJi4LG2o8qfPE9EAI/N4JNS o92w2QXcS/HBdhQrdFLUCEOYS0CNbqMws2rEz3L5+Y4d5HFG5R7mNQSxaR91wm4= X-Gm-Gg: ASbGnct8HySIjGP7vv6eptUgxzLsyvt3gmqVEIsri1F2UNT59t2fxkzb78E4GauS3wz 16A9ZxGAkw4ujIK2j32smgswQwJBQPi0HWvB2XEa+/HwaVGOUSe+1Z+KGcUNmqM52vlIhmmi2A7 nk4qWjGmynHv4rts5hLFYG75AvB38sdYqemOj/rRUEiqDjH89eeQnhXDLlItYupXDoQTumMMNHj A7ffj47G5GZzjc/+IZ4qxDYlO6iObdjlXJ3k0W3e45MIT9Jrjip2qnyyaSMt0dlxndCHTLk10Qi 8QEuHPYUulAyDkF/i8fiSOBo8pbgBzYmy1SHLS7TcIZzHwsKZmjKOz4RkvAzDumYk4llZ50NDFT MaNiBfWpZQLU4UxHvmpHWWyRCyH15 X-Google-Smtp-Source: AGHT+IHEdGFmSr6KJkifyjVrc0xIRhrTNMltNPXKgSl8ywP+14sm3GrLINtRDwSb2RF2kU14UFLFrw== X-Received: by 2002:a05:6402:40d3:b0:5e5:437c:1daf with SMTP id 4fb4d7f45d1cf-5edfd156c0amr18247266a12.16.1743670754722; Thu, 03 Apr 2025 01:59:14 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:14 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:16 +0100 Subject: [PATCH v3 24/32] clk: s2mps11: add support for S2MPG10 PMIC clock Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-24-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Add support for Samsung's S2MPG10 PMIC clock, which is similar to the existing PMIC clocks supported by this driver. S2MPG10 has three clock outputs @ 32kHz: AP, peri1 and peri2. Acked-by: Stephen Boyd Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- drivers/clk/clk-s2mps11.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c index 8ddf3a9a53dfd5bb52a05a3e02788a357ea77ad3..92c8d36dafcf8a448873567fb3541a1b90cd9837 100644 --- a/drivers/clk/clk-s2mps11.c +++ b/drivers/clk/clk-s2mps11.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -140,6 +141,9 @@ static int s2mps11_clk_probe(struct platform_device *pdev) clk_data->num = S2MPS11_CLKS_NUM; switch (hwid) { + case S2MPG10: + s2mps11_reg = S2MPG10_PMIC_RTCBUF; + break; case S2MPS11X: s2mps11_reg = S2MPS11_REG_RTC_CTRL; break; @@ -221,6 +225,7 @@ static void s2mps11_clk_remove(struct platform_device *pdev) } static const struct platform_device_id s2mps11_clk_id[] = { + { "s2mpg10-clk", S2MPG10}, { "s2mps11-clk", S2MPS11X}, { "s2mps13-clk", S2MPS13X}, { "s2mps14-clk", S2MPS14X}, @@ -241,6 +246,9 @@ MODULE_DEVICE_TABLE(platform, s2mps11_clk_id); */ static const struct of_device_id s2mps11_dt_match[] __used = { { + .compatible = "samsung,s2mpg10-clk", + .data = (void *)S2MPG10, + }, { .compatible = "samsung,s2mps11-clk", .data = (void *)S2MPS11X, }, { From patchwork Thu Apr 3 08:59:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037479 Received: from mail-ed1-f45.google.com (mail-ed1-f45.google.com [209.85.208.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 794AC24C07E for ; Thu, 3 Apr 2025 08:59:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670767; cv=none; b=uga1u+4LTu3OnF/ik2nAg9SgpUuvUTpy7OTDYfxBGJknWoIsSso7HST1/oE55nIvSKCdPpJVa7BCLgcDkkG5yMiQxEnqdMGgMIxQ6jsm+C6fuxUZbuamLuJo2Xcl6gWPLvq1AGLDHDx1ohMhKjP/MSofKcXjTABdzyX7sCzYWUM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670767; c=relaxed/simple; bh=ZQXUgJ+++iTVY6rSOqr6bNKwQtS/wOW8Ul9zOtzlYzw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=AySl6QmnjoHRwPEtqDTdwCm8GrjYJ1lLKxknmwQA3iCOH4ewuGZw5XOht8OBNmIi4n1YFz3x9URQVfGdtx9CWUksuUdbmjoifuv07GRbeueUQUdckwn/KBefl/dETQvkA1CtYfe1q4VBB5lLO6gbHXiryjS0zJTrbYKRQHuOQgM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=C8iwvNkt; arc=none smtp.client-ip=209.85.208.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="C8iwvNkt" Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-5e5cd420781so1396332a12.2 for ; Thu, 03 Apr 2025 01:59:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670755; x=1744275555; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=/FZ2sB+aGjDu2Ign5/fbJkQ1EFpiN/+kFXshKweSgHY=; b=C8iwvNktwpSWbWVc527210tUBSRsDCd2Mrocj+6FVI6N5sNG1h2ighoMsWH/iuLQE/ t9cTHv14FlIQ/iURwrLomEU5MQ/RR4mwO3H04ZPm/0/12R1i6Phvi07oGQXBDG64fIg4 XpvEV9ZkdTX0EwZ6NzwrU2CEesCpQkCZFpzx/pDVoDlA1aSPm52a6NUWNNZjK31KqTMQ GSvMRt2yD7VlywN7/7/tLVoiTTY7Sym58C6GxGB2uKtKHnU6kjcPk+voFFbjNs8poVxN BJoNfQPY6TkDDk7pIfPgdECeQrD+Wl8X4GgwdVi/JrsVsqxBbtffdXYRPxGJgeKqwso1 2WBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670755; x=1744275555; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/FZ2sB+aGjDu2Ign5/fbJkQ1EFpiN/+kFXshKweSgHY=; b=KkWVtvpdJq84l1Q1IooXagjeNTHFCYU6KMiqN2iallaYOcIAsnCe6fSyw8WaB9x8Jt 1kbgnwVByU9WVnnN7HFpZHdcBvUrKofkeI5kgDJ6AJb99i0kObObAa3QtpRaqZzMpERh XcCX5/tsp/CHICgWOf57GPODVgOxCjK1M1gswpVkh33wKB0K5nSpZP73v6FNglQ7xabu mhX08qPjCdz/SalatoZI8Q8aeEerT7Etqn9WvcHrY3B/1QESKiRYUeoLeseZi4Q2qZs9 W8piLR6HnPSYBPtsfVNeOMZmSkuDjP9AbcvndZgje9196mAujhdlRe/PM80crCTrgNYR LWRg== X-Forwarded-Encrypted: i=1; AJvYcCWstgq5oMlcL+l0ljteD5evfBfH1g2KHzlBB30wYRwRip26CHvihuYg9qxttblPSL2XzkckOYdOatCkOzKjkKBm6Q==@vger.kernel.org X-Gm-Message-State: AOJu0Yy+/XNEMR/4xANtuRTR0GM+8eqbbAijdXP6kshMCcl5DUnzI4iW /N0tjJqD4JqQz5JE2wcY2HJkr92d4eUxifGbAhXtqZfnPOI+W+gTAKmdSp1bZpk= X-Gm-Gg: ASbGnctL+sGKVEgqib3lmJTwOloUXK2g2Xlw9DGdMuKc1GWtyEtUfXO3axz31jooPQS qdCOjJOUJWRR5yPUqrptobrCfbmFrQpp/THcgmIdEFbloWpI82+0hw6XMmEupFJdNdml+Trc7Nt cvgBzWXKvVyyHyGJwT0gsk+qrguGyeRakr7c63C63zYmz8t/g+znbNz33p5oaucvaxPNWXE6PXp 4iv06yZpbujoF1IcPiqCkKffHYb1chIqy2S6FlwfaBIGtrBQlfkxyjx35uO2JjBKVs8SjLQQFfl 9zv1bAjwKxiZhy7pMF70oGPZIj4a9nhB+oEVyeKV5R5exnLfPtbGH9q/Pbf07bYjNt73ryPs58E ScV5durlJG3fYjj6tXNSBaYb0mBvp X-Google-Smtp-Source: AGHT+IGQNpVavXNQ9/frqDzO9rSosrg/aPUOlz+BV6bBkX6B3R/1cOiAuqPEN4gk8MQb14kPnJPxIg== X-Received: by 2002:a05:6402:40c2:b0:5ee:497:d714 with SMTP id 4fb4d7f45d1cf-5f04ec3a302mr4194362a12.34.1743670755488; Thu, 03 Apr 2025 01:59:15 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:15 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:17 +0100 Subject: [PATCH v3 25/32] rtc: s5m: cache value of platform_get_device_id() during probe Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-25-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 platform_get_device_id() is called mulitple times during probe. This makes the code harder to read than necessary. Just get the ID once, which also trims the lengths of the lines involved. Signed-off-by: André Draszik --- drivers/rtc/rtc-s5m.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index db5c9b641277213aa1371776c63e2eda3f223465..53c76b0e4253a9ba225c3c723d35d9182d071607 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -637,6 +637,8 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) static int s5m_rtc_probe(struct platform_device *pdev) { struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent); + const struct platform_device_id * const id = + platform_get_device_id(pdev); struct s5m_rtc_info *info; struct i2c_client *i2c; const struct regmap_config *regmap_cfg; @@ -646,7 +648,7 @@ static int s5m_rtc_probe(struct platform_device *pdev) if (!info) return -ENOMEM; - switch (platform_get_device_id(pdev)->driver_data) { + switch (id->driver_data) { case S2MPS15X: regmap_cfg = &s2mps14_rtc_regmap_config; info->regs = &s2mps15_rtc_regs; @@ -670,7 +672,7 @@ static int s5m_rtc_probe(struct platform_device *pdev) default: return dev_err_probe(&pdev->dev, -ENODEV, "Device type %lu is not supported by RTC driver\n", - platform_get_device_id(pdev)->driver_data); + id->driver_data); } i2c = devm_i2c_new_dummy_device(&pdev->dev, s5m87xx->i2c->adapter, @@ -686,7 +688,7 @@ static int s5m_rtc_probe(struct platform_device *pdev) info->dev = &pdev->dev; info->s5m87xx = s5m87xx; - info->device_type = platform_get_device_id(pdev)->driver_data; + info->device_type = id->driver_data; if (s5m87xx->irq_data) { info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq); From patchwork Thu Apr 3 08:59:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037475 Received: from mail-ej1-f45.google.com (mail-ej1-f45.google.com [209.85.218.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A861124889A for ; Thu, 3 Apr 2025 08:59:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670766; cv=none; b=b5anNupZVl4M5fDi01cOtffLyyD6/j4YESCkiZoaAxts91IGjfdqGebRCUmHxTpx2eazerGhAotxDDN13xSCTM3CDHlU8ddQBXGmED3I+uuTvT+6ijBBvKsyvG0JD7q0vyEUkdbUVytxwCFbxCR7OggCVrtHmMl5mRD00j8MQIg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670766; c=relaxed/simple; bh=XY+ty2A6DQsXp5psWmWSxlDWQ8KjYhDNZ4NRtatMswk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=m4pcTF6OPAr8D27Cv7WMN/P3Mxw8kEprzW5PahDjJ5beGdIg5XXkGniRB84oaP5wAXX6C7KPI9sBUEAUTKuXTJTBMJ9gcPPRQsH8h00XdKbRprUBy9CNvjCS+/C1W0tZML5aY0HZGF0rKuEvG7Mts93dkauCVEHqUATSeLc+bg4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=MK9oQ5Ll; arc=none smtp.client-ip=209.85.218.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="MK9oQ5Ll" Received: by mail-ej1-f45.google.com with SMTP id a640c23a62f3a-abec8b750ebso106540466b.0 for ; Thu, 03 Apr 2025 01:59:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670756; x=1744275556; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ZwiQ684ZfeWSIriRYeiGWHceehqqEuabrmdfgVRjbUU=; b=MK9oQ5LlNoFVd/eiMrTIFte5DX5KBItDdT5nwdslQOV0d74+Rv6+RE8WRrGV1zk/MV fUWV+fldEyWoycNJF1zNTQEOHIKPcfQShWUfdd/4lSVIUBAQsN8MB9WMqq3MxOIoixcw E3sK899aMCyIENr4RWnal14aRubHIRzVFsP+mwIGeE+7FNnOm3+yvVDmcebmOrB29fxj gwegwC857GTWxfjk78BTXuZuqUeOW0y6aFFbao+Jb/BDZIh8MnUUX5T0PUKvSPigU3Nh pKcMGmktO+m6HLrf3ujS2hbuaUmQFOz1L5Am8GBtIpYyjzkqUNNDsp9PjKEl8fQQH1SI A6RA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670756; x=1744275556; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZwiQ684ZfeWSIriRYeiGWHceehqqEuabrmdfgVRjbUU=; b=QDoIlydfcVXLSkGuj8xulLZU8ur3btCr6vPKY8/lnM4pvz3NIGk356sBvKiB/sc4tQ AlDU81pqsJZPT5sCLhjLIwweuciY7aktBqwTBjbozwXqcq+wdZm+p7hr09sguKi2+sKM YuP5gXWHDaSr1hFQSx1NJBSmqxAWA54PnKwPV05iqdxtPNZjKJYXShUC/ok3ZeounyDH hKhbpLu/98rYQCAZlLy6ha7dLs/UZRorWD9OBgOXZgGKQCpEUd+xqMxauDAIED8wr3Nc kKCjxYntLDRrMgTTN2npDiEwl/Dxt8e/To/4zcevgjLzOVGiC0uQEFwYNv/XkAyDx+6w 4NIQ== X-Forwarded-Encrypted: i=1; AJvYcCV0TTf4VA4SDQ7sqbHPDBIxY09/4SPdQxGkg3m7q2lvf1TcxOGRyJwOSquyEMxqtIbb9Q9MD9uInNsaTMnoFJRXgw==@vger.kernel.org X-Gm-Message-State: AOJu0YxVTTq1dXHuiw2rMJUOhCK6CkckqY+mTOuQZtAn9iHv2oU9Ulsc 4OZgvRolK9xFoeRj1Vj0L82sYEORjWVt3q25aAvZDPKm4YYDTU2As3gld1mtkzM= X-Gm-Gg: ASbGncvCqbyMr6v3qtxHJ20OKG00GlKV3V9Kpv/Coi4PVfnxX6bRw8WkgtzXKyfvMsq KoXgMGMJ57b2JgmAux0mPtGx3nOFqMRb+o6fJB130hq1uhLp48WQlx6fb70SZVBxhPXaSzPfFLQ wZZGxG6jjzzuSOG5Bta2CoSteA3bJRg5hTN5Z2MItMsgrEzoqX+AYrknMk9a6sqO/hXfdWhfUXQ Vao7NpTqH4fxJztLEMIphzwyIgsYF8J1XzdUXXSUJ00gptlZrQ3LRSb/1Zw7ZJNx3qxGSBQfq9j CtgQHaRoed7Vvz/86+wG/JT/SzoPJZ+4EjbWzrFCPJQBq/fjhjoA+tpcG3RmH35+23gfe+CBMTI q2Ok5VVBBoyiPo4tcvzc4IdDgnzks X-Google-Smtp-Source: AGHT+IGxqvs9WDVLgnZbd0Q1P61p74Sjm20wNP22/EBrrIOH4ecB3274nitjn+0Tvp+BuQBO2JC0vA== X-Received: by 2002:a17:907:c23:b0:ac3:8895:8e99 with SMTP id a640c23a62f3a-ac7a165e83fmr473122266b.3.1743670756231; Thu, 03 Apr 2025 01:59:16 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:15 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:18 +0100 Subject: [PATCH v3 26/32] rtc: s5m: prepare for external regmap Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-26-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 The Samsung S2MPG10 PMIC is not connected via I2C as this driver assumes, hence this driver's current approach of creating an I2C-based regmap doesn't work for it, and this driver should use the regmap provided by the parent (core) driver instead for that PMIC. To prepare this driver for s2mpg support, restructure the code to only create a regmap if one isn't provided by the parent. No functional changes, since the parent doesn't provide a regmap for any of the PMICs currently supported by this driver. Having this change separate will simply make the addition of S2MPG10 support more self-contained, without additional restructuring. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- drivers/rtc/rtc-s5m.c | 81 ++++++++++++++++++++++++++++----------------------- 1 file changed, 45 insertions(+), 36 deletions(-) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index 53c76b0e4253a9ba225c3c723d35d9182d071607..86ccf666c68059408907c97f2647716ffaad10c6 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -640,52 +640,61 @@ static int s5m_rtc_probe(struct platform_device *pdev) const struct platform_device_id * const id = platform_get_device_id(pdev); struct s5m_rtc_info *info; - struct i2c_client *i2c; - const struct regmap_config *regmap_cfg; int ret, alarm_irq; info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); if (!info) return -ENOMEM; - switch (id->driver_data) { - case S2MPS15X: - regmap_cfg = &s2mps14_rtc_regmap_config; - info->regs = &s2mps15_rtc_regs; - alarm_irq = S2MPS14_IRQ_RTCA0; - break; - case S2MPS14X: - regmap_cfg = &s2mps14_rtc_regmap_config; - info->regs = &s2mps14_rtc_regs; - alarm_irq = S2MPS14_IRQ_RTCA0; - break; - case S2MPS13X: - regmap_cfg = &s2mps14_rtc_regmap_config; - info->regs = &s2mps13_rtc_regs; - alarm_irq = S2MPS14_IRQ_RTCA0; - break; - case S5M8767X: - regmap_cfg = &s5m_rtc_regmap_config; - info->regs = &s5m_rtc_regs; - alarm_irq = S5M8767_IRQ_RTCA1; - break; - default: + info->regmap = dev_get_regmap(pdev->dev.parent, "rtc"); + if (!info->regmap) { + const struct regmap_config *regmap_cfg; + struct i2c_client *i2c; + + switch (id->driver_data) { + case S2MPS15X: + regmap_cfg = &s2mps14_rtc_regmap_config; + info->regs = &s2mps15_rtc_regs; + alarm_irq = S2MPS14_IRQ_RTCA0; + break; + case S2MPS14X: + regmap_cfg = &s2mps14_rtc_regmap_config; + info->regs = &s2mps14_rtc_regs; + alarm_irq = S2MPS14_IRQ_RTCA0; + break; + case S2MPS13X: + regmap_cfg = &s2mps14_rtc_regmap_config; + info->regs = &s2mps13_rtc_regs; + alarm_irq = S2MPS14_IRQ_RTCA0; + break; + case S5M8767X: + regmap_cfg = &s5m_rtc_regmap_config; + info->regs = &s5m_rtc_regs; + alarm_irq = S5M8767_IRQ_RTCA1; + break; + default: + return dev_err_probe(&pdev->dev, -ENODEV, + "Unsupported device type %lu\n", + id->driver_data); + } + + i2c = devm_i2c_new_dummy_device(&pdev->dev, + s5m87xx->i2c->adapter, + RTC_I2C_ADDR); + if (IS_ERR(i2c)) + return dev_err_probe(&pdev->dev, PTR_ERR(i2c), + "Failed to allocate I2C\n"); + + info->regmap = devm_regmap_init_i2c(i2c, regmap_cfg); + if (IS_ERR(info->regmap)) + return dev_err_probe(&pdev->dev, PTR_ERR(info->regmap), + "Failed to allocate regmap\n"); + } else { return dev_err_probe(&pdev->dev, -ENODEV, - "Device type %lu is not supported by RTC driver\n", + "Unsupported device type %lu\n", id->driver_data); } - i2c = devm_i2c_new_dummy_device(&pdev->dev, s5m87xx->i2c->adapter, - RTC_I2C_ADDR); - if (IS_ERR(i2c)) - return dev_err_probe(&pdev->dev, PTR_ERR(i2c), - "Failed to allocate I2C for RTC\n"); - - info->regmap = devm_regmap_init_i2c(i2c, regmap_cfg); - if (IS_ERR(info->regmap)) - return dev_err_probe(&pdev->dev, PTR_ERR(info->regmap), - "Failed to allocate RTC register map\n"); - info->dev = &pdev->dev; info->s5m87xx = s5m87xx; info->device_type = id->driver_data; From patchwork Thu Apr 3 08:59:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037474 Received: from mail-ed1-f41.google.com (mail-ed1-f41.google.com [209.85.208.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7EB6A24C08C for ; Thu, 3 Apr 2025 08:59:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670766; cv=none; b=sNfvzUXZ/rUC44d4XhhBHY3VeySqa6pR2iMaS0p8Z03IiucoAKbkGxu9FQTYw0fZ1lc8OnjXzcCPIq+ciFSGqunSc9/e15e8uDGtZa/T2S4jbuINF+lwBF9fzsnrC4d6HrI7IXqhG4x4hIySg5ErzAR/R/KPpYNvH6qccoTGMWg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670766; c=relaxed/simple; bh=sbOiK9Z/f00bA00NdDdv7dxhs7NOGeZKoor5kyfk8Ho=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IJW1NWuBH/N+9rmpMQxiZ6VV6Qjr9BYFLXmBbyK/TgvZA7kYrZ9UoBkWnegWZ7/LATnFnGbdk27CiCH+TKGwLabqH1KnBWFr+lMNXK9heD1v6TE/1dZL6VN8tll09Vwb/qkhLPKCoGKR6z+EXmCbzyKu1/80sRead2B5KGWdplU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=rVFmg+Vy; arc=none smtp.client-ip=209.85.208.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="rVFmg+Vy" Received: by mail-ed1-f41.google.com with SMTP id 4fb4d7f45d1cf-5edc07c777eso892086a12.3 for ; Thu, 03 Apr 2025 01:59:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670757; x=1744275557; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=RKjSO+JBCZWmTR2KI3Lfut4sG9sU0pAz1iqONtK29C8=; b=rVFmg+VyKzAk5QLjyChTYgfPRekK4WenzUvJ7mVXRfVE+xZISBqFq2BDbyo5ePSO/i b6UFl8BEfdBBenn5GFtYriyK8o8E1voPDl5bBlWgyhLtBgXU3bQoxCHffp2TDC3CES6M AOihCczzHCz2rZcyyLf7JW3DDjApWgnqPqZrquyI1VMh+bvUbOomVIUyk7tOXSgaLKzN 3ttkcgunBYQ5xFPX+YeZbM9AXNYDjdkjj68hSDh1tFE9PoywQXULvxFF496aVnLSXlXP EcK8DpIsj/tfUO9nadYQuYXaioZ9Z0J7xb9DIGT9njOQ8iTCalhXA7JIHz0hSe762MXd urqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670757; x=1744275557; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RKjSO+JBCZWmTR2KI3Lfut4sG9sU0pAz1iqONtK29C8=; b=vKvsK/QyXmR8Dk1B1EDGapFShYSCWQDawlShG7+j26a3zFlM0fOTJSMJqpGdLUhdNq MoNIorra1DZWSNEEbpdEJQ3KDh08BxK6dF19My4TVL8KJ/szCyG0ETl+1KvMgNeU3+aV nTlzrqVjDp9XfLoMFXFP4dgjTKfjS11czJfLyGi7bLtNjEHL9vMW526S/+vB5fwIGb3a +YBdOdUfZWF6OU5f85vFuXNaxPF0ZtgxjqVErWi/tjcFxyKnQojUK6jUD0dksgp2ocug L2kdBfgBrf1o2mS0uejniZ+AtV8cZR2CVDpJw//yF04LsYbvNYLOiOdy4fUgUNNP6TDD QK4A== X-Forwarded-Encrypted: i=1; AJvYcCV00BafHs7hvPmISblLitM080CNCA1/jrdMZTYIReu/Hpes846tvtiODylLxL53xh0Y9NEro1ycHDvH28nPuWdb6g==@vger.kernel.org X-Gm-Message-State: AOJu0YzDpU5cmfS5xdZGYakZP0q+MOnLnGy12BNK+QQasiIHw1kTHPRN QynoherzVlqIQyGljAo7G5zUUH897G/eAIE+QI5PbDUuxPahu6AzLEh4u76vNww= X-Gm-Gg: ASbGnctTMY4Pjo4EC3Tw3u1f4dzwhdAIHz/MYGcUlEiDgUVyDib2ESz39avhYrO6JBN 6SmTvUQ4FP8rpkxh2NZ0fe5m1an6MPv9YPGVUxyarK3d0Fb6tVzxAFFUt3f1IXxp7M1mWktA5a3 E2x7Kw00NCYTl5YLME+Nm36hnxcDh2qc4JIuc2NV/UVQT/So1DfWwCMldrFo+kPvaUpH4Tsy+T+ dCYRYthFdBwyIy+indI2QSsDIwuDRAwdHaxiRKkg5mNIJyuGR7Ic3OSMgjI2X765lPnWjiShmdz evUDboCDthWHpFyQfzsqvo1kFu07jFPti2QRuBFFrBUufOFIbDPsQ1upe+DX09m/rxzZyDsJeZR +msm+Q2Q6ibjjfsjed09rNnkpjrtp X-Google-Smtp-Source: AGHT+IF6fx+pJv4iCabB+Gq0Y1FWCxO1y1Kv+NIBC2jENVtzdFZG3oNJuULm8j69u/Q8i/sO7cV86g== X-Received: by 2002:a05:6402:3204:b0:5f0:82cd:500b with SMTP id 4fb4d7f45d1cf-5f082cd5216mr2775019a12.19.1743670756751; Thu, 03 Apr 2025 01:59:16 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:16 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:19 +0100 Subject: [PATCH v3 27/32] rtc: s5m: add support for S2MPG10 RTC Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-27-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Add support for Samsung's S2MPG10 PMIC RTC, which is similar to the existing PMIC RTCs supported by this driver. S2MPG10 doesn't use I2C, so we expect the core driver to have created a regmap for us. Additionally, it can be used for doing a cold-reset. If requested to do so (via DT), S2MPG10 is programmed with a watchdog configuration that will perform a full power cycle upon watchdog expiry. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- drivers/rtc/rtc-s5m.c | 60 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index 86ccf666c68059408907c97f2647716ffaad10c6..0d8783577bab4f4ebe61050dbd68387d970773bd 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -53,6 +54,7 @@ enum { * Device | Write time | Read time | Write alarm * ================================================= * S5M8767 | UDR + TIME | | UDR + * S2MPG10 | WUDR | RUDR | AUDR * S2MPS11/14 | WUDR | RUDR | WUDR + RUDR * S2MPS13 | WUDR | RUDR | WUDR + AUDR * S2MPS15 | WUDR | RUDR | AUDR @@ -99,6 +101,20 @@ static const struct s5m_rtc_reg_config s5m_rtc_regs = { .write_alarm_udr_mask = S5M_RTC_UDR_MASK, }; +/* Register map for S2MPG10 */ +static const struct s5m_rtc_reg_config s2mpg10_rtc_regs = { + .regs_count = 7, + .time = S2MPG10_RTC_SEC, + .ctrl = S2MPG10_RTC_CTRL, + .alarm0 = S2MPG10_RTC_A0SEC, + .alarm1 = S2MPG10_RTC_A1SEC, + .udr_update = S2MPG10_RTC_UPDATE, + .autoclear_udr_mask = S2MPS15_RTC_WUDR_MASK | S2MPS15_RTC_AUDR_MASK, + .read_time_udr_mask = S2MPS_RTC_RUDR_MASK, + .write_time_udr_mask = S2MPS15_RTC_WUDR_MASK, + .write_alarm_udr_mask = S2MPS15_RTC_AUDR_MASK, +}; + /* Register map for S2MPS13 */ static const struct s5m_rtc_reg_config s2mps13_rtc_regs = { .regs_count = 7, @@ -238,6 +254,7 @@ static int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info, ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val); val &= S5M_ALARM0_STATUS; break; + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -300,6 +317,7 @@ static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) case S5M8767X: data &= ~S5M_RTC_TIME_EN_MASK; break; + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -351,6 +369,7 @@ static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm) switch (info->device_type) { case S5M8767X: + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -374,6 +393,7 @@ static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm) switch (info->device_type) { case S5M8767X: + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -411,6 +431,7 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) switch (info->device_type) { case S5M8767X: + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -449,6 +470,7 @@ static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info) switch (info->device_type) { case S5M8767X: + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -487,6 +509,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info) switch (info->device_type) { case S5M8767X: + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -524,6 +547,7 @@ static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) switch (info->device_type) { case S5M8767X: + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -604,6 +628,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2); break; + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -634,6 +659,25 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) return ret; } +static int s5m_rtc_restart_s2mpg10(struct sys_off_data *data) +{ + struct s5m_rtc_info *info = data->cb_data; + int ret; + + if (data->mode != REBOOT_COLD && data->mode != REBOOT_HARD) + return NOTIFY_DONE; + + /* + * Arm watchdog with maximum timeout (2 seconds), and perform full reset + * on expiry. + */ + ret = regmap_set_bits(info->regmap, S2MPG10_RTC_WTSR, + (S2MPG10_WTSR_COLDTIMER | S2MPG10_WTSR_COLDRST + | S2MPG10_WTSR_WTSRT | S2MPG10_WTSR_WTSR_EN)); + + return ret ? NOTIFY_BAD : NOTIFY_DONE; +} + static int s5m_rtc_probe(struct platform_device *pdev) { struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent); @@ -689,6 +733,9 @@ static int s5m_rtc_probe(struct platform_device *pdev) if (IS_ERR(info->regmap)) return dev_err_probe(&pdev->dev, PTR_ERR(info->regmap), "Failed to allocate regmap\n"); + } else if (id->driver_data == S2MPG10) { + info->regs = &s2mpg10_rtc_regs; + alarm_irq = S2MPG10_IRQ_RTCA0; } else { return dev_err_probe(&pdev->dev, -ENODEV, "Unsupported device type %lu\n", @@ -735,6 +782,18 @@ static int s5m_rtc_probe(struct platform_device *pdev) device_init_wakeup(&pdev->dev, true); } + if (of_device_is_system_power_controller(pdev->dev.parent->of_node) && + info->device_type == S2MPG10) { + ret = devm_register_sys_off_handler(&pdev->dev, + SYS_OFF_MODE_RESTART, + SYS_OFF_PRIO_HIGH + 1, + s5m_rtc_restart_s2mpg10, + info); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "Failed to register restart handler\n"); + } + return devm_rtc_register_device(info->rtc_dev); } @@ -766,6 +825,7 @@ static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume); static const struct platform_device_id s5m_rtc_id[] = { { "s5m-rtc", S5M8767X }, + { "s2mpg10-rtc", S2MPG10 }, { "s2mps13-rtc", S2MPS13X }, { "s2mps14-rtc", S2MPS14X }, { "s2mps15-rtc", S2MPS15X }, From patchwork Thu Apr 3 08:59:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037478 Received: from mail-ed1-f54.google.com (mail-ed1-f54.google.com [209.85.208.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3763224397B for ; Thu, 3 Apr 2025 08:59:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670767; cv=none; b=sbHTT6yDhc8Oy4p/YUq5x3cuz45WKWyh1nxOPxi4/YciI7R2MJ9PgsVaczfO1MENENEIbabVgainpIrC8GbW6odykQo0qcXp7v/F+0p3nUCA1zfN4jVBH+IPEkVUq90K4ZrkkQQDQlg0GIYEjnciOqDnzQdHRxQv0hKyHKimrvU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670767; c=relaxed/simple; bh=OstHPLtut+rInIwPbWUGG5F4uJhc1s8p9YL3Yn+eQfw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=uptGkL+un2/lgV7e0umpbbnKiO+AkfnmfqdVotf4sCJEjIW6Q7jM7TIPo4ym6vjvdRc055Hi1yoiyGCIJECKVZaiETgbhjT8Mu2S4CKlTO3onyhQOZ/eQLqO8GFCVZeKHTWroyifQ2D91rfOh0YdQxjKh6d8i5IAPlIJrNeNhaU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=a0/vvPQJ; arc=none smtp.client-ip=209.85.208.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="a0/vvPQJ" Received: by mail-ed1-f54.google.com with SMTP id 4fb4d7f45d1cf-5e6ff035e9aso1322394a12.0 for ; Thu, 03 Apr 2025 01:59:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670757; x=1744275557; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=5zOrAobgqux207RdFFKdVSyI3bSrdsl4WaNtosICsko=; b=a0/vvPQJ3FYrLA2YsMerto3UUJnPQNJcOSWbV78Xf/+9Y8scEybfd9wx0+nCwPBjoT 9/g7VDYzXVO9oOuheWQnlDIbcN/gyuvKFotrrLuYDNMTqHBxN4G/uMdq9/q/6qTA/191 a/M61ijIigm/uAaspNgGatMc8MBxlgAnooBdaorUGW1MyYIO/s2diRzqEqhIL4zkp15w lPlxAocEKnkg3gRWneFoJLiKJLxH4MSsDNJJ8ygZwZzwHi/YCxLkJp8+dzFR4+iRh2JT Xy4DnknyNT/9pW8Uzfwn2akXdYNcWkNmA2LvEXFWAp4d7/jhXjk/K3UQCnU7eZBcHWFo BGsg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670757; x=1744275557; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5zOrAobgqux207RdFFKdVSyI3bSrdsl4WaNtosICsko=; b=p3fPv/vIjNJtR3f8b7+DEpbugYPiDM9SVNRLJ+lVJe0jm7/sZvG8FuB8KWLaeRsrN4 VrpfCR64dkR+Eg5vVQUJKhimcNI1u4EVTz6Reth98bY4+FST9XikueOevRJlRjTIurxe c9wagJtd36fk76dYeyu+mIWTiVlFV698xou/OZSlmbkUWmou1bHfH0BVixbIgU3E1OsS jIikqg6eVmvbil5tm5S/1ey5jPWevE/9OCZI48nTMaFSxsCop1WJlR0cCVmnKlOhA6fB yQRZYT2RWk31F6TDi4b50ktEPcmk68Gn0evERXnrJaq+B3NxqOPms+tVAMe+FuHcWIZE n+jw== X-Forwarded-Encrypted: i=1; AJvYcCW50I6bip+qvRnjXhS4btOyZeSnqJSoTGOXxVwAdh0N4BViYhUGSvBVwnhSrCiU7MfUuXDMBxj20yazf6cscoRw+A==@vger.kernel.org X-Gm-Message-State: AOJu0Yy+nre1w4LYpO74YcVIGYtqVUo3B0Su9amy84mBgvXdbDN+CDWZ WQ6oTKe6ldxC/+Jj+LWEJpNSHuPaUF4RsBM2y+JfJyZafqBsfMBgktTTfhrZmDc= X-Gm-Gg: ASbGnctafNouKuttmT7L6yQDIo4el/rtdZ0qKiIZflxRTA/TLmhxdzcKv7eNljhOYTl PHTKCuIdnNqM5Jjie0U4rcmtho0WeYe1QFu7HUGMYKUxEdvjl/vTNoGx65DJVYvk3nT+nWJ7o3Z 8OLZybZLSHa1QBaiVyu3wPWTUH5Tv8QXS0Okr/I8ELkI7eT5Vqm72qUQMkPUUArq18YNgorow4e YqkRxC7ZWa45SXCcOY5AbYSoVdb7YBKrct6oi93U66VNr1mRRy3l1jUzxfwjGg/CFdGWjFlA768 GipPe7D46M5/iiERLoCNTMp5FChlKzMSToVZBWDc6AxOV2gzOoHvqAQJYhs13ZCLPVy+UZzUE5u Q/PuCEG3iMepRNe5XhFuWra/PdaPh X-Google-Smtp-Source: AGHT+IHsXg/hWI5W6L2JAbs5tQ+hU9M5VZLzhEtJEwJ8sjShCEtp9J7Km89nFH/JtsSi3gQsvsWdtA== X-Received: by 2002:a05:6402:5114:b0:5e5:bb58:d6bd with SMTP id 4fb4d7f45d1cf-5f09300645cmr1255191a12.10.1743670757293; Thu, 03 Apr 2025 01:59:17 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:16 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:20 +0100 Subject: [PATCH v3 28/32] rtc: s5m: fix a typo: peding -> pending Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-28-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Fix this minor typo, and adjust the a related incorrect alignment to avoid a checkpatch error. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- drivers/rtc/rtc-s5m.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index 0d8783577bab4f4ebe61050dbd68387d970773bd..7b00e65bdd9c25b3426f92355f8ea36e66c3939f 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -243,8 +243,8 @@ static int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info) return ret; } -static int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info, - struct rtc_wkalrm *alarm) +static int s5m_check_pending_alarm_interrupt(struct s5m_rtc_info *info, + struct rtc_wkalrm *alarm) { int ret; unsigned int val; @@ -451,7 +451,7 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) dev_dbg(dev, "%s: %ptR(%d)\n", __func__, &alrm->time, alrm->time.tm_wday); - return s5m_check_peding_alarm_interrupt(info, alrm); + return s5m_check_pending_alarm_interrupt(info, alrm); } static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info) From patchwork Thu Apr 3 08:59:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037477 Received: from mail-ej1-f43.google.com (mail-ej1-f43.google.com [209.85.218.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1F91524397A for ; Thu, 3 Apr 2025 08:59:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670767; cv=none; b=lH+D11bUVnfmE1QGkBvwJwyUDraNgJcAEqykxbFNiqfzybpUAsXDidjxXjcBUBzH/HSxUAu1BPYwTGGko25CfMAbUjL6OgdXQ4qL0dqzp/2n+nfcq3LTnZUVZibMIW+X7Y8yyMs4tklsK4UWIEKkh8Uig3ZV6QyiA1blSxO823g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670767; c=relaxed/simple; bh=X823p7d8VeG19dJIhYLsSWA3HtswWk7j0eIGd+yYPcU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Y3wJbg9mhhX4ufLtKm06gXkK1Ew2R1+Hw1n5XO2QHybMWoJ4ASVgFqdef2Dg3SF8owDoqcpa+Us7K9zElv5KlBeIq1MWshY7QVPhn333J7ioLYkN/5RS2jxcU9LlmSlQI1N8K+o6w1VxRBmv6HUnzyviHICikCp22S3UADFOQT0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=Hhk8vDhb; arc=none smtp.client-ip=209.85.218.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Hhk8vDhb" Received: by mail-ej1-f43.google.com with SMTP id a640c23a62f3a-ac2bdea5a38so104119966b.0 for ; Thu, 03 Apr 2025 01:59:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670758; x=1744275558; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=5TCn0wifCdb3UC3ucEx7Zkhg1UJ6ww+TPiSGCbm38yQ=; b=Hhk8vDhbqcYUwCwLviKA6jMQYEXZJsFvuMh8G+Xqvfdnf2TKNr0cc1BjulGiJ/rXlj GsFFn/4bG+va3UMLRfaFSkYMY3d84AKVFWFXQAU9SrSByg/0//BUbzK7J1OnXa7DGgKD 4hd0Jqcx1KpjeojwJCkAZfVLUU6UP2HIvkscBwtJJKDkauUVoJe1htL7wKTKwxZyS3PG /lpiDyrO6MkTboVoXfTxqZTFbnc9mhizkOpLAhlVqVtASUfsPKc+1p4MiP6eCueamnsu o5MO68lllCRJZEx6/2sIhoyqxKOqq34CkWBzSf85cX9eoWOrN3MeXfd0Df+BDtCmIiY6 6ygg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670758; x=1744275558; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5TCn0wifCdb3UC3ucEx7Zkhg1UJ6ww+TPiSGCbm38yQ=; b=SI4mFuGYLTQZg3BUg5An63GsCD6ItS50hePqrZnr5GLyXHaGsKfNtIvUDzm1pyu5L4 /hZrTqZK98RpAdvS8OXUzgdY2mReFH5iYGv4T5IW+IWtF/OhoY6XIIcn0rURDuwRIikj CNiA4bdbUPmi+4N+HFSND2PURE5uL67+XtUFs/svzgTwVTXtIiR/lj0u/L1VeYHnMTJo A+qo6cToZ+5QkGjfWGO3nG7vlaCtDNHpL8XoM1ecEZyPAupsDaxTCXaxToDiz99rqdmL rC+umA2PmQLc923dn0vhsGEPFybh6XHavnG3rIXShbtM+7v/OGy6WG7v4oTaJl+FXrYF kqrQ== X-Forwarded-Encrypted: i=1; AJvYcCWCxhviFg5h6jxU3LJaJAsk5CfwtKePqEkCzKpbwK2zdK1nsUIYAPvu4TFYM4h53+xDTh+oGOW4z6Q/R7VCRpP5zg==@vger.kernel.org X-Gm-Message-State: AOJu0YzQACZu0XSG3pYzrzUCEu+BA3/F584sZPgKQFN+BfddGcQH70tt RQztZBDpeB038cjeI03S2kK3+hqffPfj6yUxtzCoCEUhPHzT4gOurF/urn2Q65s= X-Gm-Gg: ASbGncv6zQEGOkVU2peWVXIE3G5EUGasNgb2THTAKVWpcLTRBsvOGeLQy806+NF++f0 1DVsZKi2qo2JiNkUZvaT2k5T2Eyv9jSjcsb/whlI0BChcfkl4c9qlfMiTg+ZK/QRbPpC0QdwCBN 0YqVG3Rrksou1TSKsDfbjP6QFG+gisaH02ak0HRd8LVU/V7e7RRXS6PIZfYuJsT00xyfFm/lk+B 4bXgvaElc8I+K5SDQmrXoShTt2mBk9erDMMrNjpL18CuUakxy5DZ6KKXt0nz8PWsBolJ5KMzdKa IvjrU2P1pEgiLgHpjUjVdzDPo8XIyDlNtrkAt2SJZwHhfOGNCya0in2G2pWnkDVRvkrELQoxRa3 P9elRSz6QBArn8VCH88QPzG+p2UKou0sseKnAjQs= X-Google-Smtp-Source: AGHT+IGkYnX6rQ6GWjWnABJsBjhI2LJzWv6z53In1ISOpBusxw5cuCX0wciz6W5/efFFB3SIsEOq4g== X-Received: by 2002:a17:907:d25:b0:abf:4708:8644 with SMTP id a640c23a62f3a-ac738bbebedmr1751267266b.43.1743670757782; Thu, 03 Apr 2025 01:59:17 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:17 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:21 +0100 Subject: [PATCH v3 29/32] rtc: s5m: switch to devm_device_init_wakeup Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-29-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 To release memory allocated by device_init_wakeup(true), drivers have to call device_init_wakeup(false) in error paths and unbind. Switch to the new devres managed version devm_device_init_wakeup() to plug this memleak. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- drivers/rtc/rtc-s5m.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index 7b00e65bdd9c25b3426f92355f8ea36e66c3939f..e8e442c503064eb4e570af5bf7dcff6bfa7f4656 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -779,7 +779,11 @@ static int s5m_rtc_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, ret, "Failed to request alarm IRQ %d\n", info->irq); - device_init_wakeup(&pdev->dev, true); + + ret = devm_device_init_wakeup(&pdev->dev); + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, + "Failed to init wakeup\n"); } if (of_device_is_system_power_controller(pdev->dev.parent->of_node) && From patchwork Thu Apr 3 08:59:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037482 Received: from mail-ed1-f45.google.com (mail-ed1-f45.google.com [209.85.208.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B6EF924C67F for ; Thu, 3 Apr 2025 08:59:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670770; cv=none; b=FHVfpTbq1heTeI0bWIZr00v1hmJRbY6wpbDsB+OZNAoRtajqse02UJn0V0V0B8/cbQ01IgNCS7kSkAoi84pfFLbhYs5SlQYOWtP0iUcmHHEarnuwXZO/p5owlitmYu1GD4p927sF1+phrprNtBm9QcWI/GpnurlbvG9HOT0OwOw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670770; c=relaxed/simple; bh=oM7nIChVy6AnX102peSIS6No2vZfRMNewLZjt/WfrE0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JG11l3IizozHoOysE8Bm2aCVIrWVjbLSHlFxUKHBgBrBcJb9rXGiPkyDmF9EyXna9mhfETxfQ/jXO71Ei4WFwDKCVJxTrbHn5E3K29GZ6y+Wtl0S8NvVFJp4txbNl21vFdzvzYkiB50rizO//QCcFdyFly/z5Z1Lxy90WWz87ss= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=xnmhaCd9; arc=none smtp.client-ip=209.85.208.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="xnmhaCd9" Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-5e5c9662131so1125220a12.3 for ; Thu, 03 Apr 2025 01:59:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670758; x=1744275558; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=31t2yEGURbHN+dYzF9A6q02DZ3VBH6YOfFo8ts0pTFs=; b=xnmhaCd9Zm5KVsU5ibOL1l6D3ybGyd/eToDjJmQT5PDvMGfSd++pD138Ee+e7c6AnE PrQO2B2imaSLq/6GihlyV6wQHVAHrH6pO7KtpEbpQ8ZYRP2wm6RtQ284Gc+91DR+hcvV CLhaEMocZTXuQeDi9dCAcBXJZHxlg+TRAfaotPV/Nj+Yh+3inN6eEgLoA98Sv/+Xzbal bVc0/DoClIL1mqzeOmFd0JFa2UjruYi1p7J6JvZ1G+27kCpVi89RAUkyeFumJtofu1FV +SQlFzBpWsj0q5C3n2rRHSNCquYbhdkDctbSt7fXnz5Trj3I0Q03JjTYTDSOjJpz6ktu qBaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670758; x=1744275558; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=31t2yEGURbHN+dYzF9A6q02DZ3VBH6YOfFo8ts0pTFs=; b=rtE5sPlcnJze09yk/J4u4cZubtcOW5k3I1ceg/Bonz9/9g3xXwXf6GbjkhoQTPUxa6 +zZXTKPxhkirkxLsYCeaQcOlhVJmZlRN4HNnzwTW2yQG3D8m32vriHihBQwveSM+Mmdf XEKJL63ITILw6xI94XG7ENTh+jMIEQG+E8Ncr9S/hcqhTFltwqT3FZtovDSh3U3heypV E6eX6ugNXJgXbx5PeKDHax7cmUaZwtfC3bGpMsHg0vMFqh0QFy1fAbiuAk1T3L7/qYJI g4jxS2iw6gT3ytlkkAWNQmkaFdlHg5O+ZzK1QZ5e02vOEotDeehygiMM5eblQ33u6pg4 wKrg== X-Forwarded-Encrypted: i=1; AJvYcCVa+QL63mUAv+2leSJIfdqWqt0+prPo3N9IGqh789E3El2GueKMEKhNe/KWeNCi+8S2UIqJq1MaYlJoN3iS9B5WsA==@vger.kernel.org X-Gm-Message-State: AOJu0YxoqlrqVAcANSXWhhx2L9/IIjCKnBkcinPoWfxhJ1EfuX0bXVBa AhZkJsjsHdtxIfgrCNTxu34mbiZ9tAu3mGhtY1VIcEFalHV+5TJ/TOGYg/50kuk= X-Gm-Gg: ASbGnctygcnL3vlNy/vkh5BueEJfJL9t33fgG4XMKmnkKbOLhn783ZAwBgN62xnxsZz U3jbQO5MaBZp30+HqgBNrDbdPnAYRjzKZPQVpKnPvW2ETZTE+QmYb33KeJE1G2SHDZs5vVsFAvL cIYjI+jj9d7tUO3VgCgKJbl8Gfm4L5W5CXhqfP82VnfSzP0zpb5o+OuYHrQJhtD+sbeYSlXrzwo 8kMxsX4cMdcFd03P5ffSKh+JF4EtFMGtxebNwsNTjCElzisQMW7rDI4EiLhWdCeB3M+E6xW9s9a Q12k2hcKL3EgbBqtU1eI4wL7vEBkWUFttHuRXLXdBxNavBtxjBAAYtKhTO0qLBYfLoi6xWIOxYn gEmPpcRbtOcEmatTR4Nfi3H3aj6Mu X-Google-Smtp-Source: AGHT+IFEc5fuLq8ADhguEhOTmTcH3HLdnlMJdU+ak+pq0TlS6iw1Do8PDAk7ua5/zSdVwdumNPkJLg== X-Received: by 2002:a05:6402:40c6:b0:5ec:f769:db07 with SMTP id 4fb4d7f45d1cf-5edfde2199fmr15498579a12.29.1743670758300; Thu, 03 Apr 2025 01:59:18 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:17 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:22 +0100 Subject: [PATCH v3 30/32] rtc: s5m: replace regmap_update_bits with regmap_clear/set_bits Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-30-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 The regmap_clear_bits() and regmap_set_bits() helper macros state the intention a bit more obviously. Use those. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- drivers/rtc/rtc-s5m.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index e8e442c503064eb4e570af5bf7dcff6bfa7f4656..fb65a8e439d72d9070751c00f5826a403ac0b416 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -338,8 +338,8 @@ static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) /* On S2MPS13 the AUDR is not auto-cleared */ if (info->device_type == S2MPS13X) - regmap_update_bits(info->regmap, info->regs->udr_update, - S2MPS13_RTC_AUDR_MASK, 0); + regmap_clear_bits(info->regmap, info->regs->udr_update, + S2MPS13_RTC_AUDR_MASK); return ret; } @@ -351,10 +351,8 @@ static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm) int ret; if (info->regs->read_time_udr_mask) { - ret = regmap_update_bits(info->regmap, - info->regs->udr_update, - info->regs->read_time_udr_mask, - info->regs->read_time_udr_mask); + ret = regmap_set_bits(info->regmap, info->regs->udr_update, + info->regs->read_time_udr_mask); if (ret) { dev_err(dev, "Failed to prepare registers for time reading: %d\n", From patchwork Thu Apr 3 08:59:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037483 Received: from mail-ed1-f51.google.com (mail-ed1-f51.google.com [209.85.208.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84BFC24A066 for ; Thu, 3 Apr 2025 08:59:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670770; cv=none; b=O7REZTfsEpTxRdBOayPURNfOd7H4xgSOLHGHUTqJu3cxO4d7gdz1F7Bq6lnx23ki8u1DJYbREIWfzeE8X3wZ7/1L4CyfETJR5HKqzEQINKejAqu3datahxvtVmi/+BIJY930Ly5KGpQ1h1rV4jGyLjHOjn3uSED8eABIYSslseU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670770; c=relaxed/simple; bh=GESUUSr32C5v+JmyTkWMyaf4NO/174Vzhegyb1L9aRw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ViBz7atmYvc9NZnFfAYitTvjEOHPHwNTLBPL5Jv8+9Z6KOOSl8LoJZOhd8xfW40fX9q7xgxt/sWPtkML681hQcgRszvi3b5A0EjwScHoEXu1BiknBXAd9j7BY8XmWjXLsON1ijs+6q5DzSGuibE//khOCgtrMmL/Ec8yfbHcFpw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=BjAy18u5; arc=none smtp.client-ip=209.85.208.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="BjAy18u5" Received: by mail-ed1-f51.google.com with SMTP id 4fb4d7f45d1cf-5e5e63162a0so1035032a12.3 for ; Thu, 03 Apr 2025 01:59:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670759; x=1744275559; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=PSEpA1j4+zmEauzOiOoF/mVKhD6CkjV25eyM5OWecNk=; b=BjAy18u5MDej46oSBLQj9uVL1Sf6Rm4PoIgfKOjGinEeCUa9eopc4vUN5LTSw8eQ0O KTh/zspz9CGcOj4RXCBWPauFPj5z3+7caeFdcB3iMMHTiztBuqFll3G82TeCMsHP0uoO gRk/E6nTEEj/R+RXpo6u2RaPjb/3UGgr0PIugrhU4jbkxD1zmJ10jfQU76aLRnMq6liz wnRlZGQfZF47MrHsz/ttO99IjC19HSV+bATLwDazmoLahCcuXevWH71OM259jXhQTN+z UKI15hg7XN9Lf80ZWYNViOMEuCHA2wyOsXw5lVRCisF8y43b2auBJXwzz9Y3lNWV9Np2 +wcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670759; x=1744275559; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PSEpA1j4+zmEauzOiOoF/mVKhD6CkjV25eyM5OWecNk=; b=okpueC0Ybn4iLNv6Zv0dMG/M2dVZAEKEbqPRqQ0RHfHCUtWEUqKSL48zW4ykRe1NrL ALEFo0zedAicKw3bOk/a4Plw/v3Z5Ga0oVzph3wlPbW9WmQMvhz6aYnL5XK4cv+zrjYJ Vj48QrvoymBfwlGI3McPJvQHWFCw6HG1wfT002yObv6qLsqjbJDpz+qLicb9mrylwojt hegdiiqzXZXFzKxil/msN1l2tlPJ80CEdTZBOt+byPFMz0FmST7awi37KGmJEYzyYqaW VDyY6rwYUSLcJexjPzASkoefMHKwtVTVom05zIZts16hPTfJD/Bc/P86limnKVgzhTGS P7oQ== X-Forwarded-Encrypted: i=1; AJvYcCX2vtc9YgoQXnN12loLDLgacJxVuO/jL32MExybkptZf5VnRQxySumPcd0TtmZcc8IdCJUFbiAXUYaBcDrgd2kMWA==@vger.kernel.org X-Gm-Message-State: AOJu0YxHWUFV77y9VeCgpW3QQo1lQGhwdKsYyzUlflF/fJkLpK6L7NxO M2XtP8OjRm3p6XRMfgt9lXriCzgHDeUY8ecn6XZFcquIQyHhAu/0ZB/Nd2MFxxU= X-Gm-Gg: ASbGncvHucwZLPJKOfBbqC5kEDS8uo9eT08Th0B912RyytpkdMvo6hpfx5g6vCk/5aA sWPIliLW2X+IrbzoLGCR4DNhsGYrEiCvCSrKo5awJFZs1pH69nX4gbPhjVIXtwUmvqF9huVWlD0 J0Sioy/09TDJP9Kk92k3rNXoC3HdoieZovuWAxRqCn8s88Qm0zbI6v4wFtWkUhcYCTfGPKqQ4cm 86xqicRmqmqSe/Wv4gjEK9ettPSuiDqH4OfMWucRlwI05ke60euJd2uGfEGo8+cKi/xFxNb5kOl JZ7bDc7uvi2e82b0TU3nsHhqVabTBc0ClH2/AZS4kELy6LKn/7YtqzdPAtj68fjk3BCDuKj06h+ Aqgq/igfhsgqNbljHTzzkHXSyBFI0 X-Google-Smtp-Source: AGHT+IH778midZRWwNsQwTegqpsc1cU2/xzEiQMSkFa1kd7UfUZDcEcX+jZvLbDF0curTDRXNPPiPQ== X-Received: by 2002:a17:907:3d8f:b0:ac7:81bd:60e3 with SMTP id a640c23a62f3a-ac7c0935350mr136224366b.27.1743670758907; Thu, 03 Apr 2025 01:59:18 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:18 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:23 +0100 Subject: [PATCH v3 31/32] rtc: s5m: replace open-coded read/modify/write registers with regmap helpers Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-31-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Instead of the open-coded read/modify/write sequence, we can simply use the regmap helpers regmap_set_bits() and regmap_update_bits() respectively. This makes the code easier to read, and avoids extra work in case the underlying bus supports updating bits via struct regmap_bus::reg_update_bits() directly (which is the case for S2MPG10 on gs101 where this driver communicates via ACPM). Signed-off-by: André Draszik --- drivers/rtc/rtc-s5m.c | 28 +++++++--------------------- 1 file changed, 7 insertions(+), 21 deletions(-) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index fb65a8e439d72d9070751c00f5826a403ac0b416..2ad01fb3bc72fe9259a8307584c9cf3a839bd492 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -279,17 +279,9 @@ static int s5m_check_pending_alarm_interrupt(struct s5m_rtc_info *info, static int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info) { int ret; - unsigned int data; - - ret = regmap_read(info->regmap, info->regs->udr_update, &data); - if (ret < 0) { - dev_err(info->dev, "failed to read update reg(%d)\n", ret); - return ret; - } - - data |= info->regs->write_time_udr_mask; - ret = regmap_write(info->regmap, info->regs->udr_update, data); + ret = regmap_set_bits(info->regmap, info->regs->udr_update, + info->regs->write_time_udr_mask); if (ret < 0) { dev_err(info->dev, "failed to write update reg(%d)\n", ret); return ret; @@ -303,19 +295,12 @@ static int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info) static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) { int ret; - unsigned int data; - - ret = regmap_read(info->regmap, info->regs->udr_update, &data); - if (ret < 0) { - dev_err(info->dev, "%s: fail to read update reg(%d)\n", - __func__, ret); - return ret; - } + unsigned int udr_mask; - data |= info->regs->write_alarm_udr_mask; + udr_mask = info->regs->write_alarm_udr_mask; switch (info->device_type) { case S5M8767X: - data &= ~S5M_RTC_TIME_EN_MASK; + udr_mask |= S5M_RTC_TIME_EN_MASK; break; case S2MPG10: case S2MPS15X: @@ -327,7 +312,8 @@ static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) return -EINVAL; } - ret = regmap_write(info->regmap, info->regs->udr_update, data); + ret = regmap_update_bits(info->regmap, info->regs->udr_update, + udr_mask, info->regs->write_alarm_udr_mask); if (ret < 0) { dev_err(info->dev, "%s: fail to write update reg(%d)\n", __func__, ret); From patchwork Thu Apr 3 08:59:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14037484 Received: from mail-ed1-f41.google.com (mail-ed1-f41.google.com [209.85.208.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 423DD24C066 for ; Thu, 3 Apr 2025 08:59:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670771; cv=none; b=C+MM5KhTjkkWniWUZlD5G1QGcJYWLP1PPBlPOfdf8n6uleBgEocljvJ1dtBua/bjCafhiihDhNjAZQCpgpCjFNrmyWj4UOavcGZHenaT47XKxJa/n4J0YvLW6qmDB47eiGB8hZB3lJBuPCkocB0Bz7S2ARFkATDf/KULlw41MjU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743670771; c=relaxed/simple; bh=+fAAJ/+/3MbgFo3bOsjQzn5S6tmp2xnmlCT4juP9rJM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tWX8JaAxNermv4Gi3OsLG8KOSwUE7EPYo0gBTzOWLBJWAtjojmNMyL7jfmfvcC5Uthb8sL/t5NCQZOI+2ig7OrJwWbjnXkMghgn6n9TvzhvTCwAWJSeARR/QoNOsxoTEwK1O2EhzXmAyXMcRUzwziw6bINdzw2ahd9uaLOoy1Ps= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=sKCadj3y; arc=none smtp.client-ip=209.85.208.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="sKCadj3y" Received: by mail-ed1-f41.google.com with SMTP id 4fb4d7f45d1cf-5ec9d24acfbso3304842a12.0 for ; Thu, 03 Apr 2025 01:59:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743670759; x=1744275559; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=IvD3NPE37fI+ZqUrH7EmoQBagetQaG70If7tawsO/t4=; b=sKCadj3yJo3JCJcQbG8ljCh98ao0jmPNWJjFoo/83PbHsIxh1WRJrXCyEFNnjHnnaE dUnPsC5DCafvc49EySVtc6597ytJncgH42PRCo04bQmbkSfbIK8oOz1gxmGqWtISnEP9 Y81Do0JzErnbwsdNRiAub5aQmyDszrvT6IHnEJrMu+1HIThiYzIVbUWrNYO/s0sU7+qz K+J2UMlFbL96hqJRIuonbrQU/oO/dJBnij6zsYA7161bz6kXiOSV0cWg/KcDTunezmP2 ZrjZDHF2uyeROZ/8ugTOmcsHo+sKLhOhcfPy82/jB/eKIoaIUD0ra9VN+O58Y+igJE2w fdYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743670759; x=1744275559; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IvD3NPE37fI+ZqUrH7EmoQBagetQaG70If7tawsO/t4=; b=HtPTGfKc+aBeudNJbP0Rd6FlbKv0kVxICQPkLEH75siGqE+iF8PxSHWCMpJkYQ7npd VteeTXGHSDP3hJbixzVpbCW4rwOLaFyhTQW9LK9qUIOBylbHaPNedBjNYZGZhoaybeKA yvITpsAV+uHcMKfDac10RFLkBZX5ONPOHan3//vLGUeFu/iVHlATB3FuA0JwR8oN2YKh bMuyk0gH1+NeYlZKUsHKy889UFp/UPFff4NuUQKB2hetbioYZUJ5A+DL+UjY7gqhQC4T sJyT16/e/Jhv6NcyAzbHn2qECLxsRboP46FLoicgt5LYqoE99+nfFzUFLaJtNuq63rU+ X4ZA== X-Forwarded-Encrypted: i=1; AJvYcCWZsC8akvAAMYfAoyfDI8fKvRFg6Z4DXf7zQzuH74x9QYuA7Ps8fllLPsk+SzVnnFtFjoQ7RsVefbvI+QWLVvVxig==@vger.kernel.org X-Gm-Message-State: AOJu0YzqwQ4tHW/wVUdmaMffAkUrt/jn4VwtP8AI5mEZwhFd3N4F+nuO 9OQ0VnF9cIh2fqJHDgmr6Jawl9xjXOK7WF/rG332QHOq5eGuNy7kc5+7C8ah2XY= X-Gm-Gg: ASbGncuGpWoppUyXwqiQSYYNg8iA9BUfHVOBgi3LEzUVBn76Fgf02EsAibXGxxOy4iN F9boMDgYC0lcCOzmodaxO3bnR7jzEXKw05hNH5Zc8iknZKAmfJnhD1eD7Y8njCs3wO0x40sR65R adj5+igFR+40gAQ/W10sj/Nnxmq2jd59HDbVe9RGp8u26Ylm2m8S3Yw6et4Z2M8K1skbFRKp3Cu SeLmPgpIcUT9KinxNA5259OOtzEqEyY8nJfm08oABz9jpFU5s5d09SNb3QeX7Jj8JIKczJxAfa7 8ArjxjgxWE62EJgG94bgOnRc7vTgXMQslBp9w1EN5HLKdsOqW2WCxQvMEQ0GMQWL/gY0/5xNztf kUuSN6zVr6/YAL/EhuGfyMlYYXGo4IWe4nRtmKzY= X-Google-Smtp-Source: AGHT+IFW856PFsje+adb2s76FgPUdBl97yj4uiiEZ9rOztAG85/+V2CgHnNshHz2zvEqYifTEoo+Rw== X-Received: by 2002:a05:6402:1d55:b0:5ed:5cf6:e168 with SMTP id 4fb4d7f45d1cf-5f084177cb9mr2170046a12.9.1743670759408; Thu, 03 Apr 2025 01:59:19 -0700 (PDT) Received: from puffmais.c.googlers.com (8.239.204.35.bc.googleusercontent.com. [35.204.239.8]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f0880a535fsm637614a12.80.2025.04.03.01.59.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 01:59:19 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 03 Apr 2025 09:59:24 +0100 Subject: [PATCH v3 32/32] MAINTAINERS: add myself as reviewer for Samsung S2M MFD Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250403-s2mpg10-v3-32-b542b3505e68@linaro.org> References: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> In-Reply-To: <20250403-s2mpg10-v3-0-b542b3505e68@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 I'm working on a Samsung device which includes this MFD and would like to be Cc'ed to further contributions and help on reviewing them. Add me as reviewer. Signed-off-by: André Draszik --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index d4d577b54d798938b7a8ff0c2bdbd0b61f87650f..9f05af52b062d8cab0f8b48b2625432108604c3e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21397,6 +21397,7 @@ F: drivers/platform/x86/samsung-laptop.c SAMSUNG MULTIFUNCTION PMIC DEVICE DRIVERS M: Krzysztof Kozlowski +R: André Draszik L: linux-kernel@vger.kernel.org L: linux-samsung-soc@vger.kernel.org S: Maintained