From patchwork Tue Apr 8 03:31:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Friday Yang X-Patchwork-Id: 14042115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84719C3601E for ; Tue, 8 Apr 2025 03:34:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=I0RXQg/67CW5XIHlfH2JVGQV2RtfSqwW5CfapL5H23A=; b=HtsVQ8UFnfmhgNpPDSgc3aWQlO sb53f0YykOJut44JOU3J6GgaZHerfZe4j+DOkLnNA+rATe+Nf6FxASLktRQuGRVWrSTur1z5QAsuK 2cVgyefAS7qtZgsPWVD44XieRwo7a0AEhjYlPOkMVHKBQFltnGm+ufbai2CiTjhCBnIOwrnwjq81C B6peHyx9xwi6lXbRMkN8K/uYw7x9E+TZSSrbelQpUu7IO0abgKO/Sbd7lr5w0F8EGomMjwssfFieP dAg3MkhVcz181v49qBg8ajBrcM/cRqGGSN/zF+OIzRQmqw6AzUXHVbtYntKr8+kA1vU+jklDAyKr8 y4/vjQ7g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.1 #2 (Red Hat Linux)) id 1u1ziz-00000002dLv-1zPC; Tue, 08 Apr 2025 03:34:09 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.98.1 #2 (Red Hat Linux)) id 1u1zhD-00000002d5s-0i8P; Tue, 08 Apr 2025 03:32:20 +0000 X-UUID: 0f6a8774142a11f0a1e849db4cc18d44-20250407 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=I0RXQg/67CW5XIHlfH2JVGQV2RtfSqwW5CfapL5H23A=; b=pIzW8BlMn3tvM+gnQd7CzJ+G6NhqssiZZXNjouTqXNLfpw1WKxBC0CyrmiRKY9cpAzzqYxs0Sq2UrfYsYktx40f/Ix7RkOkOQ2ax0qhMtQ7VZwsPnr6Ykfax5FkhrYwjpHxDdoaWu8hzB835n8kVFwlPXhb5MCsMajh6ZaHCUUs=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.2.1,REQID:5b881330-0cb5-43a3-8439-5da1d1e35cb0,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:0ef645f,CLOUDID:cf7a114b-a527-43d8-8af6-bc8b32d9f5e9,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:nil,Content:0|50,EDM:-3 ,IP:nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV :0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 0f6a8774142a11f0a1e849db4cc18d44-20250407 Received: from mtkmbs09n1.mediatek.inc [(172.21.101.35)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1961955124; Mon, 07 Apr 2025 20:32:12 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Tue, 8 Apr 2025 11:32:11 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Tue, 8 Apr 2025 11:32:10 +0800 From: Friday Yang To: Yong Wu , Krzysztof Kozlowski , "Rob Herring" , Conor Dooley , "Matthias Brugger" , AngeloGioacchino Del Regno , Philipp Zabel CC: Friday Yang , , , , , Subject: [PATCH v6 1/3] dt-bindings: memory: mediatek: Add SMI reset and clamp for MT8188 Date: Tue, 8 Apr 2025 11:31:54 +0800 Message-ID: <20250408033206.12176-2-friday.yang@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250408033206.12176-1-friday.yang@mediatek.com> References: <20250408033206.12176-1-friday.yang@mediatek.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250407_203219_223535_C1FE158F X-CRM114-Status: GOOD ( 10.88 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: "Friday Yang" Add 'resets' and 'reset-names' properties for SMI LARBs to support SMI reset operations. On the MediaTek platform, some SMI LARBs are directly connected to the SMI Common, while others are connected to the SMI Sub-Common, which in turn is connected to the SMI Common. The hardware block diagram can be described as follows. SMI-Common(Smart Multimedia Interface Common) | +----------------+------------------+ | | | | | | | | | | | | | | | larb0 SMI-Sub-Common0 SMI-Sub-Common1 | | | | | larb1 larb2 larb3 larb7 larb9 Signed-off-by: Friday Yang --- .../mediatek,smi-common.yaml | 2 ++ .../memory-controllers/mediatek,smi-larb.yaml | 19 +++++++++++++++++++ 2 files changed, 21 insertions(+) -- 2.46.0 diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml index 2f36ac23604c..4392d349878c 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml @@ -39,6 +39,7 @@ properties: - mediatek,mt8186-smi-common - mediatek,mt8188-smi-common-vdo - mediatek,mt8188-smi-common-vpp + - mediatek,mt8188-smi-sub-common - mediatek,mt8192-smi-common - mediatek,mt8195-smi-common-vdo - mediatek,mt8195-smi-common-vpp @@ -107,6 +108,7 @@ allOf: compatible: contains: enum: + - mediatek,mt8188-smi-sub-common - mediatek,mt8195-smi-sub-common then: required: diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml index 2381660b324c..f4f0ed0f1fd9 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml @@ -69,6 +69,12 @@ properties: description: the hardware id of this larb. It's only required when this hardware id is not consecutive from its M4U point of view. + resets: + maxItems: 1 + + reset-names: + const: larb + required: - compatible - reg @@ -125,6 +131,19 @@ allOf: required: - mediatek,larb-id + - if: # only for image, camera and ipe subsys + properties: + compatible: + const: mediatek,mt8188-smi-larb + mediatek,larb-id: + enum: + [ 9, 10, 11, 12, 13, 16, 17, 18, 19, 20 ] + + then: + required: + - resets + - reset-names + additionalProperties: false examples: From patchwork Tue Apr 8 03:31:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Friday Yang X-Patchwork-Id: 14042123 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 25BA4C36010 for ; Tue, 8 Apr 2025 03:39:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=+m0JgA6bHLhwO4HRyxMekuf7XmxtW340WxTgo+8WzB8=; b=YPWj5mTlald4D0xx9UcFG2xDWQ vrDvuFDb8rEnUbw+tShZ8clWwakGvh+hj9xbCl6PtPNlh7G37wShlGJcs0vrsBeU4HwSsI9AB4m6S VztsXCy4Y8DOxOft9/QFgQ0u8odAFxBKowJldS6YqVDbWeC2rbeZsRx2lgKJ0FSs+nUbJUKGdJd7T V2UfHvov0MeY5YQsRIfoSOJ+1x7rgNiS28G4is43S6F8wTgF0PNopCbTImVS3VHZqPhKGo9Dz18zT T04I7b0XjPslKSaj8IQsC3VUpvoIGte/SBTttP/KGb3v6mcnPpV8VYwnqxdxC8tnZWXMFh1NKPxMH lukbY6IA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.1 #2 (Red Hat Linux)) id 1u1zoB-00000002dvt-0iNN; Tue, 08 Apr 2025 03:39:31 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.98.1 #2 (Red Hat Linux)) id 1u1zhD-00000002d68-2oU8; Tue, 08 Apr 2025 03:32:21 +0000 X-UUID: 10f12864142a11f083f2a1c9db70dae0-20250407 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=+m0JgA6bHLhwO4HRyxMekuf7XmxtW340WxTgo+8WzB8=; b=SdxDgI1MXVavygRr2eO7QbAqYrxbn0DUdvM3TUYNtUh1PyWBMV3iQnMW0bweMuDWK6XsVnWi6ET+AyYcM6pgzZZfZFT/MumOsgm23euAqab7Uxverw7SSrVxD7EFNL+Kw+L6qmbhJunw2mEtE3ScPUvXr2UelCwVIqyvRFlnriY=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.2.1,REQID:6997ce11-be9d-494c-90d4-cca560ddd5eb,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:0ef645f,CLOUDID:bb9bcda5-c619-47e3-a41b-90eedbf5b947,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:nil,Content:0|50,EDM:-3 ,IP:nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV :0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 10f12864142a11f083f2a1c9db70dae0-20250407 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2043262996; Mon, 07 Apr 2025 20:32:15 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS09N2.mediatek.inc (172.21.101.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Tue, 8 Apr 2025 11:32:12 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Tue, 8 Apr 2025 11:32:12 +0800 From: Friday Yang To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel CC: Friday Yang , , , , , Subject: [PATCH v6 2/3] memory: mtk-smi: mt8188: Add SMI reset and clamp for MT8188 Date: Tue, 8 Apr 2025 11:31:55 +0800 Message-ID: <20250408033206.12176-3-friday.yang@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250408033206.12176-1-friday.yang@mediatek.com> References: <20250408033206.12176-1-friday.yang@mediatek.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250407_203219_716166_61429DC1 X-CRM114-Status: GOOD ( 21.46 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: "Friday Yang" To prevent handling glitch signals during MTCMOS on/off transitions, SMI requires clamp and reset operations. Parse the reset settings for SMI LARBs and the clamp settings for the SMI Sub-Common. Register genpd callback for the SMI LARBs located in image, camera and IPE subsystems, and apply reset and clamp operations within the callback. Signed-off-by: Friday Yang --- drivers/memory/mtk-smi.c | 134 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 134 insertions(+) .init = mtk_smi_common_mt8195_init, }; +static const struct mtk_smi_common_plat mtk_smi_sub_common_mt8188 = { + .type = MTK_SMI_GEN2_SUB_COMM, + .has_gals = true, +}; + static const struct mtk_smi_common_plat mtk_smi_common_mt8192 = { .type = MTK_SMI_GEN2, .has_gals = true, @@ -762,6 +895,7 @@ static const struct of_device_id mtk_smi_common_of_ids[] = { {.compatible = "mediatek,mt8186-smi-common", .data = &mtk_smi_common_mt8186}, {.compatible = "mediatek,mt8188-smi-common-vdo", .data = &mtk_smi_common_mt8188_vdo}, {.compatible = "mediatek,mt8188-smi-common-vpp", .data = &mtk_smi_common_mt8188_vpp}, + {.compatible = "mediatek,mt8188-smi-sub-common", .data = &mtk_smi_sub_common_mt8188}, {.compatible = "mediatek,mt8192-smi-common", .data = &mtk_smi_common_mt8192}, {.compatible = "mediatek,mt8195-smi-common-vdo", .data = &mtk_smi_common_mt8195_vdo}, {.compatible = "mediatek,mt8195-smi-common-vpp", .data = &mtk_smi_common_mt8195_vpp}, -- 2.46.0 diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index a8f5467d6b31..f25d46d2ef33 100644 --- a/drivers/memory/mtk-smi.c +++ b/drivers/memory/mtk-smi.c @@ -10,11 +10,15 @@ #include #include #include +#include #include #include #include #include +#include #include +#include +#include #include #include #include @@ -36,6 +40,12 @@ #define SMI_DCM 0x300 #define SMI_DUMMY 0x444 +#define SMI_COMMON_CLAMP_EN 0x3c0 +#define SMI_COMMON_CLAMP_EN_SET 0x3c4 +#define SMI_COMMON_CLAMP_EN_CLR 0x3c8 + +#define SMI_SUB_COMM_INPORT_NR (8) + /* SMI LARB */ #define SMI_LARB_SLP_CON 0xc #define SLP_PROT_EN BIT(0) @@ -134,6 +144,7 @@ struct mtk_smi_larb_gen { unsigned int larb_direct_to_common_mask; unsigned int flags_general; const u8 (*ostd)[SMI_LARB_PORT_NR_MAX]; + const u8 *clamp_port; }; struct mtk_smi { @@ -150,6 +161,7 @@ struct mtk_smi { }; struct mtk_smi_larb { /* larb: local arbiter */ + struct device *dev; struct mtk_smi smi; void __iomem *base; struct device *smi_common_dev; /* common or sub-common dev */ @@ -157,6 +169,10 @@ struct mtk_smi_larb { /* larb: local arbiter */ int larbid; u32 *mmu; unsigned char *bank; + struct regmap *sub_comm_syscon; + u8 sub_comm_inport; + struct notifier_block nb; + struct reset_control *rst_con; }; static int @@ -409,6 +425,19 @@ static const u8 mtk_smi_larb_mt8195_ostd[][SMI_LARB_PORT_NR_MAX] = { [28] = {0x1a, 0x0e, 0x0a, 0x0a, 0x0c, 0x0e, 0x10,}, }; +static const u8 mtk_smi_larb_clamp_port_mt8188[MTK_LARB_NR_MAX] = { + [9] = BIT(1), /* larb10 */ + [10] = BIT(2), /* larb11a */ + [11] = BIT(2), /* larb11b */ + [12] = BIT(3), /* larb11c */ + [13] = BIT(0), /* larb12 */ + [16] = BIT(1), /* larb15 */ + [17] = BIT(2), /* larb16a */ + [18] = BIT(2), /* larb16b */ + [19] = BIT(3), /* larb17a */ + [20] = BIT(3), /* larb17b */ +}; + static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701 = { .port_in_larb = { LARB0_PORT_OFFSET, LARB1_PORT_OFFSET, @@ -455,6 +484,7 @@ static const struct mtk_smi_larb_gen mtk_smi_larb_mt8188 = { .flags_general = MTK_SMI_FLAG_THRT_UPDATE | MTK_SMI_FLAG_SW_FLAG | MTK_SMI_FLAG_SLEEP_CTL | MTK_SMI_FLAG_CFG_PORT_SEC_CTL, .ostd = mtk_smi_larb_mt8188_ostd, + .clamp_port = mtk_smi_larb_clamp_port_mt8188, }; static const struct mtk_smi_larb_gen mtk_smi_larb_mt8192 = { @@ -505,6 +535,46 @@ static void mtk_smi_larb_sleep_ctrl_disable(struct mtk_smi_larb *larb) writel_relaxed(0, larb->base + SMI_LARB_SLP_CON); } +static int mtk_smi_larb_clamp_protect_enable(struct device *dev, bool enable) +{ + struct mtk_smi_larb *larb = dev_get_drvdata(dev); + u32 reg; + int ret; + + /* sub_comm_syscon could be NULL if larb directly linked to SMI common */ + if (!larb->sub_comm_syscon) + return -EINVAL; + + reg = enable ? SMI_COMMON_CLAMP_EN_SET : SMI_COMMON_CLAMP_EN_CLR; + + ret = regmap_write(larb->sub_comm_syscon, reg, + larb->sub_comm_inport); + if (ret) + dev_err(dev, "Unable to %s clamp for input port %d: %d\n", + enable ? "enable" : "disable", + larb->sub_comm_inport, ret); + + return ret; +} + +static int mtk_smi_genpd_callback(struct notifier_block *nb, + unsigned long flags, void *data) +{ + struct mtk_smi_larb *larb = container_of(nb, struct mtk_smi_larb, nb); + struct device *dev = larb->dev; + + if (flags == GENPD_NOTIFY_PRE_ON || flags == GENPD_NOTIFY_PRE_OFF) { + /* disable related SMI sub-common port */ + mtk_smi_larb_clamp_protect_enable(dev, true); + } else if (flags == GENPD_NOTIFY_ON) { + /* enable related SMI sub-common port */ + reset_control_reset(larb->rst_con); + mtk_smi_larb_clamp_protect_enable(dev, false); + } + + return NOTIFY_OK; +} + static int mtk_smi_device_link_common(struct device *dev, struct device **com_dev) { struct platform_device *smi_com_pdev; @@ -561,6 +631,53 @@ static int mtk_smi_dts_clk_init(struct device *dev, struct mtk_smi *smi, return ret; } +static int mtk_smi_larb_parse_clamp_optional(struct mtk_smi_larb *larb) +{ + struct device *dev = larb->dev; + const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen; + u32 larb_id; + int ret; + + /* + * Only SMI LARBs in camera, image and IPE subsys need to + * apply clamp and reset operations, others can be skipped. + */ + ret = of_property_read_u32(dev->of_node, "mediatek,larb-id", &larb_id); + if (ret) + return -EINVAL; + if (!larb_gen->clamp_port || !larb_gen->clamp_port[larb_id]) + return 0; + + larb->sub_comm_inport = larb_gen->clamp_port[larb_id]; + larb->sub_comm_syscon = syscon_regmap_lookup_by_phandle(dev->of_node, + "mediatek,smi"); + if (IS_ERR(larb->sub_comm_syscon)) { + larb->sub_comm_syscon = NULL; + return dev_err_probe(dev, -EINVAL, + "Unknown clamp port for larb %d\n", larb_id); + } + + return 0; +} + +static int mtk_smi_larb_parse_reset_optional(struct mtk_smi_larb *larb) +{ + struct device *dev = larb->dev; + int ret; + + larb->rst_con = devm_reset_control_get_optional_exclusive(dev, "larb"); + if (!larb->rst_con) + return 0; + + larb->nb.notifier_call = mtk_smi_genpd_callback; + ret = dev_pm_genpd_add_notifier(dev, &larb->nb); + if (ret) + return dev_err_probe(dev, -EINVAL, + "Failed to add genpd callback %d\n", ret); + + return 0; +} + static int mtk_smi_larb_probe(struct platform_device *pdev) { struct mtk_smi_larb *larb; @@ -571,6 +688,7 @@ static int mtk_smi_larb_probe(struct platform_device *pdev) if (!larb) return -ENOMEM; + larb->dev = dev; larb->larb_gen = of_device_get_match_data(dev); larb->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(larb->base)) @@ -587,15 +705,25 @@ static int mtk_smi_larb_probe(struct platform_device *pdev) if (ret < 0) return ret; + ret = mtk_smi_larb_parse_clamp_optional(larb); + if (ret) + goto err_link_remove; + + ret = mtk_smi_larb_parse_reset_optional(larb); + if (ret) + goto err_link_remove; + pm_runtime_enable(dev); platform_set_drvdata(pdev, larb); ret = component_add(dev, &mtk_smi_larb_component_ops); if (ret) goto err_pm_disable; return 0; err_pm_disable: pm_runtime_disable(dev); +err_link_remove: device_link_remove(dev, larb->smi_common_dev); return ret; } @@ -719,6 +847,11 @@ static const struct mtk_smi_common_plat mtk_smi_common_mt8188_vpp = { From patchwork Tue Apr 8 03:31:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Friday Yang X-Patchwork-Id: 14042122 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6949EC369A1 for ; Tue, 8 Apr 2025 03:39:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=NRKbm8MkDmyaqkiaP1DwdDeOmQ+erOodCBiH4VJGyeM=; b=3lPM53RRws9jxXYzc/0UTtutPf FW4qtJb92HVnS9nJypdDhP163Mr6dMjUbgGeiA0V6bU5HcAVSgxWj4SGHL9E1AtklNFC2DK0f+l+M 59ogCGfOxEO4PEqxd8Hm8g+cu8WjtgpXWNkKhGfJtJWFztIdiy/9lWXhCJJHGIisoucUzEDYAKyrp BWFoq6uRd/acB1IqkiuQ7XTwBysuWaiE+CZEPhHY2DJp+u5F+aC31y5LV51NKhLBFfJYSiX3EDYm+ kAW4Pb5+6jTPMzfUtT6uiwiKGqlXA/oAmJ+RRGNFHCHvQXOhK4KNGDHhqu5AJYBtP+ujRmLDV7+yH 0tp8+Ydg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.1 #2 (Red Hat Linux)) id 1u1zoB-00000002dw6-1ywo; Tue, 08 Apr 2025 03:39:31 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.98.1 #2 (Red Hat Linux)) id 1u1zhD-00000002d6Z-3XYz; Tue, 08 Apr 2025 03:32:21 +0000 X-UUID: 11de310e142a11f0a1e849db4cc18d44-20250407 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=NRKbm8MkDmyaqkiaP1DwdDeOmQ+erOodCBiH4VJGyeM=; b=WTyExuL2ITQfMt/vXMRwbKapmtOL2J/tVZtyJKVQR4dgYh/XJjEd4iDSHmiRtlviKOMIK+XbSmjLxFxazMsFeNXriJW+E3Vq3LhajFAuQtAeKxvHEA8z8sDLeNeaPia3zmdAGYAMLaCH/L1QujEimKjqkGZ04KPIiYwiqFJ34mI=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.2.1,REQID:8e2cb524-6cb1-4aae-b508-03c0a7227136,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:0ef645f,CLOUDID:fc7a114b-a527-43d8-8af6-bc8b32d9f5e9,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:nil,Content:0|50,EDM:-3 ,IP:nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV :0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 11de310e142a11f0a1e849db4cc18d44-20250407 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1612144450; Mon, 07 Apr 2025 20:32:16 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Tue, 8 Apr 2025 11:32:14 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Tue, 8 Apr 2025 11:32:13 +0800 From: Friday Yang To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel CC: Friday Yang , , , , , Subject: [PATCH v6 3/3] memory: mtk-smi: mt8188: Use devm_pm_runtime_enable Date: Tue, 8 Apr 2025 11:31:56 +0800 Message-ID: <20250408033206.12176-4-friday.yang@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250408033206.12176-1-friday.yang@mediatek.com> References: <20250408033206.12176-1-friday.yang@mediatek.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250407_203219_880814_0E5B7790 X-CRM114-Status: GOOD ( 11.69 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Replace pm_runtime_enable with the devres-enabled version which can trigger pm_runtime_disable. Signed-off-by: Friday Yang --- drivers/memory/mtk-smi.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) -- 2.46.0 diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index f25d46d2ef33..daef6d350419 100644 --- a/drivers/memory/mtk-smi.c +++ b/drivers/memory/mtk-smi.c @@ -713,16 +713,17 @@ static int mtk_smi_larb_probe(struct platform_device *pdev) if (ret) goto err_link_remove; - pm_runtime_enable(dev); + ret = devm_pm_runtime_enable(dev); + if (ret) + goto err_link_remove; + platform_set_drvdata(pdev, larb); ret = component_add(dev, &mtk_smi_larb_component_ops); if (ret) - goto err_pm_disable; + goto err_link_remove; return 0; -err_pm_disable: - pm_runtime_disable(dev); err_link_remove: device_link_remove(dev, larb->smi_common_dev); return ret; @@ -733,7 +734,6 @@ static void mtk_smi_larb_remove(struct platform_device *pdev) struct mtk_smi_larb *larb = platform_get_drvdata(pdev); device_link_remove(&pdev->dev, larb->smi_common_dev); - pm_runtime_disable(&pdev->dev); component_del(&pdev->dev, &mtk_smi_larb_component_ops); } @@ -954,7 +954,10 @@ static int mtk_smi_common_probe(struct platform_device *pdev) return ret; } - pm_runtime_enable(dev); + ret = devm_pm_runtime_enable(dev); + if (ret) + return ret; + platform_set_drvdata(pdev, common); return 0; } @@ -965,7 +968,6 @@ static void mtk_smi_common_remove(struct platform_device *pdev) if (common->plat->type == MTK_SMI_GEN2_SUB_COMM) device_link_remove(&pdev->dev, common->smi_common_dev); - pm_runtime_disable(&pdev->dev); } static int __maybe_unused mtk_smi_common_resume(struct device *dev)