From patchwork Wed Apr 9 02:36:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14044007 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E7DC7C36010 for ; Wed, 9 Apr 2025 02:38:56 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJi-0006VU-PE; Tue, 08 Apr 2025 22:37:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LJg-0006Tw-H7 for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:28 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJc-0007mp-O2 for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:28 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8BxlmlZ3fVnDq+1AA--.40119S3; Wed, 09 Apr 2025 10:37:13 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S3; Wed, 09 Apr 2025 10:37:12 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 01/16] hw/intc/loongarch_pch: Modify name of some registers Date: Wed, 9 Apr 2025 10:36:56 +0800 Message-Id: <20250409023711.2960618-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoWxtw1ktrWrGrWxZr18AF1fAFc_yoWxXrWfpr yUArW2yr4DJrWxWF4xuw15ZwnrJFn7Cr9IgwsIgFyxCF1rJrykXF1DXas8GF15K3yUJr98 Wrsxua9I93W7trbCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUyEb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4 xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jrv_JF1lYx0Ex4A2jsIE14v2 6r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwI xGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480 Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jrv_JF1lIxkGc2Ij64vIr41lIxAIcVC0I7 IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k2 6cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxV AFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU8zwZ7UUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For some registers with width 8 bytes, its name is something like PCH_PIC_INT_ID_LO and PCH_PIC_INT_ID_HI. From hardware manual, register name is PCH_PIC_INT_ID instead. Here name PCH_PIC_INT_ID is used, and PCH_PIC_INT_ID + 4 is used for PCH_PIC_INT_ID_HI. Signed-off-by: Bibo Mao Reviewed-by: Clement Mathieu--Drif --- hw/intc/loongarch_pch_pic.c | 50 +++++++++++++------------- hw/loongarch/virt.c | 2 +- include/hw/intc/loongarch_pic_common.h | 27 +++++--------- 3 files changed, 36 insertions(+), 43 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index acd75ccb0c..2b90ccd1ff 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -79,10 +79,10 @@ static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, uint32_t offset = addr & 0xfff; switch (offset) { - case PCH_PIC_INT_ID_LO: + case PCH_PIC_INT_ID: val = PCH_PIC_INT_ID_VAL; break; - case PCH_PIC_INT_ID_HI: + case PCH_PIC_INT_ID + 4: /* * With 7A1000 manual * bit 0-15 pch irqchip version @@ -90,28 +90,29 @@ static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, */ val = deposit32(PCH_PIC_INT_ID_VER, 16, 16, s->irq_num - 1); break; - case PCH_PIC_INT_MASK_LO: + case PCH_PIC_INT_MASK: val = (uint32_t)s->int_mask; break; - case PCH_PIC_INT_MASK_HI: + case PCH_PIC_INT_MASK + 4: val = s->int_mask >> 32; break; - case PCH_PIC_INT_EDGE_LO: + case PCH_PIC_INT_EDGE: val = (uint32_t)s->intedge; break; - case PCH_PIC_INT_EDGE_HI: + case PCH_PIC_INT_EDGE + 4: val = s->intedge >> 32; break; - case PCH_PIC_HTMSI_EN_LO: + case PCH_PIC_HTMSI_EN: val = (uint32_t)s->htmsi_en; break; - case PCH_PIC_HTMSI_EN_HI: + case PCH_PIC_HTMSI_EN + 4: val = s->htmsi_en >> 32; break; - case PCH_PIC_AUTO_CTRL0_LO: - case PCH_PIC_AUTO_CTRL0_HI: - case PCH_PIC_AUTO_CTRL1_LO: - case PCH_PIC_AUTO_CTRL1_HI: + case PCH_PIC_AUTO_CTRL0: + case PCH_PIC_AUTO_CTRL0 + 4: + case PCH_PIC_AUTO_CTRL1: + case PCH_PIC_AUTO_CTRL1 + 4: + /* PCH PIC connect to EXTIOI always, discard auto_ctrl access */ break; default: break; @@ -140,7 +141,7 @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, trace_loongarch_pch_pic_low_writew(size, addr, data); switch (offset) { - case PCH_PIC_INT_MASK_LO: + case PCH_PIC_INT_MASK: old = s->int_mask; s->int_mask = get_writew_val(old, data, 0); old_valid = (uint32_t)old; @@ -151,7 +152,7 @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, pch_pic_update_irq(s, (~old_valid & data), 0); } break; - case PCH_PIC_INT_MASK_HI: + case PCH_PIC_INT_MASK + 4: old = s->int_mask; s->int_mask = get_writew_val(old, data, 1); old_valid = (uint32_t)(old >> 32); @@ -164,20 +165,20 @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, pch_pic_update_irq(s, int_mask << 32, 0); } break; - case PCH_PIC_INT_EDGE_LO: + case PCH_PIC_INT_EDGE: s->intedge = get_writew_val(s->intedge, data, 0); break; - case PCH_PIC_INT_EDGE_HI: + case PCH_PIC_INT_EDGE + 4: s->intedge = get_writew_val(s->intedge, data, 1); break; - case PCH_PIC_INT_CLEAR_LO: + case PCH_PIC_INT_CLEAR: if (s->intedge & data) { s->intirr &= (~data); pch_pic_update_irq(s, data, 0); s->intisr &= (~data); } break; - case PCH_PIC_INT_CLEAR_HI: + case PCH_PIC_INT_CLEAR + 4: value <<= 32; if (s->intedge & value) { s->intirr &= (~value); @@ -185,16 +186,17 @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, s->intisr &= (~value); } break; - case PCH_PIC_HTMSI_EN_LO: + case PCH_PIC_HTMSI_EN: s->htmsi_en = get_writew_val(s->htmsi_en, data, 0); break; - case PCH_PIC_HTMSI_EN_HI: + case PCH_PIC_HTMSI_EN + 4: s->htmsi_en = get_writew_val(s->htmsi_en, data, 1); break; - case PCH_PIC_AUTO_CTRL0_LO: - case PCH_PIC_AUTO_CTRL0_HI: - case PCH_PIC_AUTO_CTRL1_LO: - case PCH_PIC_AUTO_CTRL1_HI: + case PCH_PIC_AUTO_CTRL0: + case PCH_PIC_AUTO_CTRL0 + 4: + case PCH_PIC_AUTO_CTRL1: + case PCH_PIC_AUTO_CTRL1 + 4: + /* discard auto_ctrl access */ break; default: break; diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index e25864214f..8c0cc98c72 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -432,7 +432,7 @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) VIRT_IOAPIC_REG_BASE + PCH_PIC_ROUTE_ENTRY_OFFSET, sysbus_mmio_get_region(d, 1)); memory_region_add_subregion(get_system_memory(), - VIRT_IOAPIC_REG_BASE + PCH_PIC_INT_STATUS_LO, + VIRT_IOAPIC_REG_BASE + PCH_PIC_INT_STATUS, sysbus_mmio_get_region(d, 2)); /* Connect pch_pic irqs to extioi */ diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h index 43cce48978..c04471b08d 100644 --- a/include/hw/intc/loongarch_pic_common.h +++ b/include/hw/intc/loongarch_pic_common.h @@ -12,28 +12,19 @@ #define PCH_PIC_INT_ID_VAL 0x7000000UL #define PCH_PIC_INT_ID_VER 0x1UL -#define PCH_PIC_INT_ID_LO 0x00 -#define PCH_PIC_INT_ID_HI 0x04 -#define PCH_PIC_INT_MASK_LO 0x20 -#define PCH_PIC_INT_MASK_HI 0x24 -#define PCH_PIC_HTMSI_EN_LO 0x40 -#define PCH_PIC_HTMSI_EN_HI 0x44 -#define PCH_PIC_INT_EDGE_LO 0x60 -#define PCH_PIC_INT_EDGE_HI 0x64 -#define PCH_PIC_INT_CLEAR_LO 0x80 -#define PCH_PIC_INT_CLEAR_HI 0x84 -#define PCH_PIC_AUTO_CTRL0_LO 0xc0 -#define PCH_PIC_AUTO_CTRL0_HI 0xc4 -#define PCH_PIC_AUTO_CTRL1_LO 0xe0 -#define PCH_PIC_AUTO_CTRL1_HI 0xe4 +#define PCH_PIC_INT_ID 0x00 +#define PCH_PIC_INT_MASK 0x20 +#define PCH_PIC_HTMSI_EN 0x40 +#define PCH_PIC_INT_EDGE 0x60 +#define PCH_PIC_INT_CLEAR 0x80 +#define PCH_PIC_AUTO_CTRL0 0xc0 +#define PCH_PIC_AUTO_CTRL1 0xe0 #define PCH_PIC_ROUTE_ENTRY_OFFSET 0x100 #define PCH_PIC_ROUTE_ENTRY_END 0x13f #define PCH_PIC_HTMSI_VEC_OFFSET 0x200 #define PCH_PIC_HTMSI_VEC_END 0x23f -#define PCH_PIC_INT_STATUS_LO 0x3a0 -#define PCH_PIC_INT_STATUS_HI 0x3a4 -#define PCH_PIC_INT_POL_LO 0x3e0 -#define PCH_PIC_INT_POL_HI 0x3e4 +#define PCH_PIC_INT_STATUS 0x3a0 +#define PCH_PIC_INT_POL 0x3e0 #define STATUS_LO_START 0 #define STATUS_HI_START 0x4 From patchwork Wed Apr 9 02:36:57 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14044004 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DB20EC369A2 for ; Wed, 9 Apr 2025 02:38:48 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJm-0006XV-UF; Tue, 08 Apr 2025 22:37:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LJl-0006WW-3F for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:33 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJc-0007n7-H4 for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:32 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8BxrOJa3fVnEa+1AA--.1206S3; Wed, 09 Apr 2025 10:37:14 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S4; Wed, 09 Apr 2025 10:37:13 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 02/16] hw/intc/loongarch_pch: Modify register name PCH_PIC_xxx_OFFSET with PCH_PIC_xxx Date: Wed, 9 Apr 2025 10:36:57 +0800 Message-Id: <20250409023711.2960618-3-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoWxGry5uw13Xr1fArW7AF4UKFX_yoWrWry8pF 9xAFy2yr47JFZ7Wrn7J3yDZw1xWFn2k342g39I9FyxAFW5XrykXa40y34DGa4UK34kA3y5 XFs8Gw4Y9a17WwbCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUyEb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4 xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_JF0_Jw1lYx0Ex4A2jsIE14v2 6r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwI xGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480 Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jrv_JF1lIxkGc2Ij64vIr41lIxAIcVC0I7 IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k2 6cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxV AFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU82g43UUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Macro PCH_PIC_HTMSI_VEC_OFFSET and PCH_PIC_ROUTE_ENTRY_OFFSET is renamed as PCH_PIC_HTMSI_VEC and PCH_PIC_ROUTE_ENTRY separately, it is easier to understand. Signed-off-by: Bibo Mao Reviewed-by: Clement Mathieu--Drif --- hw/intc/loongarch_pch_pic.c | 20 ++++++++++---------- hw/loongarch/virt.c | 2 +- include/hw/intc/loongarch_pic_common.h | 4 ++-- 3 files changed, 13 insertions(+), 13 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index 2b90ccd1ff..4c845ba5e9 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -263,18 +263,18 @@ static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr, { LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); uint64_t val = 0; - uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET; + uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY; int64_t offset_tmp; switch (offset) { - case PCH_PIC_HTMSI_VEC_OFFSET ... PCH_PIC_HTMSI_VEC_END: - offset_tmp = offset - PCH_PIC_HTMSI_VEC_OFFSET; + case PCH_PIC_HTMSI_VEC ... PCH_PIC_HTMSI_VEC_END: + offset_tmp = offset - PCH_PIC_HTMSI_VEC; if (offset_tmp >= 0 && offset_tmp < 64) { val = s->htmsi_vector[offset_tmp]; } break; - case PCH_PIC_ROUTE_ENTRY_OFFSET ... PCH_PIC_ROUTE_ENTRY_END: - offset_tmp = offset - PCH_PIC_ROUTE_ENTRY_OFFSET; + case PCH_PIC_ROUTE_ENTRY ... PCH_PIC_ROUTE_ENTRY_END: + offset_tmp = offset - PCH_PIC_ROUTE_ENTRY; if (offset_tmp >= 0 && offset_tmp < 64) { val = s->route_entry[offset_tmp]; } @@ -292,19 +292,19 @@ static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr, { LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); int32_t offset_tmp; - uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET; + uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY; trace_loongarch_pch_pic_writeb(size, addr, data); switch (offset) { - case PCH_PIC_HTMSI_VEC_OFFSET ... PCH_PIC_HTMSI_VEC_END: - offset_tmp = offset - PCH_PIC_HTMSI_VEC_OFFSET; + case PCH_PIC_HTMSI_VEC ... PCH_PIC_HTMSI_VEC_END: + offset_tmp = offset - PCH_PIC_HTMSI_VEC; if (offset_tmp >= 0 && offset_tmp < 64) { s->htmsi_vector[offset_tmp] = (uint8_t)(data & 0xff); } break; - case PCH_PIC_ROUTE_ENTRY_OFFSET ... PCH_PIC_ROUTE_ENTRY_END: - offset_tmp = offset - PCH_PIC_ROUTE_ENTRY_OFFSET; + case PCH_PIC_ROUTE_ENTRY ... PCH_PIC_ROUTE_ENTRY_END: + offset_tmp = offset - PCH_PIC_ROUTE_ENTRY; if (offset_tmp >= 0 && offset_tmp < 64) { s->route_entry[offset_tmp] = (uint8_t)(data & 0xff); } diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 8c0cc98c72..1f1cca667e 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -429,7 +429,7 @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE, sysbus_mmio_get_region(d, 0)); memory_region_add_subregion(get_system_memory(), - VIRT_IOAPIC_REG_BASE + PCH_PIC_ROUTE_ENTRY_OFFSET, + VIRT_IOAPIC_REG_BASE + PCH_PIC_ROUTE_ENTRY, sysbus_mmio_get_region(d, 1)); memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE + PCH_PIC_INT_STATUS, diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h index c04471b08d..b33bebb129 100644 --- a/include/hw/intc/loongarch_pic_common.h +++ b/include/hw/intc/loongarch_pic_common.h @@ -19,9 +19,9 @@ #define PCH_PIC_INT_CLEAR 0x80 #define PCH_PIC_AUTO_CTRL0 0xc0 #define PCH_PIC_AUTO_CTRL1 0xe0 -#define PCH_PIC_ROUTE_ENTRY_OFFSET 0x100 +#define PCH_PIC_ROUTE_ENTRY 0x100 #define PCH_PIC_ROUTE_ENTRY_END 0x13f -#define PCH_PIC_HTMSI_VEC_OFFSET 0x200 +#define PCH_PIC_HTMSI_VEC 0x200 #define PCH_PIC_HTMSI_VEC_END 0x23f #define PCH_PIC_INT_STATUS 0x3a0 #define PCH_PIC_INT_POL 0x3e0 From patchwork Wed Apr 9 02:36:58 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14044001 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9158EC369A2 for ; Wed, 9 Apr 2025 02:38:45 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJj-0006Vt-PJ; Tue, 08 Apr 2025 22:37:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LJh-0006Ui-FR for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:29 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJc-0007nB-KS for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:29 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8AxTWta3fVnE6+1AA--.39486S3; Wed, 09 Apr 2025 10:37:14 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S5; Wed, 09 Apr 2025 10:37:14 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 03/16] hw/intc/loongarch_pch: Remove some duplicate macro Date: Wed, 9 Apr 2025 10:36:58 +0800 Message-Id: <20250409023711.2960618-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoWxCr48Cw15Cw18Xw4kGF4fCrX_yoW5Wr4fpF 9xAFsIgrsrGry7XFn2ya45Zr1DJFnrur9F9anIkryF9Fs8Zry8X3WkJ3y5WF1UK3y5Jryq grsxua1av3WUWrcCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUyEb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4 xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_JF0_Jw1lYx0Ex4A2jsIE14v2 6r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwI xGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480 Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jrv_JF1lIxkGc2Ij64vIr41lIxAIcVC0I7 IYx2IY67AKxVWUCVW8JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k2 6cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxV AFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU82g43UUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The meaning of macro definition STATUS_LO_START is simliar with PCH_PIC_INT_STATUS, only that offset is different, the same for macro POL_LO_START. Now remove these duplicated macro definitions. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 20 ++++++++++---------- include/hw/intc/loongarch_pic_common.h | 5 ----- 2 files changed, 10 insertions(+), 15 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index 4c845ba5e9..a2d9930ac9 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -208,19 +208,19 @@ static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, { LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); uint64_t val = 0; - uint32_t offset = addr & 0xfff; + uint32_t offset = addr + PCH_PIC_INT_STATUS; switch (offset) { - case STATUS_LO_START: + case PCH_PIC_INT_STATUS: val = (uint32_t)(s->intisr & (~s->int_mask)); break; - case STATUS_HI_START: + case PCH_PIC_INT_STATUS + 4: val = (s->intisr & (~s->int_mask)) >> 32; break; - case POL_LO_START: + case PCH_PIC_INT_POL: val = (uint32_t)s->int_polarity; break; - case POL_HI_START: + case PCH_PIC_INT_POL + 4: val = s->int_polarity >> 32; break; default: @@ -236,21 +236,21 @@ static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr, { LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); uint32_t offset, data = (uint32_t)value; - offset = addr & 0xfff; + offset = addr + PCH_PIC_INT_STATUS; trace_loongarch_pch_pic_high_writew(size, addr, data); switch (offset) { - case STATUS_LO_START: + case PCH_PIC_INT_STATUS: s->intisr = get_writew_val(s->intisr, data, 0); break; - case STATUS_HI_START: + case PCH_PIC_INT_STATUS + 4: s->intisr = get_writew_val(s->intisr, data, 1); break; - case POL_LO_START: + case PCH_PIC_INT_POL: s->int_polarity = get_writew_val(s->int_polarity, data, 0); break; - case POL_HI_START: + case PCH_PIC_INT_POL + 4: s->int_polarity = get_writew_val(s->int_polarity, data, 1); break; default: diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h index b33bebb129..ef6edc15bf 100644 --- a/include/hw/intc/loongarch_pic_common.h +++ b/include/hw/intc/loongarch_pic_common.h @@ -26,11 +26,6 @@ #define PCH_PIC_INT_STATUS 0x3a0 #define PCH_PIC_INT_POL 0x3e0 -#define STATUS_LO_START 0 -#define STATUS_HI_START 0x4 -#define POL_LO_START 0x40 -#define POL_HI_START 0x44 - #define TYPE_LOONGARCH_PIC_COMMON "loongarch_pic_common" OBJECT_DECLARE_TYPE(LoongArchPICCommonState, LoongArchPICCommonClass, LOONGARCH_PIC_COMMON) From patchwork Wed Apr 9 02:36:59 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14044002 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9DFC7C36010 for ; Wed, 9 Apr 2025 02:38:46 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJh-0006Tu-DI; Tue, 08 Apr 2025 22:37:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LJe-0006TM-Nk for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:26 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJc-0007nC-3H for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:26 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8Ax3eJb3fVnFa+1AA--.1076S3; Wed, 09 Apr 2025 10:37:15 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S6; Wed, 09 Apr 2025 10:37:14 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 04/16] hw/intc/loongarch_pch: Set version information at initial stage Date: Wed, 9 Apr 2025 10:36:59 +0800 Message-Id: <20250409023711.2960618-5-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S6 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoWxCrW3Gr45Kw13XF4xtrW7ZFc_yoW5CF4rpF W3CF9xtrWktrWxXrn3Zw15ZrnxJFnakryY9anIkF95AFs3Jry8XryktayDXa4Yg3yrJryq qrsIkayF9a1UZFcCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUyEb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4 xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jw0_WrylYx0Ex4A2jsIE14v2 6r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwI xGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480 Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jrv_JF1lIxkGc2Ij64vIr41lIxAIcVC0I7 IYx2IY67AKxVWUCVW8JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k2 6cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxV AFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU8sXo7UUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Register PCH_PIC_INT_ID constains version and supported irq number information, and it is read only register. The detailed value can be set at initial stage, rather than read callback. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 22 +++++++++++++++------- include/hw/intc/loongarch_pic_common.h | 17 +++++++++++++++-- 2 files changed, 30 insertions(+), 9 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index a2d9930ac9..ae2dbdfafe 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -80,15 +80,10 @@ static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, switch (offset) { case PCH_PIC_INT_ID: - val = PCH_PIC_INT_ID_VAL; + val = s->id.data & UINT_MAX; break; case PCH_PIC_INT_ID + 4: - /* - * With 7A1000 manual - * bit 0-15 pch irqchip version - * bit 16-31 irq number supported with pch irqchip - */ - val = deposit32(PCH_PIC_INT_ID_VER, 16, 16, s->irq_num - 1); + val = s->id.data >> 32; break; case PCH_PIC_INT_MASK: val = (uint32_t)s->int_mask; @@ -361,6 +356,19 @@ static void loongarch_pch_pic_reset(DeviceState *d) LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(d); int i; + /* + * With Loongson 7A1000 user manual + * Chapter 5.2 "Description of Interrupt-related Registers" + * + * Interrupt controller identification register 1 + * Bit 24-31 Interrupt Controller ID + * Interrupt controller identification register 2 + * Bit 0-7 Interrupt Controller version number + * Bit 16-23 The number of interrupt sources supported + */ + s->id.desc.id = PCH_PIC_INT_ID_VAL; + s->id.desc.version = PCH_PIC_INT_ID_VER; + s->id.desc.irq_num = s->irq_num - 1; s->int_mask = -1; s->htmsi_en = 0x0; s->intedge = 0x0; diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h index ef6edc15bf..fb848da4b8 100644 --- a/include/hw/intc/loongarch_pic_common.h +++ b/include/hw/intc/loongarch_pic_common.h @@ -10,9 +10,9 @@ #include "hw/pci-host/ls7a.h" #include "hw/sysbus.h" -#define PCH_PIC_INT_ID_VAL 0x7000000UL -#define PCH_PIC_INT_ID_VER 0x1UL #define PCH_PIC_INT_ID 0x00 +#define PCH_PIC_INT_ID_VAL 0x7 +#define PCH_PIC_INT_ID_VER 0x1 #define PCH_PIC_INT_MASK 0x20 #define PCH_PIC_HTMSI_EN 0x40 #define PCH_PIC_INT_EDGE 0x60 @@ -30,10 +30,23 @@ OBJECT_DECLARE_TYPE(LoongArchPICCommonState, LoongArchPICCommonClass, LOONGARCH_PIC_COMMON) +union LoongArchPIC_ID { + struct { + uint64_t _reserved_0:24; + uint64_t id:8; + uint64_t version:8; + uint64_t _reserved_1:8; + uint64_t irq_num:8; + uint64_t _reserved_2:8; + } QEMU_PACKED desc; + uint64_t data; +}; + struct LoongArchPICCommonState { SysBusDevice parent_obj; qemu_irq parent_irq[64]; + union LoongArchPIC_ID id; /* 0x00 interrupt ID register */ uint64_t int_mask; /* 0x020 interrupt mask register */ uint64_t htmsi_en; /* 0x040 1=msi */ uint64_t intedge; /* 0x060 edge=1 level=0 */ From patchwork Wed Apr 9 02:37:00 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14043997 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 17845C369A5 for ; Wed, 9 Apr 2025 02:38:05 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJh-0006U5-U3; Tue, 08 Apr 2025 22:37:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LJe-0006TO-VU for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:27 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJc-0007nM-8X for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:26 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8DxbKxc3fVnGq+1AA--.40322S3; Wed, 09 Apr 2025 10:37:16 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S7; Wed, 09 Apr 2025 10:37:15 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 05/16] hw/intc/loongarch_pch: Use relative address in MemoryRegionOps Date: Wed, 9 Apr 2025 10:37:00 +0800 Message-Id: <20250409023711.2960618-6-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S7 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoWxWrWDJF13ZFyUKF4rXFWUtrc_yoWrWrWfpF ZxAFy7trsrJan7Wrs7A34DZw1xWFn7G3429a90ka40krWDZrykXa4qy34kG3Wjk3s7ArWr XFs8Gw1a9a17XFbCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkjb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4 xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jw0_WrylYx0Ex4A2jsIE14v2 6r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwI xGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480 Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jrv_JF1lIxkGc2Ij64vIr41lIxAIcVC0I7 IYx2IY67AKxVW8JVW5JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAIcVCF04k2 6cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2jsIEc7CjxV AFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07josjUUUUUU= Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Parameter address for read and write callback in MemoryRegionOps is relative offset with base address of this MemoryRegionOps. It can be directly used as offset and offset calculation can be removed. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 34 ++++++++++++++++------------------ 1 file changed, 16 insertions(+), 18 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index ae2dbdfafe..70cd41b5e2 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -76,9 +76,8 @@ static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, { LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); uint64_t val = 0; - uint32_t offset = addr & 0xfff; - switch (offset) { + switch (addr) { case PCH_PIC_INT_ID: val = s->id.data & UINT_MAX; break; @@ -129,13 +128,12 @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, uint64_t value, unsigned size) { LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); - uint32_t offset, old_valid, data = (uint32_t)value; + uint32_t old_valid, data = (uint32_t)value; uint64_t old, int_mask; - offset = addr & 0xfff; trace_loongarch_pch_pic_low_writew(size, addr, data); - switch (offset) { + switch (addr) { case PCH_PIC_INT_MASK: old = s->int_mask; s->int_mask = get_writew_val(old, data, 0); @@ -203,9 +201,9 @@ static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, { LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); uint64_t val = 0; - uint32_t offset = addr + PCH_PIC_INT_STATUS; - switch (offset) { + addr += PCH_PIC_INT_STATUS; + switch (addr) { case PCH_PIC_INT_STATUS: val = (uint32_t)(s->intisr & (~s->int_mask)); break; @@ -230,12 +228,12 @@ static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr, uint64_t value, unsigned size) { LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); - uint32_t offset, data = (uint32_t)value; - offset = addr + PCH_PIC_INT_STATUS; + uint32_t data = (uint32_t)value; + addr += PCH_PIC_INT_STATUS; trace_loongarch_pch_pic_high_writew(size, addr, data); - switch (offset) { + switch (addr) { case PCH_PIC_INT_STATUS: s->intisr = get_writew_val(s->intisr, data, 0); break; @@ -258,18 +256,18 @@ static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr, { LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); uint64_t val = 0; - uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY; int64_t offset_tmp; - switch (offset) { + addr += PCH_PIC_ROUTE_ENTRY; + switch (addr) { case PCH_PIC_HTMSI_VEC ... PCH_PIC_HTMSI_VEC_END: - offset_tmp = offset - PCH_PIC_HTMSI_VEC; + offset_tmp = addr - PCH_PIC_HTMSI_VEC; if (offset_tmp >= 0 && offset_tmp < 64) { val = s->htmsi_vector[offset_tmp]; } break; case PCH_PIC_ROUTE_ENTRY ... PCH_PIC_ROUTE_ENTRY_END: - offset_tmp = offset - PCH_PIC_ROUTE_ENTRY; + offset_tmp = addr - PCH_PIC_ROUTE_ENTRY; if (offset_tmp >= 0 && offset_tmp < 64) { val = s->route_entry[offset_tmp]; } @@ -287,19 +285,19 @@ static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr, { LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); int32_t offset_tmp; - uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY; + addr += PCH_PIC_ROUTE_ENTRY; trace_loongarch_pch_pic_writeb(size, addr, data); - switch (offset) { + switch (addr) { case PCH_PIC_HTMSI_VEC ... PCH_PIC_HTMSI_VEC_END: - offset_tmp = offset - PCH_PIC_HTMSI_VEC; + offset_tmp = addr - PCH_PIC_HTMSI_VEC; if (offset_tmp >= 0 && offset_tmp < 64) { s->htmsi_vector[offset_tmp] = (uint8_t)(data & 0xff); } break; case PCH_PIC_ROUTE_ENTRY ... PCH_PIC_ROUTE_ENTRY_END: - offset_tmp = offset - PCH_PIC_ROUTE_ENTRY; + offset_tmp = addr - PCH_PIC_ROUTE_ENTRY; if (offset_tmp >= 0 && offset_tmp < 64) { s->route_entry[offset_tmp] = (uint8_t)(data & 0xff); } From patchwork Wed Apr 9 02:37:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14044003 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E3C0C369A5 for ; Wed, 9 Apr 2025 02:38:46 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJi-0006V7-3i; Tue, 08 Apr 2025 22:37:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LJf-0006Tf-VX for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:27 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJc-0007nG-F6 for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:27 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8Axjmtc3fVnGa+1AA--.39741S3; Wed, 09 Apr 2025 10:37:16 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S8; Wed, 09 Apr 2025 10:37:16 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 06/16] hw/intc/loongarch_pch: Discard write operation with ISR register Date: Wed, 9 Apr 2025 10:37:01 +0800 Message-Id: <20250409023711.2960618-7-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S8 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj9xXoWrKw4kCFy8ZFWDZF17Xr15Jrc_yoWfurX_WF yfCasrCw1UAr15AwsIvr15Xa15A3WFqasakas7Xr1kJ345XFWrA3yjgrs8Arn2qa4UXwn3 G3yIvrySyr10kosvyTuYvTs0mTUanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUj1kv1TuYvT s0mT0YCTnIWjqI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUI cSsGvfJTRUUUb78YFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20x vaj40_Wr0E3s1l1IIY67AEw4v_Jrv_JF1l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxS w2x7M28EF7xvwVC0I7IYx2IY67AKxVW5JVW7JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxV W8JVWxJwA2z4x0Y4vEx4A2jsIE14v26rxl6s0DM28EF7xvwVC2z280aVCY1x0267AKxVW0 oVCq3wAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2zVCFFI0UMc02F4 0EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWUtVWrXwAv7VC2z280aVAFwI0_ Gr0_Cr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMxAIw28IcxkI7VAKI4 8JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xv wVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUXVWUAwCIc40Y0x0EwIxGrwCI42IY6xIIjx v20xvE14v26r4j6ryUMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI42IY6xAIw20E Y4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Gr0_Cr1lIxAIcVC2z280aVCY1x0267 AKxVW8JVW8JrUvcSsGvfC2KfnxnUUI43ZEXa7IU8l38UUUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org With the latest 7A1000 user manual, interrupt status register ISR is read only. Here discard write operation with ISR register. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index 70cd41b5e2..421ede7bee 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -234,12 +234,6 @@ static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr, trace_loongarch_pch_pic_high_writew(size, addr, data); switch (addr) { - case PCH_PIC_INT_STATUS: - s->intisr = get_writew_val(s->intisr, data, 0); - break; - case PCH_PIC_INT_STATUS + 4: - s->intisr = get_writew_val(s->intisr, data, 1); - break; case PCH_PIC_INT_POL: s->int_polarity = get_writew_val(s->int_polarity, data, 0); break; From patchwork Wed Apr 9 02:37:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14044009 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5396EC369A2 for ; Wed, 9 Apr 2025 02:38:59 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJi-0006Vj-Vp; Tue, 08 Apr 2025 22:37:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LJg-0006Th-5n for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:28 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJc-0007nI-CA for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:27 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8AxquBd3fVnHK+1AA--.63889S3; Wed, 09 Apr 2025 10:37:17 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S9; Wed, 09 Apr 2025 10:37:16 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 07/16] hw/intc/loongarch_pch: Use generic read callback for iomem32_low region Date: Wed, 9 Apr 2025 10:37:02 +0800 Message-Id: <20250409023711.2960618-8-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S9 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoWxWr17Gw4rGFWUZrWxuw47KFX_yoW5WrW5pr W3Ar93AF4DJF17WFs7A343Arn7J3Z7Wryaga9Ivry09F95Jrn5Wryvq347WF1jk3srJryU WrZxuFsI9a17X3XCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r106r15M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv67AK xVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64 vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI7VAKI48JMIIF0xvE2I x0cI8IcVAFwI0_Gr0_Xr1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK 8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I 0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUcHUqUUUUU Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For memory region iomem32_low, generic read callback is used. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 67 ++++++++++++++++++++++++++----------- 1 file changed, 47 insertions(+), 20 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index 421ede7bee..d303ce0667 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -7,6 +7,7 @@ #include "qemu/osdep.h" #include "qemu/bitops.h" +#include "qemu/log.h" #include "hw/irq.h" #include "hw/intc/loongarch_pch_pic.h" #include "trace.h" @@ -71,47 +72,73 @@ static void pch_pic_irq_handler(void *opaque, int irq, int level) pch_pic_update_irq(s, mask, level); } -static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, - unsigned size) +static uint64_t pch_pic_read(void *opaque, hwaddr addr, uint64_t field_mask) { LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); uint64_t val = 0; + uint32_t offset; + offset = addr & 7; + addr -= offset; switch (addr) { case PCH_PIC_INT_ID: - val = s->id.data & UINT_MAX; - break; - case PCH_PIC_INT_ID + 4: - val = s->id.data >> 32; + val = s->id.data; break; case PCH_PIC_INT_MASK: - val = (uint32_t)s->int_mask; - break; - case PCH_PIC_INT_MASK + 4: - val = s->int_mask >> 32; + val = s->int_mask; break; case PCH_PIC_INT_EDGE: - val = (uint32_t)s->intedge; - break; - case PCH_PIC_INT_EDGE + 4: - val = s->intedge >> 32; + val = s->intedge; break; case PCH_PIC_HTMSI_EN: - val = (uint32_t)s->htmsi_en; - break; - case PCH_PIC_HTMSI_EN + 4: - val = s->htmsi_en >> 32; + val = s->htmsi_en; break; case PCH_PIC_AUTO_CTRL0: - case PCH_PIC_AUTO_CTRL0 + 4: case PCH_PIC_AUTO_CTRL1: - case PCH_PIC_AUTO_CTRL1 + 4: /* PCH PIC connect to EXTIOI always, discard auto_ctrl access */ break; default: + qemu_log_mask(LOG_GUEST_ERROR, + "pch_pic_read: Bad address 0x%"PRIx64"\n", addr); + break; + } + + return (val >> (offset * 8)) & field_mask; +} + +static uint64_t loongarch_pch_pic_read(void *opaque, hwaddr addr, + unsigned size) +{ + uint64_t val = 0; + + switch (size) { + case 1: + val = pch_pic_read(opaque, addr, UCHAR_MAX); + break; + case 2: + val = pch_pic_read(opaque, addr, USHRT_MAX); + break; + case 4: + val = pch_pic_read(opaque, addr, UINT_MAX); + break; + case 8: + val = pch_pic_read(opaque, addr, UINT64_MAX); + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "loongarch_pch_pic_read: Bad size %d\n", size); break; } + return val; +} + +static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, + unsigned size) +{ + uint64_t val; + + val = loongarch_pch_pic_read(opaque, addr, size); trace_loongarch_pch_pic_low_readw(size, addr, val); return val; } From patchwork Wed Apr 9 02:37:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14044005 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DE6D0C369A5 for ; Wed, 9 Apr 2025 02:38:50 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJr-0006YJ-Dj; Tue, 08 Apr 2025 22:37:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LJq-0006Xu-4o for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:38 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJo-0007o0-9i for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:37 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8CxeXFd3fVnHq+1AA--.39667S3; Wed, 09 Apr 2025 10:37:17 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S10; Wed, 09 Apr 2025 10:37:17 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 08/16] hw/intc/loongarch_pch: Use generic read callback for iomem32_high region Date: Wed, 9 Apr 2025 10:37:03 +0800 Message-Id: <20250409023711.2960618-9-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S10 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoW7ur1rur4ftFWrJw13Wry7XFc_yoW8AFykpr W3ur9IgF4DJF17WFn7Z34rArn7JFn7ury29a9Ik34F9rs8Z3s5WF1DJ34xWFyUK343Jryq qFs5WayY93WUWFbCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv67AK xVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64 vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI7VAKI48JMIIF0xvE2I x0cI8IcVAFwI0_Gr0_Xr1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK 8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I 0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUcCD7UUUUU Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add register read operation emulation in generic read function loongarch_pch_pic_read(), and use this function for iomem32_high region. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 27 ++++++++------------------- 1 file changed, 8 insertions(+), 19 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index d303ce0667..ddc0a5e725 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -97,6 +97,12 @@ static uint64_t pch_pic_read(void *opaque, hwaddr addr, uint64_t field_mask) case PCH_PIC_AUTO_CTRL1: /* PCH PIC connect to EXTIOI always, discard auto_ctrl access */ break; + case PCH_PIC_INT_STATUS: + val = s->intisr & (~s->int_mask); + break; + case PCH_PIC_INT_POL: + val = s->int_polarity; + break; default: qemu_log_mask(LOG_GUEST_ERROR, "pch_pic_read: Bad address 0x%"PRIx64"\n", addr); @@ -226,27 +232,10 @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, unsigned size) { - LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); - uint64_t val = 0; + uint64_t val; addr += PCH_PIC_INT_STATUS; - switch (addr) { - case PCH_PIC_INT_STATUS: - val = (uint32_t)(s->intisr & (~s->int_mask)); - break; - case PCH_PIC_INT_STATUS + 4: - val = (s->intisr & (~s->int_mask)) >> 32; - break; - case PCH_PIC_INT_POL: - val = (uint32_t)s->int_polarity; - break; - case PCH_PIC_INT_POL + 4: - val = s->int_polarity >> 32; - break; - default: - break; - } - + val = loongarch_pch_pic_read(opaque, addr, size); trace_loongarch_pch_pic_high_readw(size, addr, val); return val; } From patchwork Wed Apr 9 02:37:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14043999 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EA7E9C36010 for ; Wed, 9 Apr 2025 02:38:42 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJk-0006Vz-Dj; Tue, 08 Apr 2025 22:37:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LJh-0006Uu-LV for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:29 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJe-0007nr-Ae for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:29 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8BxXWte3fVnI6+1AA--.40306S3; Wed, 09 Apr 2025 10:37:18 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S11; Wed, 09 Apr 2025 10:37:17 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 09/16] hw/intc/loongarch_pch: Use generic read callback for iomem8 region Date: Wed, 9 Apr 2025 10:37:04 +0800 Message-Id: <20250409023711.2960618-10-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S11 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoW7ur17Gry8Kw13Cw4DJw4rtFc_yoW8ZrW3pr W3AryayF4kJr9rWrn7A34DZr1xW3Z7W34a9a90ka40k398Zr95WFykt34kWFyUK3s7AryU XFs8Gw1Y93W7W3XCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv67AK xVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64 vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI7VAKI48JMIIF0xvE2I x0cI8IcVAFwI0_Xr0_Ar1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK 8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I 0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUcCD7UUUUU Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add iomem8 region register read operation emulation in generic read function loongarch_pch_pic_read(), and use this function for iomem8 region. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 28 ++++++++-------------------- 1 file changed, 8 insertions(+), 20 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index ddc0a5e725..06fac16211 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -103,6 +103,12 @@ static uint64_t pch_pic_read(void *opaque, hwaddr addr, uint64_t field_mask) case PCH_PIC_INT_POL: val = s->int_polarity; break; + case PCH_PIC_HTMSI_VEC ... PCH_PIC_HTMSI_VEC_END: + val = *(uint64_t *)(s->htmsi_vector + addr - PCH_PIC_HTMSI_VEC); + break; + case PCH_PIC_ROUTE_ENTRY ... PCH_PIC_ROUTE_ENTRY_END: + val = *(uint64_t *)(s->route_entry + addr - PCH_PIC_ROUTE_ENTRY); + break; default: qemu_log_mask(LOG_GUEST_ERROR, "pch_pic_read: Bad address 0x%"PRIx64"\n", addr); @@ -264,28 +270,10 @@ static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr, static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr, unsigned size) { - LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); - uint64_t val = 0; - int64_t offset_tmp; + uint64_t val; addr += PCH_PIC_ROUTE_ENTRY; - switch (addr) { - case PCH_PIC_HTMSI_VEC ... PCH_PIC_HTMSI_VEC_END: - offset_tmp = addr - PCH_PIC_HTMSI_VEC; - if (offset_tmp >= 0 && offset_tmp < 64) { - val = s->htmsi_vector[offset_tmp]; - } - break; - case PCH_PIC_ROUTE_ENTRY ... PCH_PIC_ROUTE_ENTRY_END: - offset_tmp = addr - PCH_PIC_ROUTE_ENTRY; - if (offset_tmp >= 0 && offset_tmp < 64) { - val = s->route_entry[offset_tmp]; - } - break; - default: - break; - } - + val = loongarch_pch_pic_read(opaque, addr, size); trace_loongarch_pch_pic_readb(size, addr, val); return val; } From patchwork Wed Apr 9 02:37:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14044000 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A95CBC369A5 for ; Wed, 9 Apr 2025 02:38:44 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJj-0006Vv-RO; Tue, 08 Apr 2025 22:37:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LJh-0006Uh-DS for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:29 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJc-0007nT-Si for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:29 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8AxDGte3fVnIq+1AA--.39723S3; Wed, 09 Apr 2025 10:37:18 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S12; Wed, 09 Apr 2025 10:37:18 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 10/16] hw/intc/loongarch_pch: Use generic write callback for iomem32_low region Date: Wed, 9 Apr 2025 10:37:05 +0800 Message-Id: <20250409023711.2960618-11-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S12 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoWxWF48AFyUuF1xKF1rCw47Jrc_yoWrtFy3pr W3ZF9IyF4DtF17WFs7u3s8Zr1xJFn7u3saga9xK3409rWDJ3s5WF1DXr92gF1Yk3sxJr4j gr45uFWY9a1UX3XCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r106r15M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv67AK xVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64 vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI7VAKI48JMIIF0xvE2I x0cI8IcVAFwI0_Gr0_Xr1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK 8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I 0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUcHUqUUUUU Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For memory region iomem32_low, generic write callback is used. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 140 +++++++++++++++++++----------------- 1 file changed, 73 insertions(+), 67 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index 06fac16211..84f3bd1a2e 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -118,6 +118,53 @@ static uint64_t pch_pic_read(void *opaque, hwaddr addr, uint64_t field_mask) return (val >> (offset * 8)) & field_mask; } +static void pch_pic_write(void *opaque, hwaddr addr, uint64_t value, + uint64_t field_mask) +{ + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); + uint32_t offset; + uint64_t old, mask, data; + + offset = addr & 7; + addr -= offset; + mask = field_mask << (offset * 8); + data = (value & field_mask) << (offset * 8); + switch (addr) { + case PCH_PIC_INT_MASK: + old = s->int_mask; + s->int_mask = (old & ~mask) | data; + if (old & ~data) { + pch_pic_update_irq(s, old & ~data, 1); + } + + if (~old & data) { + pch_pic_update_irq(s, ~old & data, 0); + } + break; + case PCH_PIC_INT_EDGE: + s->intedge = (s->intedge & ~mask) | data; + break; + case PCH_PIC_INT_CLEAR: + if (s->intedge & data) { + s->intirr &= ~data; + pch_pic_update_irq(s, data, 0); + s->intisr &= ~data; + } + break; + case PCH_PIC_HTMSI_EN: + s->htmsi_en = (s->htmsi_en & ~mask) | data; + break; + case PCH_PIC_AUTO_CTRL0: + case PCH_PIC_AUTO_CTRL1: + /* Discard auto_ctrl access */ + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "pch_pic_write: Bad address 0x%"PRIx64"\n", addr); + break; + } +} + static uint64_t loongarch_pch_pic_read(void *opaque, hwaddr addr, unsigned size) { @@ -145,6 +192,30 @@ static uint64_t loongarch_pch_pic_read(void *opaque, hwaddr addr, return val; } +static void loongarch_pch_pic_write(void *opaque, hwaddr addr, + uint64_t value, unsigned size) +{ + switch (size) { + case 1: + pch_pic_write(opaque, addr, value, UCHAR_MAX); + break; + case 2: + pch_pic_write(opaque, addr, value, USHRT_MAX); + break; + break; + case 4: + pch_pic_write(opaque, addr, value, UINT_MAX); + break; + case 8: + pch_pic_write(opaque, addr, value, UINT64_MAX); + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "loongarch_pch_pic_write: Bad size %d\n", size); + break; + } +} + static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, unsigned size) { @@ -166,73 +237,8 @@ static uint64_t get_writew_val(uint64_t value, uint32_t target, bool hi) static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, uint64_t value, unsigned size) { - LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); - uint32_t old_valid, data = (uint32_t)value; - uint64_t old, int_mask; - - trace_loongarch_pch_pic_low_writew(size, addr, data); - - switch (addr) { - case PCH_PIC_INT_MASK: - old = s->int_mask; - s->int_mask = get_writew_val(old, data, 0); - old_valid = (uint32_t)old; - if (old_valid & ~data) { - pch_pic_update_irq(s, (old_valid & ~data), 1); - } - if (~old_valid & data) { - pch_pic_update_irq(s, (~old_valid & data), 0); - } - break; - case PCH_PIC_INT_MASK + 4: - old = s->int_mask; - s->int_mask = get_writew_val(old, data, 1); - old_valid = (uint32_t)(old >> 32); - int_mask = old_valid & ~data; - if (int_mask) { - pch_pic_update_irq(s, int_mask << 32, 1); - } - int_mask = ~old_valid & data; - if (int_mask) { - pch_pic_update_irq(s, int_mask << 32, 0); - } - break; - case PCH_PIC_INT_EDGE: - s->intedge = get_writew_val(s->intedge, data, 0); - break; - case PCH_PIC_INT_EDGE + 4: - s->intedge = get_writew_val(s->intedge, data, 1); - break; - case PCH_PIC_INT_CLEAR: - if (s->intedge & data) { - s->intirr &= (~data); - pch_pic_update_irq(s, data, 0); - s->intisr &= (~data); - } - break; - case PCH_PIC_INT_CLEAR + 4: - value <<= 32; - if (s->intedge & value) { - s->intirr &= (~value); - pch_pic_update_irq(s, value, 0); - s->intisr &= (~value); - } - break; - case PCH_PIC_HTMSI_EN: - s->htmsi_en = get_writew_val(s->htmsi_en, data, 0); - break; - case PCH_PIC_HTMSI_EN + 4: - s->htmsi_en = get_writew_val(s->htmsi_en, data, 1); - break; - case PCH_PIC_AUTO_CTRL0: - case PCH_PIC_AUTO_CTRL0 + 4: - case PCH_PIC_AUTO_CTRL1: - case PCH_PIC_AUTO_CTRL1 + 4: - /* discard auto_ctrl access */ - break; - default: - break; - } + trace_loongarch_pch_pic_low_writew(size, addr, value); + loongarch_pch_pic_write(opaque, addr, value, size); } static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, From patchwork Wed Apr 9 02:37:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14044006 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C4BC1C369A2 for ; Wed, 9 Apr 2025 02:38:51 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LKh-0007YC-QE; Tue, 08 Apr 2025 22:38:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LKe-0007QQ-Ph for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:38:28 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LKc-0007tm-Jm for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:38:28 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8BxrOJf3fVnJa+1AA--.1208S3; Wed, 09 Apr 2025 10:37:19 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S13; Wed, 09 Apr 2025 10:37:18 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 11/16] hw/intc/loongarch_pch: Use generic write callback for iomem32_high region Date: Wed, 9 Apr 2025 10:37:06 +0800 Message-Id: <20250409023711.2960618-12-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S13 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoW7tFykJr1DJF4fAF15Ar1fAFc_yoW8tryxpr W3Zry3Ka1DtFnrXF1kAa45Zr97JFn7W34a9anIk3409rn8Zrn8uF1kJFyIgFyjk34fJryj qr4ruFyYga1UG3XCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv67AK xVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64 vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI7VAKI48JMIIF0xvE2I x0cI8IcVAFwI0_Xr0_Ar1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK 8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I 0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxU2F4iUUUUU Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add iomem32_high region register write operation emulation in generic write function loongarch_pch_pic_write(), and use this function for iomem32_high region. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 28 +++++----------------------- 1 file changed, 5 insertions(+), 23 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index 84f3bd1a2e..7477e92ac5 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -158,6 +158,9 @@ static void pch_pic_write(void *opaque, hwaddr addr, uint64_t value, case PCH_PIC_AUTO_CTRL1: /* Discard auto_ctrl access */ break; + case PCH_PIC_INT_POL: + s->int_polarity = (s->int_polarity & ~mask) | data; + break; default: qemu_log_mask(LOG_GUEST_ERROR, "pch_pic_write: Bad address 0x%"PRIx64"\n", addr); @@ -226,14 +229,6 @@ static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, return val; } -static uint64_t get_writew_val(uint64_t value, uint32_t target, bool hi) -{ - uint64_t mask = 0xffffffff00000000; - uint64_t data = target; - - return hi ? (value & ~mask) | (data << 32) : (value & mask) | data; -} - static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, uint64_t value, unsigned size) { @@ -255,22 +250,9 @@ static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr, uint64_t value, unsigned size) { - LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); - uint32_t data = (uint32_t)value; - addr += PCH_PIC_INT_STATUS; - trace_loongarch_pch_pic_high_writew(size, addr, data); - - switch (addr) { - case PCH_PIC_INT_POL: - s->int_polarity = get_writew_val(s->int_polarity, data, 0); - break; - case PCH_PIC_INT_POL + 4: - s->int_polarity = get_writew_val(s->int_polarity, data, 1); - break; - default: - break; - } + trace_loongarch_pch_pic_high_writew(size, addr, value); + loongarch_pch_pic_write(opaque, addr, value, size); } static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr, From patchwork Wed Apr 9 02:37:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14044008 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 08477C369A5 for ; Wed, 9 Apr 2025 02:38:58 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LKj-0007gZ-Q9; Tue, 08 Apr 2025 22:38:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LKf-0007UD-T7 for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:38:30 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LKd-0007tq-Th for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:38:29 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8DxC3Jg3fVnJ6+1AA--.40159S3; Wed, 09 Apr 2025 10:37:20 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S14; Wed, 09 Apr 2025 10:37:19 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 12/16] hw/intc/loongarch_pch: Use generic write callback for iomem8 region Date: Wed, 9 Apr 2025 10:37:07 +0800 Message-Id: <20250409023711.2960618-13-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S14 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoW7tFyfKrW3WFWfGF1xtw1xXrc_yoW5Jr47pr W3Zryaqr4DJFsrWFs7Ja4DZr1xWFn7W34S9a90ka40kr98ZryDXFyDJ34kWFyjk34xArW8 Xrs5CryY9a1UW3XCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r106r15M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv67AK xVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64 vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI7VAKI48JMIIF0xvE2I x0cI8IcVAFwI0_Xr0_Ar1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK 8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I 0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUcHUqUUUUU Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add iomem8 region register write operation emulation in generic write function loongarch_pch_pic_write(), and use this function for iomem8 region. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 31 ++++++++++--------------------- 1 file changed, 10 insertions(+), 21 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index 7477e92ac5..adff2288a0 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -123,7 +123,7 @@ static void pch_pic_write(void *opaque, hwaddr addr, uint64_t value, { LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); uint32_t offset; - uint64_t old, mask, data; + uint64_t old, mask, data, *ptemp; offset = addr & 7; addr -= offset; @@ -161,6 +161,14 @@ static void pch_pic_write(void *opaque, hwaddr addr, uint64_t value, case PCH_PIC_INT_POL: s->int_polarity = (s->int_polarity & ~mask) | data; break; + case PCH_PIC_HTMSI_VEC ... PCH_PIC_HTMSI_VEC_END: + ptemp = (uint64_t *)(s->htmsi_vector + addr - PCH_PIC_HTMSI_VEC); + *ptemp = (*ptemp & ~mask) | data; + break; + case PCH_PIC_ROUTE_ENTRY ... PCH_PIC_ROUTE_ENTRY_END: + ptemp = (uint64_t *)(s->route_entry + addr - PCH_PIC_ROUTE_ENTRY); + *ptemp = (*ptemp & ~mask) | data; + break; default: qemu_log_mask(LOG_GUEST_ERROR, "pch_pic_write: Bad address 0x%"PRIx64"\n", addr); @@ -269,28 +277,9 @@ static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr, static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr, uint64_t data, unsigned size) { - LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); - int32_t offset_tmp; - addr += PCH_PIC_ROUTE_ENTRY; trace_loongarch_pch_pic_writeb(size, addr, data); - - switch (addr) { - case PCH_PIC_HTMSI_VEC ... PCH_PIC_HTMSI_VEC_END: - offset_tmp = addr - PCH_PIC_HTMSI_VEC; - if (offset_tmp >= 0 && offset_tmp < 64) { - s->htmsi_vector[offset_tmp] = (uint8_t)(data & 0xff); - } - break; - case PCH_PIC_ROUTE_ENTRY ... PCH_PIC_ROUTE_ENTRY_END: - offset_tmp = addr - PCH_PIC_ROUTE_ENTRY; - if (offset_tmp >= 0 && offset_tmp < 64) { - s->route_entry[offset_tmp] = (uint8_t)(data & 0xff); - } - break; - default: - break; - } + loongarch_pch_pic_write(opaque, addr, data, size); } static const MemoryRegionOps loongarch_pch_pic_reg32_low_ops = { From patchwork Wed Apr 9 02:37:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14043998 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 635EAC369A2 for ; Wed, 9 Apr 2025 02:38:42 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJs-0006YS-FR; Tue, 08 Apr 2025 22:37:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LJr-0006YK-Fz for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:39 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LJo-0007o4-AC for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:39 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8Bx63Fg3fVnKa+1AA--.40009S3; Wed, 09 Apr 2025 10:37:20 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S15; Wed, 09 Apr 2025 10:37:20 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 13/16] hw/intc/loongarch_pch: Use unified trace event for memory region ops Date: Wed, 9 Apr 2025 10:37:08 +0800 Message-Id: <20250409023711.2960618-14-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S15 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoWxWFW7GF1DJw47ur17tw13trc_yoWrZFWfpr Z3ZrnxtF4ktF1qqrykZw15Xr18JF1Ig34a93ZIkryI93ykZwn0gFykJryDXF4Y934kJrWY qa95GryYqa1DWabCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv67AK xVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64 vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI7VAKI48JMIIF0xvE2I x0cI8IcVAFwI0_Xr0_Ar1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK 8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I 0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUcCD7UUUUU Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add trace event trace_loongarch_pch_pic_read(), replaces the following three events: trace_loongarch_pch_pic_low_readw() trace_loongarch_pch_pic_high_readw() trace_loongarch_pch_pic_readb() The similiar with write trace event. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 24 ++++++------------------ hw/intc/trace-events | 8 ++------ 2 files changed, 8 insertions(+), 24 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index adff2288a0..269de4a1bc 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -200,12 +200,15 @@ static uint64_t loongarch_pch_pic_read(void *opaque, hwaddr addr, break; } + trace_loongarch_pch_pic_read(size, addr, val); return val; } static void loongarch_pch_pic_write(void *opaque, hwaddr addr, uint64_t value, unsigned size) { + trace_loongarch_pch_pic_write(size, addr, value); + switch (size) { case 1: pch_pic_write(opaque, addr, value, UCHAR_MAX); @@ -230,55 +233,40 @@ static void loongarch_pch_pic_write(void *opaque, hwaddr addr, static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, unsigned size) { - uint64_t val; - - val = loongarch_pch_pic_read(opaque, addr, size); - trace_loongarch_pch_pic_low_readw(size, addr, val); - return val; + return loongarch_pch_pic_read(opaque, addr, size); } static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, uint64_t value, unsigned size) { - trace_loongarch_pch_pic_low_writew(size, addr, value); loongarch_pch_pic_write(opaque, addr, value, size); } static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, unsigned size) { - uint64_t val; - addr += PCH_PIC_INT_STATUS; - val = loongarch_pch_pic_read(opaque, addr, size); - trace_loongarch_pch_pic_high_readw(size, addr, val); - return val; + return loongarch_pch_pic_read(opaque, addr, size); } static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr, uint64_t value, unsigned size) { addr += PCH_PIC_INT_STATUS; - trace_loongarch_pch_pic_high_writew(size, addr, value); loongarch_pch_pic_write(opaque, addr, value, size); } static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr, unsigned size) { - uint64_t val; - addr += PCH_PIC_ROUTE_ENTRY; - val = loongarch_pch_pic_read(opaque, addr, size); - trace_loongarch_pch_pic_readb(size, addr, val); - return val; + return loongarch_pch_pic_read(opaque, addr, size); } static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr, uint64_t data, unsigned size) { addr += PCH_PIC_ROUTE_ENTRY; - trace_loongarch_pch_pic_writeb(size, addr, data); loongarch_pch_pic_write(opaque, addr, data, size); } diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 0ba9a02e73..334aa6a97b 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -314,12 +314,8 @@ loongson_ipi_read(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x loongson_ipi_write(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%"PRIx64 # loongarch_pch_pic.c loongarch_pch_pic_irq_handler(int irq, int level) "irq %d level %d" -loongarch_pch_pic_low_readw(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 -loongarch_pch_pic_low_writew(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 -loongarch_pch_pic_high_readw(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 -loongarch_pch_pic_high_writew(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 -loongarch_pch_pic_readb(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 -loongarch_pch_pic_writeb(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 +loongarch_pch_pic_read(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 +loongarch_pch_pic_write(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 # loongarch_pch_msi.c loongarch_msi_set_irq(int irq_num) "set msi irq %d" From patchwork Wed Apr 9 02:37:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14044011 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4ED43C369A5 for ; Wed, 9 Apr 2025 02:39:39 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LLk-0002hq-G8; Tue, 08 Apr 2025 22:39:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LLd-0002V9-HL for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:39:30 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LLa-0007wm-85 for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:39:28 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8DxzOJh3fVnLa+1AA--.40072S3; Wed, 09 Apr 2025 10:37:21 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S16; Wed, 09 Apr 2025 10:37:20 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 14/16] hw/intc/loongarch_pch: Rename memory region iomem32_low with iomem Date: Wed, 9 Apr 2025 10:37:09 +0800 Message-Id: <20250409023711.2960618-15-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxLsdY3fVnnsR1AA--.28294S16 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoWxZrW8Zw1UGFW7tF43KF4rWFX_yoW5ZF17pr ZrZrnxKF4kJFnrZFykZ345Xrn7Jrn2934I93ZIkryxCrnrAr1DXF1kJr9FgFyjk3yUGry2 qFWrGa4Yq3WUGabCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv67AK xVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64 vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI7VAKI48JMIIF0xvE2I x0cI8IcVAFwI0_Xr0_Ar1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK 8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I 0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxU2F4iUUUUU Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Rename memory region iomem32_low with iomem, also change ops name as follows: loongarch_pch_pic_reg32_low_ops --> loongarch_pch_pic_ops loongarch_pch_pic_low_readw --> loongarch_pch_pic_read loongarch_pch_pic_low_writew --> loongarch_pch_pic_write Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 26 +++++++------------------- include/hw/intc/loongarch_pic_common.h | 2 +- 2 files changed, 8 insertions(+), 20 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index 269de4a1bc..92c7544168 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -230,18 +230,6 @@ static void loongarch_pch_pic_write(void *opaque, hwaddr addr, } } -static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, - unsigned size) -{ - return loongarch_pch_pic_read(opaque, addr, size); -} - -static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, - uint64_t value, unsigned size) -{ - loongarch_pch_pic_write(opaque, addr, value, size); -} - static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, unsigned size) { @@ -270,9 +258,9 @@ static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr, loongarch_pch_pic_write(opaque, addr, data, size); } -static const MemoryRegionOps loongarch_pch_pic_reg32_low_ops = { - .read = loongarch_pch_pic_low_readw, - .write = loongarch_pch_pic_low_writew, +static const MemoryRegionOps loongarch_pch_pic_ops = { + .read = loongarch_pch_pic_read, + .write = loongarch_pch_pic_write, .valid = { .min_access_size = 4, .max_access_size = 8, @@ -361,15 +349,15 @@ static void loongarch_pic_realize(DeviceState *dev, Error **errp) qdev_init_gpio_out(dev, s->parent_irq, s->irq_num); qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num); - memory_region_init_io(&s->iomem32_low, OBJECT(dev), - &loongarch_pch_pic_reg32_low_ops, - s, PCH_PIC_NAME(.reg32_part1), 0x100); + memory_region_init_io(&s->iomem, OBJECT(dev), + &loongarch_pch_pic_ops, + s, TYPE_LOONGARCH_PIC, 0x100); memory_region_init_io(&s->iomem8, OBJECT(dev), &loongarch_pch_pic_reg8_ops, s, PCH_PIC_NAME(.reg8), 0x2a0); memory_region_init_io(&s->iomem32_high, OBJECT(dev), &loongarch_pch_pic_reg32_high_ops, s, PCH_PIC_NAME(.reg32_part2), 0xc60); - sysbus_init_mmio(sbd, &s->iomem32_low); + sysbus_init_mmio(sbd, &s->iomem); sysbus_init_mmio(sbd, &s->iomem8); sysbus_init_mmio(sbd, &s->iomem32_high); diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h index fb848da4b8..ab8ffff780 100644 --- a/include/hw/intc/loongarch_pic_common.h +++ b/include/hw/intc/loongarch_pic_common.h @@ -65,7 +65,7 @@ struct LoongArchPICCommonState { uint8_t route_entry[64]; /* 0x100 - 0x138 */ uint8_t htmsi_vector[64]; /* 0x200 - 0x238 */ - MemoryRegion iomem32_low; + MemoryRegion iomem; MemoryRegion iomem32_high; MemoryRegion iomem8; unsigned int irq_num; From patchwork Wed Apr 9 02:43:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14044012 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 671A8C369A2 for ; Wed, 9 Apr 2025 02:44:22 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LPr-0007Ju-Q5; Tue, 08 Apr 2025 22:43:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LPq-0007Jf-1y for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:43:50 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LPn-0000I9-Ri for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:43:49 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8DxOGrg3vVn1LC1AA--.41918S3; Wed, 09 Apr 2025 10:43:44 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMDxu8Tf3vVn1sZ1AA--.22064S2; Wed, 09 Apr 2025 10:43:44 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 15/16] hw/intc/loongarch_pch: Set flexible memory access size with iomem region Date: Wed, 9 Apr 2025 10:43:42 +0800 Message-Id: <20250409024343.2960757-1-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409023711.2960618-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMDxu8Tf3vVn1sZ1AA--.22064S2 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj9xXoWrtF17GrWUtr13CFWkCF43twc_yoWkCrb_W3 WfJas5uw4UJF1Yv39IqFyru3yrua1SqFna9F97Xr1fJayxJFy5Jw4rXryrZF4vq34rZ3Z5 G3y8Zr90yr1jyosvyTuYvTs0mTUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUj1kv1TuYvT s0mT0YCTnIWjqI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUI cSsGvfJTRUUUb7xYFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20x vaj40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxS w2x7M28EF7xvwVC0I7IYx2IY67AKxVW7JVWDJwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxV WxJVW8Jr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4 xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jw0_WrylYx0Ex4A2jsIE14v2 6r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwI xGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480 Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jrv_JF1lIxkGc2Ij64vIr41lIxAIcVC0I7 IYx2IY67AKxVW5JVW7JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAIcVCF04k2 6cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2jsIEc7CjxV AFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07j8CztUUUUU= Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The original iomem region only supports 4 bytes access size, set it ok with 1/2/4/8 bytes. Also unaligned memory access is not supported. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index 92c7544168..903dd4abd7 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -262,12 +262,19 @@ static const MemoryRegionOps loongarch_pch_pic_ops = { .read = loongarch_pch_pic_read, .write = loongarch_pch_pic_write, .valid = { - .min_access_size = 4, + .min_access_size = 1, .max_access_size = 8, + /* + * PCH PIC device would not work correctly if the guest was doing + * unaligned access. This might not be a limitation on the real + * device but in practice there is no reason for a guest to access + * this device unaligned. + */ + .unaligned = false, }, .impl = { - .min_access_size = 4, - .max_access_size = 4, + .min_access_size = 1, + .max_access_size = 8, }, .endianness = DEVICE_LITTLE_ENDIAN, }; From patchwork Wed Apr 9 02:43:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bibo mao X-Patchwork-Id: 14044013 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 52E3EC36010 for ; Wed, 9 Apr 2025 02:44:22 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LPq-0007Js-Qx; Tue, 08 Apr 2025 22:43:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2LPp-0007JY-Rj for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:43:49 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2LPn-0000IE-M6 for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:43:49 -0400 Received: from loongson.cn (unknown [10.2.10.34]) by gateway (Coremail) with SMTP id _____8DxvnPg3vVn1rC1AA--.7744S3; Wed, 09 Apr 2025 10:43:44 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.10.34]) by front1 (Coremail) with SMTP id qMiowMDxu8Tf3vVn1sZ1AA--.22064S3; Wed, 09 Apr 2025 10:43:44 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 16/16] hw/intc/loongarch_pch: Merge three memory region into one Date: Wed, 9 Apr 2025 10:43:43 +0800 Message-Id: <20250409024343.2960757-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250409024343.2960757-1-maobibo@loongson.cn> References: <20250409023711.2960618-1-maobibo@loongson.cn> <20250409024343.2960757-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMDxu8Tf3vVn1sZ1AA--.22064S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoWxWF1UtrWrWFy7uw4rtrWkGrX_yoWrtr43pr ZxZrn3KF4kJFnrXryvy343XF1kGwn2934293ZIkryIkrnrAr15ZF1kJ34qqFyjk3yDWr1q qF4rGa4Yqa1UJagCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r106r15M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26rWY6Fy7McIj6I8E87Iv67AK xVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64 vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI7VAKI48JMIIF0xvE2I x0cI8IcVAFwI0_Xr0_Ar1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK 8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I 0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUsdb1UUUUU Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Since memory region iomem supports memory access size with 1/2/4/8, it can be used for memory region iomem8 and iomem32_high. Now remove memory region iomem8 and iomem32_high, merge them into iomem together. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 66 +------------------------- hw/loongarch/virt.c | 6 --- include/hw/intc/loongarch_pic_common.h | 2 - 3 files changed, 1 insertion(+), 73 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index 903dd4abd7..be248dda48 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -230,34 +230,6 @@ static void loongarch_pch_pic_write(void *opaque, hwaddr addr, } } -static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, - unsigned size) -{ - addr += PCH_PIC_INT_STATUS; - return loongarch_pch_pic_read(opaque, addr, size); -} - -static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr, - uint64_t value, unsigned size) -{ - addr += PCH_PIC_INT_STATUS; - loongarch_pch_pic_write(opaque, addr, value, size); -} - -static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr, - unsigned size) -{ - addr += PCH_PIC_ROUTE_ENTRY; - return loongarch_pch_pic_read(opaque, addr, size); -} - -static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr, - uint64_t data, unsigned size) -{ - addr += PCH_PIC_ROUTE_ENTRY; - loongarch_pch_pic_write(opaque, addr, data, size); -} - static const MemoryRegionOps loongarch_pch_pic_ops = { .read = loongarch_pch_pic_read, .write = loongarch_pch_pic_write, @@ -279,34 +251,6 @@ static const MemoryRegionOps loongarch_pch_pic_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -static const MemoryRegionOps loongarch_pch_pic_reg32_high_ops = { - .read = loongarch_pch_pic_high_readw, - .write = loongarch_pch_pic_high_writew, - .valid = { - .min_access_size = 4, - .max_access_size = 8, - }, - .impl = { - .min_access_size = 4, - .max_access_size = 4, - }, - .endianness = DEVICE_LITTLE_ENDIAN, -}; - -static const MemoryRegionOps loongarch_pch_pic_reg8_ops = { - .read = loongarch_pch_pic_readb, - .write = loongarch_pch_pic_writeb, - .valid = { - .min_access_size = 1, - .max_access_size = 1, - }, - .impl = { - .min_access_size = 1, - .max_access_size = 1, - }, - .endianness = DEVICE_LITTLE_ENDIAN, -}; - static void loongarch_pch_pic_reset(DeviceState *d) { LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(d); @@ -358,16 +302,8 @@ static void loongarch_pic_realize(DeviceState *dev, Error **errp) qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num); memory_region_init_io(&s->iomem, OBJECT(dev), &loongarch_pch_pic_ops, - s, TYPE_LOONGARCH_PIC, 0x100); - memory_region_init_io(&s->iomem8, OBJECT(dev), &loongarch_pch_pic_reg8_ops, - s, PCH_PIC_NAME(.reg8), 0x2a0); - memory_region_init_io(&s->iomem32_high, OBJECT(dev), - &loongarch_pch_pic_reg32_high_ops, - s, PCH_PIC_NAME(.reg32_part2), 0xc60); + s, TYPE_LOONGARCH_PIC, VIRT_PCH_REG_SIZE); sysbus_init_mmio(sbd, &s->iomem); - sysbus_init_mmio(sbd, &s->iomem8); - sysbus_init_mmio(sbd, &s->iomem32_high); - } static void loongarch_pic_class_init(ObjectClass *klass, void *data) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 1f1cca667e..8988d557bc 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -428,12 +428,6 @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) sysbus_realize_and_unref(d, &error_fatal); memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE, sysbus_mmio_get_region(d, 0)); - memory_region_add_subregion(get_system_memory(), - VIRT_IOAPIC_REG_BASE + PCH_PIC_ROUTE_ENTRY, - sysbus_mmio_get_region(d, 1)); - memory_region_add_subregion(get_system_memory(), - VIRT_IOAPIC_REG_BASE + PCH_PIC_INT_STATUS, - sysbus_mmio_get_region(d, 2)); /* Connect pch_pic irqs to extioi */ for (i = 0; i < num; i++) { diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h index ab8ffff780..892c1828b1 100644 --- a/include/hw/intc/loongarch_pic_common.h +++ b/include/hw/intc/loongarch_pic_common.h @@ -66,8 +66,6 @@ struct LoongArchPICCommonState { uint8_t htmsi_vector[64]; /* 0x200 - 0x238 */ MemoryRegion iomem; - MemoryRegion iomem32_high; - MemoryRegion iomem8; unsigned int irq_num; };