From patchwork Wed Apr 9 14:02:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 14044749 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 260C3C369A4 for ; Wed, 9 Apr 2025 14:25:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A9CE710E8F2; Wed, 9 Apr 2025 14:25:52 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Gt1A4Pg0"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 63B1910E8F2; Wed, 9 Apr 2025 14:25:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744208751; x=1775744751; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=15qz6NOaWUSQT2GML6BEdzNB6wVG8f3hPD38/kjbB5o=; b=Gt1A4Pg00iJpFI3VWWAQNBmEEyC2iKNEh1KLMWKN8xNL0J3iUf4AVA73 lEjiOOJ7dC9d/TjOj0X07LtXtdEFhqk4BJhVzqatcJGFkUu72mNnyNwuo LYJvr/V0WEzDg0AO8x5QrYygED9ll/dsCdzzFbliVWJ21DW9kY42WLZgR SYIKzgGbAMtMhameNKwrcWgp55e3SNKK+lEHfzXAR3rbWmGAalhyRBxjO vGHGl6CkQ/QCmR3LECPRqS4iDvzMIeVXRC8CXW1ggtmArCvqFg5skjq/7 g7nH1GiFWrg1NVfhtKBq+0BOuEBPtVorGpDAKOXAgh1tRQgvkBB56/LJw A==; X-CSE-ConnectionGUID: TsYW+dm1TyipOiMR6S749w== X-CSE-MsgGUID: vOmzsAE/TFan0DWhbSVc2w== X-IronPort-AV: E=McAfee;i="6700,10204,11397"; a="49347760" X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="49347760" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2025 07:25:51 -0700 X-CSE-ConnectionGUID: vQucHYaITYegIuqVdmlLVw== X-CSE-MsgGUID: uIj83KCbQ/6UvWTiCWYt+g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="132732580" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa003.fm.intel.com with ESMTP; 09 Apr 2025 07:25:49 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jouni.hogander@intel.com, jani.nikula@intel.com, jeevan.b@intel.com, Animesh Manna Subject: [PATCH v8 1/9] drm/i915/alpm: use variable from intel_crtc_state instead of intel_psr Date: Wed, 9 Apr 2025 19:32:50 +0530 Message-Id: <20250409140258.785834-2-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20250409140258.785834-1-animesh.manna@intel.com> References: <20250409140258.785834-1-animesh.manna@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Jouni Högander Currently code is making assumption that PSR is enabled when intel_alpm_configure is called. This doesn't work if alpm is configured before PSR is enabled. Signed-off-by: Jouni Högander Reviewed-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_alpm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index 55f3ae1e68c9..1dbaa8f250aa 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -317,14 +317,14 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, u32 alpm_ctl; if (DISPLAY_VER(display) < 20 || - (!intel_dp->psr.sel_update_enabled && !intel_dp_is_edp(intel_dp))) + (!crtc_state->has_sel_update && !intel_dp_is_edp(intel_dp))) return; /* * Panel Replay on eDP is always using ALPM aux less. I.e. no need to * check panel support at this point. */ - if ((intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) || + if ((crtc_state->has_panel_replay && intel_dp_is_edp(intel_dp)) || (crtc_state->has_lobf && intel_alpm_aux_less_wake_supported(intel_dp))) { alpm_ctl = ALPM_CTL_ALPM_ENABLE | ALPM_CTL_ALPM_AUX_LESS_ENABLE | From patchwork Wed Apr 9 14:02:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 14044750 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4CB5AC36002 for ; Wed, 9 Apr 2025 14:25:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DA1F910E8F5; Wed, 9 Apr 2025 14:25:55 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="a+2uwXAB"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 670F710E8F4; Wed, 9 Apr 2025 14:25:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744208754; x=1775744754; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VkBYUnXMpdH2aYZgPOg7g9Sjrh1bQG9FZJv0eHyhzBY=; b=a+2uwXAB9bcqVLql/ZSUSYdvCLDCL4GKPfaNY5nJG10uLSL2hm3bNwSu +nXtNZRdVAj9Bpj0gKmid1e5k3rlbeC2PVWUGRqfTF5izPN14+T6RQSI1 bK/6Dn5fvtJVsgjeJPhn06QQgmkxm4t97NoFdYma1nX7Hfl7sY253RIrC sEHMofvgGW3xuPiVPw5YmG5i1trnYaDqGMRPBKMbNu+UEyYVkBpgSJapm 3GMzFYrseSI8mu047R2koYxlUURa1zhD9j0U8+jOaReyj4oiIhoD/CXRJ MrubemFY9HyFrTL+w52lAAXgXiJYMMJlXId6XlviMvExaFSZ0SV0pDmaR g==; X-CSE-ConnectionGUID: mV8bwM3rSvyb5LCllEgqgw== X-CSE-MsgGUID: ++deZZLRS/u1xquDviYqAQ== X-IronPort-AV: E=McAfee;i="6700,10204,11397"; a="49347766" X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="49347766" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2025 07:25:54 -0700 X-CSE-ConnectionGUID: haQdoMf1RpaDX+JF8L+leQ== X-CSE-MsgGUID: pzMjmnzkRi+x/D8gBbX9GA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="132732593" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa003.fm.intel.com with ESMTP; 09 Apr 2025 07:25:52 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jouni.hogander@intel.com, jani.nikula@intel.com, jeevan.b@intel.com, Animesh Manna Subject: [PATCH v8 2/9] drm/i915/lobf: Add lobf enablement in post plane update Date: Wed, 9 Apr 2025 19:32:51 +0530 Message-Id: <20250409140258.785834-3-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20250409140258.785834-1-animesh.manna@intel.com> References: <20250409140258.785834-1-animesh.manna@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Enablement of LOBF is added in post plane update whenever has_lobf flag is set. As LOBF can be enabled in non-psr case as well so adding in post plane update. There is no change of configuring alpm with psr path. v1: Initial version. v2: Use encoder-mask to find the associated encoder from crtc-state. [Jani] v3: Remove alpm_configure from intel_psr.c. [Jouni] Signed-off-by: Animesh Manna Reviewed-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_alpm.c | 25 ++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_alpm.h | 4 ++++ drivers/gpu/drm/i915/display/intel_display.c | 3 +++ drivers/gpu/drm/i915/display/intel_psr.c | 3 --- 4 files changed, 32 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index 1dbaa8f250aa..41f8b05cc11c 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -367,6 +367,31 @@ void intel_alpm_configure(struct intel_dp *intel_dp, lnl_alpm_configure(intel_dp, crtc_state); } +void intel_alpm_post_plane_update(struct intel_atomic_state *state, + struct intel_crtc *crtc) +{ + struct intel_display *display = to_intel_display(state); + const struct intel_crtc_state *crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + struct intel_encoder *encoder; + + if (!crtc_state->has_lobf && !crtc_state->has_psr) + return; + + for_each_intel_encoder_mask(display->drm, encoder, + crtc_state->uapi.encoder_mask) { + struct intel_dp *intel_dp; + + if (!intel_encoder_is_dp(encoder)) + continue; + + intel_dp = enc_to_intel_dp(encoder); + + if (intel_dp_is_edp(intel_dp)) + intel_alpm_configure(intel_dp, crtc_state); + } +} + static int i915_edp_lobf_info_show(struct seq_file *m, void *data) { struct intel_connector *connector = m->private; diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h index 8c409b10dce6..2f862b0476a8 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.h +++ b/drivers/gpu/drm/i915/display/intel_alpm.h @@ -12,6 +12,8 @@ struct intel_dp; struct intel_crtc_state; struct drm_connector_state; struct intel_connector; +struct intel_atomic_state; +struct intel_crtc; void intel_alpm_init_dpcd(struct intel_dp *intel_dp); bool intel_alpm_compute_params(struct intel_dp *intel_dp, @@ -21,6 +23,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, struct drm_connector_state *conn_state); void intel_alpm_configure(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state); +void intel_alpm_post_plane_update(struct intel_atomic_state *state, + struct intel_crtc *crtc); void intel_alpm_lobf_debugfs_add(struct intel_connector *connector); bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp); bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 16fd7c00ba01..2bd193bef5cd 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -55,6 +55,7 @@ #include "i9xx_plane.h" #include "i9xx_plane_regs.h" #include "i9xx_wm.h" +#include "intel_alpm.h" #include "intel_atomic.h" #include "intel_atomic_plane.h" #include "intel_audio.h" @@ -1080,6 +1081,8 @@ static void intel_post_plane_update(struct intel_atomic_state *state, if (audio_enabling(old_crtc_state, new_crtc_state)) intel_encoders_audio_enable(state, crtc); + intel_alpm_post_plane_update(state, crtc); + intel_psr_post_plane_update(state, crtc); } diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index eef48c014112..7ad4a01e0378 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1893,9 +1893,6 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, intel_dp->psr.psr2_sel_fetch_enabled ? IGNORE_PSR2_HW_TRACKING : 0); - if (intel_dp_is_edp(intel_dp)) - intel_alpm_configure(intel_dp, crtc_state); - /* * Wa_16013835468 * Wa_14015648006 From patchwork Wed Apr 9 14:02:52 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 14044751 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82E71C36002 for ; Wed, 9 Apr 2025 14:25:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0C58110E8F7; Wed, 9 Apr 2025 14:25:59 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="neakWwyz"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1ED8810E8F7; Wed, 9 Apr 2025 14:25:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744208758; x=1775744758; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Gmq5Z+7OXhoDZJElZfP1qkabagScz/OvTk0fdZJ2l7Y=; b=neakWwyzsLzmyarAswYTxzWPjpZ/7Bcyd6cqAnUIOElyIbvwPBIqAtL8 37cEyBeYE/MbrpGIwtsiM1VLsMEo1UwSn6SW7qmVnltH0b+lPdKc9i4W1 7YlKz1SZTPZyntVxS3Q2q4giWA8sp0mwXp6vieY5f/Q7Zz9/9cmRmD3ks ODDpt7lIU2/TNG8xirPurE8We4BjOzN7BK+x6VEjwg0rq0grjURX+Z/wz Y5cEIlEKtwbDynG051FYsE9DxTLysozTBCecm4YvpaLmZyd9KRbHpHoGW v1De5iVsS9iwYuIMo3CUnlMrocnJwoSinTP4znc3/nWprgUgTPOto1gxb w==; X-CSE-ConnectionGUID: HSuvQdZnQzegbs1UmQncgQ== X-CSE-MsgGUID: zL0izV/mQZ2mDpy+L6D2VA== X-IronPort-AV: E=McAfee;i="6700,10204,11397"; a="49347772" X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="49347772" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2025 07:25:58 -0700 X-CSE-ConnectionGUID: IblyG9ynQuyg3CmMJIf8zw== X-CSE-MsgGUID: n5WINFEETN66zlLc9198FQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="132732608" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa003.fm.intel.com with ESMTP; 09 Apr 2025 07:25:56 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jouni.hogander@intel.com, jani.nikula@intel.com, jeevan.b@intel.com, Animesh Manna Subject: [PATCH v8 3/9] drm/i915/lobf: Add debug print for LOBF Date: Wed, 9 Apr 2025 19:32:52 +0530 Message-Id: <20250409140258.785834-4-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20250409140258.785834-1-animesh.manna@intel.com> References: <20250409140258.785834-1-animesh.manna@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Lobf is enabled part of ALPM configuration and if has_lobf is set to true respective bit for LOBF will be set. Add debug print while setting the bitfield of LOBF. Signed-off-by: Animesh Manna Reviewed-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_alpm.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index 41f8b05cc11c..9227bb0b0c55 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -5,6 +5,8 @@ #include +#include + #include "intel_alpm.h" #include "intel_crtc.h" #include "intel_de.h" @@ -353,8 +355,10 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, ALPM_CTL_EXTENDED_FAST_WAKE_TIME(intel_dp->alpm_parameters.fast_wake_lines); } - if (crtc_state->has_lobf) + if (crtc_state->has_lobf) { alpm_ctl |= ALPM_CTL_LOBF_ENABLE; + drm_dbg_kms(display->drm, "Link off between frames (LOBF) enabled\n"); + } alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp->alpm_parameters.check_entry_lines); From patchwork Wed Apr 9 14:02:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 14044752 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1EAE9C369A6 for ; Wed, 9 Apr 2025 14:26:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B299810E8FB; Wed, 9 Apr 2025 14:26:02 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Pb1hX2aF"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7B52610E8F9; Wed, 9 Apr 2025 14:26:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744208761; x=1775744761; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3G7sUekDu8qEJUCk+1bNzjfo70yHVUyWGmyrf7wKQ6s=; b=Pb1hX2aFJpKZADMdGbzjYQStog9572Sh66MZ+5jG5mLVzDNFEAzG+YEZ Z4jJXX/C326+VBqIyrrK6/zTn0xcFXr/9x8KSXCsLgj43d9IRRX07z1Dp qr3noqWtz/ckWvFSpASD4PN7tSzgWzl4b6B+ip5286AdSQQJculsJm8P0 2E+7aaYv550mU9S2b/bIJJuO/vfT/9ZhAeclbE15U9m+rwmzCyNo1EHfR KxTR/u2Ks4YNh8vabzuvcyhnyUrQ2CQgkQIHtOX+KQY3v41dRfJ+T8k65 KbiFpML2TjA9jrZPm/9XxPzK1zp/9Hha+oBg0GzlqjQ6iFVpaBvaWUa2I A==; X-CSE-ConnectionGUID: kZoaaVrTTWGbxkPReW/7hA== X-CSE-MsgGUID: EfJZi0ZkSAyT31k//fBpaQ== X-IronPort-AV: E=McAfee;i="6700,10204,11397"; a="49347780" X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="49347780" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2025 07:26:01 -0700 X-CSE-ConnectionGUID: X+S20OqgSsysCej9bkJ9Nw== X-CSE-MsgGUID: TYAg5SofSN6uRRIKGfI2rQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="132732625" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa003.fm.intel.com with ESMTP; 09 Apr 2025 07:25:59 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jouni.hogander@intel.com, jani.nikula@intel.com, jeevan.b@intel.com, Animesh Manna Subject: [PATCH v8 4/9] drm/i915/lobf: Disintegrate alpm_disable from psr_disable Date: Wed, 9 Apr 2025 19:32:53 +0530 Message-Id: <20250409140258.785834-5-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20250409140258.785834-1-animesh.manna@intel.com> References: <20250409140258.785834-1-animesh.manna@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently clearing of alpm registers is done through psr_disable() which is always not correct, without psr also alpm can exist. So dis-integrate alpm_disable() from psr_disable(). v1: Initial version. v2: - Remove h/w register read from alpm_disable(). [Jani] Signed-off-by: Animesh Manna Reviewed-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_alpm.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/display/intel_alpm.h | 1 + drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++ .../gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_psr.c | 11 ----------- 5 files changed, 22 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index 9227bb0b0c55..e66ffdbfdb0d 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -369,6 +369,7 @@ void intel_alpm_configure(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) { lnl_alpm_configure(intel_dp, crtc_state); + intel_dp->alpm_parameters.transcoder = crtc_state->cpu_transcoder; } void intel_alpm_post_plane_update(struct intel_atomic_state *state, @@ -444,3 +445,20 @@ void intel_alpm_lobf_debugfs_add(struct intel_connector *connector) debugfs_create_file("i915_edp_lobf_info", 0444, root, connector, &i915_edp_lobf_info_fops); } + +void intel_alpm_disable(struct intel_dp *intel_dp) +{ + struct intel_display *display = to_intel_display(intel_dp); + enum transcoder cpu_transcoder = intel_dp->alpm_parameters.transcoder; + + if (DISPLAY_VER(display) < 20) + return; + + intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder), + ALPM_CTL_ALPM_ENABLE | ALPM_CTL_LOBF_ENABLE | + ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0); + + intel_de_rmw(display, + PORT_ALPM_CTL(cpu_transcoder), + PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0); +} diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h index 2f862b0476a8..91f51fb24f98 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.h +++ b/drivers/gpu/drm/i915/display/intel_alpm.h @@ -28,4 +28,5 @@ void intel_alpm_post_plane_update(struct intel_atomic_state *state, void intel_alpm_lobf_debugfs_add(struct intel_connector *connector); bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp); bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp); +void intel_alpm_disable(struct intel_dp *intel_dp); #endif diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index b48ed5df7a96..be460aafe32c 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -35,6 +35,7 @@ #include "i915_drv.h" #include "i915_reg.h" #include "icl_dsi.h" +#include "intel_alpm.h" #include "intel_audio.h" #include "intel_audio_regs.h" #include "intel_backlight.h" @@ -3553,6 +3554,7 @@ static void intel_ddi_disable_dp(struct intel_atomic_state *state, intel_dp->link.active = false; intel_psr_disable(intel_dp, old_crtc_state); + intel_alpm_disable(intel_dp); intel_edp_backlight_off(old_conn_state); /* Disable the decompression in DP Sink */ intel_dp_sink_disable_decompression(state, diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 94468a9d2e0d..e558f52c3039 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1805,6 +1805,7 @@ struct intel_dp { struct { u8 io_wake_lines; u8 fast_wake_lines; + enum transcoder transcoder; /* LNL and beyond */ u8 check_entry_lines; diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 7ad4a01e0378..1bd2fcd0fa4b 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2130,17 +2130,6 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) if (intel_dp_is_edp(intel_dp)) intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)->base, false); - /* Panel Replay on eDP is always using ALPM aux less. */ - if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) { - intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder), - ALPM_CTL_ALPM_ENABLE | - ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0); - - intel_de_rmw(display, - PORT_ALPM_CTL(cpu_transcoder), - PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0); - } - /* Disable PSR on Sink */ if (!intel_dp->psr.panel_replay_enabled) { drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0); From patchwork Wed Apr 9 14:02:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 14044753 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EAFC7C369A1 for ; Wed, 9 Apr 2025 14:26:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8315810E8FC; Wed, 9 Apr 2025 14:26:06 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="CsHH4mi6"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id AA62E10E8F6; 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09 Apr 2025 07:26:04 -0700 X-CSE-ConnectionGUID: HlvqE1X0QfWkfD3D5NTEyQ== X-CSE-MsgGUID: h4WETBgSSaCbEtywz8ovig== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="132732654" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa003.fm.intel.com with ESMTP; 09 Apr 2025 07:26:03 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jouni.hogander@intel.com, jani.nikula@intel.com, jeevan.b@intel.com, Animesh Manna Subject: [PATCH v8 5/9] drm/i915/lobf: Add fixed refresh rate check in compute_config() Date: Wed, 9 Apr 2025 19:32:54 +0530 Message-Id: <20250409140258.785834-6-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20250409140258.785834-1-animesh.manna@intel.com> References: <20250409140258.785834-1-animesh.manna@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" LOBF can be enabled with vrr fixed rate mode, so add check if vmin = vmax = flipline in compute_config(). Signed-off-by: Animesh Manna Reviewed-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_alpm.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index e66ffdbfdb0d..01949b90c0c3 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -290,6 +290,10 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, if (crtc_state->has_psr) return; + if (crtc_state->vrr.vmin != crtc_state->vrr.vmax || + crtc_state->vrr.vmin != crtc_state->vrr.flipline) + return; + if (!(intel_alpm_aux_wake_supported(intel_dp) || intel_alpm_aux_less_wake_supported(intel_dp))) return; From patchwork Wed Apr 9 14:02:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 14044754 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 308E5C36002 for ; Wed, 9 Apr 2025 14:26:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C122310E902; Wed, 9 Apr 2025 14:26:08 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="NcfbBhgx"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id A79CA10E8FF; Wed, 9 Apr 2025 14:26:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744208768; x=1775744768; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=db2YqlgfjcvQqgdLNHXk2p7oEoQnDxTKp7iZDMe3iK4=; b=NcfbBhgxCAun+lBT6zP4Q57/Vk3BQdWpdHmes2ez3kN4ZMFB977iVJLU g23CkbQ1a1RD5vEYFkP8A6aMgwwEpo9WIf/XabM7kd5/71maqFDOt9Ydg udpmJZwdsbIdds6q6AdgPWsbRUYN0BtUfdWV4yK30bJfiUJavYR2PlBC+ rK+FiKitTYhgF28ZoDoIH7bmdPzJfqhbHHMg6PGK5y7eWShICgsyLAee6 EjvbqkczrSXX+s3FIin8y/YqtR+t+siRHhHj5W+VPHE+1Hjqt9TJk/AhL tmyGAua2Zy0LNBUnqmMrLtcUT+KalAF0qWKqawxY6IWH0NNIxb9/q3b0v w==; X-CSE-ConnectionGUID: UPE232CHQpezzvz/aDOI0w== X-CSE-MsgGUID: Q75zgLtHQZesn5yadaKTVQ== X-IronPort-AV: E=McAfee;i="6700,10204,11397"; a="49347791" X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="49347791" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2025 07:26:07 -0700 X-CSE-ConnectionGUID: erWN54itRc2GPVyYvvxG/Q== X-CSE-MsgGUID: wZWRFkMbSEegmg/gUtHD0w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="132732672" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa003.fm.intel.com with ESMTP; 09 Apr 2025 07:26:06 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jouni.hogander@intel.com, jani.nikula@intel.com, jeevan.b@intel.com, Animesh Manna Subject: [PATCH v8 6/9] drm/i915/lobf: Update lobf if any change in dependent parameters Date: Wed, 9 Apr 2025 19:32:55 +0530 Message-Id: <20250409140258.785834-7-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20250409140258.785834-1-animesh.manna@intel.com> References: <20250409140258.785834-1-animesh.manna@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" For every commit the dependent condition for LOBF is checked and accordingly update has_lobf flag which will be used to update the ALPM_CTL register during commit. v1: Initial version. v2: Avoid reading h/w register without has_lobf check. [Jani] v3: Update LOBF in post plane update instead of separate function. [Jouni] v4: - Add lobf disable print. [Jouni] - Simplify condition check for enabling/disabling lobf. [Jouni] Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_alpm.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index 01949b90c0c3..4fe1914ff759 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -362,6 +362,8 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, if (crtc_state->has_lobf) { alpm_ctl |= ALPM_CTL_LOBF_ENABLE; drm_dbg_kms(display->drm, "Link off between frames (LOBF) enabled\n"); + } else { + drm_dbg_kms(display->drm, "Link off between frames (LOBF) disabled\n"); } alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp->alpm_parameters.check_entry_lines); @@ -382,9 +384,12 @@ void intel_alpm_post_plane_update(struct intel_atomic_state *state, struct intel_display *display = to_intel_display(state); const struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); + const struct intel_crtc_state *old_crtc_state = + intel_atomic_get_old_crtc_state(state, crtc); struct intel_encoder *encoder; - if (!crtc_state->has_lobf && !crtc_state->has_psr) + if (crtc_state->has_lobf == old_crtc_state->has_lobf && + !crtc_state->has_psr) return; for_each_intel_encoder_mask(display->drm, encoder, From patchwork Wed Apr 9 14:02:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 14044755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BD9D6C369A6 for ; Wed, 9 Apr 2025 14:26:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4B81E10E903; Wed, 9 Apr 2025 14:26:12 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="JOCyISSo"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id D57E310E8FE; Wed, 9 Apr 2025 14:26:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744208771; x=1775744771; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KTogTTSbM0RMdUaXTSNrcNkl5kk/+4zXjl1n7oh9aXQ=; b=JOCyISSo9qH/aFyC/A7MUrMxrnEgZp4aIKEpn46zv2Hr1168zDDp0c4p e0vID2zL0Eogi4HW/3wMoSwqG6yAPcqZM/MsVmi6gQ6skNLKtAFNoVSm+ 19E/GqRKpTiWYPV6RQMXb7ugYCG98p2xPn1pp0OMS/zuSICSi/R55iQGN td+9dUFzaCrITavBvhSpFA0MJkQbaHdpAyyUm2uyABoVl4i3f/UBZ70fH XSTHXk2NjrBLgvFIqHwowfZcYKeyoSxvgbuPRhE2ojsUMD40uW5SeNVXT HrkRgzrKoixO4hj8dlmGjJQzRPaxJV8dqNvWyLkKFvga4pO0uOHlqBhY1 g==; X-CSE-ConnectionGUID: /GPbKYGRQiiLY8uX0K+mqg== X-CSE-MsgGUID: hByKmIQrSwWBn/o8ZuZlCQ== X-IronPort-AV: E=McAfee;i="6700,10204,11397"; a="49347796" X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="49347796" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2025 07:26:10 -0700 X-CSE-ConnectionGUID: 4YDAL2SaSyqgzy/Vjwflgw== X-CSE-MsgGUID: Om/lNJzxQHyE37F+IQ9J/g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="132732704" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa003.fm.intel.com with ESMTP; 09 Apr 2025 07:26:09 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jouni.hogander@intel.com, jani.nikula@intel.com, jeevan.b@intel.com, Animesh Manna Subject: [PATCH v8 7/9] drm/i915/lobf: Add debug interface for lobf Date: Wed, 9 Apr 2025 19:32:56 +0530 Message-Id: <20250409140258.785834-8-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20250409140258.785834-1-animesh.manna@intel.com> References: <20250409140258.785834-1-animesh.manna@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add an interface in debugfs which will help in debugging LOBF feature. v1: Initial version. v2: - Remove FORCE_EN flag. [Jouni] - Change prefix from I915 to INTEL. [Jani] - Use u8 instead of bool for lobf-debug flag. [Jani] v3: - Use intel_connector instead of display. [Jani] - Remove edp connector check as it was already present in caller function. [Jani] - Remove loop of searching edp encoder which is directly accessible from intel_connector. [Jani] v4: - Simplify alpm debug to bool instead of bit-mask. [Jani] v5: - Remove READ_ONCE(). [Jani] - Modify variable name to *_disable_*. [Jouni] v6: Improved debug print. [Jouni] Signed-off-by: Animesh Manna Reviewed-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_alpm.c | 34 +++++++++++++++++++ .../drm/i915/display/intel_display_types.h | 1 + 2 files changed, 35 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index 4fe1914ff759..4b63d8a6bc26 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -278,6 +278,11 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, int waketime_in_lines, first_sdp_position; int context_latency, guardband; + if (intel_dp->alpm_parameters.lobf_disable_debug) { + drm_dbg_kms(display->drm, "LOBF is disabled by debug flag\n"); + return; + } + if (!intel_dp_is_edp(intel_dp)) return; @@ -442,6 +447,32 @@ static int i915_edp_lobf_info_show(struct seq_file *m, void *data) DEFINE_SHOW_ATTRIBUTE(i915_edp_lobf_info); +static int +i915_edp_lobf_debug_get(void *data, u64 *val) +{ + struct intel_connector *connector = data; + struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); + + *val = intel_dp->alpm_parameters.lobf_disable_debug; + + return 0; +} + +static int +i915_edp_lobf_debug_set(void *data, u64 val) +{ + struct intel_connector *connector = data; + struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); + + intel_dp->alpm_parameters.lobf_disable_debug = val; + + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_edp_lobf_debug_fops, + i915_edp_lobf_debug_get, i915_edp_lobf_debug_set, + "%llu\n"); + void intel_alpm_lobf_debugfs_add(struct intel_connector *connector) { struct intel_display *display = to_intel_display(connector); @@ -451,6 +482,9 @@ void intel_alpm_lobf_debugfs_add(struct intel_connector *connector) connector->base.connector_type != DRM_MODE_CONNECTOR_eDP) return; + debugfs_create_file("i915_edp_lobf_debug", 0644, root, + connector, &i915_edp_lobf_debug_fops); + debugfs_create_file("i915_edp_lobf_info", 0444, root, connector, &i915_edp_lobf_info_fops); } diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index e558f52c3039..389dd033c2d0 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1812,6 +1812,7 @@ struct intel_dp { u8 aux_less_wake_lines; u8 silence_period_sym_clocks; u8 lfps_half_cycle_num_of_syms; + bool lobf_disable_debug; } alpm_parameters; u8 alpm_dpcd; From patchwork Wed Apr 9 14:02:57 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 14044756 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F33CDC369A8 for ; Wed, 9 Apr 2025 14:26:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 90C6810E8FE; Wed, 9 Apr 2025 14:26:14 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="PlmdLWIb"; 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d="scan'208";a="49347802" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2025 07:26:14 -0700 X-CSE-ConnectionGUID: kHCesH7QQjCofIvTyI6rBw== X-CSE-MsgGUID: 2x0K8a60Rju27PFsO31l1w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="132732733" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa003.fm.intel.com with ESMTP; 09 Apr 2025 07:26:12 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jouni.hogander@intel.com, jani.nikula@intel.com, jeevan.b@intel.com, Animesh Manna Subject: [PATCH v8 8/9] drm/i915/lobf: Add mutex for alpm update Date: Wed, 9 Apr 2025 19:32:57 +0530 Message-Id: <20250409140258.785834-9-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20250409140258.785834-1-animesh.manna@intel.com> References: <20250409140258.785834-1-animesh.manna@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The ALPM_CTL can be updated from different context, so add mutex to sychonize the update. Signed-off-by: Animesh Manna Reviewed-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_alpm.c | 9 ++++++++- drivers/gpu/drm/i915/display/intel_alpm.h | 2 +- drivers/gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 2 +- 4 files changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index 4b63d8a6bc26..e4eb7dae5f43 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -25,7 +25,7 @@ bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp) return intel_dp->alpm_dpcd & DP_ALPM_AUX_LESS_CAP; } -void intel_alpm_init_dpcd(struct intel_dp *intel_dp) +void intel_alpm_init(struct intel_dp *intel_dp) { u8 dpcd; @@ -33,6 +33,7 @@ void intel_alpm_init_dpcd(struct intel_dp *intel_dp) return; intel_dp->alpm_dpcd = dpcd; + mutex_init(&intel_dp->alpm_parameters.lock); } /* @@ -331,6 +332,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, (!crtc_state->has_sel_update && !intel_dp_is_edp(intel_dp))) return; + mutex_lock(&intel_dp->alpm_parameters.lock); /* * Panel Replay on eDP is always using ALPM aux less. I.e. no need to * check panel support at this point. @@ -374,6 +376,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp->alpm_parameters.check_entry_lines); intel_de_write(display, ALPM_CTL(display, cpu_transcoder), alpm_ctl); + mutex_unlock(&intel_dp->alpm_parameters.lock); } void intel_alpm_configure(struct intel_dp *intel_dp, @@ -497,6 +500,8 @@ void intel_alpm_disable(struct intel_dp *intel_dp) if (DISPLAY_VER(display) < 20) return; + mutex_lock(&intel_dp->alpm_parameters.lock); + intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder), ALPM_CTL_ALPM_ENABLE | ALPM_CTL_LOBF_ENABLE | ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0); @@ -504,4 +509,6 @@ void intel_alpm_disable(struct intel_dp *intel_dp) intel_de_rmw(display, PORT_ALPM_CTL(cpu_transcoder), PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0); + + mutex_unlock(&intel_dp->alpm_parameters.lock); } diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h index 91f51fb24f98..012b0b1d17ff 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.h +++ b/drivers/gpu/drm/i915/display/intel_alpm.h @@ -15,7 +15,7 @@ struct intel_connector; struct intel_atomic_state; struct intel_crtc; -void intel_alpm_init_dpcd(struct intel_dp *intel_dp); +void intel_alpm_init(struct intel_dp *intel_dp); bool intel_alpm_compute_params(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state); void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 389dd033c2d0..11346c159489 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1806,6 +1806,7 @@ struct intel_dp { u8 io_wake_lines; u8 fast_wake_lines; enum transcoder transcoder; + struct mutex lock; /* LNL and beyond */ u8 check_entry_lines; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index aeb14a5455fd..ed94115560c7 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -6391,7 +6391,7 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, */ intel_hpd_enable_detection(encoder); - intel_alpm_init_dpcd(intel_dp); + intel_alpm_init(intel_dp); /* Cache DPCD and EDID for edp. */ has_dpcd = intel_edp_init_dpcd(intel_dp, connector); From patchwork Wed Apr 9 14:02:58 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 14044757 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 68430C369A4 for ; Wed, 9 Apr 2025 14:26:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 03A7010E908; Wed, 9 Apr 2025 14:26:18 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="mPuQ6oWg"; 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d="scan'208";a="49347814" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2025 07:26:17 -0700 X-CSE-ConnectionGUID: DKm2YmcATZ611lFCaWjVTw== X-CSE-MsgGUID: /VKxnCu7TPGhd7fQwMlr/Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="132732753" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa003.fm.intel.com with ESMTP; 09 Apr 2025 07:26:15 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jouni.hogander@intel.com, jani.nikula@intel.com, jeevan.b@intel.com, Animesh Manna Subject: [PATCH v8 9/9] drm/i915/lobf: Check for sink error and disable LOBF Date: Wed, 9 Apr 2025 19:32:58 +0530 Message-Id: <20250409140258.785834-10-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20250409140258.785834-1-animesh.manna@intel.com> References: <20250409140258.785834-1-animesh.manna@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Disable LOBF/ALPM for any erroneous condition from sink side. v1: Initial version. v2: Add centralized alpm error handling. [Jouni] v3: Improve debug print. [Jouni] v4: Disable alpm permanently for sink error. [Jouni] Signed-off-by: Animesh Manna Reviewed-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_alpm.c | 28 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_alpm.h | 1 + .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 5 ++++ drivers/gpu/drm/i915/display/intel_psr.c | 18 ++---------- 5 files changed, 37 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index e4eb7dae5f43..d7dbe32076ff 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -284,6 +284,9 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, return; } + if (intel_dp->alpm_parameters.sink_alpm_error) + return; + if (!intel_dp_is_edp(intel_dp)) return; @@ -510,5 +513,30 @@ void intel_alpm_disable(struct intel_dp *intel_dp) PORT_ALPM_CTL(cpu_transcoder), PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0); + drm_dbg_kms(display->drm, "Disabling ALPM\n"); mutex_unlock(&intel_dp->alpm_parameters.lock); } + +bool intel_alpm_get_error(struct intel_dp *intel_dp) +{ + struct intel_display *display = to_intel_display(intel_dp); + struct drm_dp_aux *aux = &intel_dp->aux; + u8 val; + int r; + + r = drm_dp_dpcd_readb(aux, DP_RECEIVER_ALPM_STATUS, &val); + if (r != 1) { + drm_err(display->drm, "Error reading ALPM status\n"); + return true; + } + + if (val & DP_ALPM_LOCK_TIMEOUT_ERROR) { + drm_dbg_kms(display->drm, "ALPM lock timeout error\n"); + + /* Clearing error */ + drm_dp_dpcd_writeb(aux, DP_RECEIVER_ALPM_STATUS, val); + return true; + } + + return false; +} diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h index 012b0b1d17ff..4f86322a9995 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.h +++ b/drivers/gpu/drm/i915/display/intel_alpm.h @@ -29,4 +29,5 @@ void intel_alpm_lobf_debugfs_add(struct intel_connector *connector); bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp); bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp); void intel_alpm_disable(struct intel_dp *intel_dp); +bool intel_alpm_get_error(struct intel_dp *intel_dp); #endif diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 11346c159489..97db0f569a92 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1814,6 +1814,7 @@ struct intel_dp { u8 silence_period_sym_clocks; u8 lfps_half_cycle_num_of_syms; bool lobf_disable_debug; + bool sink_alpm_error; } alpm_parameters; u8 alpm_dpcd; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index ed94115560c7..cb2c097c1ec9 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -5391,6 +5391,11 @@ intel_dp_short_pulse(struct intel_dp *intel_dp) intel_psr_short_pulse(intel_dp); + if (intel_alpm_get_error(intel_dp)) { + intel_alpm_disable(intel_dp); + intel_dp->alpm_parameters.sink_alpm_error = true; + } + if (intel_dp_test_short_pulse(intel_dp)) reprobe_needed = true; diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 1bd2fcd0fa4b..43ed166007eb 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -3384,29 +3384,15 @@ static int psr_get_status_and_error_status(struct intel_dp *intel_dp, static void psr_alpm_check(struct intel_dp *intel_dp) { - struct intel_display *display = to_intel_display(intel_dp); - struct drm_dp_aux *aux = &intel_dp->aux; struct intel_psr *psr = &intel_dp->psr; - u8 val; - int r; if (!psr->sel_update_enabled) return; - r = drm_dp_dpcd_readb(aux, DP_RECEIVER_ALPM_STATUS, &val); - if (r != 1) { - drm_err(display->drm, "Error reading ALPM status\n"); - return; - } - - if (val & DP_ALPM_LOCK_TIMEOUT_ERROR) { + if (intel_alpm_get_error(intel_dp)) { intel_psr_disable_locked(intel_dp); psr->sink_not_reliable = true; - drm_dbg_kms(display->drm, - "ALPM lock timeout error, disabling PSR\n"); - - /* Clearing error */ - drm_dp_dpcd_writeb(aux, DP_RECEIVER_ALPM_STATUS, val); + intel_alpm_disable(intel_dp); } }