From patchwork Wed Apr 9 14:42:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Vecera X-Patchwork-Id: 14044827 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55266266B4F for ; Wed, 9 Apr 2025 14:43:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744209791; cv=none; b=fuwa9fUnZkMBHTmvabETyy9zl5PQy524CsFm2UGQ1LvJAmohmxJzavNhYbCMxalP3ijQUTiPr+w/kYNq2aA/9C7TRs5yAxH0OO4MDyl1jhyB5cezpi06gaU1vIXUnLZ1aWI4B0K4jIFrYr9CwCCAYs62RKTzRC/d7f4admD3ieE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744209791; c=relaxed/simple; bh=gaQWkouOpD6G6NmR3uzxvXgmkQsgTvQbHxA219BimeE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rRXlw6Kyp8TjzbH74EtzXoXRhC2Y4uc21WTY+qOFI4gaXLZNt+JamFEUEapj2SjdkN6vSN8uJpbZZR+LcYsbnjlMb2YdP3BVVu3xKclzrKNxu/4Fej071SkCqTIHnyOP/HIylT4lsyJEpGKK8C+Ig2rPv6lVpl90YuVgBgCM3J8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=BuKO+wxU; arc=none smtp.client-ip=170.10.129.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="BuKO+wxU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1744209788; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=eU7bghLU/1aItTFDWUSMaik0cCq+YDcl3tVPYpYkiDU=; b=BuKO+wxUPjFA5QgskUqGKRGA6rgPQ3kw748dU44vCUejmGG0TJDoWmQtwLobEnzqj7amup XQl1Gj2xWMh9lcd8+EF0YcFSFoXDpzmxfvntci8hGNXoj2xXWSf/5tO2vezW0jJNDm9b6e hHhCYVmALguYLuW0tKigB2MYx2fv+k8= Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-649-YMh8w155OiaVEIU1RCGO3A-1; Wed, 09 Apr 2025 10:43:05 -0400 X-MC-Unique: YMh8w155OiaVEIU1RCGO3A-1 X-Mimecast-MFC-AGG-ID: YMh8w155OiaVEIU1RCGO3A_1744209782 Received: from mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.111]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 2B119180035E; Wed, 9 Apr 2025 14:43:02 +0000 (UTC) Received: from p16v.luc.cera.cz (unknown [10.44.32.72]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 9286E1801A6D; Wed, 9 Apr 2025 14:42:57 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Prathosh Satish , Lee Jones , Kees Cook , Andy Shevchenko , Andrew Morton , Michal Schmidt , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: [PATCH v2 01/14] dt-bindings: dpll: Add device tree bindings for DPLL device and pin Date: Wed, 9 Apr 2025 16:42:37 +0200 Message-ID: <20250409144250.206590-2-ivecera@redhat.com> In-Reply-To: <20250409144250.206590-1-ivecera@redhat.com> References: <20250409144250.206590-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Add a common DT schema for DPLL device and associated pin. The DPLL (device phase-locked loop) is a device used for precise clock synchronization in networking and telecom hardware. The device itself is equipped with one or more DPLLs (channels) and one or more physical input and output pins. Each DPLL channel is used either to provide pulse-per-clock signal or to drive ethernet equipment clock. The input and output pins have a label (specifies board label), type (specifies its usage depending on wiring), list of supported or allowed frequencies (depending on how the pin is connected and where) and can support embedded sync capability. Signed-off-by: Ivan Vecera --- v1->v2: * rewritten description for both device and pin * dropped num-dplls property * supported-frequencies property renamed to supported-frequencies-hz --- .../devicetree/bindings/dpll/dpll-device.yaml | 76 +++++++++++++++++++ .../devicetree/bindings/dpll/dpll-pin.yaml | 44 +++++++++++ MAINTAINERS | 2 + 3 files changed, 122 insertions(+) create mode 100644 Documentation/devicetree/bindings/dpll/dpll-device.yaml create mode 100644 Documentation/devicetree/bindings/dpll/dpll-pin.yaml diff --git a/Documentation/devicetree/bindings/dpll/dpll-device.yaml b/Documentation/devicetree/bindings/dpll/dpll-device.yaml new file mode 100644 index 0000000000000..11a02b74e28b7 --- /dev/null +++ b/Documentation/devicetree/bindings/dpll/dpll-device.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dpll/dpll-device.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Digital Phase-Locked Loop (DPLL) Device + +maintainers: + - Ivan Vecera + +description: + Digital Phase-Locked Loop (DPLL) device is used for precise clock + synchronization in networking and telecom hardware. The device can + have one or more channels (DPLLs) and one or more physical input and + output pins. Each DPLL channel can either produce pulse-per-clock signal + or drive ethernet equipment clock. The type of each channel can be + indicated by dpll-types property. + +properties: + $nodename: + pattern: "^dpll(@.*)?$" + + "#address-cells": + const: 0 + + "#size-cells": + const: 0 + + dpll-types: + description: List of DPLL channel types, one per DPLL instance. + $ref: /schemas/types.yaml#/definitions/non-unique-string-array + items: + enum: [pps, eec] + + input-pins: + type: object + description: DPLL input pins + unevaluatedProperties: false + + properties: + "#address-cells": + const: 1 + "#size-cells": + const: 0 + + patternProperties: + "^pin@[0-9]+$": + $ref: /schemas/dpll/dpll-pin.yaml + unevaluatedProperties: false + + required: + - "#address-cells" + - "#size-cells" + + output-pins: + type: object + description: DPLL output pins + unevaluatedProperties: false + + properties: + "#address-cells": + const: 1 + "#size-cells": + const: 0 + + patternProperties: + "^pin@[0-9]+$": + $ref: /schemas/dpll/dpll-pin.yaml + unevaluatedProperties: false + + required: + - "#address-cells" + - "#size-cells" + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/dpll/dpll-pin.yaml b/Documentation/devicetree/bindings/dpll/dpll-pin.yaml new file mode 100644 index 0000000000000..44af3a4398a5f --- /dev/null +++ b/Documentation/devicetree/bindings/dpll/dpll-pin.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dpll/dpll-pin.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DPLL Pin + +maintainers: + - Ivan Vecera + +description: | + The DPLL pin is either a physical input or output pin that is provided + by a DPLL( Digital Phase-Locked Loop) device. The pin is identified by + its physical order number that is stored in reg property and can have + an additional set of properties like supported (allowed) frequencies, + label, type and may support embedded sync. + Note that the pin in this context has nothing to do with pinctrl. + +properties: + reg: + description: Hardware index of the DPLL pin. + $ref: /schemas/types.yaml#/definitions/uint32 + + esync-control: + description: Indicates whether the pin supports embedded sync functionality. + type: boolean + + label: + description: String exposed as the pin board label + $ref: /schemas/types.yaml#/definitions/string + + supported-frequencies-hz: + description: List of supported frequencies for this pin, expressed in Hz. + + type: + description: Type of the pin + $ref: /schemas/types.yaml#/definitions/string + enum: [ext, gnss, int, mux, synce] + +required: + - reg + +additionalProperties: false diff --git a/MAINTAINERS b/MAINTAINERS index 4c5c2e2c12787..0742a10e87c88 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7194,6 +7194,8 @@ M: Arkadiusz Kubalewski M: Jiri Pirko L: netdev@vger.kernel.org S: Supported +F: Documentation/devicetree/bindings/dpll/dpll-device.yaml +F: Documentation/devicetree/bindings/dpll/dpll-pin.yaml F: Documentation/driver-api/dpll.rst F: drivers/dpll/* F: include/linux/dpll.h From patchwork Wed Apr 9 14:42:38 2025 Content-Type: text/plain; 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Wed, 9 Apr 2025 14:43:07 +0000 (UTC) Received: from p16v.luc.cera.cz (unknown [10.44.32.72]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 96EEC1801747; Wed, 9 Apr 2025 14:43:02 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Prathosh Satish , Lee Jones , Kees Cook , Andy Shevchenko , Andrew Morton , Michal Schmidt , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: [PATCH v2 02/14] dt-bindings: dpll: Add support for Microchip Azurite chip family Date: Wed, 9 Apr 2025 16:42:38 +0200 Message-ID: <20250409144250.206590-3-ivecera@redhat.com> In-Reply-To: <20250409144250.206590-1-ivecera@redhat.com> References: <20250409144250.206590-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Add DT bindings for Microchip Azurite DPLL chip family. These chips provides 2 independent DPLL channels, up to 10 differential or single-ended inputs and up to 20 differential or 20 single-ended outputs. It can be connected via I2C or SPI busses. Signed-off-by: Ivan Vecera --- .../bindings/dpll/microchip,zl3073x-i2c.yaml | 74 ++++++++++++++++++ .../bindings/dpll/microchip,zl3073x-spi.yaml | 77 +++++++++++++++++++ 2 files changed, 151 insertions(+) create mode 100644 Documentation/devicetree/bindings/dpll/microchip,zl3073x-i2c.yaml create mode 100644 Documentation/devicetree/bindings/dpll/microchip,zl3073x-spi.yaml diff --git a/Documentation/devicetree/bindings/dpll/microchip,zl3073x-i2c.yaml b/Documentation/devicetree/bindings/dpll/microchip,zl3073x-i2c.yaml new file mode 100644 index 0000000000000..d9280988f9eb7 --- /dev/null +++ b/Documentation/devicetree/bindings/dpll/microchip,zl3073x-i2c.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dpll/microchip,zl3073x-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: I2C-attached Microchip Azurite DPLL device + +maintainers: + - Ivan Vecera + +description: + Microchip Azurite DPLL (ZL3073x) is a family of DPLL devices that + provides 2 independent DPLL channels, up to 10 differential or + single-ended inputs and up to 20 differential or 20 single-ended outputs. + It can be connected via multiple busses, one of them being I2C. + +properties: + compatible: + enum: + - microchip,zl3073x-i2c + + reg: + maxItems: 1 + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/dpll/dpll-device.yaml# + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + dpll@70 { + compatible = "microchip,zl3073x-i2c"; + reg = <0x70>; + #address-cells = <0>; + #size-cells = <0>; + dpll-types = "pps", "eec"; + + input-pins { + #address-cells = <1>; + #size-cells = <0>; + + pin@0 { /* REF0P */ + reg = <0>; + label = "Input 0"; + supported-frequencies = /bits/ 64 <1 1000>; + type = "ext"; + }; + }; + + output-pins { + #address-cells = <1>; + #size-cells = <0>; + + pin@3 { /* OUT1N */ + reg = <3>; + esync-control; + label = "Output 1"; + supported-frequencies = /bits/ 64 <1 10000>; + type = "gnss"; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/dpll/microchip,zl3073x-spi.yaml b/Documentation/devicetree/bindings/dpll/microchip,zl3073x-spi.yaml new file mode 100644 index 0000000000000..7bd6e5099e1ce --- /dev/null +++ b/Documentation/devicetree/bindings/dpll/microchip,zl3073x-spi.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dpll/microchip,zl3073x-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SPI-attached Microchip Azurite DPLL device + +maintainers: + - Ivan Vecera + +description: + Microchip Azurite DPLL (ZL3073x) is a family of DPLL devices that + provides 2 independent DPLL channels, up to 10 differential or + single-ended inputs and up to 20 differential or 20 single-ended outputs. + It can be connected via multiple busses, one of them being I2C. + +properties: + compatible: + enum: + - microchip,zl3073x-spi + + reg: + maxItems: 1 + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/dpll/dpll-device.yaml# + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + dpll@70 { + compatible = "microchip,zl3073x-spi"; + reg = <0x70>; + #address-cells = <0>; + #size-cells = <0>; + spi-max-frequency = <12500000>; + + dpll-types = "pps", "eec"; + + input-pins { + #address-cells = <1>; + #size-cells = <0>; + + pin@0 { /* REF0P */ + reg = <0>; + label = "Input 0"; + supported-frequencies = /bits/ 64 <1 1000>; + type = "ext"; + }; + }; + + output-pins { + #address-cells = <1>; + #size-cells = <0>; + + pin@3 { /* OUT1N */ + reg = <3>; + esync-control; + label = "Output 1"; + supported-frequencies = /bits/ 64 <1 10000>; + type = "gnss"; + }; + }; + }; + }; +... From patchwork Wed Apr 9 14:42:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Vecera X-Patchwork-Id: 14044829 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 11846267F4C for ; Wed, 9 Apr 2025 14:43:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.133.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744209801; cv=none; b=TnbTuI8dDlrEo+Owo1Y19xg9aFRRyujs6sU+n63zmcjex/F5pskdif7gTqw5ROK3JiFcvO2X0Yzz0I1nlRuy+ujOrDRf7NeruMv2vp6gJNBlnPDkjmAzwPDU8mQhbJbyi8pccAb6g3/Q9VaZeZhXEm2xz8YM6wK9qUbGyNyVWXo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744209801; c=relaxed/simple; bh=eb/GjR0cCgVPzsLiu0oRo074oGDwBaVvbW/KIehKOhE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EmwRlKo2q4hBjbQ0GZsb1nLRbvcsb4f7uU96+Lcvaru1o8uBYsqujMqDSJh9DENKnDodJCsDYbRrKaK7nFhGk5fRVBaYTyNb0fjFqkrBqX1N5AKifCaUeyKzZYqS90KveV2zGdXy7fwgbm9HmejBMnJxznb0LqqLOWz0x8VmQNg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=OAizG0r6; arc=none smtp.client-ip=170.10.133.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="OAizG0r6" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1744209798; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hl+RdYplTTH5ZOj64MJV3ghsQC5eKx3POMcKx6ssQvg=; b=OAizG0r6TB+RYSztQDGiAutwnUJjYmP5bGYRKqNMObG2OZzB/iQ1l+MldBVf4sASN0PPgZ b/W95JLAMH5TM8PCWHpw38G43RuwQqYh/+GAEF9ABCwqI7fUudqoB8T+/os3pF8SaKgP3S 5IL8YVU6hI7VDK9arYc3McUG9w/IGVs= Received: from mx-prod-mc-04.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-60-bMw7kZfOM0e41u9ivgpKzA-1; Wed, 09 Apr 2025 10:43:14 -0400 X-MC-Unique: bMw7kZfOM0e41u9ivgpKzA-1 X-Mimecast-MFC-AGG-ID: bMw7kZfOM0e41u9ivgpKzA_1744209792 Received: from mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.111]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-04.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 009711955DCF; Wed, 9 Apr 2025 14:43:12 +0000 (UTC) Received: from p16v.luc.cera.cz (unknown [10.44.32.72]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id AE5151801766; Wed, 9 Apr 2025 14:43:07 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Prathosh Satish , Lee Jones , Kees Cook , Andy Shevchenko , Andrew Morton , Michal Schmidt , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: [PATCH v2 03/14] mfd: Add Microchip ZL3073x support Date: Wed, 9 Apr 2025 16:42:39 +0200 Message-ID: <20250409144250.206590-4-ivecera@redhat.com> In-Reply-To: <20250409144250.206590-1-ivecera@redhat.com> References: <20250409144250.206590-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Add base MFD driver for Microchip Azurite ZL3073x chip family. These chips provide DPLL and PHC (PTP) functionality and they can be connected over I2C or SPI bus. The MFD driver provide basic communication and synchronization over the bus and common functionality that are used by the DPLL driver (later in this series) and by the PTP driver (will be added later). The chip family is characterized by following properties: * 2 separate DPLL units (channels) * 5 synthesizers * 10 input pins (references) * 10 outputs * 20 output pins (output pin pair shares one output) * Each reference and output can act in differential or single-ended mode (reference or output in differential mode consumes 2 pins) * Each output is connected to one of the synthesizers * Each synthesizer is driven by one of the DPLL unit Signed-off-by: Ivan Vecera v1->v2: * fixed header issues * removed usage of of_match_ptr * added check for devm_mutex_init * removed commas after sentinels * removed variable initialization in zl3073x_i2c_probe() * moved device tables closer to their users * renamed zl3073x_dev_alloc() to zl3073x_devm_alloc() * removed empty zl3073x_dev_exit() * spidev renamed to spi * squashed together with device DT bindings * used dev_err_probe() instead of dev_err() during probe * added some function documentation DT bindings: * spliced to separate files for i2c and spi * fixed property order in DT bindings' examples * added description --- MAINTAINERS | 9 ++++ drivers/mfd/Kconfig | 30 +++++++++++ drivers/mfd/Makefile | 5 ++ drivers/mfd/zl3073x-core.c | 101 ++++++++++++++++++++++++++++++++++++ drivers/mfd/zl3073x-i2c.c | 58 +++++++++++++++++++++ drivers/mfd/zl3073x-spi.c | 58 +++++++++++++++++++++ drivers/mfd/zl3073x.h | 14 +++++ include/linux/mfd/zl3073x.h | 23 ++++++++ 8 files changed, 298 insertions(+) create mode 100644 drivers/mfd/zl3073x-core.c create mode 100644 drivers/mfd/zl3073x-i2c.c create mode 100644 drivers/mfd/zl3073x-spi.c create mode 100644 drivers/mfd/zl3073x.h create mode 100644 include/linux/mfd/zl3073x.h diff --git a/MAINTAINERS b/MAINTAINERS index 0742a10e87c88..5c086e945b148 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15996,6 +15996,15 @@ L: linux-wireless@vger.kernel.org S: Supported F: drivers/net/wireless/microchip/ +MICROCHIP ZL3073X DRIVER +M: Ivan Vecera +M: Prathosh Satish +L: netdev@vger.kernel.org +S: Supported +F: Documentation/devicetree/bindings/dpll/microchip,zl3073x*.yaml +F: drivers/mfd/zl3073x* +F: include/linux/mfd/zl3073x.h + MICROSEMI MIPS SOCS M: Alexandre Belloni M: UNGLinuxDriver@microchip.com diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 22b9363100394..30b36e3ee8f7f 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2422,5 +2422,35 @@ config MFD_UPBOARD_FPGA To compile this driver as a module, choose M here: the module will be called upboard-fpga. +config MFD_ZL3073X_CORE + tristate + select MFD_CORE + +config MFD_ZL3073X_I2C + tristate "Microchip Azurite DPLL/PTP/SyncE with I2C" + depends on I2C + select MFD_ZL3073X_CORE + select REGMAP_I2C + help + Support for Microchip Azurite DPLL/PTP/SyncE chip family. This option + supports I2C as the control interface. + + This driver provides common support for accessing the device. + Additional drivers must be enabled in order to use the functionality + of the device. + +config MFD_ZL3073X_SPI + tristate "Microchip Azurite DPLL/PTP/SyncE with SPI" + depends on SPI + select MFD_ZL3073X_CORE + select REGMAP_SPI + help + Support for Microchip Azurite DPLL/PTP/SyncE chip family. This option + supports SPI as the control interface. + + This driver provides common support for accessing the device. + Additional drivers must be enabled in order to use the functionality + of the device. + endmenu endif diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 948cbdf42a18b..76e2babc1538f 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -290,3 +290,8 @@ obj-$(CONFIG_MFD_RSMU_I2C) += rsmu_i2c.o rsmu_core.o obj-$(CONFIG_MFD_RSMU_SPI) += rsmu_spi.o rsmu_core.o obj-$(CONFIG_MFD_UPBOARD_FPGA) += upboard-fpga.o + +zl3073x-y := zl3073x-core.o +obj-$(CONFIG_MFD_ZL3073X_CORE) += zl3073x.o +obj-$(CONFIG_MFD_ZL3073X_I2C) += zl3073x-i2c.o +obj-$(CONFIG_MFD_ZL3073X_SPI) += zl3073x-spi.o diff --git a/drivers/mfd/zl3073x-core.c b/drivers/mfd/zl3073x-core.c new file mode 100644 index 0000000000000..ccb6987d04a20 --- /dev/null +++ b/drivers/mfd/zl3073x-core.c @@ -0,0 +1,101 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include +#include +#include "zl3073x.h" + +/* + * Regmap ranges + */ +#define ZL3073x_PAGE_SIZE 128 +#define ZL3073x_NUM_PAGES 16 +#define ZL3073x_PAGE_SEL 0x7F + +/* + * Regmap range configuration + * + * The device uses 7-bit addressing and has 16 register pages with + * range 0x00-0x7f. The register 0x7f in each page acts as page + * selector where bits 0-3 contains currently selected page. + */ +static const struct regmap_range_cfg zl3073x_regmap_ranges[] = { + { + .range_min = 0, + .range_max = ZL3073x_NUM_PAGES * ZL3073x_PAGE_SIZE, + .selector_reg = ZL3073x_PAGE_SEL, + .selector_mask = GENMASK(3, 0), + .selector_shift = 0, + .window_start = 0, + .window_len = ZL3073x_PAGE_SIZE, + }, +}; + +/* + * Regmap config + */ +const struct regmap_config zl3073x_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = ZL3073x_NUM_PAGES * ZL3073x_PAGE_SIZE, + .ranges = zl3073x_regmap_ranges, + .num_ranges = ARRAY_SIZE(zl3073x_regmap_ranges), +}; + +/** + * zl3073x_get_regmap_config - return pointer to regmap config + * + * Return: pointer to regmap config + */ +const struct regmap_config *zl3073x_get_regmap_config(void) +{ + return &zl3073x_regmap_config; +} +EXPORT_SYMBOL_NS_GPL(zl3073x_get_regmap_config, "ZL3073X"); + +/** + * zl3073x_devm_alloc - allocates zl3073x device structure + * @dev: pointer to device structure + * + * Allocates zl3073x device structure as device resource. + * + * Return: pointer to zl3073x device structure + */ +struct zl3073x_dev *zl3073x_devm_alloc(struct device *dev) +{ + struct zl3073x_dev *zldev; + + return devm_kzalloc(dev, sizeof(*zldev), GFP_KERNEL); +} +EXPORT_SYMBOL_NS_GPL(zl3073x_devm_alloc, "ZL3073X"); + +/** + * zl3073x_dev_init - initialize zl3073x device + * @zldev: pointer to zl3073x device + * + * Common initialization of zl3073x device structure. + * + * Returns: 0 on success, <0 on error + */ +int zl3073x_dev_init(struct zl3073x_dev *zldev) +{ + int rc; + + rc = devm_mutex_init(zldev->dev, &zldev->lock); + if (rc) { + dev_err_probe(zldev->dev, rc, "Failed to initialize mutex\n"); + return rc; + } + + return 0; +} +EXPORT_SYMBOL_NS_GPL(zl3073x_dev_init, "ZL3073X"); + +MODULE_AUTHOR("Ivan Vecera "); +MODULE_DESCRIPTION("Microchip ZL3073x core driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/zl3073x-i2c.c b/drivers/mfd/zl3073x-i2c.c new file mode 100644 index 0000000000000..461b583e536b7 --- /dev/null +++ b/drivers/mfd/zl3073x-i2c.c @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include "zl3073x.h" + +static int zl3073x_i2c_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct zl3073x_dev *zldev; + + zldev = zl3073x_devm_alloc(dev); + if (!zldev) + return -ENOMEM; + + zldev->dev = dev; + zldev->regmap = devm_regmap_init_i2c(client, zl3073x_get_regmap_config()); + if (IS_ERR(zldev->regmap)) { + dev_err_probe(dev, PTR_ERR(zldev->regmap), + "Failed to initialize register map\n"); + return PTR_ERR(zldev->regmap); + } + + i2c_set_clientdata(client, zldev); + + return zl3073x_dev_init(zldev); +} + +static const struct i2c_device_id zl3073x_i2c_id[] = { + { "zl3073x-i2c" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(i2c, zl3073x_i2c_id); + +static const struct of_device_id zl3073x_i2c_of_match[] = { + { .compatible = "microchip,zl3073x-i2c" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, zl3073x_i2c_of_match); + +static struct i2c_driver zl3073x_i2c_driver = { + .driver = { + .name = "zl3073x-i2c", + .of_match_table = zl3073x_i2c_of_match, + }, + .probe = zl3073x_i2c_probe, + .id_table = zl3073x_i2c_id, +}; +module_i2c_driver(zl3073x_i2c_driver); + +MODULE_AUTHOR("Ivan Vecera "); +MODULE_DESCRIPTION("Microchip ZL3073x I2C driver"); +MODULE_IMPORT_NS("ZL3073X"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/zl3073x-spi.c b/drivers/mfd/zl3073x-spi.c new file mode 100644 index 0000000000000..db976aef74917 --- /dev/null +++ b/drivers/mfd/zl3073x-spi.c @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include "zl3073x.h" + +static int zl3073x_spi_probe(struct spi_device *spi) +{ + struct device *dev = &spi->dev; + struct zl3073x_dev *zldev; + + zldev = zl3073x_devm_alloc(dev); + if (!zldev) + return -ENOMEM; + + zldev->dev = dev; + zldev->regmap = devm_regmap_init_spi(spi, zl3073x_get_regmap_config()); + if (IS_ERR(zldev->regmap)) { + dev_err_probe(dev, PTR_ERR(zldev->regmap), + "Failed to initialize register map\n"); + return PTR_ERR(zldev->regmap); + } + + spi_set_drvdata(spi, zldev); + + return zl3073x_dev_init(zldev); +} + +static const struct spi_device_id zl3073x_spi_id[] = { + { "zl3073x-spi" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(spi, zl3073x_spi_id); + +static const struct of_device_id zl3073x_spi_of_match[] = { + { .compatible = "microchip,zl3073x-spi" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, zl3073x_spi_of_match); + +static struct spi_driver zl3073x_spi_driver = { + .driver = { + .name = "zl3073x-spi", + .of_match_table = zl3073x_spi_of_match, + }, + .probe = zl3073x_spi_probe, + .id_table = zl3073x_spi_id, +}; +module_spi_driver(zl3073x_spi_driver); + +MODULE_AUTHOR("Ivan Vecera "); +MODULE_DESCRIPTION("Microchip ZL3073x SPI driver"); +MODULE_IMPORT_NS("ZL3073X"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/zl3073x.h b/drivers/mfd/zl3073x.h new file mode 100644 index 0000000000000..8e8ffa961e4ca --- /dev/null +++ b/drivers/mfd/zl3073x.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __ZL3073X_CORE_H +#define __ZL3073X_CORE_H + +struct device; +struct regmap_config; +struct zl3073x_dev; + +struct zl3073x_dev *zl3073x_devm_alloc(struct device *dev); +int zl3073x_dev_init(struct zl3073x_dev *zldev); +const struct regmap_config *zl3073x_get_regmap_config(void); + +#endif /* __ZL3073X_CORE_H */ diff --git a/include/linux/mfd/zl3073x.h b/include/linux/mfd/zl3073x.h new file mode 100644 index 0000000000000..f3f33ef8bfa18 --- /dev/null +++ b/include/linux/mfd/zl3073x.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __LINUX_MFD_ZL3073X_H +#define __LINUX_MFD_ZL3073X_H + +#include + +struct device; +struct regmap; + +/** + * struct zl3073x_dev - zl3073x device + * @dev: pointer to device + * @regmap: regmap to access HW registers + * @lock: lock to be held during access to HW registers + */ +struct zl3073x_dev { + struct device *dev; + struct regmap *regmap; + struct mutex lock; +}; + +#endif /* __LINUX_MFD_ZL3073X_H */ From patchwork Wed Apr 9 14:42:40 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Vecera X-Patchwork-Id: 14044830 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DBE41267385 for ; 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Wed, 09 Apr 2025 10:43:18 -0400 X-MC-Unique: K9GxGEO2NAudOrSY5XnXcw-1 X-Mimecast-MFC-AGG-ID: K9GxGEO2NAudOrSY5XnXcw_1744209796 Received: from mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.111]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 8CFC419560B8; Wed, 9 Apr 2025 14:43:16 +0000 (UTC) Received: from p16v.luc.cera.cz (unknown [10.44.32.72]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 6606918009BC; Wed, 9 Apr 2025 14:43:12 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Prathosh Satish , Lee Jones , Kees Cook , Andy Shevchenko , Andrew Morton , Michal Schmidt , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: [PATCH v2 04/14] mfd: zl3073x: Register itself as devlink device Date: Wed, 9 Apr 2025 16:42:40 +0200 Message-ID: <20250409144250.206590-5-ivecera@redhat.com> In-Reply-To: <20250409144250.206590-1-ivecera@redhat.com> References: <20250409144250.206590-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Use devlink_alloc() to alloc zl3073x_dev structure and register the device as a devlink device. Follow-up patches add support for devlink device info reporting and devlink flash interface will be later used for flashing firmware and configuration. Signed-off-by: Ivan Vecera --- v1->v2: - dependency on NET moved to MFD_ZL3073X_CORE in Kconfig - devlink register managed way --- drivers/mfd/Kconfig | 2 ++ drivers/mfd/zl3073x-core.c | 35 +++++++++++++++++++++++++++++++++-- 2 files changed, 35 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 30b36e3ee8f7f..3c54b9e2b8003 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2424,6 +2424,8 @@ config MFD_UPBOARD_FPGA config MFD_ZL3073X_CORE tristate + depends on NET + select NET_DEVLINK select MFD_CORE config MFD_ZL3073X_I2C diff --git a/drivers/mfd/zl3073x-core.c b/drivers/mfd/zl3073x-core.c index ccb6987d04a20..116c6dd9eebc7 100644 --- a/drivers/mfd/zl3073x-core.c +++ b/drivers/mfd/zl3073x-core.c @@ -8,6 +8,7 @@ #include #include #include +#include #include "zl3073x.h" /* @@ -58,6 +59,14 @@ const struct regmap_config *zl3073x_get_regmap_config(void) } EXPORT_SYMBOL_NS_GPL(zl3073x_get_regmap_config, "ZL3073X"); +static const struct devlink_ops zl3073x_devlink_ops = { +}; + +static void zl3073x_devlink_free(void *ptr) +{ + devlink_free(ptr); +} + /** * zl3073x_devm_alloc - allocates zl3073x device structure * @dev: pointer to device structure @@ -68,12 +77,25 @@ EXPORT_SYMBOL_NS_GPL(zl3073x_get_regmap_config, "ZL3073X"); */ struct zl3073x_dev *zl3073x_devm_alloc(struct device *dev) { - struct zl3073x_dev *zldev; + struct devlink *devlink; + + devlink = devlink_alloc(&zl3073x_devlink_ops, + sizeof(struct zl3073x_dev), dev); + if (!devlink) + return NULL; + + if (devm_add_action_or_reset(dev, zl3073x_devlink_free, devlink)) + return NULL; - return devm_kzalloc(dev, sizeof(*zldev), GFP_KERNEL); + return devlink_priv(devlink); } EXPORT_SYMBOL_NS_GPL(zl3073x_devm_alloc, "ZL3073X"); +static void zl3073x_devlink_unregister(void *ptr) +{ + devlink_unregister(ptr); +} + /** * zl3073x_dev_init - initialize zl3073x device * @zldev: pointer to zl3073x device @@ -84,6 +106,7 @@ EXPORT_SYMBOL_NS_GPL(zl3073x_devm_alloc, "ZL3073X"); */ int zl3073x_dev_init(struct zl3073x_dev *zldev) { + struct devlink *devlink; int rc; rc = devm_mutex_init(zldev->dev, &zldev->lock); @@ -92,6 +115,14 @@ int zl3073x_dev_init(struct zl3073x_dev *zldev) return rc; } + devlink = priv_to_devlink(zldev); + devlink_register(devlink); + + rc = devm_add_action_or_reset(zldev->dev, zl3073x_devlink_unregister, + devlink); + if (rc) + return rc; + return 0; } EXPORT_SYMBOL_NS_GPL(zl3073x_dev_init, "ZL3073X"); From patchwork Wed Apr 9 14:42:41 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Vecera X-Patchwork-Id: 14044831 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 94B892673A2 for ; Wed, 9 Apr 2025 14:43:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; 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Wed, 9 Apr 2025 14:43:21 +0000 (UTC) Received: from p16v.luc.cera.cz (unknown [10.44.32.72]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id F3BFD18009BC; Wed, 9 Apr 2025 14:43:16 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Prathosh Satish , Lee Jones , Kees Cook , Andy Shevchenko , Andrew Morton , Michal Schmidt , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: [PATCH v2 05/14] mfd: zl3073x: Add register access helpers Date: Wed, 9 Apr 2025 16:42:41 +0200 Message-ID: <20250409144250.206590-6-ivecera@redhat.com> In-Reply-To: <20250409144250.206590-1-ivecera@redhat.com> References: <20250409144250.206590-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Add helpers zl3073x_{read,write}_reg() to access device registers. These functions have to be called with device lock that can be taken by zl3073x_{lock,unlock}() or a caller can use defined guard. Locking mechanism of regmap is not sufficient because sometimes is necessary to perform several register operations at once. This is especially a case of register mailboxes (more details in patch 7 & 8). Disable regmap locking mechanism and use this device lock instead. Signed-off-by: Ivan Vecera --- v1->v2: * disabled regmap locking --- drivers/mfd/zl3073x-core.c | 90 +++++++++++++++++++++++++++++++++++++ include/linux/mfd/zl3073x.h | 33 ++++++++++++++ 2 files changed, 123 insertions(+) diff --git a/drivers/mfd/zl3073x-core.c b/drivers/mfd/zl3073x-core.c index 116c6dd9eebc7..f0d85f77a7a76 100644 --- a/drivers/mfd/zl3073x-core.c +++ b/drivers/mfd/zl3073x-core.c @@ -5,9 +5,11 @@ #include #include #include +#include #include #include #include +#include #include #include "zl3073x.h" @@ -46,6 +48,7 @@ const struct regmap_config zl3073x_regmap_config = { .max_register = ZL3073x_NUM_PAGES * ZL3073x_PAGE_SIZE, .ranges = zl3073x_regmap_ranges, .num_ranges = ARRAY_SIZE(zl3073x_regmap_ranges), + .disable_locking = true, }; /** @@ -59,6 +62,93 @@ const struct regmap_config *zl3073x_get_regmap_config(void) } EXPORT_SYMBOL_NS_GPL(zl3073x_get_regmap_config, "ZL3073X"); +/** + * zl3073x_read_reg - Read value from device register + * @zldev: pointer to zl3073x device + * @reg: register to be read + * @len: number of bytes to read + * @value: pointer to place to store value read from the register + * + * Caller has to hold the device lock that can be obtained + * by zl3073x_lock(). + * + * Return: 0 on success or <0 on error + */ +int zl3073x_read_reg(struct zl3073x_dev *zldev, unsigned int reg, + unsigned int len, void *value) +{ + u8 buf[6]; + int rc; + + lockdep_assert_held(&zldev->lock); + + rc = regmap_bulk_read(zldev->regmap, reg, buf, len); + if (rc) + return rc; + + switch (len) { + case 1: + *(u8 *)value = buf[0]; + break; + case 2: + *(u16 *)value = get_unaligned_be16(buf); + break; + case 4: + *(u32 *)value = get_unaligned_be32(buf); + break; + case 6: + *(u64 *)value = get_unaligned_be48(buf); + break; + default: + WARN(true, "Unsupported register size: %u\n", len); + break; + } + + return rc; +} +EXPORT_SYMBOL_GPL(zl3073x_read_reg); + +/** + * zl3073x_write_reg - Write value to device register + * @zldev: pointer to zl3073x device + * @reg: register to be written + * @len: number of bytes to write + * @value: pointer to value to write to the register + * + * Caller has to hold the device lock that can be obtained + * by zl3073x_lock(). + * + * Return: 0 on success, <0 on error + */ +int zl3073x_write_reg(struct zl3073x_dev *zldev, unsigned int reg, + unsigned int len, const void *value) +{ + u8 buf[6]; + + lockdep_assert_held(&zldev->lock); + + switch (len) { + case 1: + buf[0] = *(u8 *)value; + break; + case 2: + put_unaligned_be16(*(u16 *)value, buf); + break; + case 4: + put_unaligned_be32(*(u32 *)value, buf); + break; + case 6: + put_unaligned_be48(*(u64 *)value, buf); + break; + default: + WARN(true, "Unsupported register size: %u\n", len); + break; + } + + return regmap_bulk_write(zldev->regmap, reg, buf, len); +} +EXPORT_SYMBOL_GPL(zl3073x_write_reg); + static const struct devlink_ops zl3073x_devlink_ops = { }; diff --git a/include/linux/mfd/zl3073x.h b/include/linux/mfd/zl3073x.h index f3f33ef8bfa18..00dcc73aeeb34 100644 --- a/include/linux/mfd/zl3073x.h +++ b/include/linux/mfd/zl3073x.h @@ -3,6 +3,7 @@ #ifndef __LINUX_MFD_ZL3073X_H #define __LINUX_MFD_ZL3073X_H +#include #include struct device; @@ -20,4 +21,36 @@ struct zl3073x_dev { struct mutex lock; }; +/** + * zl3073x_lock - Lock the device + * @zldev: device structure pointer + * + * Caller has to take this lock when it needs to access device registers. + */ +static inline void zl3073x_lock(struct zl3073x_dev *zldev) +{ + mutex_lock(&zldev->lock); +} + +/** + * zl3073x_unlock - Unlock the device + * @zldev: device structure pointer + * + * Caller unlocks the device when it does not need to access device + * registers anymore. + */ +static inline void zl3073x_unlock(struct zl3073x_dev *zldev) +{ + mutex_unlock(&zldev->lock); +} + +DEFINE_GUARD(zl3073x, struct zl3073x_dev *, zl3073x_lock(_T), + zl3073x_unlock(_T)); + +int zl3073x_read_reg(struct zl3073x_dev *zldev, unsigned int reg, + unsigned int len, void *value); + +int zl3073x_write_reg(struct zl3073x_dev *zldev, unsigned int reg, + unsigned int len, const void *value); + #endif /* __LINUX_MFD_ZL3073X_H */ From patchwork Wed Apr 9 14:42:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Vecera X-Patchwork-Id: 14044832 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 837CC269819 for ; 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These macros defines a couple of static inline functions to ease an access device registers. There are two types of registers, the 1st type is a simple one that is defined by an address and size and the 2nd type is indexed register that is defined by base address, type, number of register instances and address stride between instances. Examples: __ZL3073X_REG_DEF(reg1, 0x1234, 4, u32); __ZL3073X_REG_IDX_DEF(idx_reg2, 0x1234, 2, u16, 4, 0x10); this defines the following functions: int zl3073x_read_reg1(struct zl3073x_dev *dev, u32 *value); int zl3073x_write_reg1(struct zl3073x_dev *dev, u32 value); int zl3073x_read_idx_reg2(struct zl3073x_dev *dev, unsigned int idx, u32 *value); int zl3073x_write_idx_reg2(struct zl3073x_dev *dev, unsigned int idx, u32 value); There are also several shortcut macros to define registers with certain bit widths: 8, 16, 32 and 48 bits. Signed-off-by: Ivan Vecera --- include/linux/mfd/zl3073x.h | 100 ++++++++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) diff --git a/include/linux/mfd/zl3073x.h b/include/linux/mfd/zl3073x.h index 00dcc73aeeb34..405a66a7b3e78 100644 --- a/include/linux/mfd/zl3073x.h +++ b/include/linux/mfd/zl3073x.h @@ -3,6 +3,7 @@ #ifndef __LINUX_MFD_ZL3073X_H #define __LINUX_MFD_ZL3073X_H +#include #include #include @@ -53,4 +54,103 @@ int zl3073x_read_reg(struct zl3073x_dev *zldev, unsigned int reg, int zl3073x_write_reg(struct zl3073x_dev *zldev, unsigned int reg, unsigned int len, const void *value); +/** + * __ZL3073X_REG_DEF - Define a device register helpers + * @_name: register name + * @_addr: register address + * @_len: size of register value in bytes + * @_type: type of register value + * + * The macro defines helper functions for particular device register + * to access it. + * + * Example: + * __ZL3073X_REG_DEF(sample_reg, 0x1234, 4, u32) + * + * generates static inline functions: + * int zl3073x_read_sample_reg(struct zl3073x_dev *dev, u32 *value); + * int zl3073x_write_sample_reg(struct zl3073x_dev *dev, u32 value); + * + * Note that these functions have to be called with the device lock + * taken. + */ +#define __ZL3073X_REG_DEF(_name, _addr, _len, _type) \ +typedef _type zl3073x_##_name##_t; \ +static inline __maybe_unused \ +int zl3073x_read_##_name(struct zl3073x_dev *zldev, _type * value) \ +{ \ + return zl3073x_read_reg(zldev, _addr, _len, value); \ +} \ +static inline __maybe_unused \ +int zl3073x_write_##_name(struct zl3073x_dev *zldev, _type value) \ +{ \ + return zl3073x_write_reg(zldev, _addr, _len, &value); \ +} + +/** + * __ZL3073X_REG_IDX_DEF - Define an indexed device register helpers + * @_name: register name + * @_addr: register address + * @_len: size of register value in bytes + * @_type: type of register value + * @_num: number of register instances + * @_stride: address stride between instances + * + * The macro defines helper functions for particular indexed device + * register to access it. + * + * Example: + * __ZL3073X_REG_IDX_DEF(sample_reg, 0x1234, 2, u16, 4, 0x10) + * + * generates static inline functions: + * int zl3073x_read_sample_reg(struct zl3073x_dev *dev, unsigned int idx, + * u32 *value); + * int zl3073x_write_sample_reg(struct zl3073x_dev *dev, unsigned int idx, + * u32 value); + * + * Note that these functions have to be called with the device lock + * taken. + */ +#define __ZL3073X_REG_IDX_DEF(_name, _addr, _len, _type, _num, _stride) \ +typedef _type zl3073x_##_name##_t; \ +static inline __maybe_unused \ +int zl3073x_read_##_name(struct zl3073x_dev *zldev, unsigned int idx, \ + _type * value) \ +{ \ + WARN_ON(idx >= (_num)); \ + return zl3073x_read_reg(zldev, (_addr) + idx * (_stride), _len, \ + value); \ +} \ +static inline __maybe_unused \ +int zl3073x_write_##_name(struct zl3073x_dev *zldev, unsigned int idx, \ + _type value) \ +{ \ + WARN_ON(idx >= (_num)); \ + return zl3073x_write_reg(zldev, (_addr) + idx * (_stride), \ + _len, &value); \ +} + +/* + * Add register definition shortcuts for 8, 16, 32 and 48 bits + */ +#define ZL3073X_REG8_DEF(_name, _addr) __ZL3073X_REG_DEF(_name, _addr, 1, u8) +#define ZL3073X_REG16_DEF(_name, _addr) __ZL3073X_REG_DEF(_name, _addr, 2, u16) +#define ZL3073X_REG32_DEF(_name, _addr) __ZL3073X_REG_DEF(_name, _addr, 4, u32) +#define ZL3073X_REG48_DEF(_name, _addr) __ZL3073X_REG_DEF(_name, _addr, 6, u64) + +/* + * Add indexed register definition shortcuts for 8, 16, 32 and 48 bits + */ +#define ZL3073X_REG8_IDX_DEF(_name, _addr, _num, _stride) \ + __ZL3073X_REG_IDX_DEF(_name, _addr, 1, u8, _num, _stride) + +#define ZL3073X_REG16_IDX_DEF(_name, _addr, _num, _stride) \ + __ZL3073X_REG_IDX_DEF(_name, _addr, 2, u16, _num, _stride) + +#define ZL3073X_REG32_IDX_DEF(_name, _addr, _num, _stride) \ + __ZL3073X_REG_IDX_DEF(_name, _addr, 4, u32, _num, _stride) + +#define ZL3073X_REG48_IDX_DEF(_name, _addr, _num, _stride) \ + __ZL3073X_REG_IDX_DEF(_name, _addr, 6, u64, _num, _stride) + #endif /* __LINUX_MFD_ZL3073X_H */ From patchwork Wed Apr 9 14:42:43 2025 Content-Type: text/plain; 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Signed-off-by: Ivan Vecera --- drivers/mfd/zl3073x-core.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/mfd/zl3073x-core.c b/drivers/mfd/zl3073x-core.c index f0d85f77a7a76..28f28d00da1cc 100644 --- a/drivers/mfd/zl3073x-core.c +++ b/drivers/mfd/zl3073x-core.c @@ -1,7 +1,9 @@ // SPDX-License-Identifier: GPL-2.0-only #include +#include #include +#include #include #include #include @@ -13,6 +15,14 @@ #include #include "zl3073x.h" +/* + * Register Map Page 0, General + */ +ZL3073X_REG16_DEF(id, 0x0001); +ZL3073X_REG16_DEF(revision, 0x0003); +ZL3073X_REG16_DEF(fw_ver, 0x0005); +ZL3073X_REG32_DEF(custom_config_ver, 0x0007); + /* * Regmap ranges */ @@ -196,7 +206,9 @@ static void zl3073x_devlink_unregister(void *ptr) */ int zl3073x_dev_init(struct zl3073x_dev *zldev) { + u16 id, revision, fw_ver; struct devlink *devlink; + u32 cfg_ver; int rc; rc = devm_mutex_init(zldev->dev, &zldev->lock); @@ -205,6 +217,30 @@ int zl3073x_dev_init(struct zl3073x_dev *zldev) return rc; } + /* Take device lock */ + scoped_guard(zl3073x, zldev) { + rc = zl3073x_read_id(zldev, &id); + if (rc) + return rc; + rc = zl3073x_read_revision(zldev, &revision); + if (rc) + return rc; + rc = zl3073x_read_fw_ver(zldev, &fw_ver); + if (rc) + return rc; + rc = zl3073x_read_custom_config_ver(zldev, &cfg_ver); + if (rc) + return rc; + } + + dev_info(zldev->dev, "ChipID(%X), ChipRev(%X), FwVer(%u)\n", + id, revision, fw_ver); + dev_info(zldev->dev, "Custom config version: %lu.%lu.%lu.%lu\n", + FIELD_GET(GENMASK(31, 24), cfg_ver), + FIELD_GET(GENMASK(23, 16), cfg_ver), + FIELD_GET(GENMASK(15, 8), cfg_ver), + FIELD_GET(GENMASK(7, 0), cfg_ver)); + devlink = priv_to_devlink(zldev); devlink_register(devlink); From patchwork Wed Apr 9 14:42:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Vecera X-Patchwork-Id: 14044834 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 45F3926A0CF for ; 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Sample output: # devlink dev i2c/1-0070 # devlink dev info i2c/1-0070: driver zl3073x-i2c versions: fixed: asic.id 1E94 asic.rev 300 fw 7006 Signed-off-by: Ivan Vecera --- drivers/mfd/zl3073x-core.c | 75 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/drivers/mfd/zl3073x-core.c b/drivers/mfd/zl3073x-core.c index 28f28d00da1cc..79cf2ddbca228 100644 --- a/drivers/mfd/zl3073x-core.c +++ b/drivers/mfd/zl3073x-core.c @@ -10,7 +10,9 @@ #include #include #include +#include #include +#include #include #include #include "zl3073x.h" @@ -159,7 +161,80 @@ int zl3073x_write_reg(struct zl3073x_dev *zldev, unsigned int reg, } EXPORT_SYMBOL_GPL(zl3073x_write_reg); +/** + * zl3073x_devlink_info_get - Devlink device info callback + * @devlink: devlink structure pointer + * @req: devlink request pointer to store information + * @extack: netlink extack pointer to report errors + * + * Return: 0 on success, <0 on error + */ +static int zl3073x_devlink_info_get(struct devlink *devlink, + struct devlink_info_req *req, + struct netlink_ext_ack *extack) +{ + struct zl3073x_dev *zldev = devlink_priv(devlink); + u16 id, revision, fw_ver; + char buf[16]; + u32 cfg_ver; + int rc; + + guard(zl3073x)(zldev); + + rc = zl3073x_read_id(zldev, &id); + if (rc) + return rc; + + snprintf(buf, sizeof(buf), "%X", id); + rc = devlink_info_version_fixed_put(req, + DEVLINK_INFO_VERSION_GENERIC_ASIC_ID, + buf); + if (rc) + return rc; + + rc = zl3073x_read_revision(zldev, &revision); + if (rc) + return rc; + + snprintf(buf, sizeof(buf), "%X", revision); + rc = devlink_info_version_fixed_put(req, + DEVLINK_INFO_VERSION_GENERIC_ASIC_REV, + buf); + if (rc) + return rc; + + rc = zl3073x_read_fw_ver(zldev, &fw_ver); + if (rc) + return rc; + + snprintf(buf, sizeof(buf), "%u", fw_ver); + rc = devlink_info_version_fixed_put(req, + DEVLINK_INFO_VERSION_GENERIC_FW, + buf); + if (rc) + return rc; + + rc = zl3073x_read_custom_config_ver(zldev, &cfg_ver); + if (rc) + return rc; + + /* No custom config version */ + if (cfg_ver == U32_MAX) + return rc; + + snprintf(buf, sizeof(buf), "%lu.%lu.%lu.%lu", + FIELD_GET(GENMASK(31, 24), cfg_ver), + FIELD_GET(GENMASK(23, 16), cfg_ver), + FIELD_GET(GENMASK(15, 8), cfg_ver), + FIELD_GET(GENMASK(7, 0), cfg_ver)); + + rc = devlink_info_version_running_put(req, "cfg.custom_ver", buf); + + return rc; +} + static const struct devlink_ops zl3073x_devlink_ops = { + .info_get = zl3073x_devlink_info_get, }; static void zl3073x_devlink_free(void *ptr) From patchwork Wed Apr 9 14:42:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Vecera X-Patchwork-Id: 14044835 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7DB96267706 for ; Wed, 9 Apr 2025 14:43:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744209830; cv=none; b=MkXoUr4+3hZyCr1+mq3fpI+Xy7l4qaZJ9muldPYRS0c+Hwkqm5PRYxl6MQW16x9i4PpmMpPipHm+LZLMULoU+5tUprsvsLJXe20trbmDyUTKlsRuPzL6JzO06N0cogDGB1UX4gqwDaQmBfGQmGXdTV5mtaDOb3f7ZazLzfSqTTE= ARC-Message-Signature: i=1; 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Wed, 9 Apr 2025 14:43:40 +0000 (UTC) Received: from p16v.luc.cera.cz (unknown [10.44.32.72]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id DAD0A1801747; Wed, 9 Apr 2025 14:43:35 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Prathosh Satish , Lee Jones , Kees Cook , Andy Shevchenko , Andrew Morton , Michal Schmidt , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: [PATCH v2 09/14] mfd: zl3073x: Add macro to wait for register value bits to be cleared Date: Wed, 9 Apr 2025 16:42:45 +0200 Message-ID: <20250409144250.206590-10-ivecera@redhat.com> In-Reply-To: <20250409144250.206590-1-ivecera@redhat.com> References: <20250409144250.206590-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Sometimes in communication with the device is necessary to set certain bit(s) in certain register and then the driver has to wait until these bits are cleared by the device. Add the macro for this functionality, it will be used by later commits. Signed-off-by: Ivan Vecera --- v1->v2: * fixed macro documentation --- include/linux/mfd/zl3073x.h | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/include/linux/mfd/zl3073x.h b/include/linux/mfd/zl3073x.h index 405a66a7b3e78..7ccb796f7b9aa 100644 --- a/include/linux/mfd/zl3073x.h +++ b/include/linux/mfd/zl3073x.h @@ -5,6 +5,8 @@ #include #include +#include +#include #include struct device; @@ -153,4 +155,34 @@ int zl3073x_write_##_name(struct zl3073x_dev *zldev, unsigned int idx, \ #define ZL3073X_REG48_IDX_DEF(_name, _addr, _num, _stride) \ __ZL3073X_REG_IDX_DEF(_name, _addr, 6, u64, _num, _stride) +#define READ_SLEEP_US 10 +#define READ_TIMEOUT_US 2000000 + +/** + * zl3073x_wait_clear_bits - wait for specific bits to be cleared + * @_zldev: pointer to zl3073x device + * @_reg: register name + * @_bits: bits that should be cleared + * @_index: optional index for indexed register + * + * The macro waits up to @READ_TIMEOUT_US microseconds for @_bits in @_reg + * to be cleared. + * + * Return: + * -ETIMEDOUT: if timeout occurred + * <0: for other errors occurred during communication + * 0: success + */ +#define zl3073x_wait_clear_bits(_zldev, _reg, _bits, _index...) \ +({ \ + zl3073x_##_reg##_t __val; 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Wed, 9 Apr 2025 14:43:45 +0000 (UTC) Received: from p16v.luc.cera.cz (unknown [10.44.32.72]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 79BC818009BC; Wed, 9 Apr 2025 14:43:40 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Prathosh Satish , Lee Jones , Kees Cook , Andy Shevchenko , Andrew Morton , Michal Schmidt , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: [PATCH v2 10/14] mfd: zl3073x: Add functions to work with register mailboxes Date: Wed, 9 Apr 2025 16:42:46 +0200 Message-ID: <20250409144250.206590-11-ivecera@redhat.com> In-Reply-To: <20250409144250.206590-1-ivecera@redhat.com> References: <20250409144250.206590-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Registers present in page 10 and higher are organized in so-called register mailboxes. These mailboxes are used to read and write configuration of particular object (dpll, output, reference & synth). Each of these register pages contains mask register that is used by the driver to indicate an index of requested object to work with and also semaphore register to indicate what operation is requested. The rest of registers in the particular register page are latch registers that are filled by the firmware during read operation or by the driver prior write operation. For read operation the driver... 1) ... updates the mailbox mask register with index of particular object 2) ... sets the mailbox semaphore register read bit 3) ... waits for the semaphore register read bit to be cleared by FW 4) ... reads the configuration from latch registers For write operation the driver... 1) ... writes the requested configuration to latch registers 2) ... sets the mailbox mask register for the DPLL to be updated 3) ... sets the mailbox semaphore register bit for the write operation 4) ... waits for the semaphore register bit to be cleared by FW Add functions to read and write mailboxes for all supported object types. Signed-off-by: Ivan Vecera --- drivers/mfd/zl3073x-core.c | 193 ++++++++++++++++++++++++++++++++++++ include/linux/mfd/zl3073x.h | 12 +++ 2 files changed, 205 insertions(+) diff --git a/drivers/mfd/zl3073x-core.c b/drivers/mfd/zl3073x-core.c index 79cf2ddbca228..f606c51c90fdf 100644 --- a/drivers/mfd/zl3073x-core.c +++ b/drivers/mfd/zl3073x-core.c @@ -25,6 +25,47 @@ ZL3073X_REG16_DEF(revision, 0x0003); ZL3073X_REG16_DEF(fw_ver, 0x0005); ZL3073X_REG32_DEF(custom_config_ver, 0x0007); +/* + * Register Map Page 10, Ref Mailbox + */ +ZL3073X_REG16_DEF(ref_mb_mask, 0x502); +#define REF_MB_MASK GENMASK(9, 0) + +ZL3073X_REG8_DEF(ref_mb_sem, 0x504); +#define REF_MB_SEM_WR BIT(0) +#define REF_MB_SEM_RD BIT(1) + +/* + * Register Map Page 12, DPLL Mailbox + */ +ZL3073X_REG16_DEF(dpll_mb_mask, 0x602); + +ZL3073X_REG8_DEF(dpll_mb_sem, 0x604); +#define DPLL_MB_SEM_WR BIT(0) +#define DPLL_MB_SEM_RD BIT(1) + +/* + * Register Map Page 13, Synth Mailbox + */ +ZL3073X_REG16_DEF(synth_mb_mask, 0x682); + +ZL3073X_REG8_DEF(synth_mb_sem, 0x684); +#define SYNTH_MB_SEM_WR BIT(0) +#define SYNTH_MB_SEM_RD BIT(1) + +ZL3073X_REG16_DEF(synth_freq_base, 0x686); +ZL3073X_REG32_DEF(synth_freq_mult, 0x688); +ZL3073X_REG16_DEF(synth_freq_m, 0x68c); +ZL3073X_REG16_DEF(synth_freq_n, 0x68e); + +/* + * Register Map Page 14, Output Mailbox + */ +ZL3073X_REG16_DEF(output_mb_mask, 0x702); +ZL3073X_REG8_DEF(output_mb_sem, 0x704); +#define OUTPUT_MB_SEM_WR BIT(0) +#define OUTPUT_MB_SEM_RD BIT(1) + /* * Regmap ranges */ @@ -161,6 +202,158 @@ int zl3073x_write_reg(struct zl3073x_dev *zldev, unsigned int reg, } EXPORT_SYMBOL_GPL(zl3073x_write_reg); +/** + * ZL3073X_MB_OP - perform an operation on mailbox of certain type + * @_zldev: pointer to device structure + * @_type: type of mailbox (dpll, ref or output) + * @_index: object index of given type + * @_op: operation to perform + * + * Performs the requested operation on mailbox of certain type and + * returns 0 in case of success or negative value otherwise. + */ +#define ZL3073X_MB_OP(_zldev, _type, _index, _op) \ +({ \ + struct zl3073x_dev *__zldev = (_zldev); \ + u16 __mask = BIT(_index); \ + u8 __op = (_op); \ + int __rc; \ + do { \ + /* Select requested index in mask register */ \ + __rc = zl3073x_write_##_type##_mb_mask(__zldev, __mask);\ + if (__rc) \ + break; \ + /* Select requested command */ \ + __rc = zl3073x_write_##_type##_mb_sem(__zldev, __op); \ + if (__rc) \ + break; \ + /* Wait for the command to actually finish */ \ + __rc = zl3073x_wait_clear_bits(__zldev, _type##_mb_sem, \ + __op); \ + } while (0); \ + __rc; \ +}) + +/** + * zl3073x_mb_dpll_read - read given DPLL configuration to mailbox + * @zldev: pointer to device structure + * @index: DPLL index + * + * Reads configuration of given DPLL into DPLL mailbox. + * + * Return: 0 on success, <0 on error + */ +int zl3073x_mb_dpll_read(struct zl3073x_dev *zldev, u8 index) +{ + return ZL3073X_MB_OP(zldev, dpll, index, DPLL_MB_SEM_RD); +} +EXPORT_SYMBOL_GPL(zl3073x_mb_dpll_read); + +/** + * zl3073x_mb_dpll_write - write given DPLL configuration from mailbox + * @zldev: pointer to device structure + * @index: DPLL index + * + * Writes (commits) configuration of given DPLL from DPLL mailbox. + * + * Return: 0 on success, <0 on error + */ +int zl3073x_mb_dpll_write(struct zl3073x_dev *zldev, u8 index) +{ + return ZL3073X_MB_OP(zldev, dpll, index, DPLL_MB_SEM_WR); +} +EXPORT_SYMBOL_GPL(zl3073x_mb_dpll_write); + +/** + * zl3073x_mb_output_read - read given output configuration to mailbox + * @zldev: pointer to device structure + * @index: output index + * + * Reads configuration of given output into output mailbox. + * + * Return: 0 on success, <0 on error + */ +int zl3073x_mb_output_read(struct zl3073x_dev *zldev, u8 index) +{ + return ZL3073X_MB_OP(zldev, output, index, OUTPUT_MB_SEM_RD); +} +EXPORT_SYMBOL_GPL(zl3073x_mb_output_read); + +/** + * zl3073x_mb_output_write - write given output configuration from mailbox + * @zldev: pointer to device structure + * @index: DPLL index + * + * Writes (commits) configuration of given output from output mailbox. + * + * Return: 0 on success, <0 on error + */ +int zl3073x_mb_output_write(struct zl3073x_dev *zldev, u8 index) +{ + return ZL3073X_MB_OP(zldev, output, index, OUTPUT_MB_SEM_WR); +} +EXPORT_SYMBOL_GPL(zl3073x_mb_output_write); + +/** + * zl3073x_mb_ref_read - read given reference configuration to mailbox + * @zldev: pointer to device structure + * @index: reference index + * + * Reads configuration of given reference into reference mailbox. + * + * Return: 0 on success, <0 on error + */ +int zl3073x_mb_ref_read(struct zl3073x_dev *zldev, u8 index) +{ + return ZL3073X_MB_OP(zldev, ref, index, REF_MB_SEM_RD); +} +EXPORT_SYMBOL_GPL(zl3073x_mb_ref_read); + +/** + * zl3073x_mb_ref_write - write given reference configuration from mailbox + * @zldev: pointer to device structure + * @index: reference index + * + * Writes (commits) configuration of given reference from reference mailbox. + * + * Return: 0 on success, <0 on error + */ +int zl3073x_mb_ref_write(struct zl3073x_dev *zldev, u8 index) +{ + return ZL3073X_MB_OP(zldev, ref, index, REF_MB_SEM_WR); +} +EXPORT_SYMBOL_GPL(zl3073x_mb_ref_write); + +/** + * zl3073x_mb_synth_read - read given synth configuration to mailbox + * @zldev: pointer to device structure + * @index: synth index + * + * Reads configuration of given synth into synth mailbox. + * + * Return: 0 on success, <0 on error + */ +int zl3073x_mb_synth_read(struct zl3073x_dev *zldev, u8 index) +{ + return ZL3073X_MB_OP(zldev, synth, index, SYNTH_MB_SEM_RD); +} +EXPORT_SYMBOL_GPL(zl3073x_mb_synth_read); + +/** + * zl3073x_mb_synth_write - write given synth configuration from mailbox + * @zldev: pointer to device structure + * @index: synth index + * + * Writes (commits) configuration of given synth from reference mailbox. + * + * Return: 0 on success, <0 on error + */ +int zl3073x_mb_synth_write(struct zl3073x_dev *zldev, u8 index) +{ + return ZL3073X_MB_OP(zldev, synth, index, SYNTH_MB_SEM_WR); +} +EXPORT_SYMBOL_GPL(zl3073x_mb_synth_write); + /** * zl3073x_devlink_info_get - Devlink device info callback * @devlink: devlink structure pointer diff --git a/include/linux/mfd/zl3073x.h b/include/linux/mfd/zl3073x.h index 7ccb796f7b9aa..cc80014ebb384 100644 --- a/include/linux/mfd/zl3073x.h +++ b/include/linux/mfd/zl3073x.h @@ -185,4 +185,16 @@ int zl3073x_write_##_name(struct zl3073x_dev *zldev, unsigned int idx, \ __rc; \ }) +/* + * Mailbox operations + */ +int zl3073x_mb_dpll_read(struct zl3073x_dev *zldev, u8 index); +int zl3073x_mb_dpll_write(struct zl3073x_dev *zldev, u8 index); +int zl3073x_mb_output_read(struct zl3073x_dev *zldev, u8 index); +int zl3073x_mb_output_write(struct zl3073x_dev *zldev, u8 index); +int zl3073x_mb_ref_read(struct zl3073x_dev *zldev, u8 index); +int zl3073x_mb_ref_write(struct zl3073x_dev *zldev, u8 index); +int zl3073x_mb_synth_read(struct zl3073x_dev *zldev, u8 index); +int zl3073x_mb_synth_write(struct zl3073x_dev *zldev, u8 index); + #endif /* __LINUX_MFD_ZL3073X_H */ From patchwork Wed Apr 9 14:42:47 2025 Content-Type: text/plain; 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Wed, 9 Apr 2025 14:43:49 +0000 (UTC) Received: from p16v.luc.cera.cz (unknown [10.44.32.72]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 817C918009BC; Wed, 9 Apr 2025 14:43:45 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Prathosh Satish , Lee Jones , Kees Cook , Andy Shevchenko , Andrew Morton , Michal Schmidt , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: [PATCH v2 11/14] mfd: zl3073x: Add clock_id field Date: Wed, 9 Apr 2025 16:42:47 +0200 Message-ID: <20250409144250.206590-12-ivecera@redhat.com> In-Reply-To: <20250409144250.206590-1-ivecera@redhat.com> References: <20250409144250.206590-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Add .clock_id to zl3073x_dev structure that will be used by later commits introducing DPLL driver. The clock ID is necessary for DPLL device registration. To generate such ID use chip ID read during device initialization for this. For the case where are multiple zl3073x based chips the chip ID is shifted and lower bits are filled by an unique value. For I2C case it is I2C device address and for SPI case it is chip-select value. Signed-off-by: Ivan Vecera --- drivers/mfd/zl3073x-core.c | 6 +++++- drivers/mfd/zl3073x-i2c.c | 3 ++- drivers/mfd/zl3073x-spi.c | 3 ++- drivers/mfd/zl3073x.h | 2 +- include/linux/mfd/zl3073x.h | 2 ++ 5 files changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/mfd/zl3073x-core.c b/drivers/mfd/zl3073x-core.c index f606c51c90fdf..a1fb5af5b3d9f 100644 --- a/drivers/mfd/zl3073x-core.c +++ b/drivers/mfd/zl3073x-core.c @@ -467,12 +467,13 @@ static void zl3073x_devlink_unregister(void *ptr) /** * zl3073x_dev_init - initialize zl3073x device * @zldev: pointer to zl3073x device + * @dev_id: device ID to be used as part of clock ID * * Common initialization of zl3073x device structure. * * Returns: 0 on success, <0 on error */ -int zl3073x_dev_init(struct zl3073x_dev *zldev) +int zl3073x_dev_init(struct zl3073x_dev *zldev, u8 dev_id) { u16 id, revision, fw_ver; struct devlink *devlink; @@ -501,6 +502,9 @@ int zl3073x_dev_init(struct zl3073x_dev *zldev) return rc; } + /* Use chip ID and given dev ID as clock ID */ + zldev->clock_id = ((u64)id << 8) | dev_id; + dev_info(zldev->dev, "ChipID(%X), ChipRev(%X), FwVer(%u)\n", id, revision, fw_ver); dev_info(zldev->dev, "Custom config version: %lu.%lu.%lu.%lu\n", diff --git a/drivers/mfd/zl3073x-i2c.c b/drivers/mfd/zl3073x-i2c.c index 461b583e536b7..9d6b8a84942d3 100644 --- a/drivers/mfd/zl3073x-i2c.c +++ b/drivers/mfd/zl3073x-i2c.c @@ -27,7 +27,8 @@ static int zl3073x_i2c_probe(struct i2c_client *client) i2c_set_clientdata(client, zldev); - return zl3073x_dev_init(zldev); + /* Initialize device and use I2C address as dev ID */ + return zl3073x_dev_init(zldev, client->addr); } static const struct i2c_device_id zl3073x_i2c_id[] = { diff --git a/drivers/mfd/zl3073x-spi.c b/drivers/mfd/zl3073x-spi.c index db976aef74917..af98ea35440d7 100644 --- a/drivers/mfd/zl3073x-spi.c +++ b/drivers/mfd/zl3073x-spi.c @@ -27,7 +27,8 @@ static int zl3073x_spi_probe(struct spi_device *spi) spi_set_drvdata(spi, zldev); - return zl3073x_dev_init(zldev); + /* Initialize device and use SPI chip select value as dev ID */ + return zl3073x_dev_init(zldev, spi_get_chipselect(spi, 0)); } static const struct spi_device_id zl3073x_spi_id[] = { diff --git a/drivers/mfd/zl3073x.h b/drivers/mfd/zl3073x.h index 8e8ffa961e4ca..cdba713c8441f 100644 --- a/drivers/mfd/zl3073x.h +++ b/drivers/mfd/zl3073x.h @@ -8,7 +8,7 @@ struct regmap_config; struct zl3073x_dev; struct zl3073x_dev *zl3073x_devm_alloc(struct device *dev); -int zl3073x_dev_init(struct zl3073x_dev *zldev); +int zl3073x_dev_init(struct zl3073x_dev *zldev, u8 dev_id); const struct regmap_config *zl3073x_get_regmap_config(void); #endif /* __ZL3073X_CORE_H */ diff --git a/include/linux/mfd/zl3073x.h b/include/linux/mfd/zl3073x.h index cc80014ebb384..50befd7f03b24 100644 --- a/include/linux/mfd/zl3073x.h +++ b/include/linux/mfd/zl3073x.h @@ -16,11 +16,13 @@ struct regmap; * struct zl3073x_dev - zl3073x device * @dev: pointer to device * @regmap: regmap to access HW registers + * @clock_id: clock id of the device * @lock: lock to be held during access to HW registers */ struct zl3073x_dev { struct device *dev; struct regmap *regmap; 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Wed, 9 Apr 2025 14:43:54 +0000 (UTC) Received: from p16v.luc.cera.cz (unknown [10.44.32.72]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 20C351801766; Wed, 9 Apr 2025 14:43:49 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Kees Cook , Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Prathosh Satish , Lee Jones , Andy Shevchenko , Andrew Morton , Michal Schmidt , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: [PATCH v2 12/14] lib: Allow modules to use strnchrnul Date: Wed, 9 Apr 2025 16:42:48 +0200 Message-ID: <20250409144250.206590-13-ivecera@redhat.com> In-Reply-To: <20250409144250.206590-1-ivecera@redhat.com> References: <20250409144250.206590-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Commit 0bee0cece2a6a ("lib/string: add strnchrnul()") added the mentioned function but did not export it so it cannot be used by modules. Export strnchrnul() for modules. Acked-by: Kees Cook Signed-off-by: Ivan Vecera --- lib/string.c | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/string.c b/lib/string.c index eb4486ed40d25..824b3aac86de0 100644 --- a/lib/string.c +++ b/lib/string.c @@ -363,6 +363,7 @@ char *strnchrnul(const char *s, size_t count, int c) s++; return (char *)s; } +EXPORT_SYMBOL(strnchrnul); #ifndef __HAVE_ARCH_STRRCHR /** From patchwork Wed Apr 9 14:42:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Vecera X-Patchwork-Id: 14044839 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E36A026E16D for ; Wed, 9 Apr 2025 14:44:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.133.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744209847; cv=none; b=SsRgGropZcSDEn7ju6NBQAnR6Lu0lmX4r2jHkNUK3xttqx7a7feglbEem73wSgclssr8Q4A+ihB+9xw0fUOFpIjP6I4eHxwXFXL4lblpCrkVUCP7d6ExRkUKrBvTLFgY7EP9FmQcII+Yfnm9VoYG4nuON/178buOfdl6S/u/4C8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744209847; c=relaxed/simple; bh=3KVVeyaaBucR+xq4HP+LPTfEPMLNXt/RYHslpoy8OVs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bZTFXQSxG7n5q7Dvb+zH2jalnpfKVE1V6csNZGvMAO/OJN3Ig67QjpNSoEZImPk/g87LUa7lGKU70QSk8CxsEaNbV5YmPiNcwiEvhBHYqlupjStCBimDfYODTJb70RUZlI5mJlsv+gwE8NRq37j3qMwzhDvDa40GEYCQ6FTI1a4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=jJ9b4a/Q; arc=none smtp.client-ip=170.10.133.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="jJ9b4a/Q" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1744209845; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dI/uVE90Vs4dIFRxTpo8ubx3UzUF0EGLNIDuWr90bcQ=; b=jJ9b4a/QWKGI0MjeAx5ldGF8Lc6SxMoQHau7X6dbwyDdpEt0Ldn3VUHdi5zFV4H85al8T+ hESUHHVzHyNkHq0IDlTOS3B1IhmiKfiUW96M5oLI+pU2mTuEn87VfXaI+H2nwQgq35ZjzE 5GnkgeaX4PRE7j20S7MfLiajW7rY6gI= Received: from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-322-GZCle4ljPzij80t35XdORw-1; Wed, 09 Apr 2025 10:44:01 -0400 X-MC-Unique: GZCle4ljPzij80t35XdORw-1 X-Mimecast-MFC-AGG-ID: GZCle4ljPzij80t35XdORw_1744209839 Received: from mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.111]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id BF7DB180AB19; Wed, 9 Apr 2025 14:43:59 +0000 (UTC) Received: from p16v.luc.cera.cz (unknown [10.44.32.72]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 220F31801766; Wed, 9 Apr 2025 14:43:54 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Prathosh Satish , Lee Jones , Kees Cook , Andy Shevchenko , Andrew Morton , Michal Schmidt , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: [PATCH v2 13/14] mfd: zl3073x: Load mfg file into HW if it is present Date: Wed, 9 Apr 2025 16:42:49 +0200 Message-ID: <20250409144250.206590-14-ivecera@redhat.com> In-Reply-To: <20250409144250.206590-1-ivecera@redhat.com> References: <20250409144250.206590-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Add support for loading mfg file that can be provided by a user. The mfg file can be generated by Microchip tool and contains snippets of device configuration that is different from the one stored in the flash memory inside the chip. Signed-off-by: Ivan Vecera --- drivers/mfd/zl3073x-core.c | 110 +++++++++++++++++++++++++++++++++++++ 1 file changed, 110 insertions(+) diff --git a/drivers/mfd/zl3073x-core.c b/drivers/mfd/zl3073x-core.c index a1fb5af5b3d9f..110071b28cab9 100644 --- a/drivers/mfd/zl3073x-core.c +++ b/drivers/mfd/zl3073x-core.c @@ -4,15 +4,19 @@ #include #include #include +#include #include #include #include +#include +#include #include #include #include #include #include #include +#include #include #include #include "zl3073x.h" @@ -464,6 +468,108 @@ static void zl3073x_devlink_unregister(void *ptr) devlink_unregister(ptr); } +static int zl3073x_fw_parse_line(struct zl3073x_dev *zldev, const char *line) +{ +#define ZL3073X_FW_WHITESPACES_SIZE 3 +#define ZL3073X_FW_COMMAND_SIZE 1 + const char *ptr = line; + char *endp; + u32 delay; + u16 addr; + u8 val; + + switch (ptr[0]) { + case 'X': + /* The line looks like this: + * X , ADDR , VAL + * Where: + * - X means that is a command that needs to be executed + * - ADDR represents the addr and is always 2 bytes and the + * value is in hex, for example 0x0232 + * - VAL represents the value that is written and is always 1 + * byte and the value is in hex, for example 0x12 + */ + ptr += ZL3073X_FW_COMMAND_SIZE; + ptr += ZL3073X_FW_WHITESPACES_SIZE; + addr = simple_strtoul(ptr, &endp, 16); + + ptr = endp; + ptr += ZL3073X_FW_WHITESPACES_SIZE; + val = simple_strtoul(ptr, NULL, 16); + + /* Write requested value to given register */ + return zl3073x_write_reg(zldev, addr, 1, &val); + case 'W': + /* The line looks like this: + * W , DELAY + * Where: + * - W means that is a wait command + * - DELAY represents the delay in microseconds and the value + * is in decimal + */ + ptr += ZL3073X_FW_COMMAND_SIZE; + ptr += ZL3073X_FW_WHITESPACES_SIZE; + delay = simple_strtoul(ptr, NULL, 10); + + fsleep(delay); + break; + default: + break; + } + + return 0; +} + +#define ZL3073X_MFG_FILE "microchip/zl3073x.mfg" + +static void zl3073x_fw_load(struct zl3073x_dev *zldev) +{ + const struct firmware *fw; + const char *ptr, *end; + char buf[128]; + int rc; + + rc = firmware_request_nowarn(&fw, ZL3073X_MFG_FILE, zldev->dev); + if (rc) + return; + + dev_info(zldev->dev, "Applying mfg file %s...\n", ZL3073X_MFG_FILE); + + guard(zl3073x)(zldev); + + ptr = fw->data; + end = ptr + fw->size; + while (ptr < end) { + /* Get next end of the line or end of buffer */ + char *eol = strnchrnul(ptr, end - ptr, '\n'); + size_t len = eol - ptr; + + /* Check line length */ + if (len >= sizeof(buf)) { + dev_err(zldev->dev, "Line in firmware is too long\n"); + return; + } + + /* Copy line from buffer */ + memcpy(buf, ptr, len); + buf[len] = '\0'; + + /* Parse and process the line */ + rc = zl3073x_fw_parse_line(zldev, buf); + if (rc) { + dev_err(zldev->dev, + "Failed to parse firmware line: %pe\n", + ERR_PTR(rc)); + break; + } + + /* Move to next line */ + ptr = eol + 1; + } + + release_firmware(fw); +} + /** * zl3073x_dev_init - initialize zl3073x device * @zldev: pointer to zl3073x device @@ -505,6 +611,9 @@ int zl3073x_dev_init(struct zl3073x_dev *zldev, u8 dev_id) /* Use chip ID and given dev ID as clock ID */ zldev->clock_id = ((u64)id << 8) | dev_id; + /* Load mfg file if present */ + zl3073x_fw_load(zldev); + dev_info(zldev->dev, "ChipID(%X), ChipRev(%X), FwVer(%u)\n", id, revision, fw_ver); dev_info(zldev->dev, "Custom config version: %lu.%lu.%lu.%lu\n", @@ -528,3 +637,4 @@ EXPORT_SYMBOL_NS_GPL(zl3073x_dev_init, "ZL3073X"); MODULE_AUTHOR("Ivan Vecera "); MODULE_DESCRIPTION("Microchip ZL3073x core driver"); MODULE_LICENSE("GPL"); +MODULE_FIRMWARE(ZL3073X_MFG_FILE); From patchwork Wed Apr 9 14:42:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Vecera X-Patchwork-Id: 14044840 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEB82267B04 for ; Wed, 9 Apr 2025 14:44:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.133.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744209854; cv=none; b=a0AX/ZHH2iPiQIgu3tvhsJo3bfIijMZluaMAKP8dlswp26W2i3cQzYkDNzWOtWhRVwCmtTB2StbhWYmd3KSVdD/G6IXZ1PsmDcv/E28JVMJb6HDCbfcq4/A30O+TGJ+OGZrB7CpmJr+sm8QP24wlX+eVv/2FOz0zzCygXSzkNoY= ARC-Message-Signature: i=1; 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Wed, 9 Apr 2025 14:44:04 +0000 (UTC) Received: from p16v.luc.cera.cz (unknown [10.44.32.72]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 388A01801747; Wed, 9 Apr 2025 14:44:00 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Prathosh Satish , Lee Jones , Kees Cook , Andy Shevchenko , Andrew Morton , Michal Schmidt , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: [PATCH v2 14/14] mfd: zl3073x: Fetch invariants during probe Date: Wed, 9 Apr 2025 16:42:50 +0200 Message-ID: <20250409144250.206590-15-ivecera@redhat.com> In-Reply-To: <20250409144250.206590-1-ivecera@redhat.com> References: <20250409144250.206590-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Several configuration parameters will not be changed in runtime so we can load them during probe to avoid excessive reads from the hardware. These parameters will be frequently read by the DPLL driver from this series and later by PHC/PTP sub-device driver. Read the following parameters from the device during probe and store them for later use: * synthesizers' frequencies and associated DPLL channel * input pins' enablement and type (single-ended or differential) * outputs'associated synths, signal format and enablement Signed-off-by: Ivan Vecera --- v1->v2: * fixed and added inline documentation --- drivers/mfd/zl3073x-core.c | 243 ++++++++++++++++++++++++++++++++++++ include/linux/mfd/zl3073x.h | 161 ++++++++++++++++++++++++ 2 files changed, 404 insertions(+) diff --git a/drivers/mfd/zl3073x-core.c b/drivers/mfd/zl3073x-core.c index 110071b28cab9..70fd7a76c6478 100644 --- a/drivers/mfd/zl3073x-core.c +++ b/drivers/mfd/zl3073x-core.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -29,6 +30,20 @@ ZL3073X_REG16_DEF(revision, 0x0003); ZL3073X_REG16_DEF(fw_ver, 0x0005); ZL3073X_REG32_DEF(custom_config_ver, 0x0007); +/* + * Register Map Page 9, Synth and Output + */ +ZL3073X_REG8_IDX_DEF(synth_ctrl, 0x480, ZL3073X_NUM_SYNTHS, 1); +#define SYNTH_CTRL_EN BIT(0) +#define SYNTH_CTRL_DPLL_SEL GENMASK(6, 4) + +ZL3073X_REG8_IDX_DEF(output_ctrl, 0x4a8, ZL3073X_NUM_OUTPUTS, 1); +#define OUTPUT_CTRL_EN BIT(0) +#define OUTPUT_CTRL_STOP BIT(1) +#define OUTPUT_CTRL_STOP_HIGH BIT(2) +#define OUTPUT_CTRL_STOP_HZ BIT(3) +#define OUTPUT_CTRL_SYNTH_SEL GENMASK(6, 4) + /* * Register Map Page 10, Ref Mailbox */ @@ -39,6 +54,10 @@ ZL3073X_REG8_DEF(ref_mb_sem, 0x504); #define REF_MB_SEM_WR BIT(0) #define REF_MB_SEM_RD BIT(1) +ZL3073X_REG8_DEF(ref_config, 0x50d); +#define REF_CONFIG_ENABLE BIT(0) +#define REF_CONFIG_DIFF_EN BIT(2) + /* * Register Map Page 12, DPLL Mailbox */ @@ -70,6 +89,9 @@ ZL3073X_REG8_DEF(output_mb_sem, 0x704); #define OUTPUT_MB_SEM_WR BIT(0) #define OUTPUT_MB_SEM_RD BIT(1) +ZL3073X_REG8_DEF(output_mode, 0x705); +#define OUTPUT_MODE_SIGNAL_FORMAT GENMASK(7, 4) + /* * Regmap ranges */ @@ -570,6 +592,220 @@ static void zl3073x_fw_load(struct zl3073x_dev *zldev) release_firmware(fw); } +/** + * zl3073x_input_state_fetch - get input state + * @zldev: pointer to zl3073x_dev structure + * @index: input pin index to fetch state for + * + * Function fetches information for the given input reference that are + * invariant and stores them for later use. + * + * Return: 0 on success, <0 on error + */ +static int +zl3073x_input_state_fetch(struct zl3073x_dev *zldev, u8 index) +{ + struct zl3073x_input *input; + u8 ref_config; + int rc; + + if (index >= ZL3073X_NUM_INPUTS) + return -EINVAL; + + input = &zldev->input[index]; + + /* If the input is differential then the configuration for N-pin + * reference is ignored and P-pin config is used for both. + */ + if (zl3073x_is_n_pin(index) && + zl3073x_input_is_diff(zldev, index - 1)) { + input->enabled = zl3073x_input_is_enabled(zldev, index - 1); + input->diff = true; + + return 0; + } + + /* Read reference configuration into mailbox */ + rc = zl3073x_mb_ref_read(zldev, index); + if (rc) + return rc; + + /* Read reference config register */ + rc = zl3073x_read_ref_config(zldev, &ref_config); + if (rc) + return rc; + + /* Store info about input reference enablement and if it is + * configured in differential mode or not. + */ + input->enabled = FIELD_GET(REF_CONFIG_ENABLE, ref_config); + input->diff = FIELD_GET(REF_CONFIG_DIFF_EN, ref_config); + + return rc; +} + +/** + * zl3073x_output_state_fetch - get output state + * @zldev: pointer to zl3073x_dev structure + * @index: output index to fetch state for + * + * Function fetches information for the given output (not output pin) + * that are invariant and stores them for later use. + * + * Return: 0 on success, <0 on error + */ +static int +zl3073x_output_state_fetch(struct zl3073x_dev *zldev, u8 index) +{ + struct zl3073x_output *output; + u8 output_ctrl, output_mode; + int rc; + + if (index >= ZL3073X_NUM_OUTPUTS) + return -EINVAL; + + output = &zldev->output[index]; + + /* Read output control register */ + rc = zl3073x_read_output_ctrl(zldev, index, &output_ctrl); + if (rc) + return rc; + + /* Store info about output enablement and synthesizer the output + * is connected to. + */ + output->enabled = FIELD_GET(OUTPUT_CTRL_EN, output_ctrl); + output->synth = FIELD_GET(OUTPUT_CTRL_SYNTH_SEL, output_ctrl); + + /* Load given output config into mailbox */ + rc = zl3073x_mb_output_read(zldev, index); + if (rc) + return rc; + + /* Read output mode from mailbox */ + rc = zl3073x_read_output_mode(zldev, &output_mode); + if (rc) + return rc; + + /* Extract and store output signal format */ + output->signal_format = FIELD_GET(OUTPUT_MODE_SIGNAL_FORMAT, + output_mode); + + return rc; +} + +/** + * zl3073x_synth_state_fetch - get synth state + * @zldev: pointer to zl3073x_dev structure + * @index: synth index to fetch state for + * + * Function fetches information for the given synthesizer that are + * invariant and stores them for later use. + * + * Return: 0 on success, <0 on error + */ +static int +zl3073x_synth_state_fetch(struct zl3073x_dev *zldev, u8 index) +{ + u16 base, numerator, denominator; + u8 synth_ctrl; + u32 mult; + int rc; + + /* Read synth control register */ + rc = zl3073x_read_synth_ctrl(zldev, index, &synth_ctrl); + if (rc) + return rc; + + /* Extract and store DPLL channel the synth is driven by */ + zldev->synth[index].dpll = FIELD_GET(SYNTH_CTRL_DPLL_SEL, synth_ctrl); + + dev_dbg(zldev->dev, "SYNTH%u is connected to DPLL%u\n", index, + zldev->synth[index].dpll); + + /* Read synth configuration into mailbox */ + rc = zl3073x_mb_synth_read(zldev, index); + if (rc) + return rc; + + /* The output frequency is determined by the following formula: + * base * multiplier * numerator / denominator + * + * Therefore get all this number and calculate the output frequency + */ + rc = zl3073x_read_synth_freq_base(zldev, &base); + if (rc) + return rc; + + rc = zl3073x_read_synth_freq_mult(zldev, &mult); + if (rc) + return rc; + + rc = zl3073x_read_synth_freq_m(zldev, &numerator); + if (rc) + return rc; + + rc = zl3073x_read_synth_freq_n(zldev, &denominator); + if (rc) + return rc; + + /* Check denominator for zero to avoid div by 0 */ + if (!denominator) { + dev_err(zldev->dev, + "Zero divisor for SYNTH%u retrieved from device\n", + index); + return -ENODEV; + } + + /* Compute and store synth frequency */ + zldev->synth[index].freq = mul_u64_u32_div(mul_u32_u32(base, mult), + numerator, denominator); + + dev_dbg(zldev->dev, "SYNTH%u frequency: %llu Hz\n", index, + zldev->synth[index].freq); + + return rc; +} + +static int +zl3073x_dev_state_fetch(struct zl3073x_dev *zldev) +{ + int rc; + u8 i; + + for (i = 0; i < ZL3073X_NUM_INPUTS; i++) { + rc = zl3073x_input_state_fetch(zldev, i); + if (rc) { + dev_err(zldev->dev, + "Failed to fetch input state: %pe\n", + ERR_PTR(rc)); + return rc; + } + } + + for (i = 0; i < ZL3073X_NUM_SYNTHS; i++) { + rc = zl3073x_synth_state_fetch(zldev, i); + if (rc) { + dev_err(zldev->dev, + "Failed to fetch synth state: %pe\n", + ERR_PTR(rc)); + return rc; + } + } + + for (i = 0; i < ZL3073X_NUM_OUTPUTS; i++) { + rc = zl3073x_output_state_fetch(zldev, i); + if (rc) { + dev_err(zldev->dev, + "Failed to fetch output state: %pe\n", + ERR_PTR(rc)); + return rc; + } + } + + return rc; +} + /** * zl3073x_dev_init - initialize zl3073x device * @zldev: pointer to zl3073x device @@ -614,6 +850,13 @@ int zl3073x_dev_init(struct zl3073x_dev *zldev, u8 dev_id) /* Load mfg file if present */ zl3073x_fw_load(zldev); + /* Fetch device state */ + scoped_guard(zl3073x, zldev) { + rc = zl3073x_dev_state_fetch(zldev); + if (rc) + return rc; + } + dev_info(zldev->dev, "ChipID(%X), ChipRev(%X), FwVer(%u)\n", id, revision, fw_ver); dev_info(zldev->dev, "Custom config version: %lu.%lu.%lu.%lu\n", diff --git a/include/linux/mfd/zl3073x.h b/include/linux/mfd/zl3073x.h index 50befd7f03b24..ec265d2e935bb 100644 --- a/include/linux/mfd/zl3073x.h +++ b/include/linux/mfd/zl3073x.h @@ -12,18 +12,75 @@ struct device; struct regmap; +/* + * Hardware limits for ZL3073x chip family + */ +#define ZL3073X_NUM_INPUTS 10 +#define ZL3073X_NUM_OUTPUTS 10 +#define ZL3073X_NUM_SYNTHS 5 + +/** + * struct zl3073x_input - input invariant info + * @enabled: input is enabled or disabled + * @diff: true if input is differential + */ +struct zl3073x_input { + bool enabled; + bool diff; +}; + +/** + * struct zl3073x_output - output invariant info + * @enabled: output is enabled or disabled + * @synth: synthesizer the output is connected to + * @signal_format: output signal format + */ +struct zl3073x_output { + bool enabled; + u8 synth; + u8 signal_format; +#define OUTPUT_MODE_SIGNAL_FORMAT_DISABLED 0 +#define OUTPUT_MODE_SIGNAL_FORMAT_LVDS 1 +#define OUTPUT_MODE_SIGNAL_FORMAT_DIFFERENTIAL 2 +#define OUTPUT_MODE_SIGNAL_FORMAT_LOWVCM 3 +#define OUTPUT_MODE_SIGNAL_FORMAT_TWO 4 +#define OUTPUT_MODE_SIGNAL_FORMAT_ONE_P 5 +#define OUTPUT_MODE_SIGNAL_FORMAT_ONE_N 6 +#define OUTPUT_MODE_SIGNAL_FORMAT_TWO_INV 7 +#define OUTPUT_MODE_SIGNAL_FORMAT_TWO_N_DIV 12 +#define OUTPUT_MODE_SIGNAL_FORMAT_TWO_N_DIV_INV 15 +}; + +/** + * struct zl3073x_synth - synthesizer invariant info + * @freq: synthesizer frequency + * @dpll: ID of DPLL the synthesizer is driven by + */ +struct zl3073x_synth { + u64 freq; + u8 dpll; +}; + /** * struct zl3073x_dev - zl3073x device * @dev: pointer to device * @regmap: regmap to access HW registers * @clock_id: clock id of the device * @lock: lock to be held during access to HW registers + * @input: array of inputs + * @output: array of outputs + * @synth: array of synthesizers */ struct zl3073x_dev { struct device *dev; struct regmap *regmap; u64 clock_id; struct mutex lock; + + /* Invariants */ + struct zl3073x_input input[ZL3073X_NUM_INPUTS]; + struct zl3073x_output output[ZL3073X_NUM_OUTPUTS]; + struct zl3073x_synth synth[ZL3073X_NUM_SYNTHS]; }; /** @@ -199,4 +256,108 @@ int zl3073x_mb_ref_write(struct zl3073x_dev *zldev, u8 index); int zl3073x_mb_synth_read(struct zl3073x_dev *zldev, u8 index); int zl3073x_mb_synth_write(struct zl3073x_dev *zldev, u8 index); +static inline +bool zl3073x_is_n_pin(u8 index) +{ + /* P-pins indices are even while N-pins are odd */ + return index & 1; +} + +static inline +bool zl3073x_is_p_pin(u8 index) +{ + return !zl3073x_is_n_pin(index); +} + +/** + * zl3073x_input_is_diff - check if the given input ref is differential + * @zldev: pointer to zl3073x device + * @index: output index + * + * Return: true if input is differential, false if input is single-ended + */ +static inline +bool zl3073x_input_is_diff(struct zl3073x_dev *zldev, u8 index) +{ + return zldev->input[index].diff; +} + +/** + * zl3073x_input_is_enabled - check if the given input ref is enabled + * @zldev: pointer to zl3073x device + * @index: input index + * + * Return: true if input is enabled, false if input is disabled + */ +static inline +bool zl3073x_input_is_enabled(struct zl3073x_dev *zldev, u8 index) +{ + return zldev->input[index].enabled; +} + +/** + * zl3073x_output_is_enabled - check if the given output is enabled + * @zldev: pointer to zl3073x device + * @index: output index + * + * Return: true if output is enabled, false if output is disabled + */ +static inline +u8 zl3073x_output_is_enabled(struct zl3073x_dev *zldev, u8 index) +{ + return zldev->output[index].enabled; +} + +/** + * zl3073x_output_signal_format_get - get output signal format + * @zldev: pointer to zl3073x device + * @index: output index + * + * Return: signal format of given output + */ +static inline +u8 zl3073x_output_signal_format_get(struct zl3073x_dev *zldev, u8 index) +{ + return zldev->output[index].signal_format; +} + +/** + * zl3073x_output_synth_get - get synth connected to given output + * @zldev: pointer to zl3073x device + * @index: output index + * + * Return: index of synth connected to given output. + */ +static inline +u8 zl3073x_output_synth_get(struct zl3073x_dev *zldev, u8 index) +{ + return zldev->output[index].synth; +} + +/** + * zl3073x_synth_dpll_get - get DPLL ID the synth is driven by + * @zldev: pointer to zl3073x device + * @index: synth index + * + * Return: ID of DPLL the given synthetizer is driven by + */ +static inline +u64 zl3073x_synth_dpll_get(struct zl3073x_dev *zldev, u8 index) +{ + return zldev->synth[index].dpll; +} + +/** + * zl3073x_synth_freq_get - get synth current freq + * @zldev: pointer to zl3073x device + * @index: synth index + * + * Return: frequency of given synthetizer + */ +static inline +u64 zl3073x_synth_freq_get(struct zl3073x_dev *zldev, u8 index) +{ + return zldev->synth[index].freq; +} + #endif /* __LINUX_MFD_ZL3073X_H */