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So "init" flag shall be extracted from specific "struct xen_processor_perf", and placed in the common "struct processor_pminfo". Signed-off-by: Penny Zheng --- v3 -> v4: - new commit --- xen/drivers/acpi/pmstat.c | 4 ++-- xen/drivers/cpufreq/cpufreq.c | 8 ++++---- xen/include/acpi/cpufreq/processor_perf.h | 4 ++-- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c index c51b9ca358..767594908c 100644 --- a/xen/drivers/acpi/pmstat.c +++ b/xen/drivers/acpi/pmstat.c @@ -68,7 +68,7 @@ int do_get_pm_info(struct xen_sysctl_get_pmstat *op) return -ENODEV; if ( hwp_active() ) return -EOPNOTSUPP; - if ( !pmpt || !(pmpt->perf.init & XEN_PX_INIT) ) + if ( !pmpt || !(pmpt->init & XEN_PX_INIT) ) return -EINVAL; break; default: @@ -463,7 +463,7 @@ int do_pm_op(struct xen_sysctl_pm_op *op) case CPUFREQ_PARA: if ( !(xen_processor_pmbits & XEN_PROCESSOR_PM_PX) ) return -ENODEV; - if ( !pmpt || !(pmpt->perf.init & XEN_PX_INIT) ) + if ( !pmpt || !(pmpt->init & XEN_PX_INIT) ) return -EINVAL; break; } diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c index 4a103c6de9..b01ed8e294 100644 --- a/xen/drivers/cpufreq/cpufreq.c +++ b/xen/drivers/cpufreq/cpufreq.c @@ -209,7 +209,7 @@ int cpufreq_add_cpu(unsigned int cpu) perf = &processor_pminfo[cpu]->perf; - if ( !(perf->init & XEN_PX_INIT) ) + if ( !(processor_pminfo[cpu]->init & XEN_PX_INIT) ) return -EINVAL; if (!cpufreq_driver.init) @@ -367,7 +367,7 @@ int cpufreq_del_cpu(unsigned int cpu) perf = &processor_pminfo[cpu]->perf; - if ( !(perf->init & XEN_PX_INIT) ) + if ( !(processor_pminfo[cpu]->init & XEN_PX_INIT) ) return -EINVAL; if (!per_cpu(cpufreq_cpu_policy, cpu)) @@ -563,7 +563,7 @@ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf) if ( cpufreq_verbose ) print_PPC(pxpt->platform_limit); - if ( pxpt->init == XEN_PX_INIT ) + if ( pmpt->init == XEN_PX_INIT ) { ret = cpufreq_limit_change(cpu); goto out; @@ -572,7 +572,7 @@ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf) if ( perf->flags == ( XEN_PX_PCT | XEN_PX_PSS | XEN_PX_PSD | XEN_PX_PPC ) ) { - pxpt->init = XEN_PX_INIT; + pmpt->init = XEN_PX_INIT; ret = cpufreq_cpu_init(cpu); goto out; diff --git a/xen/include/acpi/cpufreq/processor_perf.h b/xen/include/acpi/cpufreq/processor_perf.h index 301104e16f..5f2612b15a 100644 --- a/xen/include/acpi/cpufreq/processor_perf.h +++ b/xen/include/acpi/cpufreq/processor_perf.h @@ -29,14 +29,14 @@ struct processor_performance { struct xen_processor_px *states; struct xen_psd_package domain_info; uint32_t shared_type; - - uint32_t init; }; struct processor_pminfo { uint32_t acpi_id; uint32_t id; struct processor_performance perf; + + uint32_t init; }; extern struct processor_pminfo *processor_pminfo[NR_CPUS]; From patchwork Mon Apr 14 07:40:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Penny, Zheng" X-Patchwork-Id: 14049875 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7BD48C369B9 for ; Mon, 14 Apr 2025 07:41:51 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.949114.1345741 (Exim 4.92) (envelope-from ) id 1u4ERi-00004q-9O; Mon, 14 Apr 2025 07:41:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 949114.1345741; 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pr=C From: Penny Zheng To: CC: , Penny Zheng , Jan Beulich , Andrew Cooper , "Anthony PERARD" , Michal Orzel , Julien Grall , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4 02/15] xen/cpufreq: extract _PSD info from "struct xen_processor_performance" Date: Mon, 14 Apr 2025 15:40:43 +0800 Message-ID: <20250414074056.3696888-3-Penny.Zheng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250414074056.3696888-1-Penny.Zheng@amd.com> References: <20250414074056.3696888-1-Penny.Zheng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD76:EE_|SA3PR12MB9092:EE_ X-MS-Office365-Filtering-Correlation-Id: 54bc6bbe-8690-4de2-4036-08dd7b27c23b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|376014|1800799024; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Apr 2025 07:41:24.8457 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 54bc6bbe-8690-4de2-4036-08dd7b27c23b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD76.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB9092 Since we need to re-use _PSD info, containing "shared_type" and "struct xen_psd_package", for CPPC mode, we move all "#define XEN_CPUPERF_SHARED_TYPE_xxx" up as common values, and introduce a new helper check_psd_pminfo() to wrap _PSD info check. In cpufreq_add/del_cpu(), a new helper get_psd_info() is introduced to extract "shared_type" and "struct xen_psd_package" from "struct xen_processor_performance", and a few indentation get fixed at the same time. Signed-off-by: Penny Zheng --- v3 -> v4: - new commit --- xen/drivers/cpufreq/cpufreq.c | 107 ++++++++++++++++++++++++---------- xen/include/public/platform.h | 10 ++-- 2 files changed, 82 insertions(+), 35 deletions(-) diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c index b01ed8e294..b020ccbcf7 100644 --- a/xen/drivers/cpufreq/cpufreq.c +++ b/xen/drivers/cpufreq/cpufreq.c @@ -191,9 +191,31 @@ int cpufreq_limit_change(unsigned int cpu) return __cpufreq_set_policy(data, &policy); } -int cpufreq_add_cpu(unsigned int cpu) +static int get_psd_info(uint32_t init, unsigned int cpu, + uint32_t *shared_type, + struct xen_psd_package *domain_info) { int ret = 0; + + switch ( init ) + { + case XEN_PX_INIT: + if ( shared_type ) + *shared_type = processor_pminfo[cpu]->perf.shared_type; + if ( domain_info ) + *domain_info = processor_pminfo[cpu]->perf.domain_info; + break; + default: + ret = -EINVAL; + break; + } + + return ret; +} + +int cpufreq_add_cpu(unsigned int cpu) +{ + int ret; unsigned int firstcpu; unsigned int dom, domexist = 0; unsigned int hw_all = 0; @@ -201,14 +223,13 @@ int cpufreq_add_cpu(unsigned int cpu) struct cpufreq_dom *cpufreq_dom = NULL; struct cpufreq_policy new_policy; struct cpufreq_policy *policy; - struct processor_performance *perf; + struct xen_psd_package domain_info; + uint32_t shared_type; /* to protect the case when Px was not controlled by xen */ if ( !processor_pminfo[cpu] || !cpu_online(cpu) ) return -EINVAL; - perf = &processor_pminfo[cpu]->perf; - if ( !(processor_pminfo[cpu]->init & XEN_PX_INIT) ) return -EINVAL; @@ -218,10 +239,15 @@ int cpufreq_add_cpu(unsigned int cpu) if (per_cpu(cpufreq_cpu_policy, cpu)) return 0; - if (perf->shared_type == CPUFREQ_SHARED_TYPE_HW) + ret = get_psd_info(processor_pminfo[cpu]->init, cpu, + &shared_type, &domain_info); + if ( ret ) + return ret; + + if ( shared_type == CPUFREQ_SHARED_TYPE_HW ) hw_all = 1; - dom = perf->domain_info.domain; + dom = domain_info.domain; list_for_each(pos, &cpufreq_dom_list_head) { cpufreq_dom = list_entry(pos, struct cpufreq_dom, node); @@ -244,20 +270,27 @@ int cpufreq_add_cpu(unsigned int cpu) cpufreq_dom->dom = dom; list_add(&cpufreq_dom->node, &cpufreq_dom_list_head); } else { + uint32_t firstcpu_shared_type; + struct xen_psd_package firstcpu_domain_info; + /* domain sanity check under whatever coordination type */ firstcpu = cpumask_first(cpufreq_dom->map); - if ((perf->domain_info.coord_type != - processor_pminfo[firstcpu]->perf.domain_info.coord_type) || - (perf->domain_info.num_processors != - processor_pminfo[firstcpu]->perf.domain_info.num_processors)) { - + ret = get_psd_info(processor_pminfo[firstcpu]->init, firstcpu, + &firstcpu_shared_type, &firstcpu_domain_info); + if ( ret ) + return ret; + + if ( (domain_info.coord_type != firstcpu_domain_info.coord_type) || + (domain_info.num_processors != + firstcpu_domain_info.num_processors) ) + { printk(KERN_WARNING "cpufreq fail to add CPU%d:" "incorrect _PSD(%"PRIu64":%"PRIu64"), " "expect(%"PRIu64"/%"PRIu64")\n", - cpu, perf->domain_info.coord_type, - perf->domain_info.num_processors, - processor_pminfo[firstcpu]->perf.domain_info.coord_type, - processor_pminfo[firstcpu]->perf.domain_info.num_processors + cpu, domain_info.coord_type, + domain_info.num_processors, + firstcpu_domain_info.coord_type, + firstcpu_domain_info.num_processors ); return -EINVAL; } @@ -304,8 +337,9 @@ int cpufreq_add_cpu(unsigned int cpu) if (ret) goto err1; - if (hw_all || (cpumask_weight(cpufreq_dom->map) == - perf->domain_info.num_processors)) { + if ( hw_all || (cpumask_weight(cpufreq_dom->map) == + domain_info.num_processors) ) + { memcpy(&new_policy, policy, sizeof(struct cpufreq_policy)); policy->governor = NULL; @@ -354,29 +388,34 @@ err0: int cpufreq_del_cpu(unsigned int cpu) { + int ret; unsigned int dom, domexist = 0; unsigned int hw_all = 0; struct list_head *pos; struct cpufreq_dom *cpufreq_dom = NULL; struct cpufreq_policy *policy; - struct processor_performance *perf; + uint32_t shared_type; + struct xen_psd_package domain_info; /* to protect the case when Px was not controlled by xen */ if ( !processor_pminfo[cpu] || !cpu_online(cpu) ) return -EINVAL; - perf = &processor_pminfo[cpu]->perf; - if ( !(processor_pminfo[cpu]->init & XEN_PX_INIT) ) return -EINVAL; if (!per_cpu(cpufreq_cpu_policy, cpu)) return 0; - if (perf->shared_type == CPUFREQ_SHARED_TYPE_HW) + ret = get_psd_info(processor_pminfo[cpu]->init, cpu, + &shared_type, &domain_info); + if ( ret ) + return ret; + + if ( shared_type == CPUFREQ_SHARED_TYPE_HW ) hw_all = 1; - dom = perf->domain_info.domain; + dom = domain_info.domain; policy = per_cpu(cpufreq_cpu_policy, cpu); list_for_each(pos, &cpufreq_dom_list_head) { @@ -392,8 +431,8 @@ int cpufreq_del_cpu(unsigned int cpu) /* for HW_ALL, stop gov for each core of the _PSD domain */ /* for SW_ALL & SW_ANY, stop gov for the 1st core of the _PSD domain */ - if (hw_all || (cpumask_weight(cpufreq_dom->map) == - perf->domain_info.num_processors)) + if ( hw_all || (cpumask_weight(cpufreq_dom->map) == + domain_info.num_processors) ) __cpufreq_governor(policy, CPUFREQ_GOV_STOP); cpufreq_statistic_exit(cpu); @@ -458,6 +497,17 @@ static void print_PPC(unsigned int platform_limit) printk("\t_PPC: %d\n", platform_limit); } +static int check_psd_pminfo(const struct xen_processor_performance *perf) +{ + /* check domain coordination */ + if ( perf->shared_type != CPUFREQ_SHARED_TYPE_ALL && + perf->shared_type != CPUFREQ_SHARED_TYPE_ANY && + perf->shared_type != CPUFREQ_SHARED_TYPE_HW ) + return -EINVAL; + + return 0; +} + int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf) { int ret = 0, cpu; @@ -539,14 +589,9 @@ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf) if ( perf->flags & XEN_PX_PSD ) { - /* check domain coordination */ - if ( perf->shared_type != CPUFREQ_SHARED_TYPE_ALL && - perf->shared_type != CPUFREQ_SHARED_TYPE_ANY && - perf->shared_type != CPUFREQ_SHARED_TYPE_HW ) - { - ret = -EINVAL; + ret = check_psd_pminfo(perf); + if ( ret ) goto out; - } pxpt->shared_type = perf->shared_type; memcpy(&pxpt->domain_info, &perf->domain_info, diff --git a/xen/include/public/platform.h b/xen/include/public/platform.h index 2725b8d104..67cf5eeabd 100644 --- a/xen/include/public/platform.h +++ b/xen/include/public/platform.h @@ -440,6 +440,11 @@ struct xen_psd_package { uint64_t num_processors; }; +/* Coordination type value */ +#define XEN_CPUPERF_SHARED_TYPE_HW 1 /* HW does needed coordination */ +#define XEN_CPUPERF_SHARED_TYPE_ALL 2 /* All dependent CPUs should set freq */ +#define XEN_CPUPERF_SHARED_TYPE_ANY 3 /* Freq can be set from any dependent CPU */ + struct xen_processor_performance { uint32_t flags; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Penny Zheng To: CC: , Penny Zheng , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , "Julien Grall" , Stefano Stabellini Subject: [PATCH v4 03/15] xen/x86: introduce new sub-hypercall to propagate CPPC data Date: Mon, 14 Apr 2025 15:40:44 +0800 Message-ID: <20250414074056.3696888-4-Penny.Zheng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250414074056.3696888-1-Penny.Zheng@amd.com> References: <20250414074056.3696888-1-Penny.Zheng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD78:EE_|CYYPR12MB8704:EE_ X-MS-Office365-Filtering-Correlation-Id: c0d7ceb0-480e-4721-f5cc-08dd7b27c403 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|376014|1800799024; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Apr 2025 07:41:27.8388 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c0d7ceb0-480e-4721-f5cc-08dd7b27c403 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD78.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8704 In order to provide backward compatibility with existing governors that represent performance as frequency, like ondemand, the _CPC table can optionally provide processor frequency range values, Lowest frequency and Norminal frequency, to let OS use Lowest Frequency/ Performance and Nominal Frequency/Performance as anchor points to create linear mapping of CPPC abstract performance to CPU frequency. As Xen is uncapable of parsing the ACPI dynamic table, we'd like to introduce a new sub-hypercall "XEN_PM_CPPC" to propagate required CPPC data from dom0 kernel to Xen. In the according handler set_cppc_pminfo(), we do _CPC and _PSD sanitization check, as both _PSD and _CPC info are necessary for correctly initializing cpufreq cores in CPPC mode. Users shall be warned that if we failed at this point, no fallback scheme, like legacy P-state could be switched to. A new flag "XEN_CPPC_INIT" is also introduced to differentiate cpufreq core initialised in Px mode. Signed-off-by: Penny Zheng --- v1 -> v2: - Remove unnecessary figure braces - Pointer-to-const for print_CPPC and set_cppc_pminfo - Structure allocation shall use xvzalloc() - Unnecessary memcpy(), and change it to a (type safe) structure assignment - Add comment for struct xen_processor_cppc, and keep the chosen fields in the order _CPC has them - Obey to alphabetic sorting, and prefix compat structures with ? instead of ! --- v2 -> v3: - Trim too long line - Re-place set_cppc_pminfo() past set_px_pminfo() - Fix Misra violations: Declaration and definition ought to agree in parameter names - Introduce a new flag XEN_PM_CPPC to reflect processor initialised in CPPC mode --- v3 -> v4: - Refactor commit message - make "acpi_id" unsigned int - Add warning message when cpufreq_cpu_init() failed only under debug mode - Expand "struct xen_processor_cppc" to include _PSD and shared type - add sanity check for ACPI CPPC data --- xen/arch/x86/platform_hypercall.c | 5 + xen/drivers/cpufreq/cpufreq.c | 131 ++++++++++++++++++++-- xen/include/acpi/cpufreq/processor_perf.h | 4 +- xen/include/public/platform.h | 26 +++++ xen/include/xen/pmstat.h | 2 + xen/include/xlat.lst | 1 + 6 files changed, 161 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hypercall.c index 90abd3197f..49717e9ca9 100644 --- a/xen/arch/x86/platform_hypercall.c +++ b/xen/arch/x86/platform_hypercall.c @@ -572,6 +572,11 @@ ret_t do_platform_op( break; } + case XEN_PM_CPPC: + ret = set_cppc_pminfo(op->u.set_pminfo.id, + &op->u.set_pminfo.u.cppc_data); + break; + default: ret = -EINVAL; break; diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c index b020ccbcf7..e01acc0c2d 100644 --- a/xen/drivers/cpufreq/cpufreq.c +++ b/xen/drivers/cpufreq/cpufreq.c @@ -40,6 +40,7 @@ #include #include #include +#include #include #include @@ -205,6 +206,12 @@ static int get_psd_info(uint32_t init, unsigned int cpu, if ( domain_info ) *domain_info = processor_pminfo[cpu]->perf.domain_info; break; + case XEN_CPPC_INIT: + if ( shared_type ) + *shared_type = processor_pminfo[cpu]->cppc_data.shared_type; + if ( domain_info ) + *domain_info = processor_pminfo[cpu]->cppc_data.domain_info; + break; default: ret = -EINVAL; break; @@ -230,7 +237,7 @@ int cpufreq_add_cpu(unsigned int cpu) if ( !processor_pminfo[cpu] || !cpu_online(cpu) ) return -EINVAL; - if ( !(processor_pminfo[cpu]->init & XEN_PX_INIT) ) + if ( !(processor_pminfo[cpu]->init & (XEN_PX_INIT | XEN_CPPC_INIT)) ) return -EINVAL; if (!cpufreq_driver.init) @@ -401,7 +408,7 @@ int cpufreq_del_cpu(unsigned int cpu) if ( !processor_pminfo[cpu] || !cpu_online(cpu) ) return -EINVAL; - if ( !(processor_pminfo[cpu]->init & XEN_PX_INIT) ) + if ( !(processor_pminfo[cpu]->init & (XEN_PX_INIT | XEN_CPPC_INIT)) ) return -EINVAL; if (!per_cpu(cpufreq_cpu_policy, cpu)) @@ -497,12 +504,19 @@ static void print_PPC(unsigned int platform_limit) printk("\t_PPC: %d\n", platform_limit); } -static int check_psd_pminfo(const struct xen_processor_performance *perf) +static int check_psd_pminfo(const struct xen_processor_performance *perf, + const struct xen_processor_cppc *cppc_data) { + uint32_t shared_type; + + if ( !perf && !cppc_data ) + return -EINVAL; + + shared_type = perf ? perf->shared_type : cppc_data->shared_type; /* check domain coordination */ - if ( perf->shared_type != CPUFREQ_SHARED_TYPE_ALL && - perf->shared_type != CPUFREQ_SHARED_TYPE_ANY && - perf->shared_type != CPUFREQ_SHARED_TYPE_HW ) + if ( shared_type != CPUFREQ_SHARED_TYPE_ALL && + shared_type != CPUFREQ_SHARED_TYPE_ANY && + shared_type != CPUFREQ_SHARED_TYPE_HW ) return -EINVAL; return 0; @@ -589,7 +603,7 @@ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf) if ( perf->flags & XEN_PX_PSD ) { - ret = check_psd_pminfo(perf); + ret = check_psd_pminfo(perf, NULL); if ( ret ) goto out; @@ -627,6 +641,109 @@ out: return ret; } +static void print_CPPC(const struct xen_processor_cppc *cppc_data) +{ + printk("\t_CPC: highest_perf=%u, lowest_perf=%u, " + "nominal_perf=%u, lowest_nonlinear_perf=%u, " + "nominal_mhz=%uMHz, lowest_mhz=%uMHz\n", + cppc_data->cpc.highest_perf, cppc_data->cpc.lowest_perf, + cppc_data->cpc.nominal_perf, cppc_data->cpc.lowest_nonlinear_perf, + cppc_data->cpc.nominal_mhz, cppc_data->cpc.lowest_mhz); +} + +int set_cppc_pminfo(unsigned int acpi_id, + const struct xen_processor_cppc *cppc_data) +{ + int ret = 0, cpuid; + struct processor_pminfo *pm_info; + + cpuid = get_cpu_id(acpi_id); + if ( cpuid < 0 || !cppc_data ) + { + ret = -EINVAL; + goto out; + } + if ( cpufreq_verbose ) + printk("Set CPU acpi_id(%u) cpuid(%d) CPPC State info:\n", + acpi_id, cpuid); + + pm_info = processor_pminfo[cpuid]; + if ( !pm_info ) + { + pm_info = xvzalloc(struct processor_pminfo); + if ( !pm_info ) + { + ret = -ENOMEM; + goto out; + } + processor_pminfo[cpuid] = pm_info; + } + pm_info->acpi_id = acpi_id; + pm_info->id = cpuid; + + if ( cppc_data->flags & XEN_CPPC_PSD ) + { + ret = check_psd_pminfo(NULL, cppc_data); + if ( ret ) + goto out; + } + + if ( cppc_data->flags & XEN_CPPC_CPC ) + { + if ( cppc_data->cpc.highest_perf == 0 || + cppc_data->cpc.highest_perf > UINT8_MAX || + cppc_data->cpc.nominal_perf == 0 || + cppc_data->cpc.nominal_perf > UINT8_MAX || + cppc_data->cpc.lowest_nonlinear_perf == 0 || + cppc_data->cpc.lowest_nonlinear_perf > UINT8_MAX || + cppc_data->cpc.lowest_perf == 0 || + cppc_data->cpc.lowest_perf > UINT8_MAX || + cppc_data->cpc.lowest_perf > + cppc_data->cpc.lowest_nonlinear_perf || + cppc_data->cpc.lowest_nonlinear_perf > + cppc_data->cpc.nominal_perf || + cppc_data->cpc.nominal_perf > cppc_data->cpc.highest_perf ) + /* + * Right now, Xen doesn't actually use perf values + * in ACPI _CPC table, warning is enough. + */ + printk(XENLOG_WARNING + "Broken CPPC perf values: lowest(%u), nonlinear_lowest(%u), nominal(%u), highest(%u)\n", + cppc_data->cpc.lowest_perf, + cppc_data->cpc.lowest_nonlinear_perf, + cppc_data->cpc.nominal_perf, + cppc_data->cpc.highest_perf); + + /* lowest_mhz and nominal_mhz are optional value */ + if ( (cppc_data->cpc.lowest_mhz && cppc_data->cpc.nominal_mhz) && + cppc_data->cpc.lowest_mhz > cppc_data->cpc.nominal_mhz ) + printk(XENLOG_WARNING + "Broken CPPC freq values: lowest(%u), nominal(%u)\n", + cppc_data->cpc.lowest_mhz, + cppc_data->cpc.nominal_mhz); + } + + if ( cppc_data->flags == (XEN_CPPC_PSD | XEN_CPPC_CPC) ) + { + pm_info->cppc_data = *cppc_data; + if ( cpufreq_verbose ) + { + print_PSD(&pm_info->cppc_data.domain_info); + print_CPPC(&pm_info->cppc_data); + } + + pm_info->init = XEN_CPPC_INIT; + ret = cpufreq_cpu_init(cpuid); +#ifndef NDEBUG + if ( ret ) + printk(XENLOG_WARNING "No fallback scheme could be replaced now"); +#endif + } + + out: + return ret; +} + static void cpufreq_cmdline_common_para(struct cpufreq_policy *new_policy) { if (usr_max_freq) diff --git a/xen/include/acpi/cpufreq/processor_perf.h b/xen/include/acpi/cpufreq/processor_perf.h index 5f2612b15a..f1f4f3138d 100644 --- a/xen/include/acpi/cpufreq/processor_perf.h +++ b/xen/include/acpi/cpufreq/processor_perf.h @@ -5,7 +5,8 @@ #include #include -#define XEN_PX_INIT 0x80000000U +#define XEN_CPPC_INIT 0x40000000U +#define XEN_PX_INIT 0x80000000U unsigned int powernow_register_driver(void); unsigned int get_measured_perf(unsigned int cpu, unsigned int flag); @@ -35,6 +36,7 @@ struct processor_pminfo { uint32_t acpi_id; uint32_t id; struct processor_performance perf; + struct xen_processor_cppc cppc_data; uint32_t init; }; diff --git a/xen/include/public/platform.h b/xen/include/public/platform.h index 67cf5eeabd..0e18a86ab4 100644 --- a/xen/include/public/platform.h +++ b/xen/include/public/platform.h @@ -363,6 +363,7 @@ DEFINE_XEN_GUEST_HANDLE(xenpf_getidletime_t); #define XEN_PM_PX 1 #define XEN_PM_TX 2 #define XEN_PM_PDC 3 +#define XEN_PM_CPPC 4 /* Px sub info type */ #define XEN_PX_PCT 1 @@ -370,6 +371,10 @@ DEFINE_XEN_GUEST_HANDLE(xenpf_getidletime_t); #define XEN_PX_PPC 4 #define XEN_PX_PSD 8 +/* CPPC sub info type */ +#define XEN_CPPC_PSD 1 +#define XEN_CPPC_CPC 2 + struct xen_power_register { uint32_t space_id; uint32_t bit_width; @@ -459,6 +464,26 @@ struct xen_processor_performance { typedef struct xen_processor_performance xen_processor_performance_t; DEFINE_XEN_GUEST_HANDLE(xen_processor_performance_t); +struct xen_processor_cppc { + uint8_t flags; /* flag for CPPC sub info type */ + /* + * Subset _CPC fields useful for CPPC-compatible cpufreq + * driver's initialization + */ + struct { + uint32_t highest_perf; + uint32_t nominal_perf; + uint32_t lowest_nonlinear_perf; + uint32_t lowest_perf; + uint32_t lowest_mhz; + uint32_t nominal_mhz; + } cpc; + struct xen_psd_package domain_info; /* _PSD */ + /* Coordination type of this processor */ + uint32_t shared_type; +}; +typedef struct xen_processor_cppc xen_processor_cppc_t; + struct xenpf_set_processor_pminfo { /* IN variables */ uint32_t id; /* ACPI CPU ID */ @@ -467,6 +492,7 @@ struct xenpf_set_processor_pminfo { struct xen_processor_power power;/* Cx: _CST/_CSD */ struct xen_processor_performance perf; /* Px: _PPC/_PCT/_PSS/_PSD */ XEN_GUEST_HANDLE(uint32) pdc; /* _PDC */ + xen_processor_cppc_t cppc_data; /* _CPC and _PSD */ } u; }; typedef struct xenpf_set_processor_pminfo xenpf_set_processor_pminfo_t; diff --git a/xen/include/xen/pmstat.h b/xen/include/xen/pmstat.h index 8350403e95..f30286d48e 100644 --- a/xen/include/xen/pmstat.h +++ b/xen/include/xen/pmstat.h @@ -7,6 +7,8 @@ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf); 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Apr 2025 07:41:29.4638 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: aaef0c1a-0ca1-4adf-e9c3-08dd7b27c4fb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD78.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8955 A helper function handle_cpufreq_cmdline() is introduced to tidy different handling pathes. We also add a new helper cpufreq_opts_contain() to ignore and warn user redundant setting, like "cpufreq=hwp;hwp;xen" Signed-off-by: Penny Zheng --- v2 -> v3: - new commit --- v3 -> v4: - add one single helper to do the tidy work - ignore and warn user redundant setting --- xen/drivers/cpufreq/cpufreq.c | 53 +++++++++++++++++++++++++++++------ 1 file changed, 45 insertions(+), 8 deletions(-) diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c index e01acc0c2d..79c6444116 100644 --- a/xen/drivers/cpufreq/cpufreq.c +++ b/xen/drivers/cpufreq/cpufreq.c @@ -71,6 +71,49 @@ unsigned int __initdata cpufreq_xen_cnt = 1; static int __init cpufreq_cmdline_parse(const char *s, const char *e); +static bool __init cpufreq_opts_contain(enum cpufreq_xen_opt option) +{ + unsigned int count = cpufreq_xen_cnt; + + while ( count ) + { + if ( cpufreq_xen_opts[--count] == option ) + return true; + } + + return false; +} + +static int __init handle_cpufreq_cmdline(enum cpufreq_xen_opt option) +{ + int ret = 0; + + if ( cpufreq_opts_contain(option) ) + { + const char *cpufreq_opts_str[] = { "CPUFREQ_xen", "CPUFREQ_hwp" }; + + printk(XENLOG_WARNING + "Duplicate cpufreq driver option: %s", + cpufreq_opts_str[option - 1]); + return 0; + } + + cpufreq_controller = FREQCTL_xen; + cpufreq_xen_opts[cpufreq_xen_cnt++] = option; + switch ( option ) + { + case CPUFREQ_hwp: + case CPUFREQ_xen: + xen_processor_pmbits |= XEN_PROCESSOR_PM_PX; + break; + default: + ret = -EINVAL; + break; + } + + return ret; +} + static int __init cf_check setup_cpufreq_option(const char *str) { const char *arg = strpbrk(str, ",:;"); @@ -114,20 +157,14 @@ static int __init cf_check setup_cpufreq_option(const char *str) if ( choice > 0 || !cmdline_strcmp(str, "xen") ) { - xen_processor_pmbits |= XEN_PROCESSOR_PM_PX; - cpufreq_controller = FREQCTL_xen; - cpufreq_xen_opts[cpufreq_xen_cnt++] = CPUFREQ_xen; - ret = 0; + ret = handle_cpufreq_cmdline(CPUFREQ_xen); if ( arg[0] && arg[1] ) ret = cpufreq_cmdline_parse(arg + 1, end); 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pr=C From: Penny Zheng To: CC: , Penny Zheng , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , "Julien Grall" , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4 05/15] xen/x86: introduce "cpufreq=amd-cppc" xen cmdline Date: Mon, 14 Apr 2025 15:40:46 +0800 Message-ID: <20250414074056.3696888-6-Penny.Zheng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250414074056.3696888-1-Penny.Zheng@amd.com> References: <20250414074056.3696888-1-Penny.Zheng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD74:EE_|CH3PR12MB9028:EE_ X-MS-Office365-Filtering-Correlation-Id: f820d576-0e31-42e1-41d6-08dd7b27c6a9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|376014|1800799024; X-Microsoft-Antispam-Message-Info: Ey86HqJz3UHQjV+t3ncm7Kpzn1E3QJWofl/92SezZxUs0GOPld3QXGiqEwFr4mOyV1vfkh4s7t3NRX+iR/n3gZ4s8olahYX8qq5LPjAXpVLWf+uTylH17cOUN/UzqSdvi65Wez9zwFlKjXEC+T0ZykXqsu4Q+5S5tTPNc5Wpt3dYFPMZwh8M9L74FuV7h9V5i76g2xKhs02U0Z7RHK6u8dhyHjU0p799BFvXh9bIaH3CyIsHyyN082WmV95k0Es9f5LqRbdoJaLVoCcXS7BzMrypT8ONXT1Z7Bjq6TUhKDka6RQO6XZv+Yq/42XuFPjeiqGr9GCDN0nD+NDUGmwZxjOuh1YCIPeA8j/5WEah6t/L30p0KHbiGXIt4AiR9mWCC9k1KbamRXqZGGdh9or+nsGNlB3O+sE5sDX52VqQlSN1ufql2Uhmtx96UF/8msb6LOu80dGSM8TImtU1X92T2zINez0gRPVA73uhIMScurooQJlMaKO6d9oeMa2zlV19wIspaxmpU9j/3qafSTGrPblBoGPpbJtV5QUv7bzyyEf2Nv6A+vlo6tdQGVW4heODF7t9RKajrkm6/E1AtfUkUpjbQXzAtwAv2EmL7RMRqCPITDRIreMBkZPOYomNVDHKIgANgShgHsYaJi3jeZrp5lS3TtGujYQ1r4z5/H/4p9fjl/TsFPJFU7fNEb1VCJ/hnx+YbfgLimeANhVn8w/JbEtf52dQGpeOfZpMS04YzgA9Ygfkl5r1njP5STntvvSYapJ7DptjOZtITOkEFvy63+y5ow+52AbdY2QavyEozVpOJliq8YY9BnM3V8doVYXzlL8U9/ebcxJDWRarKZBU4wtr1pN/gtvotIkRawUS43tnN6Xf17h8E3dfRztO9VVihA/0WTH45HO/vH+lCBv+OccaHjZ+T7noHVPQee5oQ87EdkIGDl3+tEP5F/TcS/f/wYQ0G/6mc3rFoxMrbZ23TTzwV0/o/mSvkbKmkCsF0EtvHjyNW6s/DMBO1TN7mdFUFW3ssDpahl0FsdvHNdF2tiIoHrbOpw6dhThpVSFBemj0/HJ1ZNToyRLz6+GFkJXf9VV6CPZz0hjL7LyqN9i6+2js9VJH8mwaqONFexnxOKzDiAvpxqhI+3VWll7P+ZFRqObclvurJf8aPY1bWAQqbPRhA/4gK0pbU+3Y2RVlfFUS9VZAdoumMao8fgeq95US3kl8JBBiFPcBa+YhG0L/iTirc/dBbcz2MQgLyO62sojPeTOpCxeQJ4/HOS29Hfr4+6LKQJc2E3d7WfghExdns99xVfthg5Abqa/E776dC/Adcm7Ut+D/80XnAZpzntHN5dpFf3aIsayxhV/eTnN9sEmx3dVXNqV8+tK1Gwyj4HOgKvp7ORgXZOzlugNInSwKj27t90kQk4YxR7vj9HHIExdaQZwj4kjU+Z1C2wJ4HH3zYY9q+PhZAOyMOgrn3JQ37Afl/WGbxAz5pJzCcV2GmC7gRMKVmE1qj9XVQHnRQ4mllzs6n78KSzdj0Y6CiboX X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Apr 2025 07:41:32.2619 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f820d576-0e31-42e1-41d6-08dd7b27c6a9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD74.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB9028 Users need to set "cpufreq=amd-cppc" in xen cmdline to enable amd-cppc driver, which selects ACPI Collaborative Performance and Power Control (CPPC) on supported AMD hardware to provide a finer grained frequency control mechanism. `verbose` option can also be included to support verbose print. When users setting "cpufreq=amd-cppc", a new amd-cppc driver shall be registered and used. All hooks for amd-cppc driver are missing until commit "xen/x86: introduce a new amd cppc driver for cpufreq scaling" Xen is not expected to support both or mixed mode (CPPC & legacy PSS, _PCT, _PPC) operations, so only one cpufreq driver gets registerd, either amd-cppc or legacy P-states driver, which is reflected and asserted by the incompatible flags XEN_PROCESSOR_PM_PX and XEN_PROCESSOR_PM_CPPC. Signed-off-by: Penny Zheng --- v1 -> v2: - Obey to alphabetic sorting and also strict it with CONFIG_AMD - Remove unnecessary empty comment line - Use __initconst_cf_clobber for pre-filled structure cpufreq_driver - Make new switch-case code apply to Hygon CPUs too - Change ENOSYS with EOPNOTSUPP - Blanks around binary operator - Change all amd_/-pstate defined values to amd_/-cppc --- v2 -> v3 - refactor too long lines - Make sure XEN_PROCESSOR_PM_PX and XEN_PROCESSOR_PM_CPPC incompatible flags after cpufreq register registrantion --- v3 -> v4: - introduce XEN_PROCESSOR_PM_CPPC in xen internal header - complement "Hygon" in log message - remove unnecessary if() - grow cpufreq_xen_opts[] array --- docs/misc/xen-command-line.pandoc | 7 +- xen/arch/x86/acpi/cpufreq/Makefile | 1 + xen/arch/x86/acpi/cpufreq/acpi.c | 14 +++- xen/arch/x86/acpi/cpufreq/amd-cppc.c | 81 +++++++++++++++++++++++ xen/arch/x86/acpi/cpufreq/cpufreq.c | 34 +++++++++- xen/arch/x86/platform_hypercall.c | 11 +++ xen/drivers/cpufreq/cpufreq.c | 15 ++++- xen/include/acpi/cpufreq/cpufreq.h | 6 +- xen/include/acpi/cpufreq/processor_perf.h | 3 + xen/include/public/sysctl.h | 1 + 10 files changed, 166 insertions(+), 7 deletions(-) create mode 100644 xen/arch/x86/acpi/cpufreq/amd-cppc.c diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 89db6e83be..9ef847a336 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -515,7 +515,7 @@ If set, force use of the performance counters for oprofile, rather than detectin available support. ### cpufreq -> `= none | {{ | xen } { [:[powersave|performance|ondemand|userspace][,[]][,[]]] } [,verbose]} | dom0-kernel | hwp[:[][,verbose]]` +> `= none | {{ | xen } { [:[powersave|performance|ondemand|userspace][,[]][,[]]] } [,verbose]} | dom0-kernel | hwp[:[][,verbose]] | amd-cppc[:[verbose]]` > Default: `xen` @@ -526,7 +526,7 @@ choice of `dom0-kernel` is deprecated and not supported by all Dom0 kernels. * `` and `` are integers which represent max and min processor frequencies respectively. * `verbose` option can be included as a string or also as `verbose=` - for `xen`. It is a boolean for `hwp`. + for `xen`. It is a boolean for `hwp` and `amd-cppc`. * `hwp` selects Hardware-Controlled Performance States (HWP) on supported Intel hardware. HWP is a Skylake+ feature which provides better CPU power management. The default is disabled. If `hwp` is selected, but hardware @@ -534,6 +534,9 @@ choice of `dom0-kernel` is deprecated and not supported by all Dom0 kernels. * `` is a boolean to enable Hardware Duty Cycling (HDC). HDC enables the processor to autonomously force physical package components into idle state. The default is enabled, but the option only applies when `hwp` is enabled. +* `amd-cppc` selects ACPI Collaborative Performance and Power Control (CPPC) + on supported AMD hardware to provide finer grained frequency control + mechanism. The default is disabled. There is also support for `;`-separated fallback options: `cpufreq=hwp;xen,verbose`. This first tries `hwp` and falls back to `xen` if diff --git a/xen/arch/x86/acpi/cpufreq/Makefile b/xen/arch/x86/acpi/cpufreq/Makefile index e7dbe434a8..a2ba34bda0 100644 --- a/xen/arch/x86/acpi/cpufreq/Makefile +++ b/xen/arch/x86/acpi/cpufreq/Makefile @@ -1,4 +1,5 @@ obj-$(CONFIG_INTEL) += acpi.o +obj-$(CONFIG_AMD) += amd-cppc.o obj-y += cpufreq.o obj-$(CONFIG_INTEL) += hwp.o obj-$(CONFIG_AMD) += powernow.o diff --git a/xen/arch/x86/acpi/cpufreq/acpi.c b/xen/arch/x86/acpi/cpufreq/acpi.c index 0c25376406..e0cea9425f 100644 --- a/xen/arch/x86/acpi/cpufreq/acpi.c +++ b/xen/arch/x86/acpi/cpufreq/acpi.c @@ -13,6 +13,7 @@ #include #include +#include #include #include @@ -514,5 +515,16 @@ acpi_cpufreq_driver = { int __init acpi_cpufreq_register(void) { - return cpufreq_register_driver(&acpi_cpufreq_driver); + int ret; + + ret = cpufreq_register_driver(&acpi_cpufreq_driver); + if ( ret ) + return ret; + /* + * After cpufreq driver registeration, XEN_PROCESSOR_PM_CPPC + * and XEN_PROCESSOR_PM_PX shall become exclusive flags + */ + xen_processor_pmbits &= ~XEN_PROCESSOR_PM_CPPC; + + return ret; } diff --git a/xen/arch/x86/acpi/cpufreq/amd-cppc.c b/xen/arch/x86/acpi/cpufreq/amd-cppc.c new file mode 100644 index 0000000000..8a081e5523 --- /dev/null +++ b/xen/arch/x86/acpi/cpufreq/amd-cppc.c @@ -0,0 +1,81 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * amd-cppc.c - AMD Processor CPPC Frequency Driver + * + * Copyright (C) 2025 Advanced Micro Devices, Inc. All Rights Reserved. + * + * Author: Penny Zheng + * + * AMD CPPC cpufreq driver introduces a new CPU performance scaling design + * for AMD processors using the ACPI Collaborative Performance and Power + * Control (CPPC) feature which provides finer grained frequency control range. + */ + +#include +#include +#include +#include + +static bool __init amd_cppc_handle_option(const char *s, const char *end) +{ + int ret; + + ret = parse_boolean("verbose", s, end); + if ( ret >= 0 ) + { + cpufreq_verbose = ret; + return true; + } + + return false; +} + +int __init amd_cppc_cmdline_parse(const char *s, const char *e) +{ + do + { + const char *end = strpbrk(s, ",;"); + + if ( !amd_cppc_handle_option(s, end) ) + { + printk(XENLOG_WARNING + "cpufreq/amd-cppc: option '%.*s' not recognized\n", + (int)((end ?: e) - s), s); + + return -EINVAL; + } + + s = end ? end + 1 : NULL; + } while ( s && s < e ); + + return 0; +} + +static const struct cpufreq_driver __initconst_cf_clobber +amd_cppc_cpufreq_driver = +{ + .name = XEN_AMD_CPPC_DRIVER_NAME, +}; + +int __init amd_cppc_register_driver(void) +{ + int ret; + + if ( !cpu_has_cppc ) + { + xen_processor_pmbits &= ~XEN_PROCESSOR_PM_CPPC; + return -ENODEV; + } + + ret = cpufreq_register_driver(&amd_cppc_cpufreq_driver); + if ( ret ) + return ret; + + /* + * After cpufreq driver registeration, XEN_PROCESSOR_PM_CPPC + * and XEN_PROCESSOR_PM_PX shall become exclusive flags + */ + xen_processor_pmbits &= ~XEN_PROCESSOR_PM_PX; + + return ret; +} diff --git a/xen/arch/x86/acpi/cpufreq/cpufreq.c b/xen/arch/x86/acpi/cpufreq/cpufreq.c index 61e98b67bd..eac1c125a3 100644 --- a/xen/arch/x86/acpi/cpufreq/cpufreq.c +++ b/xen/arch/x86/acpi/cpufreq/cpufreq.c @@ -148,6 +148,10 @@ static int __init cf_check cpufreq_driver_init(void) case CPUFREQ_none: ret = 0; break; + default: + printk(XENLOG_WARNING + "Unsupported cpufreq driver for vendor Intel\n"); + break; } if ( ret != -ENODEV ) @@ -157,7 +161,35 @@ static int __init cf_check cpufreq_driver_init(void) case X86_VENDOR_AMD: case X86_VENDOR_HYGON: - ret = IS_ENABLED(CONFIG_AMD) ? powernow_register_driver() : -ENODEV; + if ( !IS_ENABLED(CONFIG_AMD) ) + { + ret = -ENODEV; + break; + } + ret = -ENOENT; + + for ( unsigned int i = 0; i < cpufreq_xen_cnt; i++ ) + { + switch ( cpufreq_xen_opts[i] ) + { + case CPUFREQ_xen: + ret = powernow_register_driver(); + break; + case CPUFREQ_amd_cppc: + ret = amd_cppc_register_driver(); + break; + case CPUFREQ_none: + ret = 0; + break; + default: + printk(XENLOG_WARNING + "Unsupported cpufreq driver for vendor AMD or Hygon\n"); + break; + } + + if ( ret != -ENODEV ) + break; + } break; } } diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hypercall.c index 49717e9ca9..82663011ad 100644 --- a/xen/arch/x86/platform_hypercall.c +++ b/xen/arch/x86/platform_hypercall.c @@ -542,6 +542,9 @@ ret_t do_platform_op( ret = -ENOSYS; break; } + /* Xen doesn't support mixed mode */ + ASSERT((xen_processor_pmbits & XEN_PROCESSOR_PM_CPPC) == 0); + ret = set_px_pminfo(op->u.set_pminfo.id, &op->u.set_pminfo.u.perf); break; @@ -573,6 +576,14 @@ ret_t do_platform_op( } case XEN_PM_CPPC: + if ( !(xen_processor_pmbits & XEN_PROCESSOR_PM_CPPC) ) + { + ret = -EOPNOTSUPP; + break; + } + /* Xen doesn't support mixed mode */ + ASSERT((xen_processor_pmbits & XEN_PROCESSOR_PM_PX) == 0); + ret = set_cppc_pminfo(op->u.set_pminfo.id, &op->u.set_pminfo.u.cppc_data); break; diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c index 79c6444116..818668c99c 100644 --- a/xen/drivers/cpufreq/cpufreq.c +++ b/xen/drivers/cpufreq/cpufreq.c @@ -65,7 +65,7 @@ LIST_HEAD_READ_MOSTLY(cpufreq_governor_list); /* set xen as default cpufreq */ enum cpufreq_controller cpufreq_controller = FREQCTL_xen; -enum cpufreq_xen_opt __initdata cpufreq_xen_opts[2] = { CPUFREQ_xen, +enum cpufreq_xen_opt __initdata cpufreq_xen_opts[3] = { CPUFREQ_xen, CPUFREQ_none }; unsigned int __initdata cpufreq_xen_cnt = 1; @@ -90,7 +90,8 @@ static int __init handle_cpufreq_cmdline(enum cpufreq_xen_opt option) if ( cpufreq_opts_contain(option) ) { - const char *cpufreq_opts_str[] = { "CPUFREQ_xen", "CPUFREQ_hwp" }; + const char *cpufreq_opts_str[] = { "CPUFREQ_xen", "CPUFREQ_hwp", + "CPUFREQ_amd_cppc" }; printk(XENLOG_WARNING "Duplicate cpufreq driver option: %s", @@ -102,6 +103,9 @@ static int __init handle_cpufreq_cmdline(enum cpufreq_xen_opt option) cpufreq_xen_opts[cpufreq_xen_cnt++] = option; switch ( option ) { + case CPUFREQ_amd_cppc: + xen_processor_pmbits |= XEN_PROCESSOR_PM_CPPC; + break; case CPUFREQ_hwp: case CPUFREQ_xen: xen_processor_pmbits |= XEN_PROCESSOR_PM_PX; @@ -168,6 +172,13 @@ static int __init cf_check setup_cpufreq_option(const char *str) if ( arg[0] && arg[1] ) ret = hwp_cmdline_parse(arg + 1, end); } + else if ( IS_ENABLED(CONFIG_AMD) && choice < 0 && + !cmdline_strcmp(str, "amd-cppc") ) + { + ret = handle_cpufreq_cmdline(CPUFREQ_amd_cppc); + if ( arg[0] && arg[1] ) + ret = amd_cppc_cmdline_parse(arg + 1, end); + } else ret = -EINVAL; diff --git a/xen/include/acpi/cpufreq/cpufreq.h b/xen/include/acpi/cpufreq/cpufreq.h index a3c84143af..83050c58b2 100644 --- a/xen/include/acpi/cpufreq/cpufreq.h +++ b/xen/include/acpi/cpufreq/cpufreq.h @@ -28,8 +28,9 @@ enum cpufreq_xen_opt { CPUFREQ_none, CPUFREQ_xen, CPUFREQ_hwp, + CPUFREQ_amd_cppc, }; -extern enum cpufreq_xen_opt cpufreq_xen_opts[2]; +extern enum cpufreq_xen_opt cpufreq_xen_opts[3]; extern unsigned int cpufreq_xen_cnt; struct cpufreq_governor; @@ -277,4 +278,7 @@ int set_hwp_para(struct cpufreq_policy *policy, int acpi_cpufreq_register(void); +int amd_cppc_cmdline_parse(const char *s, const char *e); +int amd_cppc_register_driver(void); + #endif /* __XEN_CPUFREQ_PM_H__ */ diff --git a/xen/include/acpi/cpufreq/processor_perf.h b/xen/include/acpi/cpufreq/processor_perf.h index f1f4f3138d..1a6591d612 100644 --- a/xen/include/acpi/cpufreq/processor_perf.h +++ b/xen/include/acpi/cpufreq/processor_perf.h @@ -5,6 +5,9 @@ #include #include +/* ability bits */ +#define XEN_PROCESSOR_PM_CPPC 8 + #define XEN_CPPC_INIT 0x40000000U #define XEN_PX_INIT 0x80000000U diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h index b0fec271d3..42997252ef 100644 --- a/xen/include/public/sysctl.h +++ b/xen/include/public/sysctl.h @@ -423,6 +423,7 @@ struct xen_set_cppc_para { uint32_t activity_window; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Apr 2025 07:41:33.8511 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3e74f5c6-9d34-41be-5f6a-08dd7b27c799 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD77.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PPFB3F5C406F We need to bypass construction of px statistic info in cpufreq_statistic_init() for amd-cppc mode, as P-states is not necessary there. Signed-off-by: Penny Zheng --- v3 -> v4: - remove unnecessary stub for cpufreq_statistic_exit() --- xen/drivers/cpufreq/utility.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/drivers/cpufreq/utility.c b/xen/drivers/cpufreq/utility.c index e690a484f1..b35e2eb1b6 100644 --- a/xen/drivers/cpufreq/utility.c +++ b/xen/drivers/cpufreq/utility.c @@ -98,6 +98,9 @@ int cpufreq_statistic_init(unsigned int cpu) if ( !pmpt ) return -EINVAL; + if ( !(pmpt->init & XEN_PX_INIT) ) + return 0; + spin_lock(cpufreq_statistic_lock); pxpt = per_cpu(cpufreq_statistic_data, cpu); From patchwork Mon Apr 14 07:40:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Penny, Zheng" X-Patchwork-Id: 14049874 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C90B6C369B2 for ; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Penny Zheng To: CC: , Penny Zheng , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Subject: [PATCH v4 07/15] xen/cpufreq: fix core frequency calculation for AMD Family 1Ah CPUs Date: Mon, 14 Apr 2025 15:40:48 +0800 Message-ID: <20250414074056.3696888-8-Penny.Zheng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250414074056.3696888-1-Penny.Zheng@amd.com> References: <20250414074056.3696888-1-Penny.Zheng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD74:EE_|PH0PR12MB7982:EE_ X-MS-Office365-Filtering-Correlation-Id: 3a58ff32-fd03-4fa9-3d5f-08dd7b27c8cb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|36860700013; 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In AMD Family 1Ah, Core current operating frequency in MHz is calculated as follows: CoreCOF = Core::X86::Msr::PStateDef[CpuFid[11:0]] * 5MHz We introduce a helper amd_parse_freq() to parse cpu min/nominal/max core frequency from PstateDef register, to replace the original macro FREQ(v). amd_parse_freq() is declared as const, as it mainly consists of mathematical conputation. Signed-off-by: Penny Zheng --- v2 -> v3: - new commit --- v3 -> v4: - introduce amd_parse_freq() and declare it as const - express if-else-arry() as switch() --- xen/arch/x86/cpu/amd.c | 43 +++++++++++++++++++++++++++++++++++------- 1 file changed, 36 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index ce4e1df710..f93dda927e 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -56,6 +56,9 @@ bool __initdata amd_virt_spec_ctrl; static bool __read_mostly fam17_c6_disabled; +static uint64_t attr_const amd_parse_freq(unsigned char c, uint64_t value); +#define INVAL_FREQ_MHZ ~(uint64_t)0 + static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo, unsigned int *hi) { @@ -570,12 +573,35 @@ static void amd_get_topology(struct cpuinfo_x86 *c) : c->cpu_core_id); } +static uint64_t amd_parse_freq(unsigned char c, uint64_t value) +{ + uint64_t freq = INVAL_FREQ_MHZ; + + switch (c) { + case 0x10 ... 0x16: + freq = (((value & 0x3f) + 0x10) * 100) >> ((value >> 6) & 7); + break; + case 0x17 ... 0x19: + freq = ((value & 0xff) * 25 * 8) / ((value >> 8) & 0x3f); + break; + case 0x1A: + freq = (value & 0xfff) * 5; + break; + default: + printk(XENLOG_ERR + "Unsupported cpu familly %c on cpufreq parsing", c); + break; + } + + return freq; +} + void amd_log_freq(const struct cpuinfo_x86 *c) { unsigned int idx = 0, h; uint64_t hi, lo, val; - if (c->x86 < 0x10 || c->x86 > 0x19 || + if (c->x86 < 0x10 || c->x86 > 0x1A || (c != &boot_cpu_data && (!opt_cpu_info || (c->apicid & (c->x86_num_siblings - 1))))) return; @@ -656,19 +682,22 @@ void amd_log_freq(const struct cpuinfo_x86 *c) if (!(lo >> 63)) return; -#define FREQ(v) (c->x86 < 0x17 ? ((((v) & 0x3f) + 0x10) * 100) >> (((v) >> 6) & 7) \ - : (((v) & 0xff) * 25 * 8) / (((v) >> 8) & 0x3f)) if (idx && idx < h && !rdmsr_safe(0xC0010064 + idx, val) && (val >> 63) && !rdmsr_safe(0xC0010064, hi) && (hi >> 63)) printk("CPU%u: %lu (%lu ... %lu) MHz\n", - smp_processor_id(), FREQ(val), FREQ(lo), FREQ(hi)); + smp_processor_id(), + amd_parse_freq(c->x86, val), + amd_parse_freq(c->x86, lo), + amd_parse_freq(c->x86, hi)); else if (h && !rdmsr_safe(0xC0010064, hi) && (hi >> 63)) printk("CPU%u: %lu ... %lu MHz\n", - smp_processor_id(), FREQ(lo), FREQ(hi)); + smp_processor_id(), + amd_parse_freq(c->x86, lo), + amd_parse_freq(c->x86, hi)); else - printk("CPU%u: %lu MHz\n", smp_processor_id(), FREQ(lo)); -#undef FREQ + printk("CPU%u: %lu MHz\n", smp_processor_id(), + amd_parse_freq(c->x86, lo)); } void cf_check early_init_amd(struct cpuinfo_x86 *c) From patchwork Mon Apr 14 07:40:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Penny, Zheng" X-Patchwork-Id: 14049878 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 40F44C369B4 for ; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Apr 2025 07:41:37.8401 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5af51a41-e409-4f17-086e-08dd7b27c9fa X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD74.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB9103 When _CPC table could not provide processor frequency range values for Xen governor, we need to read processor max frequency as anchor point. So we extract amd cpu core frequency calculation logic from amd_log_freq(), and wrap it as a new helper amd_process_freq(). Signed-off-by: Penny Zheng --- v1 -> v2: - new commit --- v3 -> v4 - introduce amd_process_freq() --- xen/arch/x86/cpu/amd.c | 60 +++++++++++++++++++++++----------- xen/arch/x86/include/asm/amd.h | 4 +++ 2 files changed, 45 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index f93dda927e..e875014de9 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -57,7 +57,6 @@ bool __initdata amd_virt_spec_ctrl; static bool __read_mostly fam17_c6_disabled; static uint64_t attr_const amd_parse_freq(unsigned char c, uint64_t value); -#define INVAL_FREQ_MHZ ~(uint64_t)0 static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo, unsigned int *hi) @@ -596,14 +595,13 @@ static uint64_t amd_parse_freq(unsigned char c, uint64_t value) return freq; } -void amd_log_freq(const struct cpuinfo_x86 *c) +void amd_process_freq(const struct cpuinfo_x86 *c, + uint64_t *low_mhz, uint64_t *nom_mhz, uint64_t *hi_mhz) { unsigned int idx = 0, h; uint64_t hi, lo, val; - if (c->x86 < 0x10 || c->x86 > 0x1A || - (c != &boot_cpu_data && - (!opt_cpu_info || (c->apicid & (c->x86_num_siblings - 1))))) + if (c->x86 < 0x10 || c->x86 > 0x1A) return; if (c->x86 < 0x17) { @@ -684,20 +682,21 @@ void amd_log_freq(const struct cpuinfo_x86 *c) if (idx && idx < h && !rdmsr_safe(0xC0010064 + idx, val) && (val >> 63) && - !rdmsr_safe(0xC0010064, hi) && (hi >> 63)) - printk("CPU%u: %lu (%lu ... %lu) MHz\n", - smp_processor_id(), - amd_parse_freq(c->x86, val), - amd_parse_freq(c->x86, lo), - amd_parse_freq(c->x86, hi)); - else if (h && !rdmsr_safe(0xC0010064, hi) && (hi >> 63)) - printk("CPU%u: %lu ... %lu MHz\n", - smp_processor_id(), - amd_parse_freq(c->x86, lo), - amd_parse_freq(c->x86, hi)); - else - printk("CPU%u: %lu MHz\n", smp_processor_id(), - amd_parse_freq(c->x86, lo)); + !rdmsr_safe(0xC0010064, hi) && (hi >> 63)) { + if (nom_mhz) + *nom_mhz = amd_parse_freq(c->x86, val); + if (low_mhz) + *low_mhz = amd_parse_freq(c->x86, lo); + if (hi_mhz) + *hi_mhz = amd_parse_freq(c->x86, hi); + } else if (h && !rdmsr_safe(0xC0010064, hi) && (hi >> 63)) { + if (low_mhz) + *low_mhz = amd_parse_freq(c->x86, lo); + if (hi_mhz) + *hi_mhz = amd_parse_freq(c->x86, hi); + } else + if (low_mhz) + *low_mhz = amd_parse_freq(c->x86, lo); } void cf_check early_init_amd(struct cpuinfo_x86 *c) @@ -708,6 +707,29 @@ void cf_check early_init_amd(struct cpuinfo_x86 *c) ctxt_switch_levelling(NULL); } +void amd_log_freq(const struct cpuinfo_x86 *c) +{ + uint64_t low_mhz, nom_mhz, hi_mhz; + + if (c != &boot_cpu_data && + (!opt_cpu_info || (c->apicid & (c->x86_num_siblings - 1)))) + return; + + low_mhz = nom_mhz = hi_mhz = INVAL_FREQ_MHZ; + amd_process_freq(c, &low_mhz, &nom_mhz, &hi_mhz); + + if (low_mhz != INVAL_FREQ_MHZ && nom_mhz != INVAL_FREQ_MHZ && + hi_mhz != INVAL_FREQ_MHZ) + printk("CPU%u: %lu (%lu ... %lu) MHz\n", + smp_processor_id(), + low_mhz, nom_mhz, hi_mhz); + else if (low_mhz != INVAL_FREQ_MHZ && hi_mhz != INVAL_FREQ_MHZ) + printk("CPU%u: %lu ... %lu MHz\n", + smp_processor_id(), low_mhz, hi_mhz); + else if (low_mhz != INVAL_FREQ_MHZ) + printk("CPU%u: %lu MHz\n", smp_processor_id(), low_mhz); +} + void amd_init_lfence(struct cpuinfo_x86 *c) { uint64_t value; diff --git a/xen/arch/x86/include/asm/amd.h b/xen/arch/x86/include/asm/amd.h index 9c9599a622..9dd3592bbb 100644 --- a/xen/arch/x86/include/asm/amd.h +++ b/xen/arch/x86/include/asm/amd.h @@ -174,4 +174,8 @@ bool amd_setup_legacy_ssbd(void); void amd_set_legacy_ssbd(bool enable); void amd_set_cpuid_user_dis(bool enable); +#define INVAL_FREQ_MHZ ~(uint64_t)0 +void amd_process_freq(const struct cpuinfo_x86 *c, uint64_t *low_mhz, + uint64_t *nom_mhz, uint64_t *hi_mhz); + #endif /* __AMD_H__ */ From patchwork Mon Apr 14 07:40:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Penny, Zheng" X-Patchwork-Id: 14049883 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 95AC6C369B2 for ; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Apr 2025 07:41:39.7958 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 735ac579-4b0a-45dd-74dd-08dd7b27cb24 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8442 amd-cppc is the AMD CPU performance scaling driver that introduces a new CPU frequency control mechanism firstly on AMD Zen based CPU series. The new mechanism is based on Collaborative Processor Performance Control (CPPC) which is a finer grain frequency management than legacy ACPI hardware P-States. Current AMD CPU platforms are using the ACPI P-states driver to manage CPU frequency and clocks with switching only in 3 P-states. The new amd-cppc allows a more flexible, low-latency interface for Xen to directly communicate the performance hints to hardware. The first version "amd-cppc" could leverage common governors such as *ondemand*, *performance*, etc, to manage the performance hints. In the future, we will introduce an advanced active mode to enable autonomous performence level selection. Signed-off-by: Penny Zheng --- v1 -> v2: - re-construct union caps and req to have anonymous struct instead - avoid "else" when the earlier if() ends in an unconditional control flow statement - Add check to avoid chopping off set bits from cast - make pointers pointer-to-const wherever possible - remove noisy log - exclude families before 0x17 before CPPC-feature MSR op - remove useless variable helpers - use xvzalloc and XVFREE - refactor error handling as ENABLE bit can only be cleared by reset --- v2 -> v3: - Move all MSR-definations to msr-index.h and follow the required style - Refactor opening figure braces for struct/union - Sort overlong lines throughout the series - Make offset/res int covering underflow scenario - Error out when amd_max_freq_mhz isn't set - Introduce amd_get_freq(name) macro to decrease redundancy - Supported CPU family checked ahead of smp-function - Nominal freq shall be checked between the [min, max] - Use APERF/MPREF to calculate current frequency - Use amd_cppc_cpufreq_cpu_exit() to tidy error path --- v3 -> v4: - verbose print shall come with a CPU number - deal with res <= 0 in amd_cppc_khz_to_perf() - introduce a single helper amd_get_lowest_or_nominal_freq() to cover both lowest and nominal scenario - reduce abuse of wrmsr_safe()/rdmsr_safe() with wrmsrl()/rdmsrl() - move cf_check from amd_cppc_write_request() to amd_cppc_write_request_msrs() - add comment to explain why setting non_linear_lowest in passive mode - add check to ensure perf values in lowest <= non_linear_lowest <= nominal <= highset - refactor comment for "data->err != 0" scenario - use "data->err" instead of -ENODEV - add U suffixes for all msr macro --- xen/arch/x86/acpi/cpufreq/amd-cppc.c | 393 +++++++++++++++++++++++++++ xen/arch/x86/include/asm/msr-index.h | 5 + 2 files changed, 398 insertions(+) diff --git a/xen/arch/x86/acpi/cpufreq/amd-cppc.c b/xen/arch/x86/acpi/cpufreq/amd-cppc.c index 8a081e5523..2fdfd17f59 100644 --- a/xen/arch/x86/acpi/cpufreq/amd-cppc.c +++ b/xen/arch/x86/acpi/cpufreq/amd-cppc.c @@ -14,7 +14,56 @@ #include #include #include +#include +#include #include +#include +#include + +#define amd_cppc_err(cpu, fmt, args...) \ + printk(XENLOG_ERR "AMD_CPPC: CPU%u error: " fmt, cpu, ## args) +#define amd_cppc_warn(cpu, fmt, args...) \ + printk(XENLOG_WARNING "AMD_CPPC: CPU%u warning: " fmt, cpu, ## args) +#define amd_cppc_verbose(cpu, fmt, args...) \ +({ \ + if ( cpufreq_verbose ) \ + printk(XENLOG_DEBUG "AMD_CPPC: CPU%u " fmt, cpu, ## args); \ +}) + +struct amd_cppc_drv_data +{ + const struct xen_processor_cppc *cppc_data; + union { + uint64_t raw; + struct { + unsigned int lowest_perf:8; + unsigned int lowest_nonlinear_perf:8; + unsigned int nominal_perf:8; + unsigned int highest_perf:8; + unsigned int :32; + }; + } caps; + union { + uint64_t raw; + struct { + unsigned int max_perf:8; + unsigned int min_perf:8; + unsigned int des_perf:8; + unsigned int epp:8; + unsigned int :32; + }; + } req; + + int err; +}; + +static DEFINE_PER_CPU_READ_MOSTLY(struct amd_cppc_drv_data *, + amd_cppc_drv_data); +/* + * Core max frequency read from PstateDef as anchor point + * for freq-to-perf transition + */ +static DEFINE_PER_CPU_READ_MOSTLY(uint64_t, amd_max_pxfreq_mhz); static bool __init amd_cppc_handle_option(const char *s, const char *end) { @@ -51,10 +100,354 @@ int __init amd_cppc_cmdline_parse(const char *s, const char *e) return 0; } +/* + * If CPPC lowest_freq and nominal_freq registers are exposed then we can + * use them to convert perf to freq and vice versa. The conversion is + * extrapolated as an linear function passing by the 2 points: + * - (Low perf, Low freq) + * - (Nominal perf, Nominal freq) + */ +static int amd_cppc_khz_to_perf(const struct amd_cppc_drv_data *data, + unsigned int freq, uint8_t *perf) +{ + const struct xen_processor_cppc *cppc_data = data->cppc_data; + uint64_t mul, div; + int offset = 0, res; + + if ( freq == (cppc_data->cpc.nominal_mhz * 1000) ) + { + *perf = data->caps.nominal_perf; + return 0; + } + + if ( freq == (cppc_data->cpc.lowest_mhz * 1000) ) + { + *perf = data->caps.lowest_perf; + return 0; + } + + if ( cppc_data->cpc.lowest_mhz && cppc_data->cpc.nominal_mhz && + cppc_data->cpc.lowest_mhz < cppc_data->cpc.nominal_mhz ) + { + mul = data->caps.nominal_perf - data->caps.lowest_perf; + div = cppc_data->cpc.nominal_mhz - cppc_data->cpc.lowest_mhz; + + /* + * We don't need to convert to kHz for computing offset and can + * directly use nominal_mhz and lowest_mhz as the division + * will remove the frequency unit. + */ + offset = data->caps.nominal_perf - + (mul * cppc_data->cpc.nominal_mhz) / div; + } + else + { + /* Read Processor Max Speed(MHz) as anchor point */ + mul = data->caps.highest_perf; + div = this_cpu(amd_max_pxfreq_mhz); + if ( !div || div == INVAL_FREQ_MHZ ) + return -EINVAL; + } + + res = offset + (mul * freq) / (div * 1000); + if ( res > UINT8_MAX ) + { + printk_once(XENLOG_WARNING + "Perf value exceeds maximum value 255: %d\n", res); + *perf = 0xff; + return 0; + } else if ( res < 0 ) + { + printk_once(XENLOG_WARNING + "Perf value smaller than minimum value 0: %d\n", res); + *perf = 0; + return 0; + } + *perf = (uint8_t)res; + + return 0; +} + +static int amd_get_lowest_or_nominal_freq(const struct amd_cppc_drv_data *data, + uint32_t cpc_mhz, uint8_t perf, + unsigned int *freq) +{ + uint64_t mul, div, res; + + if ( !freq ) + return -EINVAL; + + if ( cpc_mhz ) + { + /* Switch to khz */ + *freq = cpc_mhz * 1000; + return 0; + } + + /* Read Processor Max Speed(MHz) as anchor point */ + mul = this_cpu(amd_max_pxfreq_mhz); + if ( mul == INVAL_FREQ_MHZ || !mul ) + { + printk(XENLOG_ERR + "Failed to read valid processor max frequency as anchor point: %lu\n", + mul); + return -EINVAL; + } + div = data->caps.highest_perf; + res = (mul * perf * 1000) / div; + + if ( res > UINT_MAX || !res ) + { + printk(XENLOG_ERR + "Frequeny exceeds maximum value UINT_MAX or being zero value: %lu\n", + res); + return -EINVAL; + } + *freq = (unsigned int)res; + + return 0; +} + +static int amd_get_max_freq(const struct amd_cppc_drv_data *data, + unsigned int *max_freq) +{ + unsigned int nom_freq = 0, boost_ratio; + int res; + + res = amd_get_lowest_or_nominal_freq(data, + data->cppc_data->cpc.nominal_mhz, + data->caps.nominal_perf, + &nom_freq); + if ( res ) + return res; + + boost_ratio = (unsigned int)(data->caps.highest_perf / + data->caps.nominal_perf); + *max_freq = nom_freq * boost_ratio; + + return 0; +} + +static int cf_check amd_cppc_cpufreq_verify(struct cpufreq_policy *policy) +{ + cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, + policy->cpuinfo.max_freq); + + return 0; +} + +static void cf_check amd_cppc_write_request_msrs(void *info) +{ + const struct amd_cppc_drv_data *data = info; + + wrmsrl(MSR_AMD_CPPC_REQ, data->req.raw); +} + +static void amd_cppc_write_request(unsigned int cpu, uint8_t min_perf, + uint8_t des_perf, uint8_t max_perf) +{ + struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data, cpu); + uint64_t prev = data->req.raw; + + data->req.min_perf = min_perf; + data->req.max_perf = max_perf; + data->req.des_perf = des_perf; + + if ( prev == data->req.raw ) + return; + + on_selected_cpus(cpumask_of(cpu), amd_cppc_write_request_msrs, data, 1); +} + +static int cf_check amd_cppc_cpufreq_target(struct cpufreq_policy *policy, + unsigned int target_freq, + unsigned int relation) +{ + unsigned int cpu = policy->cpu; + const struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data, cpu); + uint8_t des_perf; + int res; + + if ( unlikely(!target_freq) ) + return 0; + + res = amd_cppc_khz_to_perf(data, target_freq, &des_perf); + if ( res ) + return res; + + /* + * Setting with "lowest_nonlinear_perf" to ensure governoring + * performance in P-state range. + */ + amd_cppc_write_request(policy->cpu, data->caps.lowest_nonlinear_perf, + des_perf, data->caps.highest_perf); + return 0; +} + +static void cf_check amd_cppc_init_msrs(void *info) +{ + struct cpufreq_policy *policy = info; + struct amd_cppc_drv_data *data = this_cpu(amd_cppc_drv_data); + uint64_t val; + unsigned int min_freq = 0, nominal_freq = 0, max_freq; + + /* Package level MSR */ + rdmsrl(MSR_AMD_CPPC_ENABLE, val); + /* + * Only when Enable bit is on, the hardware will calculate the processor’s + * performance capabilities and initialize the performance level fields in + * the CPPC capability registers. + */ + if ( !(val & AMD_CPPC_ENABLE) ) + { + val |= AMD_CPPC_ENABLE; + wrmsrl(MSR_AMD_CPPC_ENABLE, val); + } + + rdmsrl(MSR_AMD_CPPC_CAP1, data->caps.raw); + + if ( data->caps.highest_perf == 0 || data->caps.lowest_perf == 0 || + data->caps.nominal_perf == 0 || data->caps.lowest_nonlinear_perf == 0 || + data->caps.lowest_perf > data->caps.lowest_nonlinear_perf || + data->caps.lowest_nonlinear_perf > data->caps.nominal_perf || + data->caps.nominal_perf > data->caps.highest_perf ) + { + amd_cppc_err(policy->cpu, + "Platform malfunction, read CPPC capability highest(%u), lowest(%u), nominal(%u), lowest_nonlinear(%u) zero value\n", + data->caps.highest_perf, data->caps.lowest_perf, + data->caps.nominal_perf, data->caps.lowest_nonlinear_perf); + goto err; + } + + amd_process_freq(cpu_data + policy->cpu, + NULL, NULL, &this_cpu(amd_max_pxfreq_mhz)); + + data->err = amd_get_lowest_or_nominal_freq(data, + data->cppc_data->cpc.lowest_mhz, + data->caps.lowest_perf, + &min_freq); + if ( data->err ) + return; + + data->err = amd_get_lowest_or_nominal_freq(data, + data->cppc_data->cpc.nominal_mhz, + data->caps.nominal_perf, + &nominal_freq); + if ( data->err ) + return; + + data->err = amd_get_max_freq(data, &max_freq); + if ( data->err ) + return; + + if ( min_freq > nominal_freq || nominal_freq > max_freq ) + { + amd_cppc_err(policy->cpu, + "min(%u), or max(%u), or nominal(%u) freq value is incorrect\n", + min_freq, max_freq, nominal_freq); + goto err; + } + + policy->min = min_freq; + policy->max = max_freq; + + policy->cpuinfo.min_freq = min_freq; + policy->cpuinfo.max_freq = max_freq; + policy->cpuinfo.perf_freq = nominal_freq; + /* + * Set after policy->cpuinfo.perf_freq, as we are taking + * APERF/MPERF average frequency as current frequency. + */ + policy->cur = cpufreq_driver_getavg(policy->cpu, GOV_GETAVG); + + return; + + err: + /* + * No fallback shceme is available here, see more explanation at call + * site in amd_cppc_cpufreq_cpu_init(). + */ + data->err = -EINVAL; +} + +/* + * AMD CPPC driver is different than legacy ACPI hardware P-State, + * which has a finer grain frequency range between the highest and lowest + * frequency. And boost frequency is actually the frequency which is mapped on + * highest performance ratio. The legacy P0 frequency is actually mapped on + * nominal performance ratio. + */ +static void amd_cppc_boost_init(struct cpufreq_policy *policy, + const struct amd_cppc_drv_data *data) +{ + if ( data->caps.highest_perf <= data->caps.nominal_perf ) + return; + + policy->turbo = CPUFREQ_TURBO_ENABLED; +} + +static int cf_check amd_cppc_cpufreq_cpu_exit(struct cpufreq_policy *policy) +{ + XVFREE(per_cpu(amd_cppc_drv_data, policy->cpu)); + + return 0; +} + +static int cf_check amd_cppc_cpufreq_cpu_init(struct cpufreq_policy *policy) +{ + unsigned int cpu = policy->cpu; + struct amd_cppc_drv_data *data; + const struct cpuinfo_x86 *c = cpu_data + cpu; + + data = xvzalloc(struct amd_cppc_drv_data); + if ( !data ) + return -ENOMEM; + + data->cppc_data = &processor_pminfo[cpu]->cppc_data; + + per_cpu(amd_cppc_drv_data, cpu) = data; + + /* Feature CPPC is firstly introduced on Zen2 */ + if ( c->x86 < 0x17 ) + { + printk_once("Unsupported cpu family: %x\n", c->x86); + return -EOPNOTSUPP; + } + + on_selected_cpus(cpumask_of(cpu), amd_cppc_init_msrs, policy, 1); + + /* + * The enable bit is sticky, as we need to enable it at the very first + * begining, before CPPC capability sanity check. + * If error path takes effective, not only amd-cppc cpufreq driver fails + * to initialize, but also we could not fall back to legacy P-states + * driver, irrespective of the command line specifying a fallback option. + */ + if ( data->err ) + { + amd_cppc_err(cpu, "Could not initialize AMD CPPC MSR properly\n"); + amd_cppc_cpufreq_cpu_exit(policy); + return data->err; + } + + policy->governor = cpufreq_opt_governor ? : CPUFREQ_DEFAULT_GOVERNOR; + + amd_cppc_boost_init(policy, data); + + amd_cppc_verbose(policy->cpu, + "CPU initialized with amd-cppc passive mode\n"); + + return 0; +} + static const struct cpufreq_driver __initconst_cf_clobber amd_cppc_cpufreq_driver = { .name = XEN_AMD_CPPC_DRIVER_NAME, + .verify = amd_cppc_cpufreq_verify, + .target = amd_cppc_cpufreq_target, + .init = amd_cppc_cpufreq_cpu_init, + .exit = amd_cppc_cpufreq_cpu_exit, }; int __init amd_cppc_register_driver(void) diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h index 22d9e76e55..3ffa613df0 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -238,6 +238,11 @@ #define MSR_AMD_CSTATE_CFG 0xc0010296U +#define MSR_AMD_CPPC_CAP1 0xc00102b0U +#define MSR_AMD_CPPC_ENABLE 0xc00102b1U +#define AMD_CPPC_ENABLE (_AC(1, ULL) << 0) +#define MSR_AMD_CPPC_REQ 0xc00102b3U + /* * Legacy MSR constants in need of cleanup. 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Consequently, when it is used, the driver's -> setpolicy() callback is invoked to register per-CPU utilization update callbacks, not the ->target() callback. So, only when cpufreq_driver.setpolicy is NULL, we need to deliberately set old gov as NULL to trigger the according gov starting. Signed-off-by: Penny Zheng Reviewed-by: Jan Beulich --- v3 -> v4: - fix indentation and this commit is independent of all earlier patches --- xen/drivers/cpufreq/cpufreq.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c index 818668c99c..2e392110d8 100644 --- a/xen/drivers/cpufreq/cpufreq.c +++ b/xen/drivers/cpufreq/cpufreq.c @@ -396,7 +396,13 @@ int cpufreq_add_cpu(unsigned int cpu) domain_info.num_processors) ) { memcpy(&new_policy, policy, sizeof(struct cpufreq_policy)); - policy->governor = NULL; + + /* + * Only when cpufreq_driver.setpolicy == NULL, we need to deliberately + * set old gov as NULL to trigger the according gov starting. + */ + if ( cpufreq_driver.setpolicy == NULL ) + policy->governor = NULL; cpufreq_cmdline_common_para(&new_policy); From patchwork Mon Apr 14 07:40:52 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Penny, Zheng" X-Patchwork-Id: 14049888 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 148D3C369B2 for ; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Penny Zheng To: CC: , Penny Zheng , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , "Julien Grall" , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4 11/15] xen/x86: implement EPP support for the amd-cppc driver in active mode Date: Mon, 14 Apr 2025 15:40:52 +0800 Message-ID: <20250414074056.3696888-12-Penny.Zheng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250414074056.3696888-1-Penny.Zheng@amd.com> References: <20250414074056.3696888-1-Penny.Zheng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD7A:EE_|LV2PR12MB5968:EE_ X-MS-Office365-Filtering-Correlation-Id: 3cf8dadf-b36a-4952-05a7-08dd7b27cdc0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|1800799024|376014; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Apr 2025 07:41:44.1708 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3cf8dadf-b36a-4952-05a7-08dd7b27cdc0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5968 amd-cppc has 2 operation modes: autonomous (active) mode, non-autonomous (passive) mode. In active mode, platform ignores the requestd done in the Desired Performance Target register and takes into account only the values set to the minimum, maximum and energy performance preference(EPP) registers. The EPP is used in the CCLK DPM controller to drive the frequency that a core is going to operate during short periods of activity. The SOC EPP targets are configured on a scale from 0 to 255 where 0 represents maximum performance and 255 represents maximum efficiency. We implement a new AMD CPU frequency driver `amd-cppc-epp` for active mode. It requires `active` tag for users to explicitly select active mode. In driver `active-cppc-epp`, ->setpolicy() is hooked, not the ->target(), as it does not depend on xen governor to do performance tuning. Signed-off-by: Penny Zheng --- v1 -> v2: - Remove redundant epp_mode - Remove pointless initializer - Define sole caller read_epp_init_once and epp_init value to read pre-defined BIOS epp value only once - Combine the commit "xen/cpufreq: introduce policy type when cpufreq_driver->setpolicy exists" --- v2 -> v3: - Combined with commit "x86/cpufreq: add "cpufreq=amd-cppc,active" para" - Refactor doc about "active mode" - Change opt_cpufreq_active to opt_active_mode - Let caller pass epp_init when unspecified to allow the function parameter to be of uint8_t - Make epp_init per-cpu value --- v3 -> v4: - doc refinement - use MASK_EXTR() to get epp value - fix indentation - replace if-else() with switch() - combine successive comments and do refinement - no need to introduce amd_cppc_epp_update_limit() as a wrapper - rename cpufreq_parse_policy() with cpufreq_policy_from_governor() - no need to use case-insensitive comparison --- docs/misc/xen-command-line.pandoc | 8 +- xen/arch/x86/acpi/cpufreq/amd-cppc.c | 121 ++++++++++++++++++++++++++- xen/arch/x86/include/asm/msr-index.h | 1 + xen/drivers/cpufreq/utility.c | 11 +++ xen/include/acpi/cpufreq/cpufreq.h | 12 +++ xen/include/public/sysctl.h | 1 + 6 files changed, 149 insertions(+), 5 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 9ef847a336..09f5cb452f 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -515,7 +515,7 @@ If set, force use of the performance counters for oprofile, rather than detectin available support. ### cpufreq -> `= none | {{ | xen } { [:[powersave|performance|ondemand|userspace][,[]][,[]]] } [,verbose]} | dom0-kernel | hwp[:[][,verbose]] | amd-cppc[:[verbose]]` +> `= none | {{ | xen } { [:[powersave|performance|ondemand|userspace][,[]][,[]]] } [,verbose]} | dom0-kernel | hwp[:[][,verbose]] | amd-cppc[:[active][,verbose]]` > Default: `xen` @@ -537,6 +537,12 @@ choice of `dom0-kernel` is deprecated and not supported by all Dom0 kernels. * `amd-cppc` selects ACPI Collaborative Performance and Power Control (CPPC) on supported AMD hardware to provide finer grained frequency control mechanism. The default is disabled. +* `active` is to enable amd-cppc driver in active(autonomous) mode. In this + mode, users could write to energy performance preference register(epp) to + tell hardware if they want to bias toward performance or energy efficiency. + Then built-in CPPC power algorithm will calculate the runtime workload and + adjust cores frequency automatically according to the power supply, thermal, + core voltage and some other hardware conditions. There is also support for `;`-separated fallback options: `cpufreq=hwp;xen,verbose`. This first tries `hwp` and falls back to `xen` if diff --git a/xen/arch/x86/acpi/cpufreq/amd-cppc.c b/xen/arch/x86/acpi/cpufreq/amd-cppc.c index 2fdfd17f59..3a576fd4be 100644 --- a/xen/arch/x86/acpi/cpufreq/amd-cppc.c +++ b/xen/arch/x86/acpi/cpufreq/amd-cppc.c @@ -30,6 +30,9 @@ printk(XENLOG_DEBUG "AMD_CPPC: CPU%u " fmt, cpu, ## args); \ }) +static bool __ro_after_init opt_active_mode; +static DEFINE_PER_CPU_READ_MOSTLY(uint8_t, epp_init); + struct amd_cppc_drv_data { const struct xen_processor_cppc *cppc_data; @@ -76,6 +79,13 @@ static bool __init amd_cppc_handle_option(const char *s, const char *end) return true; } + ret = parse_boolean("active", s, end); + if ( ret >= 0 ) + { + opt_active_mode = ret; + return true; + } + return false; } @@ -244,11 +254,18 @@ static void cf_check amd_cppc_write_request_msrs(void *info) } static void amd_cppc_write_request(unsigned int cpu, uint8_t min_perf, - uint8_t des_perf, uint8_t max_perf) + uint8_t des_perf, uint8_t max_perf, + uint8_t epp) { struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data, cpu); uint64_t prev = data->req.raw; + if ( !opt_active_mode ) + data->req.des_perf = des_perf; + else + data->req.des_perf = 0; + data->req.epp = epp; + data->req.min_perf = min_perf; data->req.max_perf = max_perf; data->req.des_perf = des_perf; @@ -259,6 +276,14 @@ static void amd_cppc_write_request(unsigned int cpu, uint8_t min_perf, on_selected_cpus(cpumask_of(cpu), amd_cppc_write_request_msrs, data, 1); } +static void read_epp_init(void) +{ + uint64_t val; + + rdmsrl(MSR_AMD_CPPC_REQ, val); + this_cpu(epp_init) = MASK_EXTR(val, AMD_CPPC_EPP_MASK); +} + static int cf_check amd_cppc_cpufreq_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation) @@ -280,7 +305,10 @@ static int cf_check amd_cppc_cpufreq_target(struct cpufreq_policy *policy, * performance in P-state range. */ amd_cppc_write_request(policy->cpu, data->caps.lowest_nonlinear_perf, - des_perf, data->caps.highest_perf); + des_perf, data->caps.highest_perf, + /* Pre-defined BIOS value for passive mode */ + per_cpu(epp_init, policy->cpu)); + return 0; } @@ -360,6 +388,8 @@ static void cf_check amd_cppc_init_msrs(void *info) */ policy->cur = cpufreq_driver_getavg(policy->cpu, GOV_GETAVG); + read_epp_init(); + return; err: @@ -393,7 +423,7 @@ static int cf_check amd_cppc_cpufreq_cpu_exit(struct cpufreq_policy *policy) return 0; } -static int cf_check amd_cppc_cpufreq_cpu_init(struct cpufreq_policy *policy) +static int amd_cppc_cpufreq_init_perf(struct cpufreq_policy *policy) { unsigned int cpu = policy->cpu; struct amd_cppc_drv_data *data; @@ -434,12 +464,82 @@ static int cf_check amd_cppc_cpufreq_cpu_init(struct cpufreq_policy *policy) amd_cppc_boost_init(policy, data); + return 0; +} + +static int cf_check amd_cppc_cpufreq_cpu_init(struct cpufreq_policy *policy) +{ + int ret; + + ret = amd_cppc_cpufreq_init_perf(policy); + if ( ret ) + return ret; + amd_cppc_verbose(policy->cpu, "CPU initialized with amd-cppc passive mode\n"); return 0; } +static int cf_check amd_cppc_epp_cpu_init(struct cpufreq_policy *policy) +{ + int ret; + + ret = amd_cppc_cpufreq_init_perf(policy); + if ( ret ) + return ret; + + policy->policy = cpufreq_policy_from_governor(policy->governor); + + amd_cppc_verbose(policy->cpu, + "CPU initialized with amd-cppc active mode\n"); + + return 0; +} + +static int cf_check amd_cppc_epp_set_policy(struct cpufreq_policy *policy) +{ + const struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data, + policy->cpu); + uint8_t max_perf, min_perf, epp; + + /* + * Initial min/max values for CPPC Performance Controls Register. + * Continuous CPPC performance scale in active mode is [lowest_perf, + * highest_perf] + */ + max_perf = data->caps.highest_perf; + min_perf = data->caps.lowest_perf; + + /* + * As min_perf sets the idle frequency and max_perf sets the maximum + * frequency, we make min_perf equal with max_perf in performance mode + * and lower max_perf to the nominal perf in powersave mode, to achieve + * ultmost performance and efficiency in each mode. + */ + switch ( policy->policy ) + { + case CPUFREQ_POLICY_PERFORMANCE: + /* Force the epp value to be zero for performance policy */ + epp = CPPC_ENERGY_PERF_MAX_PERFORMANCE; + min_perf = max_perf; + break; + case CPUFREQ_POLICY_POWERSAVE: + /* Force the epp value to be 0xff for powersave policy */ + epp = CPPC_ENERGY_PERF_MAX_POWERSAVE; + max_perf = data->caps.nominal_perf; + break; + default: + epp = per_cpu(epp_init, policy->cpu); + break; + } + + amd_cppc_write_request(policy->cpu, min_perf, + 0 /* no des_perf for epp mode */, + max_perf, epp); + return 0; +} + static const struct cpufreq_driver __initconst_cf_clobber amd_cppc_cpufreq_driver = { @@ -450,6 +550,16 @@ amd_cppc_cpufreq_driver = .exit = amd_cppc_cpufreq_cpu_exit, }; +static const struct cpufreq_driver __initconst_cf_clobber +amd_cppc_epp_driver = +{ + .name = XEN_AMD_CPPC_EPP_DRIVER_NAME, + .verify = amd_cppc_cpufreq_verify, + .setpolicy = amd_cppc_epp_set_policy, + .init = amd_cppc_epp_cpu_init, + .exit = amd_cppc_cpufreq_cpu_exit, +}; + int __init amd_cppc_register_driver(void) { int ret; @@ -460,7 +570,10 @@ int __init amd_cppc_register_driver(void) return -ENODEV; } - ret = cpufreq_register_driver(&amd_cppc_cpufreq_driver); + if ( opt_active_mode ) + ret = cpufreq_register_driver(&amd_cppc_epp_driver); + else + ret = cpufreq_register_driver(&amd_cppc_cpufreq_driver); if ( ret ) return ret; diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h index 3ffa613df0..d29d1d33aa 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -242,6 +242,7 @@ #define MSR_AMD_CPPC_ENABLE 0xc00102b1U #define AMD_CPPC_ENABLE (_AC(1, ULL) << 0) #define MSR_AMD_CPPC_REQ 0xc00102b3U +#define AMD_CPPC_EPP_MASK (_AC(0xff, ULL) << 24) /* * Legacy MSR constants in need of cleanup. No new MSRs below this comment. diff --git a/xen/drivers/cpufreq/utility.c b/xen/drivers/cpufreq/utility.c index b35e2eb1b6..2617581125 100644 --- a/xen/drivers/cpufreq/utility.c +++ b/xen/drivers/cpufreq/utility.c @@ -487,3 +487,14 @@ int __cpufreq_set_policy(struct cpufreq_policy *data, return __cpufreq_governor(data, CPUFREQ_GOV_LIMITS); } + +unsigned int cpufreq_policy_from_governor(const struct cpufreq_governor *gov) +{ + if ( !strncmp(gov->name, "performance", CPUFREQ_NAME_LEN) ) + return CPUFREQ_POLICY_PERFORMANCE; + + if ( !strncmp(gov->name, "powersave", CPUFREQ_NAME_LEN) ) + return CPUFREQ_POLICY_POWERSAVE; + + return CPUFREQ_POLICY_UNKNOWN; +} diff --git a/xen/include/acpi/cpufreq/cpufreq.h b/xen/include/acpi/cpufreq/cpufreq.h index 83050c58b2..6f31009e82 100644 --- a/xen/include/acpi/cpufreq/cpufreq.h +++ b/xen/include/acpi/cpufreq/cpufreq.h @@ -83,6 +83,7 @@ struct cpufreq_policy { int8_t turbo; /* tristate flag: 0 for unsupported * -1 for disable, 1 for enabled * See CPUFREQ_TURBO_* below for defines */ + unsigned int policy; /* CPUFREQ_POLICY_* */ }; DECLARE_PER_CPU(struct cpufreq_policy *, cpufreq_cpu_policy); @@ -133,6 +134,17 @@ extern int cpufreq_register_governor(struct cpufreq_governor *governor); extern struct cpufreq_governor *__find_governor(const char *governor); #define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_dbs +#define CPUFREQ_POLICY_UNKNOWN 0 +/* + * If cpufreq_driver->target() exists, the ->governor decides what frequency + * within the limits is used. If cpufreq_driver->setpolicy() exists, these + * two generic policies are available: + */ +#define CPUFREQ_POLICY_POWERSAVE 1 +#define CPUFREQ_POLICY_PERFORMANCE 2 + +unsigned int cpufreq_policy_from_governor(const struct cpufreq_governor *gov); + /* pass a target to the cpufreq driver */ extern int __cpufreq_driver_target(struct cpufreq_policy *policy, unsigned int target_freq, diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h index 42997252ef..fa431fd983 100644 --- a/xen/include/public/sysctl.h +++ b/xen/include/public/sysctl.h @@ -424,6 +424,7 @@ struct xen_set_cppc_para { }; #define XEN_AMD_CPPC_DRIVER_NAME "amd-cppc" +#define XEN_AMD_CPPC_EPP_DRIVER_NAME "amd-cppc-epp" #define XEN_HWP_DRIVER_NAME "hwp" /* From patchwork Mon Apr 14 07:40:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Penny, Zheng" X-Patchwork-Id: 14049892 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A8923C369B4 for ; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Penny Zheng To: CC: , Penny Zheng , Anthony PERARD , Jan Beulich Subject: [PATCH v4 12/15] tools/xenpm: Print CPPC parameters for amd-cppc driver Date: Mon, 14 Apr 2025 15:40:53 +0800 Message-ID: <20250414074056.3696888-13-Penny.Zheng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250414074056.3696888-1-Penny.Zheng@amd.com> References: <20250414074056.3696888-1-Penny.Zheng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD75:EE_|SA3PR12MB9107:EE_ X-MS-Office365-Filtering-Correlation-Id: e6007686-9095-4eee-f880-08dd7b27ced4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|36860700013; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Apr 2025 07:41:45.9858 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e6007686-9095-4eee-f880-08dd7b27ced4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD75.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB9107 HWP, amd-cppc, amd-cppc-epp are all the implementation of ACPI CPPC (Collaborative Processor Performace Control), so we introduce cppc_mode flag to print CPPC-related para. And HWP and amd-cppc-epp are both governor-less driver, so we introduce hw_auto flag to bypass governor-related print. Validation check on `xenpm get-cpufreq-para` shall also consider CPPC scenario. Signed-off-by: Penny Zheng --- v3 -> v4: - Include validation check fix here --- tools/misc/xenpm.c | 18 ++++++++++++++---- xen/drivers/acpi/pmstat.c | 7 ++++--- 2 files changed, 18 insertions(+), 7 deletions(-) diff --git a/tools/misc/xenpm.c b/tools/misc/xenpm.c index db658ebadd..29fffebebd 100644 --- a/tools/misc/xenpm.c +++ b/tools/misc/xenpm.c @@ -790,9 +790,18 @@ static unsigned int calculate_activity_window(const xc_cppc_para_t *cppc, /* print out parameters about cpu frequency */ static void print_cpufreq_para(int cpuid, struct xc_get_cpufreq_para *p_cpufreq) { - bool hwp = strcmp(p_cpufreq->scaling_driver, XEN_HWP_DRIVER_NAME) == 0; + bool cppc_mode = false, hw_auto = false; int i; + if ( !strcmp(p_cpufreq->scaling_driver, XEN_HWP_DRIVER_NAME) || + !strcmp(p_cpufreq->scaling_driver, XEN_AMD_CPPC_DRIVER_NAME) || + !strcmp(p_cpufreq->scaling_driver, XEN_AMD_CPPC_EPP_DRIVER_NAME) ) + cppc_mode = true; + + if ( !strcmp(p_cpufreq->scaling_driver, XEN_HWP_DRIVER_NAME) || + !strcmp(p_cpufreq->scaling_driver, XEN_AMD_CPPC_EPP_DRIVER_NAME) ) + hw_auto = true; + printf("cpu id : %d\n", cpuid); printf("affected_cpus :"); @@ -800,7 +809,7 @@ static void print_cpufreq_para(int cpuid, struct xc_get_cpufreq_para *p_cpufreq) printf(" %d", p_cpufreq->affected_cpus[i]); printf("\n"); - if ( hwp ) + if ( hw_auto ) printf("cpuinfo frequency : base [%"PRIu32"] max [%"PRIu32"]\n", p_cpufreq->cpuinfo_min_freq, p_cpufreq->cpuinfo_max_freq); @@ -812,7 +821,7 @@ static void print_cpufreq_para(int cpuid, struct xc_get_cpufreq_para *p_cpufreq) printf("scaling_driver : %s\n", p_cpufreq->scaling_driver); - if ( hwp ) + if ( cppc_mode ) { const xc_cppc_para_t *cppc = &p_cpufreq->u.cppc_para; @@ -838,7 +847,8 @@ static void print_cpufreq_para(int cpuid, struct xc_get_cpufreq_para *p_cpufreq) cppc->desired, cppc->desired ? "" : " hw autonomous"); } - else + + if ( !hw_auto ) { if ( p_cpufreq->gov_num ) printf("scaling_avail_gov : %s\n", diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c index 767594908c..0e90ffcc19 100644 --- a/xen/drivers/acpi/pmstat.c +++ b/xen/drivers/acpi/pmstat.c @@ -201,7 +201,7 @@ static int get_cpufreq_para(struct xen_sysctl_pm_op *op) pmpt = processor_pminfo[op->cpuid]; policy = per_cpu(cpufreq_cpu_policy, op->cpuid); - if ( !pmpt || !pmpt->perf.states || + if ( !pmpt || ((pmpt->init & XEN_PX_INIT) && !pmpt->perf.states) || !policy || !policy->governor ) return -EINVAL; @@ -461,9 +461,10 @@ int do_pm_op(struct xen_sysctl_pm_op *op) switch ( op->cmd & PM_PARA_CATEGORY_MASK ) { case CPUFREQ_PARA: - if ( !(xen_processor_pmbits & XEN_PROCESSOR_PM_PX) ) + if ( !(xen_processor_pmbits & (XEN_PROCESSOR_PM_PX | + XEN_PROCESSOR_PM_CPPC)) ) return -ENODEV; - if ( !pmpt || !(pmpt->init & XEN_PX_INIT) ) + if ( !pmpt || !(pmpt->init & (XEN_PX_INIT | XEN_CPPC_INIT)) ) return -EINVAL; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Apr 2025 07:41:47.9771 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c70c26d9-e38e-4568-d466-08dd7b27d004 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD79.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4213 In `xenpm get-cpufreq-para `, para scaling_available_frequencies only has meaningful value when cpufreq driver in legacy P-states mode. So we drop the "has_num" condition check, and mirror the ->gov_num check for both ->freq_num and ->cpu_num in xc_get_cpufreq_para(). In get_cpufreq_para(), add "freq_num" check to avoid copying data to op->u.get_para.scaling_available_frequencies in CPPC mode. Signed-off-by: Penny Zheng --- v3 -> v4: - drop the "has_num" condition check --- tools/libs/ctrl/xc_pm.c | 45 +++++++++++++++++++++------------------ xen/drivers/acpi/pmstat.c | 11 ++++++---- 2 files changed, 31 insertions(+), 25 deletions(-) diff --git a/tools/libs/ctrl/xc_pm.c b/tools/libs/ctrl/xc_pm.c index ff7b5ada05..2089aa41b3 100644 --- a/tools/libs/ctrl/xc_pm.c +++ b/tools/libs/ctrl/xc_pm.c @@ -212,34 +212,39 @@ int xc_get_cpufreq_para(xc_interface *xch, int cpuid, DECLARE_NAMED_HYPERCALL_BOUNCE(scaling_available_governors, user_para->scaling_available_governors, user_para->gov_num * CPUFREQ_NAME_LEN * sizeof(char), XC_HYPERCALL_BUFFER_BOUNCE_BOTH); - bool has_num = user_para->cpu_num && user_para->freq_num; - if ( has_num ) + if ( (user_para->cpu_num && !user_para->affected_cpus) || + (user_para->freq_num && !user_para->scaling_available_frequencies) || + (user_para->gov_num && !user_para->scaling_available_governors) ) + { + errno = EINVAL; + return -1; + } + if ( user_para->cpu_num ) { - if ( (!user_para->affected_cpus) || - (!user_para->scaling_available_frequencies) || - (user_para->gov_num && !user_para->scaling_available_governors) ) - { - errno = EINVAL; - return -1; - } ret = xc_hypercall_bounce_pre(xch, affected_cpus); if ( ret ) return ret; + } + if ( user_para->freq_num ) + { ret = xc_hypercall_bounce_pre(xch, scaling_available_frequencies); if ( ret ) goto unlock_2; - if ( user_para->gov_num ) - ret = xc_hypercall_bounce_pre(xch, scaling_available_governors); - if ( ret ) - goto unlock_3; + } + if ( user_para->gov_num ) + ret = xc_hypercall_bounce_pre(xch, scaling_available_governors); + if ( ret ) + goto unlock_3; + if ( user_para->cpu_num ) set_xen_guest_handle(sys_para->affected_cpus, affected_cpus); - set_xen_guest_handle(sys_para->scaling_available_frequencies, scaling_available_frequencies); - if ( user_para->gov_num ) - set_xen_guest_handle(sys_para->scaling_available_governors, - scaling_available_governors); - } + if ( user_para->freq_num ) + set_xen_guest_handle(sys_para->scaling_available_frequencies, + scaling_available_frequencies); + if ( user_para->gov_num ) + set_xen_guest_handle(sys_para->scaling_available_governors, + scaling_available_governors); sysctl.cmd = XEN_SYSCTL_pm_op; sysctl.u.pm_op.cmd = GET_CPUFREQ_PARA; @@ -258,9 +263,7 @@ int xc_get_cpufreq_para(xc_interface *xch, int cpuid, user_para->gov_num = sys_para->gov_num; } - if ( has_num ) - goto unlock_4; - return ret; + goto unlock_4; } else { diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c index 0e90ffcc19..83cfef398e 100644 --- a/xen/drivers/acpi/pmstat.c +++ b/xen/drivers/acpi/pmstat.c @@ -228,10 +228,13 @@ static int get_cpufreq_para(struct xen_sysctl_pm_op *op) ret = copy_to_guest(op->u.get_para.affected_cpus, data, op->u.get_para.cpu_num); - for ( i = 0; i < op->u.get_para.freq_num; i++ ) - data[i] = pmpt->perf.states[i].core_frequency * 1000; - ret += copy_to_guest(op->u.get_para.scaling_available_frequencies, - data, op->u.get_para.freq_num); + if ( op->u.get_para.freq_num ) + { + for ( i = 0; i < op->u.get_para.freq_num; i++ ) + data[i] = pmpt->perf.states[i].core_frequency * 1000; + ret += copy_to_guest(op->u.get_para.scaling_available_frequencies, + data, op->u.get_para.freq_num); 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h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=jQ6IKFwoOiNVPqUnYMNxWzVc31zW/m6vlk2dZys3K5Q=; b=Id9zIId1p+qRHDUb9RldAz0CZCnd163Kqrg3cThKYS3YQmWvIOreA83b76A38HP39RxT8Xn6T3kWtUS+V2KeWheeWpP68W2hqHahXkKJMX7v3xat+dEB1/g+T0gihWGxAfuWK8Jfu0TBFzgXbSg/xDqNw6h1dPSiclJgjXi5D0o= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Penny Zheng To: CC: , Penny Zheng , Anthony PERARD Subject: [PATCH v4 14/15] tools/xenpm: remove px_cap dependency check for average frequency Date: Mon, 14 Apr 2025 15:40:55 +0800 Message-ID: <20250414074056.3696888-15-Penny.Zheng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250414074056.3696888-1-Penny.Zheng@amd.com> References: <20250414074056.3696888-1-Penny.Zheng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD78:EE_|LV2PR12MB5821:EE_ X-MS-Office365-Filtering-Correlation-Id: 678c420f-26bf-4cc7-ba00-08dd7b27d0fa X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|376014|1800799024; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Apr 2025 07:41:49.5730 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 678c420f-26bf-4cc7-ba00-08dd7b27d0fa X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD78.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5821 In `xenpm start` command, the monitor of average frequency shall not depend on the existence of legacy P-states, so removing "px_cap" dependancy check. Signed-off-by: Penny Zheng --- v3 -> v4: - new commit --- tools/misc/xenpm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/misc/xenpm.c b/tools/misc/xenpm.c index 29fffebebd..b823e5c433 100644 --- a/tools/misc/xenpm.c +++ b/tools/misc/xenpm.c @@ -539,7 +539,7 @@ static void signal_int_handler(int signo) res / 1000000UL, 100UL * res / (double)sum_px[i]); } } - if ( px_cap && avgfreq[i] ) + if ( avgfreq[i] ) printf(" Avg freq\t%d\tKHz\n", avgfreq[i]); } From patchwork Mon Apr 14 07:40:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Penny, Zheng" X-Patchwork-Id: 14049890 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 97391C369B4 for ; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Apr 2025 07:41:51.5901 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e6c43744-ebba-49d2-20f1-08dd7b27d22c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD74.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7528 Introduce helper set_amd_cppc_para and get_amd_cppc_para to SET/GET CPPC-related para for amd-cppc/amd-cppc-epp driver. Signed-off-by: Penny Zheng --- v1 -> v2: - Give the variable des_perf an initializer of 0 - Use the strncmp()s directly in the if() --- v3 -> v4 - refactor comments - remove double blank lines - replace amd_cppc_in_use flag with XEN_PROCESSOR_PM_CPPC --- xen/arch/x86/acpi/cpufreq/amd-cppc.c | 121 +++++++++++++++++++++++++++ xen/drivers/acpi/pmstat.c | 22 ++++- xen/include/acpi/cpufreq/cpufreq.h | 4 + 3 files changed, 143 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/acpi/cpufreq/amd-cppc.c b/xen/arch/x86/acpi/cpufreq/amd-cppc.c index 3a576fd4be..95d04bf77a 100644 --- a/xen/arch/x86/acpi/cpufreq/amd-cppc.c +++ b/xen/arch/x86/acpi/cpufreq/amd-cppc.c @@ -540,6 +540,127 @@ static int cf_check amd_cppc_epp_set_policy(struct cpufreq_policy *policy) return 0; } +int get_amd_cppc_para(unsigned int cpu, + struct xen_cppc_para *cppc_para) +{ + const struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data, cpu); + + if ( data == NULL ) + return -ENODATA; + + cppc_para->features = 0; + cppc_para->lowest = data->caps.lowest_perf; + cppc_para->lowest_nonlinear = data->caps.lowest_nonlinear_perf; + cppc_para->nominal = data->caps.nominal_perf; + cppc_para->highest = data->caps.highest_perf; + cppc_para->minimum = data->req.min_perf; + cppc_para->maximum = data->req.max_perf; + cppc_para->desired = data->req.des_perf; + cppc_para->energy_perf = data->req.epp; + + return 0; +} + +int set_amd_cppc_para(const struct cpufreq_policy *policy, + const struct xen_set_cppc_para *set_cppc) +{ + unsigned int cpu = policy->cpu; + struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data, cpu); + uint8_t max_perf, min_perf, des_perf = 0, epp; + + if ( data == NULL ) + return -ENOENT; + + /* Validate all parameters - Disallow reserved bits. */ + if ( set_cppc->minimum > UINT8_MAX || set_cppc->maximum > UINT8_MAX || + set_cppc->desired > UINT8_MAX || set_cppc->energy_perf > UINT8_MAX ) + return -EINVAL; + + /* Only allow values if params bit is set. */ + if ( (!(set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED) && + set_cppc->desired) || + (!(set_cppc->set_params & XEN_SYSCTL_CPPC_SET_MINIMUM) && + set_cppc->minimum) || + (!(set_cppc->set_params & XEN_SYSCTL_CPPC_SET_MAXIMUM) && + set_cppc->maximum) || + (!(set_cppc->set_params & XEN_SYSCTL_CPPC_SET_ENERGY_PERF) && + set_cppc->energy_perf) ) + return -EINVAL; + + /* Activity window not supported in MSR */ + if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_ACT_WINDOW ) + return -EOPNOTSUPP; + + /* Return if there is nothing to do. */ + if ( set_cppc->set_params == 0 ) + return 0; + + epp = per_cpu(epp_init, cpu); + /* + * Apply presets: + * XEN_SYSCTL_CPPC_SET_DESIRED reflects whether desired perf is set, which + * is also the flag to distiguish between passive mode and active mode. + * When it is set, CPPC in passive mode, only + * XEN_SYSCTL_CPPC_SET_PRESET_NONE could be chosen, where min_perf = + * lowest_nonlinear_perf to ensures performance in P-state range. + * when it is not set, CPPC in active mode, three different profile + * XEN_SYSCTL_CPPC_SET_PRESET_POWERSAVE/PERFORMANCE/BALANCE are provided, + * where min_perf = lowest_perf having T-state range of performance. + */ + switch ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_PRESET_MASK ) + { + case XEN_SYSCTL_CPPC_SET_PRESET_POWERSAVE: + if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED ) + return -EINVAL; + min_perf = data->caps.lowest_perf; + /* Lower max frequency to nominal */ + max_perf = data->caps.nominal_perf; + epp = CPPC_ENERGY_PERF_MAX_POWERSAVE; + break; + + case XEN_SYSCTL_CPPC_SET_PRESET_PERFORMANCE: + if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED ) + return -EINVAL; + /* Increase idle frequency to highest */ + min_perf = data->caps.highest_perf; + max_perf = data->caps.highest_perf; + epp = CPPC_ENERGY_PERF_MAX_PERFORMANCE; + break; + + case XEN_SYSCTL_CPPC_SET_PRESET_BALANCE: + if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED ) + return -EINVAL; + min_perf = data->caps.lowest_perf; + max_perf = data->caps.highest_perf; + epp = CPPC_ENERGY_PERF_BALANCE; + break; + + case XEN_SYSCTL_CPPC_SET_PRESET_NONE: + min_perf = data->caps.lowest_nonlinear_perf; + max_perf = data->caps.highest_perf; + break; + + default: + return -EINVAL; + } + + /* Further customize presets if needed */ + if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_MINIMUM ) + min_perf = set_cppc->minimum; + + if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_MAXIMUM ) + max_perf = set_cppc->maximum; + + if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_ENERGY_PERF ) + epp = set_cppc->energy_perf; + + if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED ) + des_perf = set_cppc->desired; + + amd_cppc_write_request(cpu, min_perf, des_perf, max_perf, epp); + return 0; +} + static const struct cpufreq_driver __initconst_cf_clobber amd_cppc_cpufreq_driver = { diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c index 83cfef398e..876d82036d 100644 --- a/xen/drivers/acpi/pmstat.c +++ b/xen/drivers/acpi/pmstat.c @@ -257,7 +257,18 @@ static int get_cpufreq_para(struct xen_sysctl_pm_op *op) !strncmp(op->u.get_para.scaling_driver, XEN_HWP_DRIVER_NAME, CPUFREQ_NAME_LEN) ) ret = get_hwp_para(policy->cpu, &op->u.get_para.u.cppc_para); - else + else if ( !strncmp(op->u.get_para.scaling_driver, + XEN_AMD_CPPC_DRIVER_NAME, + CPUFREQ_NAME_LEN) || + !strncmp(op->u.get_para.scaling_driver, + XEN_AMD_CPPC_EPP_DRIVER_NAME, + CPUFREQ_NAME_LEN) ) + ret = get_amd_cppc_para(policy->cpu, &op->u.get_para.u.cppc_para); + + if ( strncmp(op->u.get_para.scaling_driver, XEN_HWP_DRIVER_NAME, + CPUFREQ_NAME_LEN) && + strncmp(op->u.get_para.scaling_driver, XEN_AMD_CPPC_EPP_DRIVER_NAME, + CPUFREQ_NAME_LEN) ) { if ( !(scaling_available_governors = xzalloc_array(char, gov_num * CPUFREQ_NAME_LEN)) ) @@ -413,10 +424,13 @@ static int set_cpufreq_cppc(struct xen_sysctl_pm_op *op) if ( !policy || !policy->governor ) return -ENOENT; - if ( !hwp_active() ) - return -EOPNOTSUPP; + if ( hwp_active() ) + return set_hwp_para(policy, &op->u.set_cppc); + + if ( xen_processor_pmbits & XEN_PROCESSOR_PM_CPPC ) + return set_amd_cppc_para(policy, &op->u.set_cppc); - return set_hwp_para(policy, &op->u.set_cppc); + return -EOPNOTSUPP; } int do_pm_op(struct xen_sysctl_pm_op *op) diff --git a/xen/include/acpi/cpufreq/cpufreq.h b/xen/include/acpi/cpufreq/cpufreq.h index 6f31009e82..4d786ce92b 100644 --- a/xen/include/acpi/cpufreq/cpufreq.h +++ b/xen/include/acpi/cpufreq/cpufreq.h @@ -292,5 +292,9 @@ int acpi_cpufreq_register(void); int amd_cppc_cmdline_parse(const char *s, const char *e); int amd_cppc_register_driver(void); +int get_amd_cppc_para(unsigned int cpu, + struct xen_cppc_para *cppc_para); +int set_amd_cppc_para(const struct cpufreq_policy *policy, + const struct xen_set_cppc_para *set_cppc); #endif /* __XEN_CPUFREQ_PM_H__ */