From patchwork Mon Apr 14 10:01:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 14050082 X-Patchwork-Delegate: geert@linux-m68k.org Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB7FC1A9B58 for ; Mon, 14 Apr 2025 10:02:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=194.117.254.33 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744624946; cv=none; b=bUbX8h0dnJCbOmbUetwrCqAWDpXw4SVRvjAQQPBqhUMUtrEPKvvsUJ7UFebuiQfo9F1qdB18s+WGr0kebT6WV6zN6jRsJgfcvr2BQTPJxZl45E/CU8yxay+hl6xMqcS8bJSUa5fdpxsGKbMbWQety4gIIVfdKfKuPV7zJwlm57o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744624946; c=relaxed/simple; bh=FfLFviB1dgFGoRFmstXijEl6bx0DXQ/QuRWLNagTGrc=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version:Content-Type; b=Fzijjcp1dQ/TsoeTf06CYsbwGDqxIHmRJ/efhoXQdQcneznA3miMCRxG7e8rIxaWQXI5oJ5gGm1qtsB3qn1nsRjaejXlcMIVYdtVHyq5YWh4nCXNU080Hza7pjbIO5c4WeoFd/RvQRv0bnuPoAMT6EUtKVufyfy/GabluO3Ngvg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com; spf=pass smtp.mailfrom=sang-engineering.com; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b=OwQcbk2s; arc=none smtp.client-ip=194.117.254.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b="OwQcbk2s" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= sang-engineering.com; h=from:to:cc:subject:date:message-id :mime-version:content-type:content-transfer-encoding; s=k1; bh=g C+3HXcqHlrIg8k1i6gZ+tETFXVfKFnaUdkkcsMJ0/k=; b=OwQcbk2sWQSHPtRUQ GDkuybFKPqT3ZkeMMvlEkSm5butJPjmxLN8a3ZHC/pbhLj5kJeXWfWGweSCdkwrn w0hurVnPyFgLHV7nT3j3M+KuuCCnTIx/BZDdxMaCSxzw5Au7K5r77qH2Q0y9OMuK iDcJ17So7wcGQqUIsb8000gvRviTu1LUWbOlQrO1i6iykDP634HHX+WQAWRaIJM8 WG7sL5l/snGGLBmGms/XPSkxScu8rqGceB/FfAxY+H142k7ee2mSmdDcCygZaAkD YkmUDHkHZLUnIfeOftA+aQPbAULfqtMx0iBWGx1v07xLuay+MTJNsKCDLUbsCGg5 4T5PA== Received: (qmail 2241609 invoked from network); 14 Apr 2025 12:02:20 +0200 Received: by mail.zeus03.de with UTF8SMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 14 Apr 2025 12:02:20 +0200 X-UD-Smtp-Session: l3s3148p1@DgvOJboybJcujnth From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: Wolfram Sang , =?utf-8?q?Niklas_S?= =?utf-8?q?=C3=B6derlund?= , Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org Subject: [PATCH] ARM: dts: renesas: r9a06g032-rzn1d400-eb: Add GMAC1 port Date: Mon, 14 Apr 2025 12:01:13 +0200 Message-ID: <20250414100206.7185-2-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.47.2 Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This port bypasses the switch and is directly connected to the GMAC. Co-developed-by: Niklas Söderlund Signed-off-by: Niklas Söderlund Signed-off-by: Wolfram Sang --- Based on renesas-dts-for-v6.16 as of today. .../dts/renesas/r9a06g032-rzn1d400-eb.dts | 63 +++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts index e539df514d1e..975446b2ac97 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts @@ -15,6 +15,42 @@ / { "renesas,r9a06g032"; }; +&gmac1 { + pinctrl-0 = <&pins_eth0>, <&pins_mdio0>; + pinctrl-names = "default"; + + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <&phy_mii0>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + phy_mii0: ethernet-phy@8 { + reg = <8>; + leds { + #address-cells = <1>; + #size-cells = <0>; + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_ACTIVITY; + default-state = "keep"; + }; + }; + }; + }; +}; + &i2c2 { /* Sensors are different across revisions. All are LM75B compatible */ sensor@49 { @@ -23,6 +59,11 @@ sensor@49 { }; }; +&mii_conv1 { + renesas,miic-input = ; + status = "okay"; +}; + &mii_conv2 { renesas,miic-input = ; status = "okay"; @@ -34,6 +75,23 @@ &mii_conv3 { }; &pinctrl { + pins_eth0: pins-eth0 { + pinmux = , + , + , + , + , + , + , + , + , + , + , + ; + drive-strength = <6>; + bias-disable; + }; + pins_eth1: pins-eth1 { pinmux = , , @@ -68,6 +126,11 @@ pins_eth2: pins-eth2 { bias-disable; }; + pins_mdio0: pins-mdio0 { + pinmux = , + ; + }; + pins_sdio1: pins-sdio1 { pinmux = , ,