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pr=C From: Stewart Hildebrand To: CC: Stewart Hildebrand , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" , =?utf-8?q?Roger_Pau_Monn?= =?utf-8?q?=C3=A9?= , Julien Grall Subject: [PATCH v19 1/3] xen/arm: check read handler behavior Date: Tue, 15 Apr 2025 12:54:00 -0400 Message-ID: <20250415165404.435506-2-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250415165404.435506-1-stewart.hildebrand@amd.com> References: <20250415165404.435506-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: stewart.hildebrand@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003AEA:EE_|IA0PR12MB8208:EE_ X-MS-Office365-Filtering-Correlation-Id: 0a1008eb-28c8-4565-fd28-08dd7c3e2a4a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026|13003099007; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Apr 2025 16:54:19.5227 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0a1008eb-28c8-4565-fd28-08dd7c3e2a4a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003AEA.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8208 We expect mmio read handlers to leave the bits above the access size zeroed. Add an ASSERT to check this aspect of read handler behavior. Suggested-by: Roger Pau MonnĂ© Signed-off-by: Stewart Hildebrand Acked-by: Julien Grall --- There's no need to wait for the rest of the series to commit this patch. v18->v19: * add Julien's A-b * s/GENMASK_ULL/GENMASK/ v17->v18: * no change v16->v17: * new patch See https://lore.kernel.org/xen-devel/bc6660ef-59f1-4514-9792-067d987e3fbc@xen.org/ Also see 7db7bd0f319f ("arm/vpci: honor access size when returning an error") Also see xen/arch/arm/ioreq.c:handle_ioserv() --- xen/arch/arm/io.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/arch/arm/io.c b/xen/arch/arm/io.c index 653428e16c1f..5a4b0e8f25c6 100644 --- a/xen/arch/arm/io.c +++ b/xen/arch/arm/io.c @@ -37,6 +37,8 @@ static enum io_state handle_read(const struct mmio_handler *handler, if ( !handler->ops->read(v, info, &r, handler->priv) ) return IO_ABORT; + ASSERT((r & ~GENMASK((1U << info->dabt.size) * 8 - 1, 0)) == 0); + r = sign_extend(dabt, r); set_user_reg(regs, dabt.reg, r); From patchwork Tue Apr 15 16:54:01 2025 Content-Type: text/plain; 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pr=C From: Stewart Hildebrand To: CC: Stewart Hildebrand , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" , Jan Beulich , "Andrew Cooper" , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Subject: [PATCH v19 2/3] vpci: acquire d->pci_lock in I/O handlers Date: Tue, 15 Apr 2025 12:54:01 -0400 Message-ID: <20250415165404.435506-3-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250415165404.435506-1-stewart.hildebrand@amd.com> References: <20250415165404.435506-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: stewart.hildebrand@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003F62:EE_|SJ2PR12MB8111:EE_ X-MS-Office365-Filtering-Correlation-Id: 73326c69-9d9f-4d93-2fd3-08dd7c3e2e39 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|1800799024|376014; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Apr 2025 16:54:26.1013 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 73326c69-9d9f-4d93-2fd3-08dd7c3e2e39 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F62.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8111 In preparation for translating virtual PCI bus topology (where a pdev lookup will be needed in the vPCI I/O handlers), acquire d->pci_lock in the vPCI I/O handlers. While here, adjust indentation in vpci_ecam_{read,write}. Signed-off-by: Stewart Hildebrand --- v18->v19: * new patch While the current patch series focus is Arm, this is also prerequisite for eventually enabling x86 PVH domU passthrough. Similar to Arm, a call to vpci_translate_virtual_device() would be added in xen/arch/x86/hvm/io.c:vpci_portio_{read,write} and vpci_mmcfg_{read,write}. --- xen/arch/arm/vpci.c | 11 +++++++++-- xen/arch/x86/hvm/io.c | 10 +++++++++- xen/drivers/vpci/vpci.c | 21 ++++++++++----------- 3 files changed, 28 insertions(+), 14 deletions(-) diff --git a/xen/arch/arm/vpci.c b/xen/arch/arm/vpci.c index b63a356bb4a8..828c5c745bd9 100644 --- a/xen/arch/arm/vpci.c +++ b/xen/arch/arm/vpci.c @@ -34,15 +34,18 @@ static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info, /* data is needed to prevent a pointer cast on 32bit */ unsigned long data; + read_lock(&v->domain->pci_lock); if ( vpci_ecam_read(sbdf, ECAM_REG_OFFSET(info->gpa), 1U << info->dabt.size, &data) ) { *r = data; + read_unlock(&v->domain->pci_lock); return 1; } *r = invalid; + read_unlock(&v->domain->pci_lock); return 0; } @@ -51,9 +54,13 @@ static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info, { struct pci_host_bridge *bridge = p; pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa); + int ret; - return vpci_ecam_write(sbdf, ECAM_REG_OFFSET(info->gpa), - 1U << info->dabt.size, r); + write_lock(&v->domain->pci_lock); + ret = vpci_ecam_write(sbdf, ECAM_REG_OFFSET(info->gpa), + 1U << info->dabt.size, r); + write_unlock(&v->domain->pci_lock); + return ret; } static const struct mmio_handler_ops vpci_mmio_handler = { diff --git a/xen/arch/x86/hvm/io.c b/xen/arch/x86/hvm/io.c index de6ee6c4dd4d..0b9036528abe 100644 --- a/xen/arch/x86/hvm/io.c +++ b/xen/arch/x86/hvm/io.c @@ -261,7 +261,7 @@ static int cf_check vpci_portio_read( const struct hvm_io_handler *handler, uint64_t addr, uint32_t size, uint64_t *data) { - const struct domain *d = current->domain; + struct domain *d = current->domain; unsigned int reg; pci_sbdf_t sbdf; uint32_t cf8; @@ -285,7 +285,9 @@ static int cf_check vpci_portio_read( if ( !vpci_access_allowed(reg, size) ) return X86EMUL_OKAY; + read_lock(&d->pci_lock); *data = vpci_read(sbdf, reg, size); + read_unlock(&d->pci_lock); return X86EMUL_OKAY; } @@ -316,7 +318,9 @@ static int cf_check vpci_portio_write( if ( !vpci_access_allowed(reg, size) ) return X86EMUL_OKAY; + write_lock(&d->pci_lock); vpci_write(sbdf, reg, size, data); + write_unlock(&d->pci_lock); return X86EMUL_OKAY; } @@ -424,7 +428,9 @@ static int cf_check vpci_mmcfg_read( read_unlock(&d->arch.hvm.mmcfg_lock); /* Failed reads are not propagated to the caller */ + read_lock(&d->pci_lock); vpci_ecam_read(sbdf, reg, len, data); + read_unlock(&d->pci_lock); return X86EMUL_OKAY; } @@ -449,7 +455,9 @@ static int cf_check vpci_mmcfg_write( read_unlock(&d->arch.hvm.mmcfg_lock); /* Failed writes are not propagated to the caller */ + write_lock(&d->pci_lock); vpci_ecam_write(sbdf, reg, len, data); + write_unlock(&d->pci_lock); return X86EMUL_OKAY; } diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index 1e6aa5d799b9..d01fb7be226a 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -440,6 +440,8 @@ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size) unsigned int data_offset = 0; uint32_t data = ~(uint32_t)0; + ASSERT(rw_is_locked(&d->pci_lock)); + if ( !size ) { ASSERT_UNREACHABLE(); @@ -452,15 +454,11 @@ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size) * If this is hwdom and the device is assigned to DomXEN, acquiring hwdom's * pci_lock is sufficient. */ - read_lock(&d->pci_lock); pdev = pci_get_pdev(d, sbdf); if ( !pdev && is_hardware_domain(d) ) pdev = pci_get_pdev(dom_xen, sbdf); if ( !pdev || !pdev->vpci ) - { - read_unlock(&d->pci_lock); return vpci_read_hw(sbdf, reg, size); - } spin_lock(&pdev->vpci->lock); @@ -507,7 +505,6 @@ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size) ASSERT(data_offset < size); } spin_unlock(&pdev->vpci->lock); - read_unlock(&d->pci_lock); if ( data_offset < size ) { @@ -555,6 +552,8 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, const struct vpci_register *r; unsigned int data_offset = 0; + ASSERT(rw_is_write_locked(&d->pci_lock)); + if ( !size ) { ASSERT_UNREACHABLE(); @@ -570,7 +569,6 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, * TODO: We need to take pci_locks in exclusive mode only if we * are modifying BARs, so there is a room for improvement. */ - write_lock(&d->pci_lock); pdev = pci_get_pdev(d, sbdf); if ( !pdev && is_hardware_domain(d) ) pdev = pci_get_pdev(dom_xen, sbdf); @@ -579,8 +577,6 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, /* Ignore writes to read-only devices, which have no ->vpci. */ const unsigned long *ro_map = pci_get_ro_map(sbdf.seg); - write_unlock(&d->pci_lock); - if ( !ro_map || !test_bit(sbdf.bdf, ro_map) ) vpci_write_hw(sbdf, reg, size, data); return; @@ -622,7 +618,6 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, ASSERT(data_offset < size); } spin_unlock(&pdev->vpci->lock); - write_unlock(&d->pci_lock); if ( data_offset < size ) /* Tailing gap, write the remaining. */ @@ -651,8 +646,10 @@ bool vpci_access_allowed(unsigned int reg, unsigned int len) } bool vpci_ecam_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int len, - unsigned long data) + unsigned long data) { + ASSERT(rw_is_write_locked(¤t->domain->pci_lock)); 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bh=A1iExg8Gsendz7+/1VoCc6vWAZqFmtQSh/yRMxQ2Fik=; b=cC7yDQnPwD/BT8usXS0oBFs1aMz0wZIU0AadwRQXqu3rHRS99Sm5NAd39fNmjZT8y+8EXSovkK6ZoTjj/MydEzjeQNSGYLMEuumL4YQhHbLERU/d+LUIoi7O4x80VyBEAInS7VRm6CV2UhEgVms7yuei+gniYi/bjVbOcGX3HAQ= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Stewart Hildebrand To: CC: Oleksandr Andrushchenko , =?utf-8?q?Ro?= =?utf-8?q?ger_Pau_Monn=C3=A9?= , "Stewart Hildebrand" , Anthony PERARD , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Jiqian Chen , "Mykyta Poturai" , Volodymyr Babchuk Subject: [PATCH v19 3/3] xen/arm: translate virtual PCI bus topology for guests Date: Tue, 15 Apr 2025 12:54:02 -0400 Message-ID: <20250415165404.435506-4-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250415165404.435506-1-stewart.hildebrand@amd.com> References: <20250415165404.435506-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB03.amd.com: stewart.hildebrand@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003AE8:EE_|IA1PR12MB8334:EE_ X-MS-Office365-Filtering-Correlation-Id: f152c857-d021-435e-eb27-08dd7c3e353f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Apr 2025 16:54:37.9051 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f152c857-d021-435e-eb27-08dd7c3e353f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003AE8.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8334 From: Oleksandr Andrushchenko There are three originators for the PCI configuration space access: 1. The domain that owns physical host bridge: MMIO handlers are there so we can update vPCI register handlers with the values written by the hardware domain, e.g. physical view of the registers vs guest's view on the configuration space. 2. Guest access to the passed through PCI devices: we need to properly map virtual bus topology to the physical one, e.g. pass the configuration space access to the corresponding physical devices. 3. Emulated host PCI bridge access. It doesn't exist in the physical topology, e.g. it can't be mapped to some physical host bridge. So, all access to the host bridge itself needs to be trapped and emulated. Signed-off-by: Oleksandr Andrushchenko Signed-off-by: Volodymyr Babchuk Signed-off-by: Stewart Hildebrand --- In v19: * move locking to pre-patch In v18: * address warning in vpci test suite In v17: * move lock to inside vpci_translate_virtual_device() * acks were previously given for Arm [0] and vPCI [1], but since it was two releases ago and the patch has changed, I didn't pick them up [0] https://lore.kernel.org/xen-devel/4afe33f2-72e6-4755-98ce-d7f9da374e90@xen.org/ [1] https://lore.kernel.org/xen-devel/Zk70udmiriruMt0r@macbook/ In v15: - base on top of ("arm/vpci: honor access size when returning an error") In v11: - Fixed format issues - Added ASSERT_UNREACHABLE() to the dummy implementation of vpci_translate_virtual_device() - Moved variable in vpci_sbdf_from_gpa(), now it is easier to follow the logic in the function Since v9: - Commend about required lock replaced with ASSERT() - Style fixes - call to vpci_translate_virtual_device folded into vpci_sbdf_from_gpa Since v8: - locks moved out of vpci_translate_virtual_device() Since v6: - add pcidevs locking to vpci_translate_virtual_device - update wrt to the new locking scheme Since v5: - add vpci_translate_virtual_device for #ifndef CONFIG_HAS_VPCI_GUEST_SUPPORT case to simplify ifdefery - add ASSERT(!is_hardware_domain(d)); to vpci_translate_virtual_device - reset output register on failed virtual SBDF translation Since v4: - indentation fixes - constify struct domain - updated commit message - updates to the new locking scheme (pdev->vpci_lock) Since v3: - revisit locking - move code to vpci.c Since v2: - pass struct domain instead of struct vcpu - constify arguments where possible - gate relevant code with CONFIG_HAS_VPCI_GUEST_SUPPORT New in v2 --- tools/tests/vpci/emul.h | 7 +++--- xen/arch/arm/vpci.c | 48 ++++++++++++++++++++++++++++++++--------- xen/drivers/vpci/vpci.c | 24 +++++++++++++++++++++ xen/include/xen/vpci.h | 12 +++++++++++ 4 files changed, 78 insertions(+), 13 deletions(-) diff --git a/tools/tests/vpci/emul.h b/tools/tests/vpci/emul.h index da446bba86b4..d3b8978f948c 100644 --- a/tools/tests/vpci/emul.h +++ b/tools/tests/vpci/emul.h @@ -85,6 +85,10 @@ typedef union { } pci_sbdf_t; #define CONFIG_HAS_VPCI + +#define BUG() assert(0) +#define ASSERT_UNREACHABLE() assert(0) + #include "vpci.h" #define __hwdom_init @@ -112,9 +116,6 @@ typedef union { #define PCI_CFG_SPACE_EXP_SIZE 4096 -#define BUG() assert(0) -#define ASSERT_UNREACHABLE() assert(0) - #endif /* diff --git a/xen/arch/arm/vpci.c b/xen/arch/arm/vpci.c index 828c5c745bd9..7bb77f9f9c80 100644 --- a/xen/arch/arm/vpci.c +++ b/xen/arch/arm/vpci.c @@ -7,34 +7,54 @@ #include -static pci_sbdf_t vpci_sbdf_from_gpa(const struct pci_host_bridge *bridge, - paddr_t gpa) +static bool vpci_sbdf_from_gpa(struct domain *d, + const struct pci_host_bridge *bridge, + paddr_t gpa, pci_sbdf_t *sbdf) { - pci_sbdf_t sbdf; + bool translated = true; + + ASSERT(sbdf); + ASSERT(rw_is_locked(&d->pci_lock)); if ( bridge ) { - sbdf.sbdf = VPCI_ECAM_BDF(gpa - bridge->cfg->phys_addr); - sbdf.seg = bridge->segment; - sbdf.bus += bridge->cfg->busn_start; + sbdf->sbdf = VPCI_ECAM_BDF(gpa - bridge->cfg->phys_addr); + sbdf->seg = bridge->segment; + sbdf->bus += bridge->cfg->busn_start; } else - sbdf.sbdf = VPCI_ECAM_BDF(gpa - GUEST_VPCI_ECAM_BASE); + { + /* + * For the passed through devices we need to map their virtual SBDF + * to the physical PCI device being passed through. + */ + sbdf->sbdf = VPCI_ECAM_BDF(gpa - GUEST_VPCI_ECAM_BASE); + translated = vpci_translate_virtual_device(d, sbdf); + } - return sbdf; + return translated; } static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info, register_t *r, void *p) { struct pci_host_bridge *bridge = p; - pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa); + pci_sbdf_t sbdf; const unsigned int access_size = (1U << info->dabt.size) * 8; const register_t invalid = GENMASK_ULL(access_size - 1, 0); /* data is needed to prevent a pointer cast on 32bit */ unsigned long data; + ASSERT(!bridge == !is_hardware_domain(v->domain)); + read_lock(&v->domain->pci_lock); + if ( !vpci_sbdf_from_gpa(v->domain, bridge, info->gpa, &sbdf) ) + { + *r = invalid; + read_unlock(&v->domain->pci_lock); + return 1; + } + if ( vpci_ecam_read(sbdf, ECAM_REG_OFFSET(info->gpa), 1U << info->dabt.size, &data) ) { @@ -53,10 +73,18 @@ static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info, register_t r, void *p) { struct pci_host_bridge *bridge = p; - pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa); + pci_sbdf_t sbdf; int ret; + ASSERT(!bridge == !is_hardware_domain(v->domain)); + write_lock(&v->domain->pci_lock); + if ( !vpci_sbdf_from_gpa(v->domain, bridge, info->gpa, &sbdf) ) + { + write_unlock(&v->domain->pci_lock); + return 1; + } + ret = vpci_ecam_write(sbdf, ECAM_REG_OFFSET(info->gpa), 1U << info->dabt.size, r); write_unlock(&v->domain->pci_lock); diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index d01fb7be226a..46e96518299e 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -81,6 +81,30 @@ static int assign_virtual_sbdf(struct pci_dev *pdev) return 0; } +/* + * Find the physical device which is mapped to the virtual device + * and translate virtual SBDF to the physical one. + */ +bool vpci_translate_virtual_device(struct domain *d, pci_sbdf_t *sbdf) +{ + const struct pci_dev *pdev; + + ASSERT(!is_hardware_domain(d)); + ASSERT(rw_is_locked(&d->pci_lock)); + + for_each_pdev ( d, pdev ) + { + if ( pdev->vpci && (pdev->vpci->guest_sbdf.sbdf == sbdf->sbdf) ) + { + /* Replace guest SBDF with the physical one. */ + *sbdf = pdev->sbdf; + return true; + } + } + + return false; +} + #endif /* CONFIG_HAS_VPCI_GUEST_SUPPORT */ void vpci_deassign_device(struct pci_dev *pdev) diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index 807401b2eaa2..e355329913ef 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -311,6 +311,18 @@ static inline int __must_check vpci_reset_device(struct pci_dev *pdev) return vpci_assign_device(pdev); } +#ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT +bool vpci_translate_virtual_device(struct domain *d, pci_sbdf_t *sbdf); +#else +static inline bool vpci_translate_virtual_device(struct domain *d, + pci_sbdf_t *sbdf) +{ + ASSERT_UNREACHABLE(); + + return false; +} +#endif + #endif /*