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Signed-off-by: Stefan Popa --- drivers/iio/accel/adxl372.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/iio/accel/adxl372.c b/drivers/iio/accel/adxl372.c index d2fdc75..5a039ba 100644 --- a/drivers/iio/accel/adxl372.c +++ b/drivers/iio/accel/adxl372.c @@ -762,11 +762,24 @@ static int adxl372_dready_trig_set_state(struct iio_trigger *trig, return adxl372_set_interrupts(st, mask, 0); } +static int adxl372_validate_trigger(struct iio_dev *indio_dev, + struct iio_trigger *trig) +{ + struct adxl372_state *st = iio_priv(indio_dev); + + if (st->dready_trig != trig) + return -EINVAL; + + return 0; +} + static const struct iio_trigger_ops adxl372_trigger_ops = { + .validate_device = &iio_trigger_validate_own_device, .set_trigger_state = adxl372_dready_trig_set_state, }; static const struct iio_info adxl372_info = { + .validate_trigger = &adxl372_validate_trigger, .read_raw = adxl372_read_raw, .debugfs_reg_access = &adxl372_reg_access, .hwfifo_set_watermark = adxl372_set_watermark, From patchwork Mon Aug 20 14:54:27 2018 Content-Type: text/plain; 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Also, the user can read the available frequencies and read the currently set frequency via the read_raw function. The frequency can be set via the write_raw function. When the frequency is set, the bandwidth is also checked and ensured that it is constrained to at most half of the sampling frequency. Also, the activity and inactivity timers have to be updated because they depend on the selected ODR. Signed-off-by: Stefan Popa --- drivers/iio/accel/adxl372.c | 74 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 73 insertions(+), 1 deletion(-) diff --git a/drivers/iio/accel/adxl372.c b/drivers/iio/accel/adxl372.c index 5a039ba..6281e4a 100644 --- a/drivers/iio/accel/adxl372.c +++ b/drivers/iio/accel/adxl372.c @@ -223,7 +223,8 @@ static const struct adxl372_axis_lookup adxl372_axis_lookup_table[] = { .modified = 1, \ .channel2 = IIO_MOD_##axis, \ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ .scan_index = index, \ .scan_type = { \ .sign = 's', \ @@ -311,6 +312,19 @@ static int adxl372_set_odr(struct adxl372_state *st, return ret; } +static int adxl372_find_closest_match(const int *array, + unsigned int size, int val) +{ + int i; + + for (i = 0; i < size; i++) { + if (val <= array[i]) + return i; + } + + return size - 1; +} + static int adxl372_set_bandwidth(struct adxl372_state *st, enum adxl372_bandwidth bw) { @@ -631,6 +645,51 @@ static int adxl372_read_raw(struct iio_dev *indio_dev, *val = 0; *val2 = ADXL372_USCALE; return IIO_VAL_INT_PLUS_MICRO; + case IIO_CHAN_INFO_SAMP_FREQ: + *val = adxl372_samp_freq_tbl[st->odr]; + return IIO_VAL_INT; + } + + return -EINVAL; +} + +static int adxl372_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long info) +{ + struct adxl372_state *st = iio_priv(indio_dev); + int odr_index, ret; + + switch (info) { + case IIO_CHAN_INFO_SAMP_FREQ: + odr_index = adxl372_find_closest_match(adxl372_samp_freq_tbl, + ARRAY_SIZE(adxl372_samp_freq_tbl), + val); + ret = adxl372_set_odr(st, odr_index); + if (ret < 0) + return ret; + /* + * The timer period depends on the ODR selected. + * At 3200 Hz and below, it is 6.6 ms; at 6400 Hz, it is 3.3 ms + */ + ret = adxl372_set_activity_time_ms(st, st->act_time_ms); + if (ret < 0) + return ret; + /* + * The timer period depends on the ODR selected. + * At 3200 Hz and below, it is 26 ms; at 6400 Hz, it is 13 ms + */ + ret = adxl372_set_inactivity_time_ms(st, st->inact_time_ms); + if (ret < 0) + return ret; + /* + * The maximum bandwidth is constrained to at most half of + * the ODR to ensure that the Nyquist criteria is not violated + */ + if (st->bw > odr_index) + ret = adxl372_set_bandwidth(st, odr_index); + + return ret; default: return -EINVAL; } @@ -778,9 +837,22 @@ static const struct iio_trigger_ops adxl372_trigger_ops = { .set_trigger_state = adxl372_dready_trig_set_state, }; +static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("400 800 1600 3200 6400"); + +static struct attribute *adxl372_attributes[] = { + &iio_const_attr_sampling_frequency_available.dev_attr.attr, + NULL, +}; + +static const struct attribute_group adxl372_attrs_group = { + .attrs = adxl372_attributes, +}; + static const struct iio_info adxl372_info = { .validate_trigger = &adxl372_validate_trigger, + .attrs = &adxl372_attrs_group, .read_raw = adxl372_read_raw, + .write_raw = adxl372_write_raw, .debugfs_reg_access = &adxl372_reg_access, .hwfifo_set_watermark = adxl372_set_watermark, }; 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Mon, 20 Aug 2018 10:55:08 -0400 From: Stefan Popa To: CC: , , , , , , Subject: [PATCH 3/3] iio:adxl372: Add filter bandwidth support Date: Mon, 20 Aug 2018 17:54:55 +0300 Message-ID: <1534776895-18983-1-git-send-email-stefan.popa@analog.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.55;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(39860400002)(346002)(136003)(396003)(376002)(2980300002)(438002)(189003)(199004)(72206003)(106466001)(53416004)(478600001)(186003)(336012)(476003)(2616005)(6346003)(2351001)(126002)(77096007)(426003)(8936002)(2906002)(50226002)(26005)(486006)(36756003)(48376002)(8676002)(50466002)(5660300001)(6666003)(305945005)(6916009)(106002)(47776003)(44832011)(316002)(16586007)(54906003)(4326008)(246002)(51416003)(7636002)(356003)(107886003)(7696005);DIR:OUT;SFP:1101;SCL:1;SRVR:BL2PR03MB546;H:nwd2mta1.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail10.analog.com;MX:1;A:1; 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The user can also read the available bandwidths which are always adjusted to be at most half of the sampling frequency. Furthermore, the currently selected bandwidth can be read via the read_raw function, while the write_raw sets a new bandwidth value. Signed-off-by: Stefan Popa --- drivers/iio/accel/adxl372.c | 38 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/drivers/iio/accel/adxl372.c b/drivers/iio/accel/adxl372.c index 6281e4a..fdaaa58 100644 --- a/drivers/iio/accel/adxl372.c +++ b/drivers/iio/accel/adxl372.c @@ -202,6 +202,10 @@ static const int adxl372_samp_freq_tbl[5] = { 400, 800, 1600, 3200, 6400, }; +static const int adxl372_bw_freq_tbl[5] = { + 200, 400, 800, 1600, 3200, +}; + struct adxl372_axis_lookup { unsigned int bits; enum adxl372_fifo_format fifo_format; @@ -224,7 +228,8 @@ static const struct adxl372_axis_lookup adxl372_axis_lookup_table[] = { .channel2 = IIO_MOD_##axis, \ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ - BIT(IIO_CHAN_INFO_SAMP_FREQ), \ + BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \ .scan_index = index, \ .scan_type = { \ .sign = 's', \ @@ -648,6 +653,9 @@ static int adxl372_read_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_SAMP_FREQ: *val = adxl372_samp_freq_tbl[st->odr]; return IIO_VAL_INT; + case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: + *val = adxl372_bw_freq_tbl[st->bw]; + return IIO_VAL_INT; } return -EINVAL; @@ -658,7 +666,7 @@ static int adxl372_write_raw(struct iio_dev *indio_dev, int val, int val2, long info) { struct adxl372_state *st = iio_priv(indio_dev); - int odr_index, ret; + int odr_index, bw_index, ret; switch (info) { case IIO_CHAN_INFO_SAMP_FREQ: @@ -690,11 +698,34 @@ static int adxl372_write_raw(struct iio_dev *indio_dev, ret = adxl372_set_bandwidth(st, odr_index); return ret; + case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: + bw_index = adxl372_find_closest_match(adxl372_bw_freq_tbl, + ARRAY_SIZE(adxl372_bw_freq_tbl), + val); + return adxl372_set_bandwidth(st, bw_index); default: return -EINVAL; } } +static ssize_t adxl372_show_filter_freq_avail(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct iio_dev *indio_dev = dev_to_iio_dev(dev); + struct adxl372_state *st = iio_priv(indio_dev); + int i; + size_t len = 0; + + for (i = 0; i <= st->odr; i++) + len += scnprintf(buf + len, PAGE_SIZE - len, + "%d ", adxl372_bw_freq_tbl[i]); + + buf[len - 1] = '\n'; + + return len; +} + static ssize_t adxl372_get_fifo_enabled(struct device *dev, struct device_attribute *attr, char *buf) @@ -838,9 +869,12 @@ static const struct iio_trigger_ops adxl372_trigger_ops = { }; static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("400 800 1600 3200 6400"); +static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available, + 0444, adxl372_show_filter_freq_avail, NULL, 0); static struct attribute *adxl372_attributes[] = { &iio_const_attr_sampling_frequency_available.dev_attr.attr, + &iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.dev_attr.attr, NULL, };