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Tue, 21 Aug 2018 02:47:29 +0000 Date: Tue, 21 Aug 2018 10:44:33 +0800 From: Jisheng Zhang To: Jingoo Han , Joao Pinto , Lorenzo Pieralisi , Bjorn Helgaas Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH] PCI: dwc: fix scheduling while atomic issues Message-ID: <20180821104433.1c408d7e@xhacker.debian> X-Mailer: Claws Mail 3.16.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-Originating-IP: [124.74.246.114] X-ClientProxiedBy: TYAPR01CA0135.jpnprd01.prod.outlook.com (2603:1096:404:2d::27) To BY2PR0301MB1576.namprd03.prod.outlook.com (2a01:111:e400:526e::18) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2be818ff-57e9-4141-cfe6-08d607107146 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989137)(4534165)(4627221)(201703031133081)(201702281549075)(8990107)(5600074)(711020)(2017052603328)(7153060)(7193020);SRVR:BY2PR0301MB1576; X-Microsoft-Exchange-Diagnostics: 1;BY2PR0301MB1576;3:4zbxfGhZ1Y9ob8c2JOiGgWer9NLPA6ZfJbsPAx/pzZYXhRZhCVvq3mEbb5kUjrfR5JbcJkGUzbkfNQyMC+kd05EOuoK82PWdwy14w99xqhK6dOgsPKvoTraZgS5fyg7oFZ2bCylr0i2ts1jDSAMpUicZF5usb3kE9xv45RwemzHNckJftwbzX6LxFfjyGh0miyDW56dx7wgCtrFnxH8jvExEx+V98nERVdTTGqf5pG4Yt/1aIYIEeVh/W63Kac7s;25:ph6USRFkom3BeHsU931Dn4ePih9nahpN/gxe6ZpjP7nlS8hAIGotOYhDBg5SWaRgcvpHsUNzAwq47iOtLUTfzH2NnW90DaKsQRV/69QCi4/13dJTd9O8FwPYNub2BEQbBr6C+0yDYh92col5ncZMecRKLOQQ/dUSErM4yACrq2hMe2BfzG5iySFQSoeNbrguTQCfpNkGpct4jsrom17z1ZX6cLiVLYJXI/lvF5icZfiKO/1SeIcfu+PdOY4beFgDEzBVIhO7lNG+xWRvYPIfa/E/+qH+psomnzV/ABS/2Nn4IcbsVRqoJEsO5QLYQVhjGExg8C/6W4c0DCbSVyv7gg==;31:JeXKgLZab/3RcLZxwJrF59PpZ6c62smy6LNpWDFE0vSlIwfq7CqIe4S/fzGTkCMI/RQGZdZTOy+ZZrUy87/VyILs6JMvrPuNz8CdQNdW0FsrSftc1/ZY3f9nA6o9XYhAHgtFIVM/IRg5JnlbOGtJvBwpEcnzptmnbhrVyV2Do1VFbD3CJr2uKtqQ1zAbOGuoymBQpzKPb58/duBPZXNSk3rcgZb0xktOGRuu22kj8Wc= X-MS-TrafficTypeDiagnostic: BY2PR0301MB1576: X-Microsoft-Exchange-Diagnostics: 1;BY2PR0301MB1576;20:pdZYtnwGHtVzbW4coY2HqatZFSGx0eKWyhB8lFulhp7mni6V0YRX4QVNRESF8apZRHc5R3/iN+JbvyaUXQ6olb2D+FKjWeuNgS8OpdZX+JNnfMaFv5vldGs6ic5ERBbIjVn3Yvjjh7STLNsDlPvYacX7r8n1DnRvoqgrfk9OGiEmQhSr2EkmHdfJ1u3KYTqJ/ZdRFhJDlDZZkJIG7K2pbZ5KqDUuFZMz9v4pWBFjZ1Jc/p1uGzTCM9+O+R1ZeuNsQ79PJ7blxywbzYapbz9lnjct+l83PGQWPUNsWsLztmkV2h14uIlYaxXWZ0sAEqJHP7fy0iiIXsN6bB/NIfPf4jcFT6IJR/TAryBWYqxXtc1evG1kVtvh6s5OCO6WK2T7eLA2PyGUtgwTptWcZHduBtp/EP46S7E4A1tdkdeMRD9G56gZX1fPiKDzG2cC92lYci2uDLD0ANBa+Scod3STBg9xDXlhWlPVcKFlZk5Gbstu+9dpG0HLNJ4dcD8XKnMd;4:1mnqtmjTvcTTBzVD2tt6as3XqSR/K77/Hbi7G9Gn0bkMRlYVr6mbo1Z4RPOFFxTelSdTVpEaJHpLW3kp9vqstdj9vLYhB2N5fTu1iUFEFOtX1yM0qq0MBmUq7jW3FlTkxSui0DorqnZivLDPOBQbxam4aggkEP1Nrr1YdwB5KwsHbkekG6CMhVvXzzbUumGUCr53uYZzo+yD6pokIkiTRrrhvWixZtf+4plzJdOHnNz2mOjCb0AoiACMOwx945nRuNVKUG3WCAcTMA8nro5XdQ== X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; 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Unfortunately, the atu programming can be called in atomic context: inbound atu programming could be called through pci_epc_write_header() =>dw_pcie_ep_write_header() =>dw_pcie_prog_inbound_atu() outbound atu programming could be called through pci_bus_read_config_dword() =>dw_pcie_rd_conf() =>dw_pcie_prog_outbound_atu() Fix this issue by calling udelay() instead. Signed-off-by: Jisheng Zhang --- drivers/pci/controller/dwc/pcie-designware.c | 8 ++++---- drivers/pci/controller/dwc/pcie-designware.h | 3 +-- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 778c4f76a884..4c15929d9c79 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -135,7 +135,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index, if (val & PCIE_ATU_ENABLE) return; - usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX); + udelay(LINK_WAIT_IATU); } dev_err(pci->dev, "Outbound iATU is not being enabled\n"); } @@ -178,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, if (val & PCIE_ATU_ENABLE) return; - usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX); + udelay(LINK_WAIT_IATU); } dev_err(pci->dev, "Outbound iATU is not being enabled\n"); } @@ -236,7 +236,7 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index, if (val & PCIE_ATU_ENABLE) return 0; - usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX); + udelay(LINK_WAIT_IATU); } dev_err(pci->dev, "Inbound iATU is not being enabled\n"); @@ -282,7 +282,7 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar, if (val & PCIE_ATU_ENABLE) return 0; - usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX); + udelay(LINK_WAIT_IATU); } dev_err(pci->dev, "Inbound iATU is not being enabled\n"); diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 96126fd8403c..8bab329c5cd3 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -26,8 +26,7 @@ /* Parameters for the waiting for iATU enabled routine */ #define LINK_WAIT_MAX_IATU_RETRIES 5 -#define LINK_WAIT_IATU_MIN 9000 -#define LINK_WAIT_IATU_MAX 10000 +#define LINK_WAIT_IATU 9000 /* Synopsys-specific PCIe configuration registers */ #define PCIE_PORT_LINK_CONTROL 0x710