From patchwork Sun Mar 31 08:11:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Cerveny X-Patchwork-Id: 10878689 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CB3261390 for ; Sun, 31 Mar 2019 08:32:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9E4262892C for ; Sun, 31 Mar 2019 08:32:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8DFD82892E; Sun, 31 Mar 2019 08:32:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 70D442892C for ; Sun, 31 Mar 2019 08:32:39 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hAVr1-0007ki-1P; Sun, 31 Mar 2019 08:30:11 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hAVqz-0007kd-Bh for xen-devel@lists.xen.org; Sun, 31 Mar 2019 08:30:09 +0000 X-Inumbo-ID: 2daf82a3-538f-11e9-bc90-bc764e045a96 Received: from dmz.c-home.cz (unknown [89.24.150.100]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 2daf82a3-538f-11e9-bc90-bc764e045a96; Sun, 31 Mar 2019 08:30:04 +0000 (UTC) Received: from dmz.c-home.cz (localhost [127.0.0.1]) by dmz.c-home.cz (8.14.4+Sun/8.14.4) with ESMTP id x2V8BwnM008158; Sun, 31 Mar 2019 10:12:03 +0200 (CEST) Received: from localhost (martin@localhost) by dmz.c-home.cz (8.14.4+Sun/8.14.4/Submit) with ESMTP id x2V8BvSi008155; Sun, 31 Mar 2019 10:11:57 +0200 (CEST) X-Authentication-Warning: dmz.c-home.cz: martin owned process doing -bs Date: Sun, 31 Mar 2019 10:11:57 +0200 (CEST) From: Martin Cerveny To: xen-devel@lists.xen.org Message-ID: User-Agent: Alpine 2.00 (GSO 1167 2008-08-23) MIME-Version: 1.0 Content-ID: Subject: [Xen-devel] [BUG] pci: mixed allocation pf and non-pf PCI MEM BAR (OVMF crash) X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Reply-To: Martin Cerveny Cc: Andrew Cooper , Jan Beulich Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Hello. There is problem in PCI device allocation algorithm (pci_setup()). Algorithm allocates PCI BAR sorted by size and this allows mixed allocation of prefetchable and non-prefetchable PCI MEM BAR. This leads to wrong config of PCI root port (see "Type 1 Configuration Space Registers (Root Ports)"). Tested with version xen 4.11.1 + "export OVMF_UPSTREAM_REVISION=ef529e6ab7c31290a33045bb1f1837447cc0eb56" (embeded commit OVMF does not work (crashed even in Win10.iso and uncompilable with newer gcc)). Attached also testing patch. Thanks, Martin Cerveny --------------------------------------------------------------------- Verifiable in crash of OVMF (UEFI firmware) [OVMF DEBUG]: ASSERT_EFI_ERROR (Status = Not Found) ASSERT /root/rpmbuild/BUILD/xen-4.11.1/tools/firmware/ovmf-dir-remote/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c(513): !EFI_ERROR (Status) --------------------------------------------------------------------- Summary of errored output: [xl dmesg] (d1) [ 395.698273] pci dev 0b:0 bar 14 size 010000000: 0e0000008 (d1) [ 395.714836] pci dev 0b:0 bar 18 size 002000000: 0f0000000 (d1) [ 395.715369] pci dev 02:0 bar 14 size 001000000: 0f2000008 (d1) [ 395.716049] pci dev 0b:0 bar 10 size 001000000: 0f3000000 (d1) [ 395.716479] pci dev 04:0 bar 30 size 000040000: 0f4000000 (d1) [ 395.716908] pci dev 0b:0 bar 30 size 000010000: 0f4040000 - *008 == prefetchable MEM BAR (PCI_BASE_ADDRESS_MEM_PREFETCH) [OVMF DEBUG]: InitRootBridge: populated root bus 0, with room for 0 subordinate bus(es) RootBridge: PciRoot(0x0) Support/Attr: 7007F / 7007F DmaAbove4G: No NoExtConfSpace: Yes AllocAttr: 0 () Bus: 0 - 0 Translation=0 Io: C000 - C2EF Translation=0 Mem: F0000000 - F40550FF Translation=0 MemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0 PMem: E0000000 - F2FFFFFF Translation=0 PMemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0 - check overlap of Mem an PMem! - check code tools/firmware/ovmf-dir-remote/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c // // Add all the Mem/PMem aperture to GCD // Mem/PMem shouldn't overlap with each other // Root bridge which needs to combine MEM and PMEM should only report // the MEM aperture in Mem // --------------------------------------------------------------------- Summary of OK/expected output: [xl dmesg] (d2) [ 1833.077182] pci dev 0b:0 bar 14 size 010000000: 0e0000008 (d2) [ 1833.077798] pci dev 02:0 bar 14 size 001000000: 0f0000008 (d2) [ 1833.103301] pci dev 0b:0 bar 18 size 002000000: 0f2000000 (d2) [ 1833.103882] pci dev 0b:0 bar 10 size 001000000: 0f4000000 (d2) [ 1833.104164] pci dev 04:0 bar 30 size 000040000: 0f5000000 (d2) [ 1833.104429] pci dev 0b:0 bar 30 size 000010000: 0f5040000 [OVMF DEBUG] RootBridge: PciRoot(0x0) Support/Attr: 7007F / 7007F DmaAbove4G: No NoExtConfSpace: Yes AllocAttr: 0 () Bus: 0 - 0 Translation=0 Io: C000 - C2EF Translation=0 Mem: F2000000 - F50550FF Translation=0 MemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0 PMem: E0000000 - F0FFFFFF Translation=0 PMemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0 --------------------------------------------------------------------- From b8d8f9f5ada9568f672f4ce9d68fe0f66cae44f5 Mon Sep 17 00:00:00 2001 From: Martin Cerveny Date: Sun, 31 Mar 2019 09:26:05 +0200 Subject: [PATCH] pci: Merge allocation of prefetchable MEM BAR Fragmented allocation of NON-prefetchable (MMIO) and prefetchable PCI MEM BAR not supported - see "Type 1 Configuration Space Registers (Root Ports)". --- tools/firmware/hvmloader/pci.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/tools/firmware/hvmloader/pci.c b/tools/firmware/hvmloader/pci.c index 0b708bf578..42a3dd5e62 100644 --- a/tools/firmware/hvmloader/pci.c +++ b/tools/firmware/hvmloader/pci.c @@ -97,7 +97,7 @@ void pci_setup(void) uint32_t bar_reg; uint64_t bar_sz; } *bars = (struct bars *)scratch_start; - unsigned int i, nr_bars = 0; + unsigned int i, nr_bars = 0, nr_bars_pref = 0; uint64_t mmio_hole_size = 0; const char *s; @@ -253,9 +253,19 @@ void pci_setup(void) if ( bar_sz == 0 ) continue; - for ( i = 0; i < nr_bars; i++ ) - if ( bars[i].bar_sz < bar_sz ) - break; + if (((bar_data & PCI_BASE_ADDRESS_SPACE) == + PCI_BASE_ADDRESS_SPACE_MEMORY) && + ((bar_data & PCI_BASE_ADDRESS_MEM_PREFETCH) == + PCI_BASE_ADDRESS_MEM_PREFETCH)) { + for ( i = 0; i < nr_bars_pref; i++ ) + if ( bars[i].bar_sz < bar_sz ) + break; + nr_bars_pref++; + } + else + for ( i = nr_bars_pref; i < nr_bars; i++ ) + if ( bars[i].bar_sz < bar_sz ) + break; if ( i != nr_bars ) memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars));