From patchwork Mon Apr 1 17:30:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 10880321 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F363017E1 for ; Mon, 1 Apr 2019 17:04:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D36B026E96 for ; Mon, 1 Apr 2019 17:04:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C67892839C; Mon, 1 Apr 2019 17:04:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4F0BD26E96 for ; Mon, 1 Apr 2019 17:04:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2964D6E137; Mon, 1 Apr 2019 17:04:45 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 747076E120; Mon, 1 Apr 2019 17:04:43 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Apr 2019 10:04:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,297,1549958400"; d="scan'208";a="147073963" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.121]) by orsmga002.jf.intel.com with ESMTP; 01 Apr 2019 10:04:38 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [v2 1/7] drm: Add gamma mode caps property Date: Mon, 1 Apr 2019 23:00:05 +0530 Message-Id: <1554139811-13280-2-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> References: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dcastagna@chromium.org, emil.l.velikov@gmail.com, Uma Shankar , seanpaul@chromium.org, ville.syrjala@intel.com, maarten.lankhorst@intel.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä Add a gamma mode capability property to enable various kind of gamma modes supported by platforms like: Interpolated, Split, Multi Segmented etc. Userspace can get this property and should be able to get the platform capabilties wrt various gamma modes possible and the possible ranges. It can then create the LUT and send it to driver using another gamma mode property as blob. Signed-off-by: Ville Syrjälä Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic_uapi.c | 3 ++ drivers/gpu/drm/drm_color_mgmt.c | 78 +++++++++++++++++++++++++++++++++++++++ include/drm/drm_color_mgmt.h | 8 ++++ include/drm/drm_crtc.h | 7 ++++ include/drm/drm_mode_config.h | 5 +++ include/uapi/drm/drm_mode.h | 38 +++++++++++++++++++ 6 files changed, 139 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index ea797d4..03df2a4 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -495,6 +495,9 @@ static int drm_atomic_crtc_set_property(struct drm_crtc *crtc, *val = (state->mode_blob) ? state->mode_blob->base.id : 0; else if (property == config->prop_vrr_enabled) *val = state->vrr_enabled; + else if (property == config->gamma_mode_caps_property) + *val = (state->gamma_mode_caps) ? + state->gamma_mode_caps->base.id : 0; else if (property == config->degamma_lut_property) *val = (state->degamma_lut) ? state->degamma_lut->base.id : 0; else if (property == config->ctm_property) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index d5d34d0..054f0ed 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -176,6 +176,84 @@ void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, } EXPORT_SYMBOL(drm_crtc_enable_color_mgmt); +void drm_crtc_attach_gamma_mode_caps_property(struct drm_crtc *crtc) +{ + struct drm_device *dev = crtc->dev; + struct drm_mode_config *config = &dev->mode_config; + + if (!config->gamma_mode_caps_property) + return; + + drm_object_attach_property(&crtc->base, + config->gamma_mode_caps_property, 0); +} +EXPORT_SYMBOL(drm_crtc_attach_gamma_mode_caps_property); + +int drm_color_create_gamma_mode_caps_property(struct drm_device *dev, + int num_values) +{ + struct drm_mode_config *config = &dev->mode_config; + struct drm_property *prop; + + prop = drm_property_create(dev, + DRM_MODE_PROP_ENUM | + DRM_MODE_PROP_IMMUTABLE, + "GAMMA_MODE_CAPS", num_values); + if (!prop) + return -ENOMEM; + + config->gamma_mode_caps_property = prop; + + return 0; +} +EXPORT_SYMBOL(drm_color_create_gamma_mode_caps_property); + +int drm_color_add_gamma_mode_range(struct drm_device *dev, + const char *name, + const struct drm_color_lut_range *ranges, + size_t length) +{ + struct drm_mode_config *config = &dev->mode_config; + struct drm_property_blob *blob; + struct drm_property *prop; + int num_ranges = length / sizeof(ranges[0]); + int i, ret, num_types_0; + + if (WARN_ON(length == 0 || length % sizeof(ranges[0]) != 0)) + return -EINVAL; + + num_types_0 = hweight8(ranges[0].flags & (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_DEGAMMA)); + if (num_types_0 == 0) + return -EINVAL; + + for (i = 1; i < num_ranges; i++) { + int num_types = hweight8(ranges[i].flags & (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_DEGAMMA)); + + /* either all ranges have DEGAMMA|GAMMA or none have it */ + if (num_types_0 != num_types) + return -EINVAL; + } + + prop = config->gamma_mode_caps_property; + if (!prop) + return -EINVAL; + + blob = drm_property_create_blob(dev, length, ranges); + if (IS_ERR(blob)) + return PTR_ERR(blob); + + ret = drm_property_add_enum(prop, blob->base.id, name); + if (ret) { + drm_property_blob_put(blob); + return ret; + } + + return 0; +} +EXPORT_SYMBOL(drm_color_add_gamma_mode_range); + /** * drm_mode_crtc_set_gamma_size - set the gamma table size * @crtc: CRTC to set the gamma table size for diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h index d1c662d..e0f94db 100644 --- a/include/drm/drm_color_mgmt.h +++ b/include/drm/drm_color_mgmt.h @@ -51,6 +51,14 @@ static inline int drm_color_lut_size(const struct drm_property_blob *blob) return blob->length / sizeof(struct drm_color_lut); } +int drm_color_create_gamma_mode_caps_property(struct drm_device *dev, + int num_values); +void drm_crtc_attach_gamma_mode_caps_property(struct drm_crtc *crtc); +int drm_color_add_gamma_mode_range(struct drm_device *dev, + const char *name, + const struct drm_color_lut_range *ranges, + size_t length); + enum drm_color_encoding { DRM_COLOR_YCBCR_BT601, DRM_COLOR_YCBCR_BT709, diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 58ad983..cdfda90 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -249,6 +249,13 @@ struct drm_crtc_state { struct drm_property_blob *mode_blob; /** + * @gamma_mode: + * + * FIXME + */ + struct drm_property_blob *gamma_mode_caps; + + /** * @degamma_lut: * * Lookup table for converting framebuffer pixel data before apply the diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index 7f60e8e..7b20355 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -761,6 +761,11 @@ struct drm_mode_config { */ struct drm_property *content_type_property; /** + * @gamma_mode_property: Optional CRTC property to enumerate and + * select the mode of the crtc gamma/degmama LUTs. + */ + struct drm_property *gamma_mode_caps_property; + /** * @degamma_lut_property: Optional CRTC property to set the LUT used to * convert the framebuffer's colors to linear gamma. */ diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index 09d7296..e475f4a 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -629,6 +629,44 @@ struct drm_color_lut { __u16 reserved; }; +/* + * DRM_MODE_LUT_GAMMA|DRM_MODE_LUT_DEGAMMA is legal and means the LUT + * can be used for either purpose, but not simultaneously. To expose + * modes that support gamma and degamma simultaneously the gamma mode + * must declare distinct DRM_MODE_LUT_GAMMA and DRM_MODE_LUT_DEGAMMA + * ranges. + */ +/* LUT is for gamma (after CTM) */ +#define DRM_MODE_LUT_GAMMA (1 << 0) +/* LUT is for degamma (before CTM) */ +#define DRM_MODE_LUT_DEGAMMA (1 << 1) +/* linearly interpolate between the points */ +#define DRM_MODE_LUT_INTERPOLATE (1 << 2) +/* + * the last value of the previous range is the + * first value of the current range. + */ +#define DRM_MODE_LUT_REUSE_LAST (1 << 3) +/* the curve must be non-decreasing */ +#define DRM_MODE_LUT_NON_DECREASING (1 << 4) +/* the curve is reflected across origin for negative inputs */ +#define DRM_MODE_LUT_REFLECT_NEGATIVE (1 << 5) +/* the same curve (red) is used for blue and green channels as well */ +#define DRM_MODE_LUT_SINGLE_CHANNEL (1 << 6) + +struct drm_color_lut_range { + /* DRM_MODE_LUT_* */ + __u32 flags; + /* number of points on the curve */ + __u16 count; + /* input/output bits per component */ + __u8 input_bpc, output_bpc; + /* input start/end values */ + __s32 start, end; + /* output min/max values */ + __s32 min, max; +}; + #define DRM_MODE_PAGE_FLIP_EVENT 0x01 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4 From patchwork Mon Apr 1 17:30:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 10880325 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 99B4D184E for ; Mon, 1 Apr 2019 17:04:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7A13127F92 for ; Mon, 1 Apr 2019 17:04:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6EA6128477; Mon, 1 Apr 2019 17:04:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DDB152839C for ; Mon, 1 Apr 2019 17:04:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E9DA06E23C; Mon, 1 Apr 2019 17:04:47 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id E9E5D6E140; Mon, 1 Apr 2019 17:04:46 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Apr 2019 10:04:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,297,1549958400"; d="scan'208";a="147074009" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.121]) by orsmga002.jf.intel.com with ESMTP; 01 Apr 2019 10:04:42 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [v2 2/7] drm/i915: Define color lut range structure Date: Mon, 1 Apr 2019 23:00:06 +0530 Message-Id: <1554139811-13280-3-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> References: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dcastagna@chromium.org, emil.l.velikov@gmail.com, Uma Shankar , seanpaul@chromium.org, ville.syrjala@intel.com, maarten.lankhorst@intel.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä This defines the color lut ranges for 10bit and multi segmented gamma range for ICL. Signed-off-by: Ville Syrjälä Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/intel_color.c | 301 ++++++++++++++++++++++++++++++++++++- 1 file changed, 297 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c index f2907cf..84d93ec 100644 --- a/drivers/gpu/drm/i915/intel_color.c +++ b/drivers/gpu/drm/i915/intel_color.c @@ -1083,9 +1083,279 @@ static int icl_color_check(struct intel_crtc_state *crtc_state) return 0; } +enum { + I9XX_LUT_SIZE_8BIT = 256, + I9XX_LUT_SIZE_10BIT = 129, + + ILK_LUT_SIZE_10BIT = 1024, + ILK_LUT_SIZE_12BIT = 513, + + IVB_LUT_SIZE_SPLIT = 512, + + CHV_LUT_SIZE_CGM_DEGAMMA = 65, + CHV_LUT_SIZE_CGM_GAMMA = 257, +}; + +#define I9XX_GAMMA_8 \ + { \ + .flags = DRM_MODE_LUT_GAMMA, \ + .count = 256, \ + .input_bpc = 8, .output_bpc = 8, \ + .start = 0, .end = (1 << 8) - 1, \ + .min = 0, .max = (1 << 8) - 1, \ + } + +static const struct drm_color_lut_range i9xx_gamma_8[] = { + I9XX_GAMMA_8, +}; + +static const struct drm_color_lut_range i9xx_gamma_10_slope[] = { + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_NON_DECREASING), + .count = 129, + .input_bpc = 10, .output_bpc = 10, + .start = 0, .end = 1 << 10, + .min = 0, .max = (1 << 10) - 1, + }, +}; + +#define I965_GAMMA_10 \ + { \ + .flags = (DRM_MODE_LUT_GAMMA | \ + DRM_MODE_LUT_INTERPOLATE | \ + DRM_MODE_LUT_NON_DECREASING), \ + .count = 128, \ + .input_bpc = 10, .output_bpc = 16, \ + .start = 0, .end = (1 << 10) - (1 << 10) / 128, \ + .min = 0, .max = (1 << 16) - 1, \ + }, \ + /* PIPEGCMAX */ \ + { \ + .flags = (DRM_MODE_LUT_GAMMA | \ + DRM_MODE_LUT_INTERPOLATE | \ + DRM_MODE_LUT_REUSE_LAST | \ + DRM_MODE_LUT_NON_DECREASING), \ + .count = 1, \ + .input_bpc = 10, .output_bpc = 16, \ + .start = (1 << 10) - (1 << 10) / 128, .end = 1 << 10, \ + .min = 0, .max = 1 << 16, \ + } + +static const struct drm_color_lut_range i965_gamma_10[] = { + I965_GAMMA_10, +}; + +static const struct drm_color_lut_range ilk_gamma_degamma_8[] = { + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_DEGAMMA), + .count = 256, + .input_bpc = 8, .output_bpc = 8, + .start = 0, .end = (1 << 8) - 1, + .min = 0, .max = (1 << 8) - 1, + }, +}; + +static const struct drm_color_lut_range ilk_gamma_degamma_10[] = { + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_DEGAMMA), + .count = 1024, + .input_bpc = 10, .output_bpc = 10, + .start = 0, .end = (1 << 10) - 1, + .min = 0, .max = (1 << 10) - 1, + }, +}; + +static const struct drm_color_lut_range ilk_gamma_degamma_12p4[] = { + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_DEGAMMA | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_NON_DECREASING), + .count = 512, + .input_bpc = 12, .output_bpc = 16, + .start = 0, .end = (1 << 12) - (1 << 12) / 512, + .min = 0, .max = (1 << 16) - 1, + }, + /* PIPEGCMAX */ + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_DEGAMMA | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_REUSE_LAST | + DRM_MODE_LUT_NON_DECREASING), + .count = 1, + .input_bpc = 10, .output_bpc = 16, + .start = (1 << 12) - (1 << 12) / 512, .end = 1 << 12, + .min = 0, .max = 1 << 16, + }, +}; + +static const struct drm_color_lut_range glk_gamma_10[] = { + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_REFLECT_NEGATIVE), + .count = 1024, + .input_bpc = 10, .output_bpc = 10, + .start = 0, .end = (1 << 10) - 1, + .min = 0, .max = (1 << 10) - 1, + }, + /* PAL_EXT_GC_MAX */ + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_REFLECT_NEGATIVE | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_REUSE_LAST | + DRM_MODE_LUT_NON_DECREASING), + .count = 1, + .input_bpc = 10, .output_bpc = 16, + .start = 1 << 10, .end = 3 << 10, + .min = 0, .max = (8 << 16) - 1, + }, + /* PAL_EXT2_GC_MAX */ + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_REFLECT_NEGATIVE | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_REUSE_LAST | + DRM_MODE_LUT_NON_DECREASING), + .count = 1, + .input_bpc = 10, .output_bpc = 16, + .start = 3 << 12, .end = 7 << 12, + .min = 0, .max = (8 << 16) - 1, + }, +}; + +/* FIXME input bpc? */ +static const struct drm_color_lut_range glk_gamma_12p4[] = { + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_REFLECT_NEGATIVE | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_NON_DECREASING), + .count = 512, + .input_bpc = 16, .output_bpc = 16, + .start = 0, .end = (1 << 16) - (1 << 16) / 512, + .min = 0, .max = (1 << 16) - 1, + }, + /* PAL_GC_MAX */ + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_REFLECT_NEGATIVE | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_REUSE_LAST | + DRM_MODE_LUT_NON_DECREASING), + .count = 1, + .input_bpc = 16, .output_bpc = 16, + .start = (1 << 16) - (1 << 16) / 512, .end = 1 << 16, + .min = 0, .max = 1 << 16, + }, + /* PAL_EXT_GC_MAX */ + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_REFLECT_NEGATIVE | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_REUSE_LAST | + DRM_MODE_LUT_NON_DECREASING), + .count = 1, + .input_bpc = 16, .output_bpc = 16, + .start = 1 << 16, .end = 3 << 16, + .min = 0, .max = (8 << 16) - 1, + }, + /* PAL_EXT2_GC_MAX */ + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_REFLECT_NEGATIVE | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_REUSE_LAST | + DRM_MODE_LUT_NON_DECREASING), + .count = 1, + .input_bpc = 16, .output_bpc = 16, + .start = 3 << 16, .end = 7 << 16, + .min = 0, .max = (8 << 16) - 1, + }, +}; + + /* FIXME input bpc? */ +static const struct drm_color_lut_range icl_multi_seg_gamma[] = { + /* segment 1 aka. super fine segment */ + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_REFLECT_NEGATIVE | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_NON_DECREASING), + .count = 9, + .input_bpc = 24, .output_bpc = 16, + .start = 0, .end = (1 << 24) / (128 * 256), + .min = 0, .max = (1 << 16) - 1, + }, + /* segment 2 aka. fine segment */ + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_REFLECT_NEGATIVE | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_NON_DECREASING), + .count = 257, + .input_bpc = 24, .output_bpc = 16, + .start = 0, .end = (1 << 24) / 128, + .min = 0, .max = (1 << 16) - 1, + }, + /* segment 3 aka. coarse segment */ + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_REFLECT_NEGATIVE | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_NON_DECREASING), + .count = 257, + .input_bpc = 24, .output_bpc = 16, + .start = 0, .end = (1 << 24) - (1 << 24) / 256, + .min = 0, .max = (1 << 16) - 1, + }, + /* segment 3 aka. coarse segment / PAL_GC_MAX */ + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_REFLECT_NEGATIVE | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_REUSE_LAST | + DRM_MODE_LUT_NON_DECREASING), + .count = 1, + .input_bpc = 24, .output_bpc = 16, + .start = (1 << 24) - (1 << 24) / 256, .end = 1 << 24, + .min = 0, .max = 1 << 16, + }, + /* PAL_EXT_GC_MAX */ + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_REFLECT_NEGATIVE | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_REUSE_LAST | + DRM_MODE_LUT_NON_DECREASING), + .count = 1, + .input_bpc = 24, .output_bpc = 16, + .start = 1 << 24, .end = 3 << 24, + .min = 0, .max = (8 << 16) - 1, + }, + /* PAL_EXT2_GC_MAX */ + { + .flags = (DRM_MODE_LUT_GAMMA | + DRM_MODE_LUT_REFLECT_NEGATIVE | + DRM_MODE_LUT_INTERPOLATE | + DRM_MODE_LUT_REUSE_LAST | + DRM_MODE_LUT_NON_DECREASING), + .count = 1, + .input_bpc = 24, .output_bpc = 16, + .start = 3 << 24, .end = 7 << 24, + .min = 0, .max = (8 << 16) - 1, + }, +}; + void intel_color_init(struct intel_crtc *crtc) { struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + int degamma_lut_size, gamma_lut_size; drm_mode_crtc_set_gamma_size(&crtc->base, 256); @@ -1100,14 +1370,37 @@ void intel_color_init(struct intel_crtc *crtc) dev_priv->display.load_luts = i9xx_load_luts; } } else { - if (INTEL_GEN(dev_priv) >= 11) + if (INTEL_GEN(dev_priv) >= 11) { dev_priv->display.color_check = icl_color_check; - else if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) + + /* don't advertize the >= 1.0 entries */ + degamma_lut_size = 0; + gamma_lut_size = ILK_LUT_SIZE_10BIT; + + drm_color_add_gamma_mode_range(&dev_priv->drm, + "8bit gamma", + i9xx_gamma_8, + sizeof(i9xx_gamma_8)); + drm_color_add_gamma_mode_range(&dev_priv->drm, + "10bit gamma", + glk_gamma_10, + sizeof(glk_gamma_10)); + drm_color_add_gamma_mode_range(&dev_priv->drm, + "interpolated gamma", + glk_gamma_12p4, + sizeof(glk_gamma_12p4)); + drm_color_add_gamma_mode_range(&dev_priv->drm, + "multi-segmented gamma", + icl_multi_seg_gamma, + sizeof(icl_multi_seg_gamma)); + } else if (INTEL_GEN(dev_priv) >= 10 || + IS_GEMINILAKE(dev_priv)) { dev_priv->display.color_check = glk_color_check; - else if (INTEL_GEN(dev_priv) >= 8) + } else if (INTEL_GEN(dev_priv) >= 8) { dev_priv->display.color_check = bdw_color_check; - else + } else { dev_priv->display.color_check = ilk_color_check; + } if (INTEL_GEN(dev_priv) >= 9) dev_priv->display.color_commit = skl_color_commit; From patchwork Mon Apr 1 17:30:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 10880329 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E8BD8184E for ; Mon, 1 Apr 2019 17:04:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CD69926E96 for ; Mon, 1 Apr 2019 17:04:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C15ED2839C; Mon, 1 Apr 2019 17:04:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 61CB526E96 for ; Mon, 1 Apr 2019 17:04:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 075686E6A5; Mon, 1 Apr 2019 17:04:52 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id B55E46E6A5; Mon, 1 Apr 2019 17:04:50 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Apr 2019 10:04:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,297,1549958400"; d="scan'208";a="147074023" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.121]) by orsmga002.jf.intel.com with ESMTP; 01 Apr 2019 10:04:46 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [v2 3/7] drm: Add gamma mode property Date: Mon, 1 Apr 2019 23:00:07 +0530 Message-Id: <1554139811-13280-4-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> References: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dcastagna@chromium.org, emil.l.velikov@gmail.com, Uma Shankar , seanpaul@chromium.org, ville.syrjala@intel.com, maarten.lankhorst@intel.com MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add Gamma Mode property to set the gamma mode (Interploated, Split, Multi Segmented etc) from the list obtained through the gamma mode caps property. Create the blob and send to driver for programming the luts to the appropriate registers and setting the chosen gamma mode. Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic_uapi.c | 10 ++++++++++ drivers/gpu/drm/drm_color_mgmt.c | 32 ++++++++++++++++++++++++++++++++ include/drm/drm_color_mgmt.h | 3 +++ include/drm/drm_crtc.h | 7 +++++++ include/drm/drm_mode_config.h | 5 +++++ include/uapi/drm/drm_mode.h | 11 +++++++++++ 6 files changed, 68 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 03df2a4..d3008ea 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -459,6 +459,14 @@ static int drm_atomic_crtc_set_property(struct drm_crtc *crtc, &replaced); state->color_mgmt_changed |= replaced; return ret; + } else if (property == config->gamma_mode_property) { + ret = drm_atomic_replace_property_blob_from_id(dev, + &state->gamma_mode, + val, + -1, sizeof(struct drm_color_mode_lut), + &replaced); + state->color_mgmt_changed |= replaced; + return ret; } else if (property == config->prop_out_fence_ptr) { s32 __user *fence_ptr = u64_to_user_ptr(val); @@ -498,6 +506,8 @@ static int drm_atomic_crtc_set_property(struct drm_crtc *crtc, else if (property == config->gamma_mode_caps_property) *val = (state->gamma_mode_caps) ? state->gamma_mode_caps->base.id : 0; + else if (property == config->gamma_mode_property) + *val = (state->gamma_mode) ? state->gamma_mode->base.id : 0; else if (property == config->degamma_lut_property) *val = (state->degamma_lut) ? state->degamma_lut->base.id : 0; else if (property == config->ctm_property) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index 054f0ed..cba1d6d 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -176,6 +176,38 @@ void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, } EXPORT_SYMBOL(drm_crtc_enable_color_mgmt); +void drm_crtc_attach_gamma_mode_property(struct drm_crtc *crtc) +{ + struct drm_device *dev = crtc->dev; + struct drm_mode_config *config = &dev->mode_config; + + if (!config->gamma_mode_property) + return; + + drm_object_attach_property(&crtc->base, + config->gamma_mode_property, 0); +} +EXPORT_SYMBOL(drm_crtc_attach_gamma_mode_property); + +int drm_color_create_gamma_mode_property(struct drm_device *dev, + int num_values) +{ + struct drm_mode_config *config = &dev->mode_config; + struct drm_property *prop; + + prop = drm_property_create(dev, + DRM_MODE_PROP_BLOB | + DRM_MODE_PROP_ATOMIC, + "GAMMA_MODE", num_values); + if (!prop) + return -ENOMEM; + + config->gamma_mode_property = prop; + + return 0; +} +EXPORT_SYMBOL(drm_color_create_gamma_mode_property); + void drm_crtc_attach_gamma_mode_caps_property(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h index e0f94db..4306e07 100644 --- a/include/drm/drm_color_mgmt.h +++ b/include/drm/drm_color_mgmt.h @@ -54,6 +54,9 @@ static inline int drm_color_lut_size(const struct drm_property_blob *blob) int drm_color_create_gamma_mode_caps_property(struct drm_device *dev, int num_values); void drm_crtc_attach_gamma_mode_caps_property(struct drm_crtc *crtc); +int drm_color_create_gamma_mode_property(struct drm_device *dev, + int num_values); +void drm_crtc_attach_gamma_mode_property(struct drm_crtc *crtc); int drm_color_add_gamma_mode_range(struct drm_device *dev, const char *name, const struct drm_color_lut_range *ranges, diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index cdfda90..bc8a2e7 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -256,6 +256,13 @@ struct drm_crtc_state { struct drm_property_blob *gamma_mode_caps; /** + * @gamma_mode: + * + * FIXME + */ + struct drm_property_blob *gamma_mode; + + /** * @degamma_lut: * * Lookup table for converting framebuffer pixel data before apply the diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index 7b20355..f5bb807 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -766,6 +766,11 @@ struct drm_mode_config { */ struct drm_property *gamma_mode_caps_property; /** + * @gamma_mode_property: Optional CRTC property to enumerate and + * select the mode of the crtc gamma/degmama LUTs. + */ + struct drm_property *gamma_mode_property; + /** * @degamma_lut_property: Optional CRTC property to set the LUT used to * convert the framebuffer's colors to linear gamma. */ diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index e475f4a..e84389d 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -667,6 +667,17 @@ struct drm_color_lut_range { __s32 min, max; }; +struct drm_color_mode_lut { + /* DRM_MODE_LUT_* */ + __u32 flags; + /* number of points on the curve */ + __u32 count; + /* Name of Gamma Mode */ + char name[DRM_PROP_NAME_LEN]; + /* Pointer to Lut elements */ + __u64 lut; +}; + #define DRM_MODE_PAGE_FLIP_EVENT 0x01 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4 From patchwork Mon Apr 1 17:30:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 10880333 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AE10217E1 for ; Mon, 1 Apr 2019 17:04:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9302526E96 for ; Mon, 1 Apr 2019 17:04:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 865512839C; Mon, 1 Apr 2019 17:04:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4D02F26E96 for ; Mon, 1 Apr 2019 17:04:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 585BC6E6C2; Mon, 1 Apr 2019 17:04:56 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5C1556E6BF; Mon, 1 Apr 2019 17:04:54 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Apr 2019 10:04:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,297,1549958400"; d="scan'208";a="147074083" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.121]) by orsmga002.jf.intel.com with ESMTP; 01 Apr 2019 10:04:50 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [v2 4/7] drm/i915/icl: Add register definitions for Multi Segmented gamma Date: Mon, 1 Apr 2019 23:00:08 +0530 Message-Id: <1554139811-13280-5-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> References: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dcastagna@chromium.org, emil.l.velikov@gmail.com, Uma Shankar , seanpaul@chromium.org, ville.syrjala@intel.com, maarten.lankhorst@intel.com MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add macros to define multi segmented gamma registers Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_reg.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 341f03e..f95f82f 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7218,6 +7218,7 @@ enum { #define GAMMA_MODE_MODE_10BIT (1 << 0) #define GAMMA_MODE_MODE_12BIT (2 << 0) #define GAMMA_MODE_MODE_SPLIT (3 << 0) +#define GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED (3 << 0) /* DMC/CSR */ #define CSR_PROGRAM(i) _MMIO(0x80000 + (i) * 4) @@ -10157,6 +10158,22 @@ enum skl_power_gate { #define PRE_CSC_GAMC_INDEX(pipe) _MMIO_PIPE(pipe, _PRE_CSC_GAMC_INDEX_A, _PRE_CSC_GAMC_INDEX_B) #define PRE_CSC_GAMC_DATA(pipe) _MMIO_PIPE(pipe, _PRE_CSC_GAMC_DATA_A, _PRE_CSC_GAMC_DATA_B) +/* Add registers for Gen11 Multi Segmented Gamma Mode */ +#define _PAL_PREC_MULTI_SEG_INDEX_A 0x4A408 +#define _PAL_PREC_MULTI_SEG_INDEX_B 0x4AC08 +#define PAL_PREC_MULTI_SEGMENT_AUTO_INCREMENT BIT(15) +#define PAL_PREC_MULTI_SEGMENT_INDEX_VALUE_MASK (0x1f << 0) + +#define _PAL_PREC_MULTI_SEG_DATA_A 0x4A40C +#define _PAL_PREC_MULTI_SEG_DATA_B 0x4AC0C + +#define PREC_PAL_MULTI_SEG_INDEX(pipe) _MMIO_PIPE(pipe, \ + _PAL_PREC_MULTI_SEG_INDEX_A, \ + _PAL_PREC_MULTI_SEG_INDEX_B) +#define PREC_PAL_MULTI_SEG_DATA(pipe) _MMIO_PIPE(pipe, \ + _PAL_PREC_MULTI_SEG_DATA_A, \ + _PAL_PREC_MULTI_SEG_DATA_B) + /* pipe CSC & degamma/gamma LUTs on CHV */ #define _CGM_PIPE_A_CSC_COEFF01 (VLV_DISPLAY_BASE + 0x67900) #define _CGM_PIPE_A_CSC_COEFF23 (VLV_DISPLAY_BASE + 0x67904) From patchwork Mon Apr 1 17:30:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 10880335 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B1FEC17E1 for ; Mon, 1 Apr 2019 17:05:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 95EC226E96 for ; Mon, 1 Apr 2019 17:05:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 88EEB285CD; Mon, 1 Apr 2019 17:05:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0598826E96 for ; Mon, 1 Apr 2019 17:05:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 027EA6E6BF; Mon, 1 Apr 2019 17:05:00 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9B2006E6BF; Mon, 1 Apr 2019 17:04:58 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Apr 2019 10:04:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,297,1549958400"; d="scan'208";a="147074155" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.121]) by orsmga002.jf.intel.com with ESMTP; 01 Apr 2019 10:04:54 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [v2 5/7] drm/i915/icl: Add support for multi segmented gamma mode Date: Mon, 1 Apr 2019 23:00:09 +0530 Message-Id: <1554139811-13280-6-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> References: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dcastagna@chromium.org, emil.l.velikov@gmail.com, Uma Shankar , seanpaul@chromium.org, ville.syrjala@intel.com, maarten.lankhorst@intel.com MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Gen11 introduced a new gamma mode i.e, multi segmented gamma mode. Added support for the same. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/intel_color.c | 161 ++++++++++++++++++++++++++++++++++++- include/drm/drm_crtc.h | 3 + 2 files changed, 161 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c index 84d93ec..d81de32 100644 --- a/drivers/gpu/drm/i915/intel_color.c +++ b/drivers/gpu/drm/i915/intel_color.c @@ -57,6 +57,12 @@ #define ILK_CSC_POSTOFF_LIMITED_RANGE (16 * (1 << 12) / 255) +#define LEGACY_PALETTE_MODE_8BIT BIT(0) +#define PRECISION_PALETTE_MODE_10BIT BIT(1) +#define INTERPOLATED_GAMMA_MODE_12BIT BIT(2) +#define MULTI_SEGMENTED_GAMMA_MODE_12BIT BIT(3) +#define SPLIT_GAMMA_MODE_12BIT BIT(4) + static const u16 ilk_csc_off_zero[3] = {}; static const u16 ilk_csc_coeff_identity[9] = { @@ -92,6 +98,9 @@ 0x0800, 0x0100, 0x0800, }; +#define GEN11_GET_MS10BITS_OF_LUT(lut) (((lut) >> 6) & 0x3FF) +#define GEN11_GET_LS6BITS_OF_LUT(lut) ((lut) & 0x3F) + static bool lut_is_legacy(const struct drm_property_blob *lut) { return drm_color_lut_size(lut) == LEGACY_LUT_LENGTH; @@ -670,16 +679,149 @@ static void glk_load_luts(const struct intel_crtc_state *crtc_state) bdw_load_gamma_lut(crtc_state, 0); } +static void icl_program_coarse_segment_lut(const struct intel_crtc_state + *crtc_state, + struct drm_color_lut *gamma_lut, + u32 offset) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + const struct drm_color_lut *lut = gamma_lut; + enum pipe pipe = crtc->pipe; + u32 i, lut_size, word; + + WARN_ON(offset & ~PAL_PREC_INDEX_VALUE_MASK); + + I915_WRITE(PREC_PAL_INDEX(pipe), + (offset ? PAL_PREC_SPLIT_MODE : 0) | + PAL_PREC_AUTO_INCREMENT | + offset); + + if (lut && crtc_state->base.gamma_mode_type == + MULTI_SEGMENTED_GAMMA_MODE_12BIT) { + lut_size = 9 + 514; + for (i = 9; i < lut_size; i++) { + /* For Even Index */ + word = (GEN11_GET_LS6BITS_OF_LUT(lut[i].red) << 20) | + (GEN11_GET_LS6BITS_OF_LUT(lut[i].green) << 10) | + GEN11_GET_LS6BITS_OF_LUT(lut[i].blue); + + I915_WRITE(PREC_PAL_DATA(pipe), word); + + /* For ODD index */ + word = (GEN11_GET_MS10BITS_OF_LUT(lut[i].red) << 20) | + (GEN11_GET_MS10BITS_OF_LUT(lut[i].green) << 10) | + GEN11_GET_MS10BITS_OF_LUT(lut[i].blue); + + I915_WRITE(PREC_PAL_DATA(pipe), word); + } + } + + /* + * Program the max register to clamp values > 1.0. + * ToDo: Extend the ABI to be able to program values + * from 1.0 + */ + I915_WRITE(PREC_PAL_GC_MAX(pipe, 0), (1 << 16)); + I915_WRITE(PREC_PAL_GC_MAX(pipe, 1), (1 << 16)); + I915_WRITE(PREC_PAL_GC_MAX(pipe, 2), (1 << 16)); + + /* + * Program the max register to clamp values > 1.0. + * ToDo: Extend the ABI to be able to program values + * from 1.0 to 3.0 + */ + I915_WRITE(PREC_PAL_EXT_GC_MAX(pipe, 0), (1 << 16)); + I915_WRITE(PREC_PAL_EXT_GC_MAX(pipe, 1), (1 << 16)); + I915_WRITE(PREC_PAL_EXT_GC_MAX(pipe, 2), (1 << 16)); + + /* + * Program the gc max 2 register to clamp values > 1.0. + * ToDo: Extend the ABI to be able to program values + * from 3.0 to 7.0 + */ + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) { + I915_WRITE(PREC_PAL_EXT2_GC_MAX(pipe, 0), (1 << 16)); + I915_WRITE(PREC_PAL_EXT2_GC_MAX(pipe, 1), (1 << 16)); + I915_WRITE(PREC_PAL_EXT2_GC_MAX(pipe, 2), (1 << 16)); + } +} + +static void icl_program_fine_segment_lut(const struct intel_crtc_state + *crtc_state, + struct drm_color_lut *gamma_lut, + u32 offset) +{ + struct drm_crtc *crtc = crtc_state->base.crtc; + struct drm_device *dev = crtc_state->base.crtc->dev; + struct drm_i915_private *dev_priv = to_i915(dev); + enum pipe pipe = to_intel_crtc(crtc)->pipe; + u32 i, word, lut_size = 9; + + WARN_ON(offset & ~PAL_PREC_MULTI_SEGMENT_INDEX_VALUE_MASK); + + I915_WRITE(PREC_PAL_MULTI_SEG_INDEX(pipe), + (PAL_PREC_AUTO_INCREMENT | offset)); + + if (gamma_lut) { + struct drm_color_lut *lut = + (struct drm_color_lut *)gamma_lut; + + for (i = 0; i < lut_size; i++) { + /* For Even Index */ + word = (GEN11_GET_LS6BITS_OF_LUT(lut[i].red) << 20) | + (GEN11_GET_LS6BITS_OF_LUT(lut[i].green) << 10) | + GEN11_GET_LS6BITS_OF_LUT(lut[i].blue); + + I915_WRITE(PREC_PAL_MULTI_SEG_DATA(pipe), word); + + /* For ODD index */ + word = (GEN11_GET_MS10BITS_OF_LUT(lut[i].red) << 20) | + (GEN11_GET_MS10BITS_OF_LUT(lut[i].green) << 10) | + GEN11_GET_MS10BITS_OF_LUT(lut[i].blue); + + I915_WRITE(PREC_PAL_MULTI_SEG_DATA(pipe), word); + } + } +} + +static void icl_load_gamma_multi_segmented_lut(const struct intel_crtc_state + *crtc_state, u32 offset) +{ + const struct drm_property_blob *gamma_mode_blob = + crtc_state->base.gamma_mode; + struct drm_color_lut *gamma_lut; + int ret; + + if (gamma_mode_blob) { + struct drm_color_mode_lut *arg = gamma_mode_blob->data; + u64 __user *props_ptr = (u64 __user *)(unsigned long)(arg->lut); + + DRM_INFO("Gamma Mode=%s\n", arg->name); + gamma_lut = kmalloc((sizeof(struct drm_color_lut) * arg->count), + GFP_KERNEL); + ret = copy_from_user(gamma_lut, props_ptr, + sizeof(struct drm_color_lut) * arg->count); + } + + icl_program_fine_segment_lut(crtc_state, gamma_lut, 0); + icl_program_coarse_segment_lut(crtc_state, gamma_lut, 0); +} + static void icl_load_luts(const struct intel_crtc_state *crtc_state) { if (crtc_state->base.degamma_lut) glk_load_degamma_lut(crtc_state); - if (crtc_state_is_legacy_gamma(crtc_state)) + if (crtc_state_is_legacy_gamma(crtc_state)) { i9xx_load_luts(crtc_state); - else + } else if (crtc_state->base.gamma_mode_type == + MULTI_SEGMENTED_GAMMA_MODE_12BIT) { + icl_load_gamma_multi_segmented_lut(crtc_state, 0); + } else { /* ToDo: Add support for multi segment gamma LUT */ bdw_load_gamma_lut(crtc_state, 0); + } } static void cherryview_load_luts(const struct intel_crtc_state *crtc_state) @@ -1034,10 +1176,20 @@ static int glk_color_check(struct intel_crtc_state *crtc_state) return 0; } -static u32 icl_gamma_mode(const struct intel_crtc_state *crtc_state) +static u32 icl_gamma_mode(struct intel_crtc_state *crtc_state) { + const struct drm_property_blob *gamma_mode_blob = + crtc_state->base.gamma_mode; + struct drm_color_mode_lut *arg; u32 gamma_mode = 0; + if (gamma_mode_blob) { + arg = gamma_mode_blob->data; + if (!strcmp(arg->name, "multi-segmented gamma")) + crtc_state->base.gamma_mode_type = + MULTI_SEGMENTED_GAMMA_MODE_12BIT; + } + if (crtc_state->base.degamma_lut) gamma_mode |= PRE_CSC_GAMMA_ENABLE; @@ -1048,6 +1200,9 @@ static u32 icl_gamma_mode(const struct intel_crtc_state *crtc_state) if (!crtc_state->base.gamma_lut || crtc_state_is_legacy_gamma(crtc_state)) gamma_mode |= GAMMA_MODE_MODE_8BIT; + else if (crtc_state->base.gamma_mode_type == + MULTI_SEGMENTED_GAMMA_MODE_12BIT) + gamma_mode |= GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED; else gamma_mode |= GAMMA_MODE_MODE_10BIT; diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index bc8a2e7..a8d0b4c 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -262,6 +262,9 @@ struct drm_crtc_state { */ struct drm_property_blob *gamma_mode; + /* Gamma mode type programmed on the pipe */ + u32 gamma_mode_type; + /** * @degamma_lut: * From patchwork Mon Apr 1 17:30:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 10880341 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 137C817E1 for ; Mon, 1 Apr 2019 17:05:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EC1AD26E96 for ; Mon, 1 Apr 2019 17:05:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DFF32284C7; Mon, 1 Apr 2019 17:05:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A919E26E96 for ; Mon, 1 Apr 2019 17:05:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 283446E6C4; Mon, 1 Apr 2019 17:05:05 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 739DA6E6C4; Mon, 1 Apr 2019 17:05:02 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Apr 2019 10:05:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,297,1549958400"; d="scan'208";a="147074204" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.121]) by orsmga002.jf.intel.com with ESMTP; 01 Apr 2019 10:04:58 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [v2 6/7] drm/i915: Add gamma mode caps property Date: Mon, 1 Apr 2019 23:00:10 +0530 Message-Id: <1554139811-13280-7-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> References: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dcastagna@chromium.org, emil.l.velikov@gmail.com, Uma Shankar , seanpaul@chromium.org, ville.syrjala@intel.com, maarten.lankhorst@intel.com MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Create the gamma mode caps property and attach to crtc. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/intel_color.c | 2 ++ drivers/gpu/drm/i915/intel_display.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c index d81de32..d7f835e 100644 --- a/drivers/gpu/drm/i915/intel_color.c +++ b/drivers/gpu/drm/i915/intel_color.c @@ -1528,6 +1528,8 @@ void intel_color_init(struct intel_crtc *crtc) if (INTEL_GEN(dev_priv) >= 11) { dev_priv->display.color_check = icl_color_check; + drm_crtc_attach_gamma_mode_caps_property(&crtc->base); + /* don't advertize the >= 1.0 entries */ degamma_lut_size = 0; gamma_lut_size = ILK_LUT_SIZE_10BIT; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 8576a7f..3b62b2b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -15606,6 +15606,9 @@ int intel_modeset_init(struct drm_device *dev) INTEL_INFO(dev_priv)->num_pipes, INTEL_INFO(dev_priv)->num_pipes > 1 ? "s" : ""); + if (INTEL_GEN(dev_priv) >= 11) + drm_color_create_gamma_mode_caps_property(&dev_priv->drm, 4); + for_each_pipe(dev_priv, pipe) { ret = intel_crtc_init(dev_priv, pipe); if (ret) { From patchwork Mon Apr 1 17:30:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 10880345 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0E26F1800 for ; Mon, 1 Apr 2019 17:05:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E63FB26E96 for ; Mon, 1 Apr 2019 17:05:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DA71C284C7; Mon, 1 Apr 2019 17:05:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A51EC26E96 for ; Mon, 1 Apr 2019 17:05:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8B4BE6E6C7; Mon, 1 Apr 2019 17:05:08 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 602C26E6C7; Mon, 1 Apr 2019 17:05:06 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Apr 2019 10:05:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,297,1549958400"; d="scan'208";a="147074251" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.121]) by orsmga002.jf.intel.com with ESMTP; 01 Apr 2019 10:05:02 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [v2 7/7] drm/i915: Attach gamma mode property Date: Mon, 1 Apr 2019 23:00:11 +0530 Message-Id: <1554139811-13280-8-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> References: <1554139811-13280-1-git-send-email-uma.shankar@intel.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dcastagna@chromium.org, emil.l.velikov@gmail.com, Uma Shankar , seanpaul@chromium.org, ville.syrjala@intel.com, maarten.lankhorst@intel.com MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Attach the gamma mode property to allow userspace set the gamma mode and provide the luts for the same. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/intel_color.c | 1 + drivers/gpu/drm/i915/intel_display.c | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c index d7f835e..95c49d4 100644 --- a/drivers/gpu/drm/i915/intel_color.c +++ b/drivers/gpu/drm/i915/intel_color.c @@ -1529,6 +1529,7 @@ void intel_color_init(struct intel_crtc *crtc) dev_priv->display.color_check = icl_color_check; drm_crtc_attach_gamma_mode_caps_property(&crtc->base); + drm_crtc_attach_gamma_mode_property(&crtc->base); /* don't advertize the >= 1.0 entries */ degamma_lut_size = 0; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3b62b2b..4cab112 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -15606,8 +15606,10 @@ int intel_modeset_init(struct drm_device *dev) INTEL_INFO(dev_priv)->num_pipes, INTEL_INFO(dev_priv)->num_pipes > 1 ? "s" : ""); - if (INTEL_GEN(dev_priv) >= 11) + if (INTEL_GEN(dev_priv) >= 11) { drm_color_create_gamma_mode_caps_property(&dev_priv->drm, 4); + drm_color_create_gamma_mode_property(&dev_priv->drm, 0); + } for_each_pipe(dev_priv, pipe) { ret = intel_crtc_init(dev_priv, pipe);