Message ID | 20090924233920.6065.16789.stgit@localhost (mailing list archive) |
---|---|
State | Awaiting Upstream, archived |
Headers | show |
On 09/25/2009 02:39 AM, Tony Lindgren wrote: > From: Hiroshi DOYU<Hiroshi.DOYU@nokia.com> > > The only way to flush posted write to L4 bus is to do a read back > of the same register right after the write. Just curious, is it really necessary to read back the _same_ register? Would reading back any L4 bus-related register be sufficient?
* Artem Bityutskiy <dedekind1@gmail.com> [090925 00:15]: > On 09/25/2009 02:39 AM, Tony Lindgren wrote: >> From: Hiroshi DOYU<Hiroshi.DOYU@nokia.com> >> >> The only way to flush posted write to L4 bus is to do a read back >> of the same register right after the write. > > Just curious, is it really necessary to read back the _same_ register? > Would reading back any L4 bus-related register be sufficient? It seems that reading back any register in the same device will do it. Tony -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 5bf9a2f..f3fefca 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c @@ -176,6 +176,9 @@ static void omap2_mbox_ack_irq(struct omap_mbox *mbox, u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; mbox_write_reg(bit, p->irqstatus); + + /* Flush posted write for irq status to avoid spurious interrupts */ + mbox_read_reg(p->irqstatus); } static int omap2_mbox_is_irq(struct omap_mbox *mbox,