| Message ID | 1431958201-15601-1-git-send-email-jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, May 18, 2015 at 05:10:01PM +0300, Jani Nikula wrote: > Be in line with other features that we have. > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> Looks good to me. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
On Mon, May 18, 2015 at 03:26:54PM +0100, Damien Lespiau wrote: > On Mon, May 18, 2015 at 05:10:01PM +0300, Jani Nikula wrote: > > Be in line with other features that we have. > > > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > > Looks good to me. > > Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Queued for -next, thanks for the patch. Aside: Someone with lots of surplus good taste (i.e. not me) should try to figure out how we decide to init connectors. Atm it's a mess of checks mixed between intel_*_init and intel_setup_outputs ... -Daniel > > -- > Damien > > > --- > > drivers/gpu/drm/i915/i915_drv.h | 3 +++ > > drivers/gpu/drm/i915/intel_dp.c | 10 ++++------ > > 2 files changed, 7 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > > index 6a66d6b7d33b..11e0059abd2c 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.h > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > @@ -2448,6 +2448,9 @@ struct drm_i915_cmd_table { > > > > #define HAS_IPS(dev) (IS_HSW_ULT(dev) || IS_BROADWELL(dev)) > > > > +#define HAS_DP_MST(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \ > > + INTEL_INFO(dev)->gen >= 9) > > + > > #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi) > > #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) > > #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \ > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > > index 6e9f14ef2d2d..0edc30516497 100644 > > --- a/drivers/gpu/drm/i915/intel_dp.c > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > @@ -5817,12 +5817,10 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, > > intel_dp_aux_init(intel_dp, intel_connector); > > > > /* init MST on ports that can support it */ > > - if (IS_HASWELL(dev) || IS_BROADWELL(dev) || INTEL_INFO(dev)->gen >= 9) { > > - if (port == PORT_B || port == PORT_C || port == PORT_D) { > > - intel_dp_mst_encoder_init(intel_dig_port, > > - intel_connector->base.base.id); > > - } > > - } > > + if (HAS_DP_MST(dev) && > > + (port == PORT_B || port == PORT_C || port == PORT_D)) > > + intel_dp_mst_encoder_init(intel_dig_port, > > + intel_connector->base.base.id); > > > > if (!intel_edp_init_connector(intel_dp, intel_connector)) { > > drm_dp_aux_unregister(&intel_dp->aux); > > -- > > 2.1.4 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6428
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 234/234 234/234
ILK 262/262 262/262
SNB -1 282/282 281/282
IVB 300/300 300/300
BYT 254/254 254/254
BDW 275/275 275/275
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
SNB igt@pm_rpm@dpms-mode-unset-non-lpsp DMESG_WARN(6)PASS(1) DMESG_WARN(1)
(dmesg patch applied)WARNING:at_drivers/gpu/drm/i915/intel_uncore.c:#assert_device_not_suspended[i915]()@WARNING:.* at .* assert_device_not_suspended+0x
Note: You need to pay more attention to line start with '*'
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 6a66d6b7d33b..11e0059abd2c 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2448,6 +2448,9 @@ struct drm_i915_cmd_table { #define HAS_IPS(dev) (IS_HSW_ULT(dev) || IS_BROADWELL(dev)) +#define HAS_DP_MST(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \ + INTEL_INFO(dev)->gen >= 9) + #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi) #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \ diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 6e9f14ef2d2d..0edc30516497 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -5817,12 +5817,10 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, intel_dp_aux_init(intel_dp, intel_connector); /* init MST on ports that can support it */ - if (IS_HASWELL(dev) || IS_BROADWELL(dev) || INTEL_INFO(dev)->gen >= 9) { - if (port == PORT_B || port == PORT_C || port == PORT_D) { - intel_dp_mst_encoder_init(intel_dig_port, - intel_connector->base.base.id); - } - } + if (HAS_DP_MST(dev) && + (port == PORT_B || port == PORT_C || port == PORT_D)) + intel_dp_mst_encoder_init(intel_dig_port, + intel_connector->base.base.id); if (!intel_edp_init_connector(intel_dp, intel_connector)) { drm_dp_aux_unregister(&intel_dp->aux);
Be in line with other features that we have. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 3 +++ drivers/gpu/drm/i915/intel_dp.c | 10 ++++------ 2 files changed, 7 insertions(+), 6 deletions(-)