| Message ID | 1430834787-10255-5-git-send-email-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
> -----Original Message----- > From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of > ville.syrjala@linux.intel.com > Sent: Tuesday, May 05, 2015 7:06 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v2 4/9] drm/i915: Fix HDMI 12bpc TRANSCONF bpc > value > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > IBX BSpec says we must specify 8bpc in TRANSCONF for both 8bpc and 12bpc > HDMI output. Do so. > > v2: Pass intel_crtc to intel_pipe_has_type() > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_display.c | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 96ce8f6..a392188 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2001,11 +2001,15 @@ static void ironlake_enable_pch_transcoder(struct > drm_i915_private *dev_priv, > > if (HAS_PCH_IBX(dev_priv->dev)) { > /* > - * make the BPC in transcoder be consistent with > - * that in pipeconf reg. > + * Make the BPC in transcoder be consistent with > + * that in pipeconf reg. For HDMI we must use 8bpc > + * here for both 8bpc and 12bpc. > */ > val &= ~PIPECONF_BPC_MASK; > - val |= pipeconf_val & PIPECONF_BPC_MASK; > + if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_HDMI)) > + val |= PIPECONF_8BPC; > + else > + val |= pipeconf_val & PIPECONF_BPC_MASK; > } > > val &= ~TRANS_INTERLACE_MASK; > -- Reviewed by: Chandra Konduru <Chandra.konduru@intel.com> > 2.0.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 96ce8f6..a392188 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2001,11 +2001,15 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv, if (HAS_PCH_IBX(dev_priv->dev)) { /* - * make the BPC in transcoder be consistent with - * that in pipeconf reg. + * Make the BPC in transcoder be consistent with + * that in pipeconf reg. For HDMI we must use 8bpc + * here for both 8bpc and 12bpc. */ val &= ~PIPECONF_BPC_MASK; - val |= pipeconf_val & PIPECONF_BPC_MASK; + if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_HDMI)) + val |= PIPECONF_8BPC; + else + val |= pipeconf_val & PIPECONF_BPC_MASK; } val &= ~TRANS_INTERLACE_MASK;