diff mbox

[14/16] drm/i915: don't apply WaFbcAsynchFlipDisableFbcQueue on SKL

Message ID 1439588061-18064-15-git-send-email-paulo.r.zanoni@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Zanoni, Paulo R Aug. 14, 2015, 9:34 p.m. UTC
This WA is only for HSW/BDW.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_fbc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Ville Syrjälä Aug. 28, 2015, 5:51 p.m. UTC | #1
On Fri, Aug 14, 2015 at 06:34:19PM -0300, Paulo Zanoni wrote:
> This WA is only for HSW/BDW.

w/a db says it was needed for early SKL, but we can ignore it. w/a db
still has it for BXT. I guess we can hope BXT would be fixed too if SKL
is.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_fbc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
> index b76c19f..5dfe460 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -298,7 +298,7 @@ static void gen7_fbc_enable(struct intel_crtc *crtc)
>  		I915_WRITE(ILK_DISPLAY_CHICKEN1,
>  			   I915_READ(ILK_DISPLAY_CHICKEN1) |
>  			   ILK_FBCQ_DIS);
> -	} else {
> +	} else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
>  		/* WaFbcAsynchFlipDisableFbcQueue:hsw,bdw */
>  		I915_WRITE(CHICKEN_PIPESL_1(crtc->pipe),
>  			   I915_READ(CHICKEN_PIPESL_1(crtc->pipe)) |
> -- 
> 2.4.6
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index b76c19f..5dfe460 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -298,7 +298,7 @@  static void gen7_fbc_enable(struct intel_crtc *crtc)
 		I915_WRITE(ILK_DISPLAY_CHICKEN1,
 			   I915_READ(ILK_DISPLAY_CHICKEN1) |
 			   ILK_FBCQ_DIS);
-	} else {
+	} else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
 		/* WaFbcAsynchFlipDisableFbcQueue:hsw,bdw */
 		I915_WRITE(CHICKEN_PIPESL_1(crtc->pipe),
 			   I915_READ(CHICKEN_PIPESL_1(crtc->pipe)) |