diff mbox

xen/arm: vgic: Clarify some comments after 5d495f4

Message ID 1450373350-9085-1-git-send-email-julien.grall@citrix.com (mailing list archive)
State New, archived
Headers show

Commit Message

Julien Grall Dec. 17, 2015, 5:29 p.m. UTC 
Ian pointed out that the definition of "offset" and "appropriate
boundary" in the comments added by "xen/arm: vgic: Optimize the way to
store the target vCPU in the rank" were not cleared.

Clarify them by explicitly mentionning the offset is in byte and the
appropriate boundary is ITARGET<n>/IROUTER<n>

Signed-off-by: Julien Grall <julien.grall@citrix.com>
---
 xen/arch/arm/vgic-v2.c | 4 ++--
 xen/arch/arm/vgic-v3.c | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

Comments

Ian Campbell Jan. 5, 2016, 2:53 p.m. UTC | #1 
On Thu, 2015-12-17 at 17:29 +0000, Julien Grall wrote:
> Ian pointed out that the definition of "offset" and "appropriate
> boundary" in the comments added by "xen/arm: vgic: Optimize the way to
> store the target vCPU in the rank" were not cleared.
> 
> Clarify them by explicitly mentionning the offset is in byte and the
> appropriate boundary is ITARGET<n>/IROUTER<n>
> 
> Signed-off-by: Julien Grall <julien.grall@citrix.com>

Acked + applied, thanks.
diff mbox

Patch

diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c
index 07316e8..032b964 100644
--- a/xen/arch/arm/vgic-v2.c
+++ b/xen/arch/arm/vgic-v2.c
@@ -65,7 +65,7 @@  void vgic_v2_setup_hw(paddr_t dbase, paddr_t cbase, paddr_t csize,
  * Fetch an ITARGETSR register based on the offset from ITARGETSR0. Only
  * one vCPU will be listed for a given vIRQ.
  *
- * Note the offset will be aligned to the appropriate boundary.
+ * Note the byte offset will be aligned to an ITARGETSR<n> boundary.
  */
 static uint32_t vgic_fetch_itargetsr(struct vgic_irq_rank *rank,
                                      unsigned int offset)
@@ -88,7 +88,7 @@  static uint32_t vgic_fetch_itargetsr(struct vgic_irq_rank *rank,
  * Store an ITARGETSR register in a convenient way and migrate the vIRQ
  * if necessary. This function only deals with ITARGETSR8 and onwards.
  *
- * Note the offset will be aligned to the appropriate boundary.
+ * Note the byte offset will be aligned to an ITARGETSR<n> boundary.
  */
 static void vgic_store_itargetsr(struct domain *d, struct vgic_irq_rank *rank,
                                  unsigned int offset, uint32_t itargetsr)
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index f01bbd9..6ab8002 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -94,7 +94,7 @@  static struct vcpu *vgic_v3_irouter_to_vcpu(struct domain *d, uint64_t irouter)
  * Fetch an IROUTER register based on the offset from IROUTER0. Only one
  * vCPU will be listed for a given vIRQ.
  *
- * Note the offset will be aligned to the appropriate  boundary.
+ * Note the byte offset will be aligned to an IROUTER<n> boundary.
  */
 static uint64_t vgic_fetch_irouter(struct vgic_irq_rank *rank,
                                    unsigned int offset)