diff mbox

[2/2] ARM: dts: rockchip: add i2c nodes RK3228 SoCs

Message ID 1457925102-30476-1-git-send-email-ykk@rock-chips.com (mailing list archive)
State New, archived
Headers show

Commit Message

Yakir Yang March 14, 2016, 3:11 a.m. UTC
This patch add the i2c dt nodes for rk3228 SoCs.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
 arch/arm/boot/dts/rk3228.dtsi | 80 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 80 insertions(+)

Comments

Wolfram Sang April 12, 2016, 9:39 p.m. UTC | #1
On Mon, Mar 14, 2016 at 11:11:42AM +0800, Yakir Yang wrote:
> This patch add the i2c dt nodes for rk3228 SoCs.
> 
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>

This needs to go via arm-soc.
Yakir Yang April 13, 2016, 1:23 a.m. UTC | #2
Hi Heiko,

On 04/13/2016 05:39 AM, Wolfram Sang wrote:
> On Mon, Mar 14, 2016 at 11:11:42AM +0800, Yakir Yang wrote:
>> This patch add the i2c dt nodes for rk3228 SoCs.
>>
>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> This needs to go via arm-soc.
>

Could you pick up this patch, it's helpful to add rk3228 HDMI support  :-)

- Yakir
Wolfram Sang April 13, 2016, 2:37 a.m. UTC | #3
> Could you pick up this patch, it's helpful to add rk3228 HDMI support  :-)

I undestand that it is needed, but why not via arm-soc? dts files are
their realm.
Yakir Yang April 13, 2016, 3:12 a.m. UTC | #4
On 04/13/2016 10:37 AM, Wolfram Sang wrote:
>> Could you pick up this patch, it's helpful to add rk3228 HDMI support  :-)
> I undestand that it is needed, but why not via arm-soc? dts files are
> their realm.
>
Yep, for previous email, I'm replying to Heiko, but forget to add him to 
the "TO" list   ;)
Heiko Stübner April 13, 2016, 8:57 p.m. UTC | #5
Am Montag, 14. März 2016, 11:11:42 schrieb Yakir Yang:
> This patch add the i2c dt nodes for rk3228 SoCs.
> 
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>

applied to my dts32 branch for 4.7, after moving the i2c pinctrl nodes in 
between emmc and pwm* (please try to keep alphabetical ordering there)


Heiko
diff mbox

Patch

diff --git a/arch/arm/boot/dts/rk3228.dtsi b/arch/arm/boot/dts/rk3228.dtsi
index 119ff12..a159296 100644
--- a/arch/arm/boot/dts/rk3228.dtsi
+++ b/arch/arm/boot/dts/rk3228.dtsi
@@ -185,6 +185,58 @@ 
 		status = "disabled";
 	};
 
+	i2c0: i2c@11050000 {
+		compatible = "rockchip,rk3228-i2c";
+		reg = <0x11050000 0x1000>;
+		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-names = "i2c";
+		clocks = <&cru PCLK_I2C0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+		status = "disabled";
+	};
+
+	i2c1: i2c@11060000 {
+		compatible = "rockchip,rk3228-i2c";
+		reg = <0x11060000 0x1000>;
+		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-names = "i2c";
+		clocks = <&cru PCLK_I2C1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c1_xfer>;
+		status = "disabled";
+	};
+
+	i2c2: i2c@11070000 {
+		compatible = "rockchip,rk3228-i2c";
+		reg = <0x11070000 0x1000>;
+		interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-names = "i2c";
+		clocks = <&cru PCLK_I2C2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c2_xfer>;
+		status = "disabled";
+	};
+
+	i2c3: i2c@11080000 {
+		compatible = "rockchip,rk3228-i2c";
+		reg = <0x11080000 0x1000>;
+		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-names = "i2c";
+		clocks = <&cru PCLK_I2C3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c3_xfer>;
+		status = "disabled";
+	};
+
 	pwm0: pwm@110b0000 {
 		compatible = "rockchip,rk3288-pwm";
 		reg = <0x110b0000 0x10>;
@@ -349,6 +401,34 @@ 
 			bias-disable;
 		};
 
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
+						<0 1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
+						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c2 {
+			i2c2_xfer: i2c2-xfer {
+				rockchip,pins = <2 20 RK_FUNC_1 &pcfg_pull_none>,
+						<2 21 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c3 {
+			i2c3_xfer: i2c3-xfer {
+				rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
+						<0 7 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
 		emmc {
 			emmc_clk: emmc-clk {
 				rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;