diff mbox

[v2,1/3] remoteproc: qcom: Encapsulate pvt data structure for q6v56 hexagon.

Message ID 1478268057-11847-2-git-send-email-akdwived@codeaurora.org (mailing list archive)
State Superseded
Headers show

Commit Message

Dwivedi, Avaneesh Kumar (avani) Nov. 4, 2016, 2 p.m. UTC
Encapsulate resources specific to each version of hexagon chip to
device node to avoid conditional check for manipulation of those
resources in driver code.

Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
---
 .../devicetree/bindings/remoteproc/qcom,q6v5.txt   |   1 +
 drivers/remoteproc/qcom_q6v5_pil.c                 | 137 ++++++++++++++++++---
 2 files changed, 120 insertions(+), 18 deletions(-)

Comments

kernel test robot Nov. 4, 2016, 11:51 p.m. UTC | #1
Hi Avaneesh,

[auto build test ERROR on robh/for-next]
[also build test ERROR on v4.9-rc3 next-20161028]
[cannot apply to remoteproc/for-next]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
[Suggest to use git(>=2.9.0) format-patch --base=<commit> (or --base=auto for convenience) to record what (public, well-known) commit your patch series was built on]
[Check https://git-scm.com/docs/git-format-patch for more information]

url:    https://github.com/0day-ci/linux/commits/Avaneesh-Kumar-Dwivedi/remoteproc-qcom-Encapsulate-pvt-data-structure-for-q6v56-hexagon/20161104-220712
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm64-allyesconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=arm64 

Note: the linux-review/Avaneesh-Kumar-Dwivedi/remoteproc-qcom-Encapsulate-pvt-data-structure-for-q6v56-hexagon/20161104-220712 HEAD 1b4c0b8bb3bb8cd30a996282b7a6aa9f352836a2 builds fine.
      It only hurts bisectibility.

All errors (new ones prefixed by >>):

   drivers/remoteproc/qcom_q6v5_pil.c: In function 'q6_probe':
   drivers/remoteproc/qcom_q6v5_pil.c:848:7: warning: assignment discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers]
     desc = of_device_get_match_data(&pdev->dev);
          ^
   drivers/remoteproc/qcom_q6v5_pil.c: At top level:
>> drivers/remoteproc/qcom_q6v5_pil.c:986:19: error: initialization from incompatible pointer type [-Werror=incompatible-pointer-types]
     .q6_reset_init = q6v5_init_reset,
                      ^~~~~~~~~~~~~~~
   drivers/remoteproc/qcom_q6v5_pil.c:986:19: note: (near initialization for 'msm_8916_res.q6_reset_init')
   cc1: some warnings being treated as errors

vim +986 drivers/remoteproc/qcom_q6v5_pil.c

   842	{
   843		struct q6v5 *qproc;
   844		struct rproc *rproc;
   845		struct q6_rproc_res *desc;
   846		int ret;
   847	
 > 848		desc = of_device_get_match_data(&pdev->dev);
   849		if (!desc)
   850			return -EINVAL;
   851	
   852		rproc = rproc_alloc(&pdev->dev, pdev->name, &q6_ops,
   853				    desc->q6_mba_image, sizeof(*qproc));
   854		if (!rproc) {
   855			dev_err(&pdev->dev, "failed to allocate rproc\n");
   856			return -ENOMEM;
   857		}
   858	
   859		rproc->fw_ops = &q6_fw_ops;
   860	
   861		qproc = (struct q6v5 *)rproc->priv;
   862		qproc->dev = &pdev->dev;
   863		qproc->rproc = rproc;
   864		platform_set_drvdata(pdev, qproc);
   865	
   866		init_completion(&qproc->start_done);
   867		init_completion(&qproc->stop_done);
   868	
   869		qproc->q6_rproc_res = desc;
   870		ret = q6v5_init_mem(qproc, pdev);
   871		if (ret)
   872			goto free_rproc;
   873	
   874		ret = q6v5_alloc_memory_region(qproc);
   875		if (ret)
   876			goto free_rproc;
   877	
   878		ret = q6v5_init_clocks(qproc);
   879		if (ret)
   880			goto free_rproc;
   881	
   882		ret = q6v5_regulator_init(qproc);
   883		if (ret)
   884			goto free_rproc;
   885	
   886		ret = qproc->q6_rproc_res->q6_reset_init(qproc, pdev);
   887		if (ret)
   888			goto free_rproc;
   889	
   890		ret = q6v5_request_irq(qproc, pdev, "wdog", q6v5_wdog_interrupt);
   891		if (ret < 0)
   892			goto free_rproc;
   893	
   894		ret = q6v5_request_irq(qproc, pdev, "fatal", q6v5_fatal_interrupt);
   895		if (ret < 0)
   896			goto free_rproc;
   897	
   898		ret = q6v5_request_irq(qproc, pdev, "handover", q6v5_handover_interrupt);
   899		if (ret < 0)
   900			goto free_rproc;
   901	
   902		ret = q6v5_request_irq(qproc, pdev, "stop-ack", q6v5_stop_ack_interrupt);
   903		if (ret < 0)
   904			goto free_rproc;
   905	
   906		qproc->state = qcom_smem_state_get(&pdev->dev, "stop", &qproc->stop_bit);
   907		if (IS_ERR(qproc->state))
   908			goto free_rproc;
   909	
   910		ret = rproc_add(rproc);
   911		if (ret)
   912			goto free_rproc;
   913	
   914		return 0;
   915	
   916	free_rproc:
   917		rproc_put(rproc);
   918	
   919		return ret;
   920	}
   921	
   922	static int q6_remove(struct platform_device *pdev)
   923	{
   924		struct q6v5 *qproc = platform_get_drvdata(pdev);
   925	
   926		rproc_del(qproc->rproc);
   927		rproc_put(qproc->rproc);
   928	
   929		return 0;
   930	}
   931	
   932	char *proxy_8x96_reg_str[] = {"mx", "cx", "vdd_pll"};
   933	int  proxy_8x96_reg_action[3][2] = { {0, 1}, {1, 1}, {1, 0} };
   934	int  proxy_8x96_reg_load[] = {0, 100000, 100000};
   935	int  proxy_8x96_reg_min_voltage[] = {1050000, 1250000, 0};
   936	char *proxy_8x96_clk_str[] = {"xo", "pnoc", "qdss"};
   937	char *active_8x96_clk_str[] = {"iface", "bus", "mem", "gpll0_mss_clk",
   938			"snoc_axi_clk", "mnoc_axi_clk"};
   939	
   940	static struct q6_rproc_res msm_8996_res = {
   941		.proxy_clks = proxy_8x96_clk_str,
   942		.proxy_clk_cnt = 3,
   943		.active_clks = active_8x96_clk_str,
   944		.active_clk_cnt = 6,
   945		.proxy_regs = proxy_8x96_reg_str,
   946		.active_regs = NULL,
   947		.proxy_reg_action = (int **)proxy_8x96_reg_action,
   948		.proxy_reg_load = (int *)proxy_8x96_reg_load,
   949		.active_reg_action = NULL,
   950		.active_reg_load = NULL,
   951		.proxy_reg_voltage = (int *)proxy_8x96_reg_min_voltage,
   952		.active_reg_voltage = NULL,
   953		.proxy_reg_cnt = 3,
   954		.active_reg_cnt = 0,
   955		.q6_reset_init = q6v56_init_reset,
   956		.q6_version = "v56",
   957		.q6_mba_image = "mba.mbn",
   958	};
   959	
   960	char *proxy_8x16_reg_str[] = {"mx", "cx", "pll"};
   961	char *active_8x16_reg_str[] = {"mss"};
   962	int  proxy_8x16_reg_action[4][2] = { {0, 1}, {1, 0}, {1, 0} };
   963	int  active_8x16_reg_action[1][2] = { {1, 1} };
   964	int  proxy_8x16_reg_load[] = {100000, 0, 100000, 100000};
   965	int  active_8x16_reg_load[] = {100000};
   966	int  proxy_8x16_reg_min_voltage[] = {1050000, 0, 0};
   967	int  active_8x16_reg_min_voltage[] = {1000000};
   968	char *proxy_8x16_clk_str[] = {"xo"};
   969	char *active_8x16_clk_str[] = {"iface", "bus", "mem"};
   970	
   971	static struct q6_rproc_res msm_8916_res = {
   972		.proxy_clks = proxy_8x16_clk_str,
   973		.proxy_clk_cnt = 1,
   974		.active_clks = active_8x16_clk_str,
   975		.active_clk_cnt = 3,
   976		.proxy_regs = proxy_8x16_reg_str,
   977		.active_regs = active_8x16_reg_str,
   978		.proxy_reg_action = (int **)proxy_8x16_reg_action,
   979		.proxy_reg_load = (int *)proxy_8x16_reg_load,
   980		.active_reg_action = (int **)active_8x16_reg_action,
   981		.active_reg_load = (int *)active_8x16_reg_load,
   982		.proxy_reg_voltage = (int *)proxy_8x16_reg_min_voltage,
   983		.active_reg_voltage = active_8x16_reg_min_voltage,
   984		.proxy_reg_cnt = 3,
   985		.active_reg_cnt = 1,
 > 986		.q6_reset_init = q6v5_init_reset,
   987		.q6_version = "v5",
   988		.q6_mba_image = "mba.b00",
   989	};

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
Rob Herring Nov. 10, 2016, 8:30 p.m. UTC | #2
On Fri, Nov 04, 2016 at 07:30:54PM +0530, Avaneesh Kumar Dwivedi wrote:
> Encapsulate resources specific to each version of hexagon chip to
> device node to avoid conditional check for manipulation of those
> resources in driver code.
> 
> Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
> ---
>  .../devicetree/bindings/remoteproc/qcom,q6v5.txt   |   1 +
>  drivers/remoteproc/qcom_q6v5_pil.c                 | 137 ++++++++++++++++++---
>  2 files changed, 120 insertions(+), 18 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> index 57cb49e..cbc165c 100644
> --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> @@ -8,6 +8,7 @@ on the Qualcomm Hexagon core.
>  	Value type: <string>
>  	Definition: must be one of:
>  		    "qcom,q6v5-pil"
> +		"qcom,q6v56-pil"

Perhaps some explanation in the commit message about what these magic 
numbers mean?

Rob
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Dwivedi, Avaneesh Kumar (avani) Nov. 16, 2016, 2:02 p.m. UTC | #3
On 11/11/2016 2:00 AM, Rob Herring wrote:
> On Fri, Nov 04, 2016 at 07:30:54PM +0530, Avaneesh Kumar Dwivedi wrote:
>> Encapsulate resources specific to each version of hexagon chip to
>> device node to avoid conditional check for manipulation of those
>> resources in driver code.
>>
>> Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
>> ---
>>   .../devicetree/bindings/remoteproc/qcom,q6v5.txt   |   1 +
>>   drivers/remoteproc/qcom_q6v5_pil.c                 | 137 ++++++++++++++++++---
>>   2 files changed, 120 insertions(+), 18 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
>> index 57cb49e..cbc165c 100644
>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
>> @@ -8,6 +8,7 @@ on the Qualcomm Hexagon core.
>>   	Value type: <string>
>>   	Definition: must be one of:
>>   		    "qcom,q6v5-pil"
>> +		"qcom,q6v56-pil"
> Perhaps some explanation in the commit message about what these magic
> numbers mean?

     "v56" represent class of hexagon chip, which again is 
differentiated based on version number. Two
     different MSM SOC may use same class of hexagon chip. example is as 
below.

     msm8974  q6v5 version  5.0.0
     msm8916  q6v5 version  5.1.1
>
> Rob

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Bjorn Andersson Nov. 18, 2016, 6:40 p.m. UTC | #4
On Wed 16 Nov 06:02 PST 2016, Avaneesh Kumar Dwivedi wrote:

> 
> 
> On 11/11/2016 2:00 AM, Rob Herring wrote:
> >On Fri, Nov 04, 2016 at 07:30:54PM +0530, Avaneesh Kumar Dwivedi wrote:
> >>Encapsulate resources specific to each version of hexagon chip to
> >>device node to avoid conditional check for manipulation of those
> >>resources in driver code.
> >>
> >>Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
> >>---
> >>  .../devicetree/bindings/remoteproc/qcom,q6v5.txt   |   1 +
> >>  drivers/remoteproc/qcom_q6v5_pil.c                 | 137 ++++++++++++++++++---
> >>  2 files changed, 120 insertions(+), 18 deletions(-)
> >>
> >>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> >>index 57cb49e..cbc165c 100644
> >>--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> >>+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> >>@@ -8,6 +8,7 @@ on the Qualcomm Hexagon core.
> >>  	Value type: <string>
> >>  	Definition: must be one of:
> >>  		    "qcom,q6v5-pil"
> >>+		"qcom,q6v56-pil"
> >Perhaps some explanation in the commit message about what these magic
> >numbers mean?
> 
>     "v56" represent class of hexagon chip, which again is differentiated
> based on version number. Two
>     different MSM SOC may use same class of hexagon chip. example is as
> below.
> 
>     msm8974  q6v5 version  5.0.0
>     msm8916  q6v5 version  5.1.1

But looking at the Qualcomm tree I think I got 8916 wrong, it seems that
it should be "q6v56" and your patches indicates that the 8996 has a
q6v55 - which doesn't make sense to me and in some places there's
comments indicating it's version 6.

I asked you about this but I can't find an answer in any of your
replies.

Regards,
Bjorn
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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 57cb49e..cbc165c 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -8,6 +8,7 @@  on the Qualcomm Hexagon core.
 	Value type: <string>
 	Definition: must be one of:
 		    "qcom,q6v5-pil"
+		"qcom,q6v56-pil"
 
 - reg:
 	Usage: required
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c b/drivers/remoteproc/qcom_q6v5_pil.c
index 2e0caaa..3d26199 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -30,13 +30,13 @@ 
 #include <linux/reset.h>
 #include <linux/soc/qcom/smem.h>
 #include <linux/soc/qcom/smem_state.h>
+#include <linux/of_device.h>
 
 #include "remoteproc_internal.h"
 #include "qcom_mdt_loader.h"
 
 #include <linux/qcom_scm.h>
 
-#define MBA_FIRMWARE_NAME		"mba.b00"
 #define MPSS_FIRMWARE_NAME		"modem.mdt"
 
 #define MPSS_CRASH_REASON_SMEM		421
@@ -93,13 +93,32 @@ 
 #define QDSS_BHS_ON			BIT(21)
 #define QDSS_LDO_BYP			BIT(22)
 
+struct q6_rproc_res {
+	char **proxy_clks;
+	int proxy_clk_cnt;
+	char **active_clks;
+	int active_clk_cnt;
+	char **proxy_regs;
+	int proxy_reg_cnt;
+	char **active_regs;
+	int active_reg_cnt;
+	int **proxy_reg_action;
+	int **active_reg_action;
+	int *proxy_reg_load;
+	int *active_reg_load;
+	int *proxy_reg_voltage;
+	int *active_reg_voltage;
+	char *q6_version;
+	char *q6_mba_image;
+	int (*q6_reset_init)(void *q, void *p);
+};
 struct q6v5 {
 	struct device *dev;
 	struct rproc *rproc;
 
 	void __iomem *reg_base;
 	void __iomem *rmb_base;
-
+	void __iomem *restart_reg;
 	struct regmap *halt_map;
 	u32 halt_q6;
 	u32 halt_modem;
@@ -111,7 +130,7 @@  struct q6v5 {
 	unsigned stop_bit;
 
 	struct regulator_bulk_data supply[4];
-
+	struct q6_rproc_res *q6_rproc_res;
 	struct clk *ahb_clk;
 	struct clk *axi_clk;
 	struct clk *rom_clk;
@@ -198,7 +217,7 @@  static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
 	return 0;
 }
 
-static const struct rproc_fw_ops q6v5_fw_ops = {
+static const struct rproc_fw_ops q6_fw_ops = {
 	.find_rsc_table = qcom_mdt_find_rsc_table,
 	.load = q6v5_load,
 };
@@ -599,7 +618,7 @@  static void *q6v5_da_to_va(struct rproc *rproc, u64 da, int len)
 	return qproc->mpss_region + offset;
 }
 
-static const struct rproc_ops q6v5_ops = {
+static const struct rproc_ops q6_ops = {
 	.start = q6v5_start,
 	.stop = q6v5_stop,
 	.da_to_va = q6v5_da_to_va,
@@ -736,6 +755,22 @@  static int q6v5_init_reset(struct q6v5 *qproc)
 	return 0;
 }
 
+static int q6v56_init_reset(void *q, void *p)
+{
+	struct resource *res;
+	struct q6v5 *qproc = q;
+	struct platform_device *pdev = p;
+
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "restart_reg");
+	qproc->restart_reg = devm_ioremap(qproc->dev, res->start,
+							resource_size(res));
+	if (IS_ERR(qproc->restart_reg)) {
+		dev_err(qproc->dev, "failed to get restart_reg\n");
+		return PTR_ERR(qproc->restart_reg);
+	}
+
+	return 0;
+}
 static int q6v5_request_irq(struct q6v5 *qproc,
 			     struct platform_device *pdev,
 			     const char *name,
@@ -803,20 +838,25 @@  static int q6v5_alloc_memory_region(struct q6v5 *qproc)
 	return 0;
 }
 
-static int q6v5_probe(struct platform_device *pdev)
+static int q6_probe(struct platform_device *pdev)
 {
 	struct q6v5 *qproc;
 	struct rproc *rproc;
+	struct q6_rproc_res *desc;
 	int ret;
 
-	rproc = rproc_alloc(&pdev->dev, pdev->name, &q6v5_ops,
-			    MBA_FIRMWARE_NAME, sizeof(*qproc));
+	desc = of_device_get_match_data(&pdev->dev);
+	if (!desc)
+		return -EINVAL;
+
+	rproc = rproc_alloc(&pdev->dev, pdev->name, &q6_ops,
+			    desc->q6_mba_image, sizeof(*qproc));
 	if (!rproc) {
 		dev_err(&pdev->dev, "failed to allocate rproc\n");
 		return -ENOMEM;
 	}
 
-	rproc->fw_ops = &q6v5_fw_ops;
+	rproc->fw_ops = &q6_fw_ops;
 
 	qproc = (struct q6v5 *)rproc->priv;
 	qproc->dev = &pdev->dev;
@@ -826,6 +866,7 @@  static int q6v5_probe(struct platform_device *pdev)
 	init_completion(&qproc->start_done);
 	init_completion(&qproc->stop_done);
 
+	qproc->q6_rproc_res = desc;
 	ret = q6v5_init_mem(qproc, pdev);
 	if (ret)
 		goto free_rproc;
@@ -842,7 +883,7 @@  static int q6v5_probe(struct platform_device *pdev)
 	if (ret)
 		goto free_rproc;
 
-	ret = q6v5_init_reset(qproc);
+	ret = qproc->q6_rproc_res->q6_reset_init(qproc, pdev);
 	if (ret)
 		goto free_rproc;
 
@@ -880,7 +921,7 @@  static int q6v5_probe(struct platform_device *pdev)
 	return ret;
 }
 
-static int q6v5_remove(struct platform_device *pdev)
+static int q6_remove(struct platform_device *pdev)
 {
 	struct q6v5 *qproc = platform_get_drvdata(pdev);
 
@@ -890,20 +931,80 @@  static int q6v5_remove(struct platform_device *pdev)
 	return 0;
 }
 
-static const struct of_device_id q6v5_of_match[] = {
-	{ .compatible = "qcom,q6v5-pil", },
+char *proxy_8x96_reg_str[] = {"mx", "cx", "vdd_pll"};
+int  proxy_8x96_reg_action[3][2] = { {0, 1}, {1, 1}, {1, 0} };
+int  proxy_8x96_reg_load[] = {0, 100000, 100000};
+int  proxy_8x96_reg_min_voltage[] = {1050000, 1250000, 0};
+char *proxy_8x96_clk_str[] = {"xo", "pnoc", "qdss"};
+char *active_8x96_clk_str[] = {"iface", "bus", "mem", "gpll0_mss_clk",
+		"snoc_axi_clk", "mnoc_axi_clk"};
+
+static struct q6_rproc_res msm_8996_res = {
+	.proxy_clks = proxy_8x96_clk_str,
+	.proxy_clk_cnt = 3,
+	.active_clks = active_8x96_clk_str,
+	.active_clk_cnt = 6,
+	.proxy_regs = proxy_8x96_reg_str,
+	.active_regs = NULL,
+	.proxy_reg_action = (int **)proxy_8x96_reg_action,
+	.proxy_reg_load = (int *)proxy_8x96_reg_load,
+	.active_reg_action = NULL,
+	.active_reg_load = NULL,
+	.proxy_reg_voltage = (int *)proxy_8x96_reg_min_voltage,
+	.active_reg_voltage = NULL,
+	.proxy_reg_cnt = 3,
+	.active_reg_cnt = 0,
+	.q6_reset_init = q6v56_init_reset,
+	.q6_version = "v56",
+	.q6_mba_image = "mba.mbn",
+};
+
+char *proxy_8x16_reg_str[] = {"mx", "cx", "pll"};
+char *active_8x16_reg_str[] = {"mss"};
+int  proxy_8x16_reg_action[4][2] = { {0, 1}, {1, 0}, {1, 0} };
+int  active_8x16_reg_action[1][2] = { {1, 1} };
+int  proxy_8x16_reg_load[] = {100000, 0, 100000, 100000};
+int  active_8x16_reg_load[] = {100000};
+int  proxy_8x16_reg_min_voltage[] = {1050000, 0, 0};
+int  active_8x16_reg_min_voltage[] = {1000000};
+char *proxy_8x16_clk_str[] = {"xo"};
+char *active_8x16_clk_str[] = {"iface", "bus", "mem"};
+
+static struct q6_rproc_res msm_8916_res = {
+	.proxy_clks = proxy_8x16_clk_str,
+	.proxy_clk_cnt = 1,
+	.active_clks = active_8x16_clk_str,
+	.active_clk_cnt = 3,
+	.proxy_regs = proxy_8x16_reg_str,
+	.active_regs = active_8x16_reg_str,
+	.proxy_reg_action = (int **)proxy_8x16_reg_action,
+	.proxy_reg_load = (int *)proxy_8x16_reg_load,
+	.active_reg_action = (int **)active_8x16_reg_action,
+	.active_reg_load = (int *)active_8x16_reg_load,
+	.proxy_reg_voltage = (int *)proxy_8x16_reg_min_voltage,
+	.active_reg_voltage = active_8x16_reg_min_voltage,
+	.proxy_reg_cnt = 3,
+	.active_reg_cnt = 1,
+	.q6_reset_init = q6v5_init_reset,
+	.q6_version = "v5",
+	.q6_mba_image = "mba.b00",
+};
+
+static const struct of_device_id q6_of_match[] = {
+	{ .compatible = "qcom,q6v5-pil", .data = &msm_8916_res},
+	{ .compatible = "qcom,q6v56-pil", .data = &msm_8996_res},
 	{ },
 };
 
-static struct platform_driver q6v5_driver = {
-	.probe = q6v5_probe,
-	.remove = q6v5_remove,
+static struct platform_driver q6_driver = {
+	.probe = q6_probe,
+	.remove = q6_remove,
 	.driver = {
 		.name = "qcom-q6v5-pil",
-		.of_match_table = q6v5_of_match,
+		.of_match_table = q6_of_match,
 	},
 };
-module_platform_driver(q6v5_driver);
+module_platform_driver(q6_driver);
 
 MODULE_DESCRIPTION("Peripheral Image Loader for Hexagon");
 MODULE_LICENSE("GPL v2");