diff mbox

[2/3] drm/i915/glk: Enable pipe CSC

Message ID 20170217120630.6143-3-ander.conselvan.de.oliveira@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ander Conselvan de Oliveira Feb. 17, 2017, 12:06 p.m. UTC 
Now that the pre-csc degamma table is set up correctly in Geminilake,
pipe CSC can be enabled without causing a black screen.

v2: Rebase.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 1 +
 drivers/gpu/drm/i915/intel_sprite.c  | 1 +
 2 files changed, 2 insertions(+)

Comments

Ander Conselvan de Oliveira Feb. 17, 2017, 3:17 p.m. UTC | #1 
On Fri, 2017-02-17 at 14:06 +0200, Ander Conselvan de Oliveira wrote:
> Now that the pre-csc degamma table is set up correctly in Geminilake,
> pipe CSC can be enabled without causing a black screen.
> 
> v2: Rebase.
> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pushed up to here. Thanks for the reviews.

Ander

> ---
>  drivers/gpu/drm/i915/intel_display.c | 1 +
>  drivers/gpu/drm/i915/intel_sprite.c  | 1 +
>  2 files changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index b05d9c8..730aee7 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3327,6 +3327,7 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
>  	if (IS_GEMINILAKE(dev_priv)) {
>  		I915_WRITE(PLANE_COLOR_CTL(pipe, plane_id),
>  			   PLANE_COLOR_PIPE_GAMMA_ENABLE |
> +			   PLANE_COLOR_PIPE_CSC_ENABLE |
>  			   PLANE_COLOR_PLANE_GAMMA_DISABLE);
>  	} else {
>  		plane_ctl |=
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index b16a295..27e0752 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -224,6 +224,7 @@ skl_update_plane(struct drm_plane *drm_plane,
>  	if (IS_GEMINILAKE(dev_priv)) {
>  		I915_WRITE(PLANE_COLOR_CTL(pipe, plane_id),
>  			   PLANE_COLOR_PIPE_GAMMA_ENABLE |
> +			   PLANE_COLOR_PIPE_CSC_ENABLE |
>  			   PLANE_COLOR_PLANE_GAMMA_DISABLE);
>  	} else {
>  		plane_ctl |=
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b05d9c8..730aee7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3327,6 +3327,7 @@  static void skylake_update_primary_plane(struct drm_plane *plane,
 	if (IS_GEMINILAKE(dev_priv)) {
 		I915_WRITE(PLANE_COLOR_CTL(pipe, plane_id),
 			   PLANE_COLOR_PIPE_GAMMA_ENABLE |
+			   PLANE_COLOR_PIPE_CSC_ENABLE |
 			   PLANE_COLOR_PLANE_GAMMA_DISABLE);
 	} else {
 		plane_ctl |=
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index b16a295..27e0752 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -224,6 +224,7 @@  skl_update_plane(struct drm_plane *drm_plane,
 	if (IS_GEMINILAKE(dev_priv)) {
 		I915_WRITE(PLANE_COLOR_CTL(pipe, plane_id),
 			   PLANE_COLOR_PIPE_GAMMA_ENABLE |
+			   PLANE_COLOR_PIPE_CSC_ENABLE |
 			   PLANE_COLOR_PLANE_GAMMA_DISABLE);
 	} else {
 		plane_ctl |=