| Message ID | 20180501072250.GA4269@mwanda (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
Hi Dan, Thanks for the patch! On 1.05.2018 10:22, Dan Carpenter wrote: > There is a typo here so we accidentally set "val" to zero when we > intended just to clear BIT(0). > > Fixes: 90d52d57ccac ("PCI: qcom: Add support for IPQ4019 PCIe controller") > Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> > --- > Not tested. > > diff --git a/drivers/pci/dwc/pcie-qcom.c b/drivers/pci/dwc/pcie-qcom.c > index 5897af7d3355..b65bbf7c284e 100644 > --- a/drivers/pci/dwc/pcie-qcom.c > +++ b/drivers/pci/dwc/pcie-qcom.c > @@ -869,7 +869,7 @@ static int qcom_pcie_init_2_4_0(struct qcom_pcie *pcie) > > /* enable PCIe clocks and resets */ > val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); > - val &= !BIT(0); > + val &= ~BIT(0); > writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); > > /* change DBI base address */ > John, can you test that fix? Otherwise the fix looks correct: Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com> regards, Stan
On 10/05/18 01:08, Stanimir Varbanov wrote: > Hi Dan, > > Thanks for the patch! > > On 1.05.2018 10:22, Dan Carpenter wrote: >> There is a typo here so we accidentally set "val" to zero when we >> intended just to clear BIT(0). >> >> Fixes: 90d52d57ccac ("PCI: qcom: Add support for IPQ4019 PCIe >> controller") >> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> >> --- >> Not tested. >> >> diff --git a/drivers/pci/dwc/pcie-qcom.c b/drivers/pci/dwc/pcie-qcom.c >> index 5897af7d3355..b65bbf7c284e 100644 >> --- a/drivers/pci/dwc/pcie-qcom.c >> +++ b/drivers/pci/dwc/pcie-qcom.c >> @@ -869,7 +869,7 @@ static int qcom_pcie_init_2_4_0(struct qcom_pcie >> *pcie) >> /* enable PCIe clocks and resets */ >> val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); >> - val &= !BIT(0); >> + val &= ~BIT(0); >> writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); >> /* change DBI base address */ >> > > John, can you test that fix? > > Otherwise the fix looks correct: > > Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com> > > regards, > Stan Acked-by: John Crispin <john@phrozen.org>
On Tue, May 01, 2018 at 10:22:50AM +0300, Dan Carpenter wrote: > There is a typo here so we accidentally set "val" to zero when we > intended just to clear BIT(0). > > Fixes: 90d52d57ccac ("PCI: qcom: Add support for IPQ4019 PCIe controller") > Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> > --- > Not tested. > > diff --git a/drivers/pci/dwc/pcie-qcom.c b/drivers/pci/dwc/pcie-qcom.c > index 5897af7d3355..b65bbf7c284e 100644 > --- a/drivers/pci/dwc/pcie-qcom.c > +++ b/drivers/pci/dwc/pcie-qcom.c > @@ -869,7 +869,7 @@ static int qcom_pcie_init_2_4_0(struct qcom_pcie *pcie) > > /* enable PCIe clocks and resets */ > val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); > - val &= !BIT(0); > + val &= ~BIT(0); > writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); > > /* change DBI base address */ Applied to pci/dwc for v4.18, thanks. Lorenzo
diff --git a/drivers/pci/dwc/pcie-qcom.c b/drivers/pci/dwc/pcie-qcom.c index 5897af7d3355..b65bbf7c284e 100644 --- a/drivers/pci/dwc/pcie-qcom.c +++ b/drivers/pci/dwc/pcie-qcom.c @@ -869,7 +869,7 @@ static int qcom_pcie_init_2_4_0(struct qcom_pcie *pcie) /* enable PCIe clocks and resets */ val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); - val &= !BIT(0); + val &= ~BIT(0); writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); /* change DBI base address */
There is a typo here so we accidentally set "val" to zero when we intended just to clear BIT(0). Fixes: 90d52d57ccac ("PCI: qcom: Add support for IPQ4019 PCIe controller") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> --- Not tested.