diff mbox

[v3,2/2] drm/i915/perf: fix gen11 engine class shift

Message ID 20180604233250.609-2-michel.thierry@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Michel Thierry June 4, 2018, 11:32 p.m. UTC
Use the correct engine class shift value while storing the ctx hw id.
Fixes the copy+paste error from commit 61d5676b5561 ("drm/i915/perf: fix
ctx_id read with GuC & ICL").

Apologies for not spotting this in the original review, the
specific_ctx_id_mask is correct, only the specific_ctx_id had this
problem.

v2: Just use the upper 32 bits of lrc_desc (Chris)
v3: If we use the lrc_desc, we must apply the ctx_id_mask too (Lionel)

Fixes: 61d5676b5561 ("drm/i915/perf: fix ctx_id read with GuC & ICL")
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_perf.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

Comments

Lionel Landwerlin June 4, 2018, 11:55 p.m. UTC | #1
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

On 05/06/18 00:32, Michel Thierry wrote:
> Use the correct engine class shift value while storing the ctx hw id.
> Fixes the copy+paste error from commit 61d5676b5561 ("drm/i915/perf: fix
> ctx_id read with GuC & ICL").
>
> Apologies for not spotting this in the original review, the
> specific_ctx_id_mask is correct, only the specific_ctx_id had this
> problem.
>
> v2: Just use the upper 32 bits of lrc_desc (Chris)
> v3: If we use the lrc_desc, we must apply the ctx_id_mask too (Lionel)
>
> Fixes: 61d5676b5561 ("drm/i915/perf: fix ctx_id read with GuC & ICL")
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   drivers/gpu/drm/i915/i915_perf.c | 9 +++------
>   1 file changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 6aba30cb40ea..881a992305ec 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -1289,16 +1289,13 @@ static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
>   		break;
>   
>   	case 11: {
> -		struct intel_engine_cs *engine = i915->engine[RCS];
> -
> -		i915->perf.oa.specific_ctx_id =
> -			stream->ctx->hw_id << (GEN11_SW_CTX_ID_SHIFT - 32) |
> -			engine->instance << (GEN11_ENGINE_INSTANCE_SHIFT - 32) |
> -			engine->class << (GEN11_ENGINE_INSTANCE_SHIFT - 32);
>   		i915->perf.oa.specific_ctx_id_mask =
>   			((1U << GEN11_SW_CTX_ID_WIDTH) - 1) << (GEN11_SW_CTX_ID_SHIFT - 32) |
>   			((1U << GEN11_ENGINE_INSTANCE_WIDTH) - 1) << (GEN11_ENGINE_INSTANCE_SHIFT - 32) |
>   			((1 << GEN11_ENGINE_CLASS_WIDTH) - 1) << (GEN11_ENGINE_CLASS_SHIFT - 32);
> +		i915->perf.oa.specific_ctx_id = upper_32_bits(ce->lrc_desc);
> +		i915->perf.oa.specific_ctx_id &=
> +			i915->perf.oa.specific_ctx_id_mask;
>   		break;
>   	}
>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 6aba30cb40ea..881a992305ec 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1289,16 +1289,13 @@  static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
 		break;
 
 	case 11: {
-		struct intel_engine_cs *engine = i915->engine[RCS];
-
-		i915->perf.oa.specific_ctx_id =
-			stream->ctx->hw_id << (GEN11_SW_CTX_ID_SHIFT - 32) |
-			engine->instance << (GEN11_ENGINE_INSTANCE_SHIFT - 32) |
-			engine->class << (GEN11_ENGINE_INSTANCE_SHIFT - 32);
 		i915->perf.oa.specific_ctx_id_mask =
 			((1U << GEN11_SW_CTX_ID_WIDTH) - 1) << (GEN11_SW_CTX_ID_SHIFT - 32) |
 			((1U << GEN11_ENGINE_INSTANCE_WIDTH) - 1) << (GEN11_ENGINE_INSTANCE_SHIFT - 32) |
 			((1 << GEN11_ENGINE_CLASS_WIDTH) - 1) << (GEN11_ENGINE_CLASS_SHIFT - 32);
+		i915->perf.oa.specific_ctx_id = upper_32_bits(ce->lrc_desc);
+		i915->perf.oa.specific_ctx_id &=
+			i915->perf.oa.specific_ctx_id_mask;
 		break;
 	}