diff mbox series

[2/3] PCI: Use dedicated Xilinx controller irq number for AER

Message ID 1533141889-19962-3-git-send-email-bharat.kumar.gogada@xilinx.com (mailing list archive)
State New, archived
Delegated to: Bjorn Helgaas
Headers show
Series Use xilinx controller irq for AER handler | expand

Commit Message

Bharat Kumar Gogada Aug. 1, 2018, 4:44 p.m. UTC
Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced
Error Interrupt Message Number. The controller has dedicated interrupt line
for reporting PCIe errors along with AER.

Using pci_dev->sysdata of root port to save controller irq number, which
will be used for registering AER irq handler.

Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
---
 drivers/pci/quirks.c |   29 +++++++++++++++++++++++++++++
 1 files changed, 29 insertions(+), 0 deletions(-)

Comments

Bjorn Helgaas Aug. 6, 2018, 9:03 p.m. UTC | #1
On Wed, Aug 01, 2018 at 10:14:48PM +0530, Bharat Kumar Gogada wrote:
> Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced
> Error Interrupt Message Number. The controller has dedicated interrupt line
> for reporting PCIe errors along with AER.
> 
> Using pci_dev->sysdata of root port to save controller irq number, which
> will be used for registering AER irq handler.
> 
> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
> ---
>  drivers/pci/quirks.c |   29 +++++++++++++++++++++++++++++
>  1 files changed, 29 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index f439de8..e666373 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4753,3 +4753,32 @@ static void quirk_gpu_hda(struct pci_dev *hda)
>  			      PCI_CLASS_MULTIMEDIA_HD_AUDIO, 8, quirk_gpu_hda);
>  DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
>  			      PCI_CLASS_MULTIMEDIA_HD_AUDIO, 8, quirk_gpu_hda);
> +
> +#if defined(CONFIG_ARCH_ZYNQMP) && defined(CONFIG_PCIE_XILINX_NWL) && \
> +	defined(CONFIG_PCIEAER)
> +/*
> + * Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced
> + * Error Interrupt Message Number. The controller has dedicated interrupt line
> + * for reporting PCIe errors along with AER.

Your comment says "PCIe errors along with AER", but your ifdef tests
CONFIG_PCIEAER.  Per PCIe r4.0, sec 6.2.6, interrupts can be generated
even if AER isn't supported.  Don't we want to allow that?

> + */
> +#include <linux/of.h>
> +#include <linux/of_irq.h>
> +
> +static void quirk_xilinx_aer_irq(struct pci_dev *dev)
> +{
> +	struct device_node *dev_node;
> +
> +	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT &&
> +	    pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
> +		dev_node = of_find_compatible_node(NULL, NULL,
> +						   "xlnx,nwl-pcie-2.11");
> +		if (!dev_node) {
> +			dev_err(&dev->dev, "Error could not find ZynqMP PS PCIe node\n");

Use pci_err().

Doesn't arm64 support generic kernels that may contain support for
several platforms?  We don't want a warning if a generic kernel
happens to be running on a non-ZynqMP system.

> +			return;
> +		}
> +
> +		dev->sysdata = dev_node->data;
> +	}
> +}
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_XILINX, PCI_ANY_ID, quirk_xilinx_aer_irq);
> +#endif
> -- 
> 1.7.1
>
diff mbox series

Patch

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index f439de8..e666373 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4753,3 +4753,32 @@  static void quirk_gpu_hda(struct pci_dev *hda)
 			      PCI_CLASS_MULTIMEDIA_HD_AUDIO, 8, quirk_gpu_hda);
 DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
 			      PCI_CLASS_MULTIMEDIA_HD_AUDIO, 8, quirk_gpu_hda);
+
+#if defined(CONFIG_ARCH_ZYNQMP) && defined(CONFIG_PCIE_XILINX_NWL) && \
+	defined(CONFIG_PCIEAER)
+/*
+ * Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced
+ * Error Interrupt Message Number. The controller has dedicated interrupt line
+ * for reporting PCIe errors along with AER.
+ */
+#include <linux/of.h>
+#include <linux/of_irq.h>
+
+static void quirk_xilinx_aer_irq(struct pci_dev *dev)
+{
+	struct device_node *dev_node;
+
+	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT &&
+	    pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
+		dev_node = of_find_compatible_node(NULL, NULL,
+						   "xlnx,nwl-pcie-2.11");
+		if (!dev_node) {
+			dev_err(&dev->dev, "Error could not find ZynqMP PS PCIe node\n");
+			return;
+		}
+
+		dev->sysdata = dev_node->data;
+	}
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_XILINX, PCI_ANY_ID, quirk_xilinx_aer_irq);
+#endif