| Message ID | 1cf53d188657bba7df06ad417eb2a65160238196.1538423063.git.leonard.crestez@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
| Series | PCI: imx: Add PME_Turn_Off support | expand |
On Mon, Oct 01, 2018 at 10:53:48PM +0300, Leonard Crestez wrote: > When the root complex suspends it must send a PME_Turn_Off TLP. > Implement this by asserting the "turnoff" reset. > > On imx7d this is functionality is part of the SRC and exposed through > the linux reset-controller subsystem. On imx6 equivalent bits are in the > IOMUXC GPR area which the imx6-pcie driver accesses directly. > > This is only for imx7d right now but it's deliberately implemented as an > optional reset, ignoring the chip variant: > * Older dtbs won't have this reset so it will be ignored. > * Future chips might also expose this as a reset controller. > > For example imx8m (not yet supported) has the exact same > PCIE_CTRL_APPS_TURNOFF bit in the same location. > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> > --- > drivers/pci/controller/dwc/pci-imx6.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) I need an ACK from Lucas on this patch to merge this series; also, if you can keep versioning your patch series please it would be easier for me to track them, I understand the patches content changed over time but that's for future postings too. Thanks, Lorenzo > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 6ba16fd1373c..13cb1a200442 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -50,10 +50,11 @@ struct imx6_pcie { > struct clk *pcie_inbound_axi; > struct clk *pcie; > struct regmap *iomuxc_gpr; > struct reset_control *pciephy_reset; > struct reset_control *apps_reset; > + struct reset_control *turnoff_reset; > enum imx6_pcie_variants variant; > u32 tx_deemph_gen1; > u32 tx_deemph_gen2_3p5db; > u32 tx_deemph_gen2_6db; > u32 tx_swing_full; > @@ -812,10 +813,16 @@ static void imx6_pcie_ltssm_disable(struct device *dev) > default: > dev_err(dev, "ltssm_disable not supported\n"); > } > } > > +static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) > +{ > + reset_control_assert(imx6_pcie->turnoff_reset); > + reset_control_deassert(imx6_pcie->turnoff_reset); > +} > + > static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) > { > clk_disable_unprepare(imx6_pcie->pcie); > clk_disable_unprepare(imx6_pcie->pcie_phy); > clk_disable_unprepare(imx6_pcie->pcie_bus); > @@ -832,10 +839,11 @@ static int imx6_pcie_suspend_noirq(struct device *dev) > struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); > > if (imx6_pcie->variant != IMX7D) > return 0; > > + imx6_pcie_pm_turnoff(imx6_pcie); > imx6_pcie_clk_disable(imx6_pcie); > imx6_pcie_ltssm_disable(dev); > > return 0; > } > @@ -959,10 +967,17 @@ static int imx6_pcie_probe(struct platform_device *pdev) > break; > default: > break; > } > > + /* Grab turnoff reset */ > + imx6_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff"); > + if (IS_ERR(imx6_pcie->turnoff_reset)) { > + dev_err(dev, "Failed to get TURNOFF reset control\n"); > + return PTR_ERR(imx6_pcie->turnoff_reset); > + } > + > /* Grab GPR config register range */ > imx6_pcie->iomuxc_gpr = > syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); > if (IS_ERR(imx6_pcie->iomuxc_gpr)) { > dev_err(dev, "unable to find iomuxc registers\n"); > -- > 2.17.1 >
Am Montag, den 01.10.2018, 22:53 +0300 schrieb Leonard Crestez: > When the root complex suspends it must send a PME_Turn_Off TLP. > Implement this by asserting the "turnoff" reset. > > On imx7d this is functionality is part of the SRC and exposed through > the linux reset-controller subsystem. On imx6 equivalent bits are in the > IOMUXC GPR area which the imx6-pcie driver accesses directly. > > This is only for imx7d right now but it's deliberately implemented as an > optional reset, ignoring the chip variant: > * Older dtbs won't have this reset so it will be ignored. > * Future chips might also expose this as a reset controller. > > For example imx8m (not yet supported) has the exact same > PCIE_CTRL_APPS_TURNOFF bit in the same location. > > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> > --- > drivers/pci/controller/dwc/pci-imx6.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 6ba16fd1373c..13cb1a200442 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -50,10 +50,11 @@ struct imx6_pcie { > > > struct clk *pcie_inbound_axi; > > > struct clk *pcie; > > > struct regmap *iomuxc_gpr; > > > struct reset_control *pciephy_reset; > > > struct reset_control *apps_reset; > > > + struct reset_control *turnoff_reset; > > enum imx6_pcie_variants variant; > > > u32 tx_deemph_gen1; > > > u32 tx_deemph_gen2_3p5db; > > > u32 tx_deemph_gen2_6db; > > > u32 tx_swing_full; > @@ -812,10 +813,16 @@ static void imx6_pcie_ltssm_disable(struct device *dev) > > default: > > dev_err(dev, "ltssm_disable not supported\n"); > > } > } > > +static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) > +{ > > + reset_control_assert(imx6_pcie->turnoff_reset); > + reset_control_deassert(imx6_pcie->turnoff_reset); I'm a bit surprised to see no timing requirements here. I would have expected that there is a minimum time from asserting the reset, so the turnoff message gets transmitted to the EP before the clocks are stopped. Regards, Lucas > +} > + > static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) > { > > clk_disable_unprepare(imx6_pcie->pcie); > > clk_disable_unprepare(imx6_pcie->pcie_phy); > > clk_disable_unprepare(imx6_pcie->pcie_bus); > @@ -832,10 +839,11 @@ static int imx6_pcie_suspend_noirq(struct device *dev) > > struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); > > > if (imx6_pcie->variant != IMX7D) > > return 0; > > > + imx6_pcie_pm_turnoff(imx6_pcie); > > imx6_pcie_clk_disable(imx6_pcie); > > imx6_pcie_ltssm_disable(dev); > > > return 0; > } > @@ -959,10 +967,17 @@ static int imx6_pcie_probe(struct platform_device *pdev) > > break; > > default: > > break; > > } > > > + /* Grab turnoff reset */ > > + imx6_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff"); > > + if (IS_ERR(imx6_pcie->turnoff_reset)) { > > + dev_err(dev, "Failed to get TURNOFF reset control\n"); > > + return PTR_ERR(imx6_pcie->turnoff_reset); > > + } > + > > /* Grab GPR config register range */ > > imx6_pcie->iomuxc_gpr = > > syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); > > if (IS_ERR(imx6_pcie->iomuxc_gpr)) { > > dev_err(dev, "unable to find iomuxc registers\n");
On Thu, 2018-10-04 at 10:59 +0200, Lucas Stach wrote: > Am Montag, den 01.10.2018, 22:53 +0300 schrieb Leonard Crestez: > > When the root complex suspends it must send a PME_Turn_Off TLP. > > Implement this by asserting the "turnoff" reset. > > > > +static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) > > +{ > > + reset_control_assert(imx6_pcie->turnoff_reset); > > + reset_control_deassert(imx6_pcie->turnoff_reset); > > I'm a bit surprised to see no timing requirements here. I would have > expected that there is a minimum time from asserting the reset, so the > turnoff message gets transmitted to the EP before the clocks are > stopped. According to the PCI standard after PME_Turn_Off is sent all components must respond with PME_TO_Ack. There doesn't seem to be any bit exposed to check if acks were received but the standard recommends a 1-10ms timeout after which you should proceed anyway. It seems the NXP vendor tree has an udelay(1000) which I missed, it seems like an acceptable solution. Or maybe it should be msleep(10)? -- Regards, Leonard
On Thu, 2018-10-04 at 13:20 +0000, Leonard Crestez wrote: > On Thu, 2018-10-04 at 10:59 +0200, Lucas Stach wrote: > > Am Montag, den 01.10.2018, 22:53 +0300 schrieb Leonard Crestez: > > > When the root complex suspends it must send a PME_Turn_Off TLP. > > > Implement this by asserting the "turnoff" reset. > > > > > > +static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) > > > +{ > > > + reset_control_assert(imx6_pcie->turnoff_reset); > > > + reset_control_deassert(imx6_pcie->turnoff_reset); > > > > I'm a bit surprised to see no timing requirements here. I would have > > expected that there is a minimum time from asserting the reset, so the > > turnoff message gets transmitted to the EP before the clocks are > > stopped. > > According to the PCI standard after PME_Turn_Off is sent all components > must respond with PME_TO_Ack. There doesn't seem to be any bit exposed > to check if acks were received but the standard recommends a 1-10ms > timeout after which you should proceed anyway. > > It seems the NXP vendor tree has an udelay(1000) which I missed, it > seems like an acceptable solution. Or maybe it should be msleep(10)? Maybe usleep_range(1000, 10000) ? regards Philipp
Am Donnerstag, den 04.10.2018, 15:25 +0200 schrieb Philipp Zabel: > On Thu, 2018-10-04 at 13:20 +0000, Leonard Crestez wrote: > > On Thu, 2018-10-04 at 10:59 +0200, Lucas Stach wrote: > > > Am Montag, den 01.10.2018, 22:53 +0300 schrieb Leonard Crestez: > > > > When the root complex suspends it must send a PME_Turn_Off TLP. > > > > Implement this by asserting the "turnoff" reset. > > > > > > > > +static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) > > > > +{ > > > > > > > > + reset_control_assert(imx6_pcie->turnoff_reset); > > > > + reset_control_deassert(imx6_pcie->turnoff_reset); > > > > > > I'm a bit surprised to see no timing requirements here. I would have > > > expected that there is a minimum time from asserting the reset, so the > > > turnoff message gets transmitted to the EP before the clocks are > > > stopped. > > > > According to the PCI standard after PME_Turn_Off is sent all components > > must respond with PME_TO_Ack. There doesn't seem to be any bit exposed > > to check if acks were received but the standard recommends a 1-10ms > > timeout after which you should proceed anyway. > > > > It seems the NXP vendor tree has an udelay(1000) which I missed, it > > seems like an acceptable solution. Or maybe it should be msleep(10)? > > Maybe usleep_range(1000, 10000) ? Yep, we aren't in atomic context here and the timeout is relatively short so usleep_range() looks like the correct thing to use. Regards, Lucas
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 6ba16fd1373c..13cb1a200442 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -50,10 +50,11 @@ struct imx6_pcie { struct clk *pcie_inbound_axi; struct clk *pcie; struct regmap *iomuxc_gpr; struct reset_control *pciephy_reset; struct reset_control *apps_reset; + struct reset_control *turnoff_reset; enum imx6_pcie_variants variant; u32 tx_deemph_gen1; u32 tx_deemph_gen2_3p5db; u32 tx_deemph_gen2_6db; u32 tx_swing_full; @@ -812,10 +813,16 @@ static void imx6_pcie_ltssm_disable(struct device *dev) default: dev_err(dev, "ltssm_disable not supported\n"); } } +static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) +{ + reset_control_assert(imx6_pcie->turnoff_reset); + reset_control_deassert(imx6_pcie->turnoff_reset); +} + static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) { clk_disable_unprepare(imx6_pcie->pcie); clk_disable_unprepare(imx6_pcie->pcie_phy); clk_disable_unprepare(imx6_pcie->pcie_bus); @@ -832,10 +839,11 @@ static int imx6_pcie_suspend_noirq(struct device *dev) struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); if (imx6_pcie->variant != IMX7D) return 0; + imx6_pcie_pm_turnoff(imx6_pcie); imx6_pcie_clk_disable(imx6_pcie); imx6_pcie_ltssm_disable(dev); return 0; } @@ -959,10 +967,17 @@ static int imx6_pcie_probe(struct platform_device *pdev) break; default: break; } + /* Grab turnoff reset */ + imx6_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff"); + if (IS_ERR(imx6_pcie->turnoff_reset)) { + dev_err(dev, "Failed to get TURNOFF reset control\n"); + return PTR_ERR(imx6_pcie->turnoff_reset); + } + /* Grab GPR config register range */ imx6_pcie->iomuxc_gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); if (IS_ERR(imx6_pcie->iomuxc_gpr)) { dev_err(dev, "unable to find iomuxc registers\n");
When the root complex suspends it must send a PME_Turn_Off TLP. Implement this by asserting the "turnoff" reset. On imx7d this is functionality is part of the SRC and exposed through the linux reset-controller subsystem. On imx6 equivalent bits are in the IOMUXC GPR area which the imx6-pcie driver accesses directly. This is only for imx7d right now but it's deliberately implemented as an optional reset, ignoring the chip variant: * Older dtbs won't have this reset so it will be ignored. * Future chips might also expose this as a reset controller. For example imx8m (not yet supported) has the exact same PCIE_CTRL_APPS_TURNOFF bit in the same location. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> --- drivers/pci/controller/dwc/pci-imx6.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)