Message ID | 20181128181533.30921.80227.stgit@scvm10.sc.intel.com (mailing list archive) |
---|---|
Headers | show |
Series | IB/hfi1: Random fixes for driver to land in for-next | expand |
On Wed, Nov 28, 2018 at 10:18:50AM -0800, Dennis Dalessandro wrote: > Hi Doug and Jason, > > These are some misc fixes that I don't feel really warrant going into the > current RC cycle. There is one panic but it's a narrow case to actually happen > so think it's OK to go to for-next. > > --- > > Ashutosh Dixit (1): > IB/hfi1: Consider LMC in 16B/bypass ingress packet check > > Kaike Wan (1): > IB/hfi1: Ignore LNI errors before DC8051 transitions to Polling state > > Michael J. Ruhl (2): > IB/hfi1: Limit VNIC use of SDMA engines to the available count > IB/hfi1: Incorrect sizing of sge for PIO will OOPs > > Mitko Haralanov (1): > IB/hfi1: Correctly process FECN and BECN in packets > Applied to for next, but I wonder why you didn't send 'Incorrect sizing of sge for PIO will OOPs' to for-rc? Jason
On 12/6/2018 9:58 PM, Jason Gunthorpe wrote: > On Wed, Nov 28, 2018 at 10:18:50AM -0800, Dennis Dalessandro wrote: >> Hi Doug and Jason, >> >> These are some misc fixes that I don't feel really warrant going into the >> current RC cycle. There is one panic but it's a narrow case to actually happen >> so think it's OK to go to for-next. >> >> --- >> >> Ashutosh Dixit (1): >> IB/hfi1: Consider LMC in 16B/bypass ingress packet check >> >> Kaike Wan (1): >> IB/hfi1: Ignore LNI errors before DC8051 transitions to Polling state >> >> Michael J. Ruhl (2): >> IB/hfi1: Limit VNIC use of SDMA engines to the available count >> IB/hfi1: Incorrect sizing of sge for PIO will OOPs >> >> Mitko Haralanov (1): >> IB/hfi1: Correctly process FECN and BECN in packets >> > > Applied to for next, but I wonder why you didn't send 'Incorrect > sizing of sge for PIO will OOPs' to for-rc? Probably could have went either way with this one. It is a day 1 issue. Lived with it this long, not easy to hit. -Denny