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[1/3] dt-bindings: imx-ocotp: Add i.MX6ULL/ULZ support

Message ID 1544536273-17909-2-git-send-email-stefan.wahren@i2se.com (mailing list archive)
State New, archived
Headers show
Series nvmem: imx-ocotp: Implement i.MX6ULL/ULZ support | expand

Commit Message

Stefan Wahren Dec. 11, 2018, 1:51 p.m. UTC
Since the i.MX6ULL/ULZ only supports 8 OTP banks we need to introduce a new
compatible.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 Documentation/devicetree/bindings/nvmem/imx-ocotp.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Rob Herring (Arm) Dec. 20, 2018, 8:03 p.m. UTC | #1
On Tue, 11 Dec 2018 14:51:11 +0100, Stefan Wahren wrote:
> Since the i.MX6ULL/ULZ only supports 8 OTP banks we need to introduce a new
> compatible.
> 
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
> ---
>  Documentation/devicetree/bindings/nvmem/imx-ocotp.txt | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
index 792bc5f..455ebbb 100644
--- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
+++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
@@ -1,7 +1,7 @@ 
 Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
 
 This binding represents the on-chip eFuse OTP controller found on
-i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL and i.MX6SLL SoCs.
+i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ and i.MX6SLL SoCs.
 
 Required properties:
 - compatible: should be one of
@@ -9,6 +9,7 @@  Required properties:
 	"fsl,imx6sl-ocotp" (i.MX6SL), or
 	"fsl,imx6sx-ocotp" (i.MX6SX),
 	"fsl,imx6ul-ocotp" (i.MX6UL),
+	"fsl,imx6ull-ocotp" (i.MX6ULL/ULZ),
 	"fsl,imx7d-ocotp" (i.MX7D/S),
 	"fsl,imx6sll-ocotp" (i.MX6SLL),
 	followed by "syscon".