| Message ID | 20190308214300.25057-1-rodrigo.vivi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/3] drm/i915/gen11+: First assume next platforms will inherit stuff | expand |
Quoting Rodrigo Vivi (2019-03-08 21:42:58) > This exactly same approach was already used from gen9 > to gen10 and from gen10 to gen11. Let's also use it > for gen11+. > > Let's first assume that we inherit a similar platform > and than we apply the differences on top. > > Different from the previous attempts this will be > done this time with coccinelle. We obviously need to > exclude some case that is really exclusive for gen11 > like PCH, Firmware, and few others. Luckly this was > easy to filter by selecting the files we are touching > with coccinelle as exposed below: > > spatch -sp_file gen11\+.cocci --in-place i915_perf.c \ > intel_bios.c intel_cdclk.c intel_ddi.c \ > intel_device_info.c intel_display.c intel_dpll_mgr.c \ > intel_dsi_vbt.c intel_hdmi.c intel_mocs.c intel_color.c > > @noticelake@ expression e; @@ > -!IS_ICELAKE(e) > +INTEL_GEN(e) < 11 > @notgen11@ expression e; @@ > -!IS_GEN(e, 11) > +INTEL_GEN(e) < 11 > @icelake@ expression e; @@ > -IS_ICELAKE(e) > +INTEL_GEN(e) >= 11 > @gen11@ expression e; @@ > -IS_GEN(e, 11) > +INTEL_GEN(e) >= 11 > > No functional change. > > v2: Remove intel_lrc.c per Tvrtko request since those were w/a > for ICL hw issuea and media related configuration. > > Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> > --- > drivers/gpu/drm/i915/i915_perf.c | 2 +- > drivers/gpu/drm/i915/intel_bios.c | 4 ++-- > drivers/gpu/drm/i915/intel_cdclk.c | 6 +++--- > drivers/gpu/drm/i915/intel_color.c | 2 +- > drivers/gpu/drm/i915/intel_ddi.c | 18 +++++++++--------- > drivers/gpu/drm/i915/intel_device_info.c | 2 +- > drivers/gpu/drm/i915/intel_display.c | 18 +++++++++--------- > drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 +- > drivers/gpu/drm/i915/intel_dsi_vbt.c | 6 +++--- > drivers/gpu/drm/i915/intel_hdmi.c | 4 ++-- > drivers/gpu/drm/i915/intel_mocs.c | 2 +- > 11 files changed, 33 insertions(+), 33 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c > index e19a89e4df64..9b0292a38865 100644 > --- a/drivers/gpu/drm/i915/i915_perf.c > +++ b/drivers/gpu/drm/i915/i915_perf.c > @@ -2881,7 +2881,7 @@ void i915_perf_register(struct drm_i915_private *dev_priv) > > sysfs_attr_init(&dev_priv->perf.oa.test_config.sysfs_metric_id.attr); > > - if (IS_ICELAKE(dev_priv)) { > + if (INTEL_GEN(dev_priv) >= 11) { > i915_perf_load_test_config_icl(dev_priv); > } else if (IS_CANNONLAKE(dev_priv)) { > i915_perf_load_test_config_cnl(dev_priv); Given that every platform so far has had different oa configurations, that looks to be a hasty assumption that future platforms will be fixed. -Chris
On Fri, Mar 08, 2019 at 10:23:20PM +0000, Chris Wilson wrote: > Quoting Rodrigo Vivi (2019-03-08 21:42:58) > > This exactly same approach was already used from gen9 > > to gen10 and from gen10 to gen11. Let's also use it > > for gen11+. > > > > Let's first assume that we inherit a similar platform > > and than we apply the differences on top. > > > > Different from the previous attempts this will be > > done this time with coccinelle. We obviously need to > > exclude some case that is really exclusive for gen11 > > like PCH, Firmware, and few others. Luckly this was > > easy to filter by selecting the files we are touching > > with coccinelle as exposed below: > > > > spatch -sp_file gen11\+.cocci --in-place i915_perf.c \ > > intel_bios.c intel_cdclk.c intel_ddi.c \ > > intel_device_info.c intel_display.c intel_dpll_mgr.c \ > > intel_dsi_vbt.c intel_hdmi.c intel_mocs.c intel_color.c > > > > @noticelake@ expression e; @@ > > -!IS_ICELAKE(e) > > +INTEL_GEN(e) < 11 > > @notgen11@ expression e; @@ > > -!IS_GEN(e, 11) > > +INTEL_GEN(e) < 11 > > @icelake@ expression e; @@ > > -IS_ICELAKE(e) > > +INTEL_GEN(e) >= 11 > > @gen11@ expression e; @@ > > -IS_GEN(e, 11) > > +INTEL_GEN(e) >= 11 > > > > No functional change. > > > > v2: Remove intel_lrc.c per Tvrtko request since those were w/a > > for ICL hw issuea and media related configuration. > > > > Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> > > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> > > --- > > drivers/gpu/drm/i915/i915_perf.c | 2 +- > > drivers/gpu/drm/i915/intel_bios.c | 4 ++-- > > drivers/gpu/drm/i915/intel_cdclk.c | 6 +++--- > > drivers/gpu/drm/i915/intel_color.c | 2 +- > > drivers/gpu/drm/i915/intel_ddi.c | 18 +++++++++--------- > > drivers/gpu/drm/i915/intel_device_info.c | 2 +- > > drivers/gpu/drm/i915/intel_display.c | 18 +++++++++--------- > > drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 +- > > drivers/gpu/drm/i915/intel_dsi_vbt.c | 6 +++--- > > drivers/gpu/drm/i915/intel_hdmi.c | 4 ++-- > > drivers/gpu/drm/i915/intel_mocs.c | 2 +- > > 11 files changed, 33 insertions(+), 33 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c > > index e19a89e4df64..9b0292a38865 100644 > > --- a/drivers/gpu/drm/i915/i915_perf.c > > +++ b/drivers/gpu/drm/i915/i915_perf.c > > @@ -2881,7 +2881,7 @@ void i915_perf_register(struct drm_i915_private *dev_priv) > > > > sysfs_attr_init(&dev_priv->perf.oa.test_config.sysfs_metric_id.attr); > > > > - if (IS_ICELAKE(dev_priv)) { > > + if (INTEL_GEN(dev_priv) >= 11) { > > i915_perf_load_test_config_icl(dev_priv); > > } else if (IS_CANNONLAKE(dev_priv)) { > > i915_perf_load_test_config_cnl(dev_priv); > > Given that every platform so far has had different oa configurations, > that looks to be a hasty assumption that future platforms will be fixed. I know... But my hope is that at some point it gets stabilized. Well, or at least start with this so any other gen11 could reuse and gen12 would start with that and change later for >= gen12 and on... > -Chris
On Fri, Mar 08, 2019 at 02:39:36PM -0800, Rodrigo Vivi wrote: >> Given that every platform so far has had different oa configurations, >> that looks to be a hasty assumption that future platforms will be fixed. > >I know... But my hope is that at some point it gets stabilized. > >Well, or at least start with this so any other gen11 could reuse and >gen12 would start with that and change later for >= gen12 and on... If it's different, there's no harm in making this assumption now and then later change to cover the differences. Making it consistent everywhere allows to more easily add the next platform. Lucas De Marchi > >> -Chris
On Fri, 08 Mar 2019, Lucas De Marchi <lucas.demarchi@intel.com> wrote: > On Fri, Mar 08, 2019 at 02:39:36PM -0800, Rodrigo Vivi wrote: >>> Given that every platform so far has had different oa configurations, >>> that looks to be a hasty assumption that future platforms will be fixed. >> >>I know... But my hope is that at some point it gets stabilized. >> >>Well, or at least start with this so any other gen11 could reuse and >>gen12 would start with that and change later for >= gen12 and on... > > If it's different, there's no harm in making this assumption now and > then later change to cover the differences. Making it consistent > everywhere allows to more easily add the next platform. At some point in time we deliberately made the if ladders and switch cases avoid matching future platforms, and liberally sprinkled MISSING_CASE() all over the place so we would catch each location that needed updating. So we wouldn't miss any. This is the opposite of that approach. I'm not against the new approach, because we do have a lot of places where the existing code just works, but if you do know something will break, or will need to be updated to work, why not use the MISSING_CASE() there? BR, Jani.
On Mon, Mar 11, 2019 at 11:12:06AM +0200, Jani Nikula wrote: > On Fri, 08 Mar 2019, Lucas De Marchi <lucas.demarchi@intel.com> wrote: > > On Fri, Mar 08, 2019 at 02:39:36PM -0800, Rodrigo Vivi wrote: > >>> Given that every platform so far has had different oa configurations, > >>> that looks to be a hasty assumption that future platforms will be fixed. > >> > >>I know... But my hope is that at some point it gets stabilized. > >> > >>Well, or at least start with this so any other gen11 could reuse and > >>gen12 would start with that and change later for >= gen12 and on... > > > > If it's different, there's no harm in making this assumption now and > > then later change to cover the differences. Making it consistent > > everywhere allows to more easily add the next platform. > > At some point in time we deliberately made the if ladders and switch > cases avoid matching future platforms, and liberally sprinkled > MISSING_CASE() all over the place so we would catch each location that > needed updating. So we wouldn't miss any. > > This is the opposite of that approach. I'm not against the new approach, > because we do have a lot of places where the existing code just works, > but if you do know something will break, or will need to be updated to > work, why not use the MISSING_CASE() there? If you know in advance and you don't have any internal patch handling that a MISSING_CASE is useful indeed. Notice that there were cases that I intentionally left ICL behind. I will double check if I think this or any of those cases deserves the MISSING_CASES, but my current guess is that we are fine without it. Also I'm wondering if we should make some macros: if GEN_GREATER_THAN(dev_priv, 11) { icl_func(); } #define GEN_GREATER_THAN(dev_priv, n) \ if n > latest_implemented_gen() \ MISSING_CASE() or something like that... hmm but this wouldn't help us later, when gen12 is already defined in some internal and we might forget anyways... so maybe something like #define GEN_GREATER_THAN(dev_priv, g) \ if g != .gen \ DRM_DEBUG_DRIVER("Reusing %s from gen %d\n", __FUNCTION__, g) But for now let's please just use this approach to save internal little patches here and there. > > BR, > Jani. > > > -- > Jani Nikula, Intel Open Source Graphics Center > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Mon, 11 Mar 2019, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote: > On Mon, Mar 11, 2019 at 11:12:06AM +0200, Jani Nikula wrote: >> On Fri, 08 Mar 2019, Lucas De Marchi <lucas.demarchi@intel.com> wrote: >> > On Fri, Mar 08, 2019 at 02:39:36PM -0800, Rodrigo Vivi wrote: >> >>> Given that every platform so far has had different oa configurations, >> >>> that looks to be a hasty assumption that future platforms will be fixed. >> >> >> >>I know... But my hope is that at some point it gets stabilized. >> >> >> >>Well, or at least start with this so any other gen11 could reuse and >> >>gen12 would start with that and change later for >= gen12 and on... >> > >> > If it's different, there's no harm in making this assumption now and >> > then later change to cover the differences. Making it consistent >> > everywhere allows to more easily add the next platform. >> >> At some point in time we deliberately made the if ladders and switch >> cases avoid matching future platforms, and liberally sprinkled >> MISSING_CASE() all over the place so we would catch each location that >> needed updating. So we wouldn't miss any. >> >> This is the opposite of that approach. I'm not against the new approach, >> because we do have a lot of places where the existing code just works, >> but if you do know something will break, or will need to be updated to >> work, why not use the MISSING_CASE() there? > > If you know in advance and you don't have any internal patch handling that > a MISSING_CASE is useful indeed. > > Notice that there were cases that I intentionally left ICL behind. > > I will double check if I think this or any of those cases deserves > the MISSING_CASES, but my current guess is that we are fine without it. > > Also I'm wondering if we should make some macros: > > if GEN_GREATER_THAN(dev_priv, 11) { > icl_func(); > } > > #define GEN_GREATER_THAN(dev_priv, n) \ > if n > latest_implemented_gen() \ > MISSING_CASE() > > or something like that... > > hmm but this wouldn't help us later, when gen12 is > already defined in some internal and we might forget anyways... > > so maybe something like > > #define GEN_GREATER_THAN(dev_priv, g) \ > if g != .gen \ > DRM_DEBUG_DRIVER("Reusing %s from gen %d\n", __FUNCTION__, g) This would spam dmesg everywhere it's used for normal cases. As to this "greater than" business, there were macros to do this... before 5bc0e89ff1be ("drm/i915: Kill GEN_FOREVER"). :/ > But for now let's please just use this approach to save internal little > patches here and there. Okay, let's see what happens. BR, Jani.
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index e19a89e4df64..9b0292a38865 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -2881,7 +2881,7 @@ void i915_perf_register(struct drm_i915_private *dev_priv) sysfs_attr_init(&dev_priv->perf.oa.test_config.sysfs_metric_id.attr); - if (IS_ICELAKE(dev_priv)) { + if (INTEL_GEN(dev_priv) >= 11) { i915_perf_load_test_config_icl(dev_priv); } else if (IS_CANNONLAKE(dev_priv)) { i915_perf_load_test_config_cnl(dev_priv); diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index b508d8a735e0..48c62bea92cd 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c @@ -2093,8 +2093,8 @@ bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, dvo_port = child->dvo_port; if (dvo_port == DVO_PORT_MIPIA || - (dvo_port == DVO_PORT_MIPIB && IS_ICELAKE(dev_priv)) || - (dvo_port == DVO_PORT_MIPIC && !IS_ICELAKE(dev_priv))) { + (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) || + (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) { if (port) *port = dvo_port - DVO_PORT_MIPIA; return true; diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c index 5d266538036d..7e5132772477 100644 --- a/drivers/gpu/drm/i915/intel_cdclk.c +++ b/drivers/gpu/drm/i915/intel_cdclk.c @@ -2560,7 +2560,7 @@ static int intel_compute_max_dotclk(struct drm_i915_private *dev_priv) */ void intel_update_max_cdclk(struct drm_i915_private *dev_priv) { - if (IS_ICELAKE(dev_priv)) { + if (INTEL_GEN(dev_priv) >= 11) { if (dev_priv->cdclk.hw.ref == 24000) dev_priv->max_cdclk_freq = 648000; else @@ -2744,7 +2744,7 @@ void intel_update_rawclk(struct drm_i915_private *dev_priv) */ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv) { - if (IS_ICELAKE(dev_priv)) { + if (INTEL_GEN(dev_priv) >= 11) { dev_priv->display.set_cdclk = icl_set_cdclk; dev_priv->display.modeset_calc_cdclk = icl_modeset_calc_cdclk; } else if (IS_CANNONLAKE(dev_priv)) { @@ -2773,7 +2773,7 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv) vlv_modeset_calc_cdclk; } - if (IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11) dev_priv->display.get_cdclk = icl_get_cdclk; else if (IS_CANNONLAKE(dev_priv)) dev_priv->display.get_cdclk = cnl_get_cdclk; diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c index da7a07d5ccea..0173967ed593 100644 --- a/drivers/gpu/drm/i915/intel_color.c +++ b/drivers/gpu/drm/i915/intel_color.c @@ -841,7 +841,7 @@ void intel_color_init(struct intel_crtc *crtc) dev_priv->display.color_commit = i9xx_color_commit; } else { - if (IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11) dev_priv->display.load_luts = icl_load_luts; else if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv)) dev_priv->display.load_luts = glk_load_luts; diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 7e3b4e8fdf3a..69aa0d148795 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -851,7 +851,7 @@ static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port por level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift; - if (IS_ICELAKE(dev_priv)) { + if (INTEL_GEN(dev_priv) >= 11) { if (intel_port_is_combophy(dev_priv, port)) icl_get_combo_buf_trans(dev_priv, port, INTEL_OUTPUT_HDMI, 0, &n_entries); @@ -1678,7 +1678,7 @@ static void intel_ddi_clock_get(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - if (IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11) icl_ddi_clock_get(encoder, pipe_config); else if (IS_CANNONLAKE(dev_priv)) cnl_ddi_clock_get(encoder, pipe_config); @@ -2225,7 +2225,7 @@ u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder) enum port port = encoder->port; int n_entries; - if (IS_ICELAKE(dev_priv)) { + if (INTEL_GEN(dev_priv) >= 11) { if (intel_port_is_combophy(dev_priv, port)) icl_get_combo_buf_trans(dev_priv, port, encoder->type, intel_dp->link_rate, &n_entries); @@ -2698,7 +2698,7 @@ u32 bxt_signal_levels(struct intel_dp *intel_dp) struct intel_encoder *encoder = &dport->base; int level = intel_ddi_dp_level(intel_dp); - if (IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11) icl_ddi_vswing_sequence(encoder, intel_dp->link_rate, level, encoder->type); else if (IS_CANNONLAKE(dev_priv)) @@ -2867,7 +2867,7 @@ static void intel_ddi_clk_select(struct intel_encoder *encoder, mutex_lock(&dev_priv->dpll_lock); - if (IS_ICELAKE(dev_priv)) { + if (INTEL_GEN(dev_priv) >= 11) { if (!intel_port_is_combophy(dev_priv, port)) I915_WRITE(DDI_CLK_SEL(port), icl_pll_to_ddi_clk_sel(encoder, crtc_state)); @@ -2909,7 +2909,7 @@ static void intel_ddi_clk_disable(struct intel_encoder *encoder) struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); enum port port = encoder->port; - if (IS_ICELAKE(dev_priv)) { + if (INTEL_GEN(dev_priv) >= 11) { if (!intel_port_is_combophy(dev_priv, port)) I915_WRITE(DDI_CLK_SEL(port), DDI_CLK_SEL_NONE); } else if (IS_CANNONLAKE(dev_priv)) { @@ -3126,7 +3126,7 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, icl_program_mg_dp_mode(dig_port); icl_disable_phy_clock_gating(dig_port); - if (IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11) icl_ddi_vswing_sequence(encoder, crtc_state->port_clock, level, encoder->type); else if (IS_CANNONLAKE(dev_priv)) @@ -3175,7 +3175,7 @@ static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder, icl_program_mg_dp_mode(dig_port); icl_disable_phy_clock_gating(dig_port); - if (IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11) icl_ddi_vswing_sequence(encoder, crtc_state->port_clock, level, INTEL_OUTPUT_HDMI); else if (IS_CANNONLAKE(dev_priv)) @@ -3711,7 +3711,7 @@ static bool intel_ddi_is_audio_enabled(struct drm_i915_private *dev_priv, void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv, struct intel_crtc_state *crtc_state) { - if (IS_ICELAKE(dev_priv) && crtc_state->port_clock > 594000) + if (INTEL_GEN(dev_priv) >= 11 && crtc_state->port_clock > 594000) crtc_state->min_voltage_level = 1; else if (IS_CANNONLAKE(dev_priv) && crtc_state->port_clock > 594000) crtc_state->min_voltage_level = 2; diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 2c1b46cfd6d3..aac19b1c419c 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -740,7 +740,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv) BUILD_BUG_ON(BITS_PER_TYPE(intel_engine_mask_t) < I915_NUM_ENGINES); - if (IS_GEN(dev_priv, 11)) + if (INTEL_GEN(dev_priv) >= 11) for_each_pipe(dev_priv, pipe) runtime->num_sprites[pipe] = 6; else if (IS_GEN(dev_priv, 10) || IS_GEMINILAKE(dev_priv)) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 963b4bd69dbb..7ef1d3054cb1 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5035,10 +5035,10 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, /* range checks */ if (src_w < SKL_MIN_SRC_W || src_h < SKL_MIN_SRC_H || dst_w < SKL_MIN_DST_W || dst_h < SKL_MIN_DST_H || - (IS_GEN(dev_priv, 11) && + (INTEL_GEN(dev_priv) >= 11 && (src_w > ICL_MAX_SRC_W || src_h > ICL_MAX_SRC_H || dst_w > ICL_MAX_DST_W || dst_h > ICL_MAX_DST_H)) || - (!IS_GEN(dev_priv, 11) && + (INTEL_GEN(dev_priv) < 11 && (src_w > SKL_MAX_SRC_W || src_h > SKL_MAX_SRC_H || dst_w > SKL_MAX_DST_W || dst_h > SKL_MAX_DST_H))) { DRM_DEBUG_KMS("scaler_user index %u.%u: src %ux%u dst %ux%u " @@ -6139,7 +6139,7 @@ bool intel_port_is_combophy(struct drm_i915_private *dev_priv, enum port port) if (port == PORT_NONE) return false; - if (IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11) return port <= PORT_B; return false; @@ -6147,7 +6147,7 @@ bool intel_port_is_combophy(struct drm_i915_private *dev_priv, enum port port) bool intel_port_is_tc(struct drm_i915_private *dev_priv, enum port port) { - if (IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11) return port >= PORT_C && port <= PORT_F; return false; @@ -9568,7 +9568,7 @@ static int haswell_crtc_compute_clock(struct intel_crtc *crtc, to_intel_atomic_state(crtc_state->base.state); if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) || - IS_ICELAKE(dev_priv)) { + INTEL_GEN(dev_priv) >= 11) { struct intel_encoder *encoder = intel_get_crtc_new_encoder(state, crtc_state); @@ -9711,7 +9711,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc, enum transcoder panel_transcoder; u32 tmp; - if (IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11) panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1); @@ -9847,7 +9847,7 @@ static void haswell_get_ddi_port_state(struct intel_crtc *crtc, port = (tmp & TRANS_DDI_PORT_MASK) >> TRANS_DDI_PORT_SHIFT; - if (IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11) icelake_get_ddi_pll(dev_priv, port, pipe_config); else if (IS_CANNONLAKE(dev_priv)) cannonlake_get_ddi_pll(dev_priv, port, pipe_config); @@ -9910,7 +9910,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, goto out; if (!transcoder_is_dsi(pipe_config->cpu_transcoder) || - IS_ICELAKE(dev_priv)) { + INTEL_GEN(dev_priv) >= 11) { haswell_get_ddi_port_state(crtc, pipe_config); intel_get_pipe_timings(crtc, pipe_config); } @@ -14658,7 +14658,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) if (!HAS_DISPLAY(dev_priv)) return; - if (IS_ICELAKE(dev_priv)) { + if (INTEL_GEN(dev_priv) >= 11) { intel_ddi_init(dev_priv, PORT_A); intel_ddi_init(dev_priv, PORT_B); intel_ddi_init(dev_priv, PORT_C); diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c index e4ec73d415d9..b3fb221c2532 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c @@ -3259,7 +3259,7 @@ void intel_shared_dpll_init(struct drm_device *dev) const struct dpll_info *dpll_info; int i; - if (IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11) dpll_mgr = &icl_pll_mgr; else if (IS_CANNONLAKE(dev_priv)) dpll_mgr = &cnl_pll_mgr; diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c b/drivers/gpu/drm/i915/intel_dsi_vbt.c index 06a11c35a784..d1e00e4c7726 100644 --- a/drivers/gpu/drm/i915/intel_dsi_vbt.c +++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c @@ -194,7 +194,7 @@ static const u8 *mipi_exec_send_packet(struct intel_dsi *intel_dsi, break; } - if (!IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) < 11) vlv_dsi_wait_for_fifo_empty(intel_dsi, port); out: @@ -365,7 +365,7 @@ static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data) /* pull up/down */ value = *data++ & 1; - if (IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11) icl_exec_gpio(dev_priv, gpio_source, gpio_index, value); else if (IS_VALLEYVIEW(dev_priv)) vlv_exec_gpio(dev_priv, gpio_source, gpio_number, value); @@ -890,7 +890,7 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id) intel_dsi->burst_mode_ratio = burst_mode_ratio; - if (IS_ICELAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11) icl_dphy_param_init(intel_dsi); else vlv_dphy_param_init(intel_dsi); diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index cd422a7b4da0..5ccb305a6e1c 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -2206,7 +2206,7 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state, /* Display Wa_1405510057:icl */ if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 && - bpc == 10 && IS_ICELAKE(dev_priv) && + bpc == 10 && INTEL_GEN(dev_priv) >= 11 && (adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start) % 8 == 2) return false; @@ -2500,7 +2500,7 @@ intel_hdmi_detect(struct drm_connector *connector, bool force) wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS); - if (IS_ICELAKE(dev_priv) && + if (INTEL_GEN(dev_priv) >= 11 && !intel_digital_port_connected(encoder)) goto out; diff --git a/drivers/gpu/drm/i915/intel_mocs.c b/drivers/gpu/drm/i915/intel_mocs.c index 80dcc08222d0..274ba78500c0 100644 --- a/drivers/gpu/drm/i915/intel_mocs.c +++ b/drivers/gpu/drm/i915/intel_mocs.c @@ -252,7 +252,7 @@ static bool get_mocs_settings(struct drm_i915_private *dev_priv, { bool result = false; - if (IS_ICELAKE(dev_priv)) { + if (INTEL_GEN(dev_priv) >= 11) { table->size = ARRAY_SIZE(icelake_mocs_table); table->table = icelake_mocs_table; table->n_entries = GEN11_NUM_MOCS_ENTRIES;
This exactly same approach was already used from gen9 to gen10 and from gen10 to gen11. Let's also use it for gen11+. Let's first assume that we inherit a similar platform and than we apply the differences on top. Different from the previous attempts this will be done this time with coccinelle. We obviously need to exclude some case that is really exclusive for gen11 like PCH, Firmware, and few others. Luckly this was easy to filter by selecting the files we are touching with coccinelle as exposed below: spatch -sp_file gen11\+.cocci --in-place i915_perf.c \ intel_bios.c intel_cdclk.c intel_ddi.c \ intel_device_info.c intel_display.c intel_dpll_mgr.c \ intel_dsi_vbt.c intel_hdmi.c intel_mocs.c intel_color.c @noticelake@ expression e; @@ -!IS_ICELAKE(e) +INTEL_GEN(e) < 11 @notgen11@ expression e; @@ -!IS_GEN(e, 11) +INTEL_GEN(e) < 11 @icelake@ expression e; @@ -IS_ICELAKE(e) +INTEL_GEN(e) >= 11 @gen11@ expression e; @@ -IS_GEN(e, 11) +INTEL_GEN(e) >= 11 No functional change. v2: Remove intel_lrc.c per Tvrtko request since those were w/a for ICL hw issuea and media related configuration. Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> --- drivers/gpu/drm/i915/i915_perf.c | 2 +- drivers/gpu/drm/i915/intel_bios.c | 4 ++-- drivers/gpu/drm/i915/intel_cdclk.c | 6 +++--- drivers/gpu/drm/i915/intel_color.c | 2 +- drivers/gpu/drm/i915/intel_ddi.c | 18 +++++++++--------- drivers/gpu/drm/i915/intel_device_info.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 18 +++++++++--------- drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 +- drivers/gpu/drm/i915/intel_dsi_vbt.c | 6 +++--- drivers/gpu/drm/i915/intel_hdmi.c | 4 ++-- drivers/gpu/drm/i915/intel_mocs.c | 2 +- 11 files changed, 33 insertions(+), 33 deletions(-)