Show patches with: Submitter = Lucas De Marchi       |    State = Action Required       |    Archived = No       |   728 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[v2] drm/i915: do not read swizzle info if unavailable [v2] drm/i915: do not read swizzle info if unavailable - 1 - 0 0 0 2020-07-02 Lucas De Marchi New
[v3,28/28] drm/i915/dg1: DG1 does not support DC6 Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,27/28] drm/i915/dg1: Add initial DG1 workarounds Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,26/28] drm/i915/rkl: Add initial workarounds Introduce DG1 - 1 - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,25/28] drm/i915/dg1: Load DMC Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,24/28] drm/i915/dg1: enable PORT C/D aka D/E Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,23/28] drm/i915/dg1: map/unmap pll clocks Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,22/28] drm/i915/dg1: provide port/phy mapping for vbt Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,21/28] drm/i915/dg1: Update voltage swing tables for DP Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,20/28] drm/i915/dg1: Update comp master/slave relationships for PHYs Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,19/28] drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,18/28] drm/i915/dg1: Enable first 2 ports for DG1 Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,17/28] drm/i915/dg1: gmbus pin mapping Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,16/28] drm/i915/dg1: invert HPD pins Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,15/28] drm/i915/dg1: add hpd interrupt handling Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,14/28] drm/i915/dg1: Enable DPLL for DG1 Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,13/28] drm/i915/dg1: Add and setup DPLLs for DG1 Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,12/28] drm/i915/dg1: Add DPLL macros for DG1 Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,11/28] drm/i915/dg1: Wait for pcode/uncore handshake at startup Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,10/28] drm/i915/dg1: Increase mmio size to 4MB Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,09/28] drm/i915/dg1: Add DG1 power wells Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,08/28] drm/i915/dg1: Define MOCS table for DG1 Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,07/28] drm/i915/dg1: Initialize RAWCLK properly Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,06/28] drm/i915/dg1: Add fake PCH Introduce DG1 - - - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,05/28] drm/i915/dg1: Remove SHPD_FILTER_CNT register programming Introduce DG1 - 1 - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,04/28] drm/i915/dg1: add support for the master unit interrupt Introduce DG1 - 1 - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,03/28] drm/i915/dg1: Add DG1 PCI IDs Introduce DG1 - 1 - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,02/28] drm/i915/dg1: add initial DG-1 definitions Introduce DG1 - 1 - 0 0 0 2020-07-01 Lucas De Marchi New
[v3,01/28] drm/i915: Add has_master_unit_irq flag Introduce DG1 - 1 - 0 0 0 2020-07-01 Lucas De Marchi New
drm/i915: do not read swizzle info if unavailable drm/i915: do not read swizzle info if unavailable - - - 0 0 0 2020-07-01 Lucas De Marchi New
[CI] drm/i915/display: prefer dig_port to reference intel_digital_port [CI] drm/i915/display: prefer dig_port to reference intel_digital_port - 1 - 0 0 0 2020-07-01 Lucas De Marchi New
[v2,2/2] drm/i915/display: prefer dig_port to reference intel_digital_port Variable renames - 1 - 0 0 0 2020-06-26 Lucas De Marchi New
[v2,1/2] drm/i915/display: remove alias to dig_port Variable renames - 1 - 0 0 0 2020-06-26 Lucas De Marchi New
[v2,6/6] drm/i915/display: replace port to phy conversions in intel_ddi.c display/ddi: keep register indexes in a table - 1 - 0 0 0 2020-06-25 Lucas De Marchi New
[v2,5/6] drm/i915/display: use port_info in intel_ddi_init display/ddi: keep register indexes in a table - 1 - 0 0 0 2020-06-25 Lucas De Marchi New
[v2,4/6] drm/i915/display: add phy, vbt and ddi indexes display/ddi: keep register indexes in a table 1 - - 0 0 0 2020-06-25 Lucas De Marchi New
[v2,3/6] drm/i915/display: start description-based ddi initialization display/ddi: keep register indexes in a table - 1 - 0 0 0 2020-06-25 Lucas De Marchi New
[v2,2/6] drm/i915/display: fix comment on skl straps display/ddi: keep register indexes in a table 1 1 - 0 0 0 2020-06-25 Lucas De Marchi New
[v2,1/6] drm/i915: move ICL port F hack to intel_bios display/ddi: keep register indexes in a table - 1 - 0 0 0 2020-06-25 Lucas De Marchi New
[2/2] drm/i915/display: prefer dig_port to reference intel_digital_port Variable renames - - - 0 0 0 2020-06-22 Lucas De Marchi New
[1/2] drm/i915/display: remove alias to dig_port Variable renames - 1 - 0 0 0 2020-06-22 Lucas De Marchi New
[v2,32/32] drm/i915/dg1: DG1 does not support DC6 Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,31/32] drm/i915/dg1: Add initial DG1 workarounds Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,30/32] drm/i915/dg1: Load DMC Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,29/32] drm/i915/dg1: enable PORT C/D aka D/E Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,28/32] drm/i915/dg1: map/unmap pll clocks Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,27/32] drm/i915/dg1: provide port/phy mapping for vbt Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,26/32] drm/i915/dg1: Update voltage swing tables for DP Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,25/32] drm/i915/dg1: Update comp master/slave relationships for PHYs Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,24/32] drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,23/32] drm/i915/dg1: Enable first 2 ports for DG1 Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,22/32] drm/i915/dg1: gmbus pin mapping Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,21/32] drm/i915/dg1: invert HPD pins Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,20/32] drm/i915/dg1: add hpd interrupt handling Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,19/32] drm/i915/dg1: Enable DPLL for DG1 Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,18/32] drm/i915/dg1: Add and setup DPLLs for DG1 Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,17/32] drm/i915/dg1: Add DPLL macros for DG1 Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,16/32] drm/i915/dg1: Wait for pcode/uncore handshake at startup Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,15/32] drm/i915/dg1: Increase mmio size to 4MB Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,14/32] drm/i915/dg1: Add DG1 power wells Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,13/32] drm/i915/dg1: Define MOCS table for DG1 Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,12/32] drm/i915/dg1: Initialize RAWCLK properly Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,11/32] drm/i915/dg1: Add fake PCH Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,10/32] drm/i915/dg1: Remove SHPD_FILTER_CNT register programming Introduce DG1 - 1 - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,09/32] drm/i915/dg1: add support for the master unit interrupt Introduce DG1 - 1 - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,08/32] drm/i915/dg1: Add DG1 PCI IDs Introduce DG1 - 1 - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,07/32] drm/i915/dg1: add initial DG-1 definitions Introduce DG1 - 1 - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,06/32] drm/i915: Add has_master_unit_irq flag Introduce DG1 - 1 - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,05/32] drm/i915/rkl: Add Wa_14011224835 for PHY B initialization Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,04/32] drm/i915/rkl: Add initial workarounds Introduce DG1 - 1 - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,03/32] drm/i915/rkl: Handle HTI Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,02/32] drm/i915/rkl: Add DPLL4 support Introduce DG1 - - - 0 0 0 2020-06-18 Lucas De Marchi New
[v2,01/32] drm/i915/rkl: Handle new DPCLKA_CFGCR0 layout Introduce DG1 - 1 - 0 0 0 2020-06-18 Lucas De Marchi New
[37/37] drm/i915/dg1: Remove SHPD_FILTER_CNT register programming Introduce DG1 - 1 - 0 0 0 2020-05-21 Lucas De Marchi New
[36/37] drm/i915/dg1: Add initial DG1 workarounds Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[35/37] drm/i915/dg1: Load DMC Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[34/37] drm/i915/dg1: enable PORT C/D aka D/E Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[33/37] drm/i915/dg1: map/unmap pll clocks Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[32/37] drm/i915/dg1: provide port/phy mapping for vbt Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[31/37] drm/i915/dg1: Update voltage swing tables for DP Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[30/37] drm/i915/dg1: Update comp master/slave relationships for PHYs Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[29/37] drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[28/37] drm/i915/dg1: Enable first 2 ports for DG1 Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[27/37] drm/i915/dg1: Log counter on SLM ECC error Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[26/37] drm/i915/dg1: Handle GRF/IC ECC error irq Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[25/37] drm/i915/dg1: gmbus pin mapping Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[24/37] drm/i915/dg1: invert HPD pins Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[23/37] drm/i915/dg1: add hpd interrupt handling Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[22/37] drm/i915/dg1: Enable DPLL for DG1 Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[21/37] drm/i915/dg1: Add and setup DPLLs for DG1 Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[20/37] drm/i915/dg1: Add DPLL macros for DG1 Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[19/37] drm/i915/dg1: Wait for pcode/uncore handshake at startup Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[18/37] drm/i915/dg1: add support for the master unit interrupt Introduce DG1 - 1 - 0 0 0 2020-05-21 Lucas De Marchi New
[17/37] drm/i915/dg1: Increase mmio size to 4MB Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[16/37] drm/i915/dg1: Add DG1 power wells Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[15/37] drm/i915/dg1: Define MOCS table for DG1 Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[14/37] drm/i915/dg1: Initialize RAWCLK properly Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[13/37] drm/i915/dg1: Add fake PCH Introduce DG1 - - - 0 0 0 2020-05-21 Lucas De Marchi New
[12/37] drm/i915/dg1: Add DG1 PCI IDs Introduce DG1 - 1 - 0 0 0 2020-05-21 Lucas De Marchi New
[11/37] drm/i915/dg1: add initial DG-1 definitions Introduce DG1 - 1 - 0 0 0 2020-05-21 Lucas De Marchi New
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