diff mbox series

[v5,17/19] drm: rcar-du: Store V4L2 fourcc in rcar_du_format_info structure

Message ID 20190221103212.28764-18-laurent.pinchart+renesas@ideasonboard.com (mailing list archive)
State New, archived
Headers show
Series R-Car DU display writeback support | expand

Commit Message

Laurent Pinchart Feb. 21, 2019, 10:32 a.m. UTC
The mapping between DRM and V4L2 fourcc's is stored in two separate
tables in rcar_du_vsp.c. In order to make it reusable to implement
writeback support, move it to the rcar_du_format_info structure.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/gpu/drm/rcar-du/rcar_du_kms.c | 25 +++++++++++++++
 drivers/gpu/drm/rcar-du/rcar_du_kms.h |  1 +
 drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 44 ++++-----------------------
 3 files changed, 32 insertions(+), 38 deletions(-)

Comments

Kieran Bingham March 11, 2019, 11:20 p.m. UTC | #1
Hi Laurent,

On 21/02/2019 10:32, Laurent Pinchart wrote:
> The mapping between DRM and V4L2 fourcc's is stored in two separate
> tables in rcar_du_vsp.c. In order to make it reusable to implement
> writeback support, move it to the rcar_du_format_info structure.


It's a shame there isn't some core framework conversion helpers that do
these mappings (presumably in both directions). But even if we had one
of those, having a table entry here is a fast conversion.


Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>


> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
>  drivers/gpu/drm/rcar-du/rcar_du_kms.c | 25 +++++++++++++++
>  drivers/gpu/drm/rcar-du/rcar_du_kms.h |  1 +
>  drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 44 ++++-----------------------
>  3 files changed, 32 insertions(+), 38 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> index b0c80dffd8b8..999440c7b258 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> @@ -32,60 +32,70 @@
>  static const struct rcar_du_format_info rcar_du_format_infos[] = {
>  	{
>  		.fourcc = DRM_FORMAT_RGB565,
> +		.v4l2 = V4L2_PIX_FMT_RGB565,
>  		.bpp = 16,
>  		.planes = 1,
>  		.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
>  		.edf = PnDDCR4_EDF_NONE,
>  	}, {
>  		.fourcc = DRM_FORMAT_ARGB1555,
> +		.v4l2 = V4L2_PIX_FMT_ARGB555,
>  		.bpp = 16,
>  		.planes = 1,
>  		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
>  		.edf = PnDDCR4_EDF_NONE,
>  	}, {
>  		.fourcc = DRM_FORMAT_XRGB1555,
> +		.v4l2 = V4L2_PIX_FMT_XRGB555,
>  		.bpp = 16,
>  		.planes = 1,
>  		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
>  		.edf = PnDDCR4_EDF_NONE,
>  	}, {
>  		.fourcc = DRM_FORMAT_XRGB8888,
> +		.v4l2 = V4L2_PIX_FMT_XBGR32,
>  		.bpp = 32,
>  		.planes = 1,
>  		.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
>  		.edf = PnDDCR4_EDF_RGB888,
>  	}, {
>  		.fourcc = DRM_FORMAT_ARGB8888,
> +		.v4l2 = V4L2_PIX_FMT_ABGR32,
>  		.bpp = 32,
>  		.planes = 1,
>  		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
>  		.edf = PnDDCR4_EDF_ARGB8888,
>  	}, {
>  		.fourcc = DRM_FORMAT_UYVY,
> +		.v4l2 = V4L2_PIX_FMT_UYVY,
>  		.bpp = 16,
>  		.planes = 1,
>  		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
>  		.edf = PnDDCR4_EDF_NONE,
>  	}, {
>  		.fourcc = DRM_FORMAT_YUYV,
> +		.v4l2 = V4L2_PIX_FMT_YUYV,
>  		.bpp = 16,
>  		.planes = 1,
>  		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
>  		.edf = PnDDCR4_EDF_NONE,
>  	}, {
>  		.fourcc = DRM_FORMAT_NV12,
> +		.v4l2 = V4L2_PIX_FMT_NV12M,
>  		.bpp = 12,
>  		.planes = 2,
>  		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
>  		.edf = PnDDCR4_EDF_NONE,
>  	}, {
>  		.fourcc = DRM_FORMAT_NV21,
> +		.v4l2 = V4L2_PIX_FMT_NV21M,
>  		.bpp = 12,
>  		.planes = 2,
>  		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
>  		.edf = PnDDCR4_EDF_NONE,
>  	}, {
>  		.fourcc = DRM_FORMAT_NV16,
> +		.v4l2 = V4L2_PIX_FMT_NV16M,
>  		.bpp = 16,
>  		.planes = 2,
>  		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
> @@ -97,62 +107,77 @@ static const struct rcar_du_format_info rcar_du_format_infos[] = {
>  	 */
>  	{
>  		.fourcc = DRM_FORMAT_RGB332,
> +		.v4l2 = V4L2_PIX_FMT_RGB332,
>  		.bpp = 8,
>  		.planes = 1,
>  	}, {
>  		.fourcc = DRM_FORMAT_ARGB4444,
> +		.v4l2 = V4L2_PIX_FMT_ARGB444,
>  		.bpp = 16,
>  		.planes = 1,
>  	}, {
>  		.fourcc = DRM_FORMAT_XRGB4444,
> +		.v4l2 = V4L2_PIX_FMT_XRGB444,
>  		.bpp = 16,
>  		.planes = 1,
>  	}, {
>  		.fourcc = DRM_FORMAT_BGR888,
> +		.v4l2 = V4L2_PIX_FMT_RGB24,
>  		.bpp = 24,
>  		.planes = 1,
>  	}, {
>  		.fourcc = DRM_FORMAT_RGB888,
> +		.v4l2 = V4L2_PIX_FMT_BGR24,
>  		.bpp = 24,
>  		.planes = 1,
>  	}, {
>  		.fourcc = DRM_FORMAT_BGRA8888,
> +		.v4l2 = V4L2_PIX_FMT_ARGB32,
>  		.bpp = 32,
>  		.planes = 1,
>  	}, {
>  		.fourcc = DRM_FORMAT_BGRX8888,
> +		.v4l2 = V4L2_PIX_FMT_XRGB32,
>  		.bpp = 32,
>  		.planes = 1,
>  	}, {
>  		.fourcc = DRM_FORMAT_YVYU,
> +		.v4l2 = V4L2_PIX_FMT_YVYU,
>  		.bpp = 16,
>  		.planes = 1,
>  	}, {
>  		.fourcc = DRM_FORMAT_NV61,
> +		.v4l2 = V4L2_PIX_FMT_NV61M,
>  		.bpp = 16,
>  		.planes = 2,
>  	}, {
>  		.fourcc = DRM_FORMAT_YUV420,
> +		.v4l2 = V4L2_PIX_FMT_YUV420M,
>  		.bpp = 12,
>  		.planes = 3,
>  	}, {
>  		.fourcc = DRM_FORMAT_YVU420,
> +		.v4l2 = V4L2_PIX_FMT_YVU420M,
>  		.bpp = 12,
>  		.planes = 3,
>  	}, {
>  		.fourcc = DRM_FORMAT_YUV422,
> +		.v4l2 = V4L2_PIX_FMT_YUV422M,
>  		.bpp = 16,
>  		.planes = 3,
>  	}, {
>  		.fourcc = DRM_FORMAT_YVU422,
> +		.v4l2 = V4L2_PIX_FMT_YVU422M,
>  		.bpp = 16,
>  		.planes = 3,
>  	}, {
>  		.fourcc = DRM_FORMAT_YUV444,
> +		.v4l2 = V4L2_PIX_FMT_YUV444M,
>  		.bpp = 24,
>  		.planes = 3,
>  	}, {
>  		.fourcc = DRM_FORMAT_YVU444,
> +		.v4l2 = V4L2_PIX_FMT_YVU444M,
>  		.bpp = 24,
>  		.planes = 3,

Phew, that was a chore.. But they all match up to their respective
comparisons from the two original tables.

These 'name' inversions are fun:
 DRM_FORMAT_BGR888,	 V4L2_PIX_FMT_RGB24,
 DRM_FORMAT_RGB888,	 V4L2_PIX_FMT_BGR24,
 DRM_FORMAT_BGRA8888,	 V4L2_PIX_FMT_ARGB32,
 DRM_FORMAT_BGRX8888,	 V4L2_PIX_FMT_XRGB32,
 DRM_FORMAT_ARGB8888,	 V4L2_PIX_FMT_ABGR32,
 DRM_FORMAT_XRGB8888,	 V4L2_PIX_FMT_XBGR32,

But they all check out.

>  	},
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.h b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
> index e171527abdaa..0346504d8c59 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.h
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
> @@ -19,6 +19,7 @@ struct rcar_du_device;
>  
>  struct rcar_du_format_info {
>  	u32 fourcc;
> +	u32 v4l2;
>  	unsigned int bpp;
>  	unsigned int planes;
>  	unsigned int pnmr;
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
> index 28bfeb8c24fb..29a08f7b0761 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
> @@ -109,8 +109,7 @@ void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc)
>  	vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
>  }
>  
> -/* Keep the two tables in sync. */
> -static const u32 formats_kms[] = {
> +static const u32 rcar_du_vsp_formats[] = {
>  	DRM_FORMAT_RGB332,
>  	DRM_FORMAT_ARGB4444,
>  	DRM_FORMAT_XRGB4444,
> @@ -138,40 +137,13 @@ static const u32 formats_kms[] = {
>  	DRM_FORMAT_YVU444,
>  };
>  
> -static const u32 formats_v4l2[] = {
> -	V4L2_PIX_FMT_RGB332,
> -	V4L2_PIX_FMT_ARGB444,
> -	V4L2_PIX_FMT_XRGB444,
> -	V4L2_PIX_FMT_ARGB555,
> -	V4L2_PIX_FMT_XRGB555,
> -	V4L2_PIX_FMT_RGB565,
> -	V4L2_PIX_FMT_RGB24,
> -	V4L2_PIX_FMT_BGR24,
> -	V4L2_PIX_FMT_ARGB32,
> -	V4L2_PIX_FMT_XRGB32,
> -	V4L2_PIX_FMT_ABGR32,
> -	V4L2_PIX_FMT_XBGR32,
> -	V4L2_PIX_FMT_UYVY,
> -	V4L2_PIX_FMT_YUYV,
> -	V4L2_PIX_FMT_YVYU,
> -	V4L2_PIX_FMT_NV12M,
> -	V4L2_PIX_FMT_NV21M,
> -	V4L2_PIX_FMT_NV16M,
> -	V4L2_PIX_FMT_NV61M,
> -	V4L2_PIX_FMT_YUV420M,
> -	V4L2_PIX_FMT_YVU420M,
> -	V4L2_PIX_FMT_YUV422M,
> -	V4L2_PIX_FMT_YVU422M,
> -	V4L2_PIX_FMT_YUV444M,
> -	V4L2_PIX_FMT_YVU444M,
> -};
> -
>  static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
>  {
>  	struct rcar_du_vsp_plane_state *state =
>  		to_rcar_vsp_plane_state(plane->plane.state);
>  	struct rcar_du_crtc *crtc = to_rcar_crtc(state->state.crtc);
>  	struct drm_framebuffer *fb = plane->plane.state->fb;
> +	const struct rcar_du_format_info *format;
>  	struct vsp1_du_atomic_config cfg = {
>  		.pixelformat = 0,
>  		.pitch = fb->pitches[0],
> @@ -194,12 +166,8 @@ static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
>  		cfg.mem[i] = sg_dma_address(state->sg_tables[i].sgl)
>  			   + fb->offsets[i];
>  
> -	for (i = 0; i < ARRAY_SIZE(formats_kms); ++i) {
> -		if (formats_kms[i] == state->format->fourcc) {
> -			cfg.pixelformat = formats_v4l2[i];
> -			break;
> -		}
> -	}
> +	format = rcar_du_format_info(state->format->fourcc);
> +	cfg.pixelformat = format->v4l2;
>  
>  	vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe,
>  			      plane->index, &cfg);
> @@ -394,8 +362,8 @@ int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
>  
>  		ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs,
>  					       &rcar_du_vsp_plane_funcs,
> -					       formats_kms,
> -					       ARRAY_SIZE(formats_kms),
> +					       rcar_du_vsp_formats,
> +					       ARRAY_SIZE(rcar_du_vsp_formats),
>  					       NULL, type, NULL);
>  		if (ret < 0)
>  			return ret;
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index b0c80dffd8b8..999440c7b258 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -32,60 +32,70 @@ 
 static const struct rcar_du_format_info rcar_du_format_infos[] = {
 	{
 		.fourcc = DRM_FORMAT_RGB565,
+		.v4l2 = V4L2_PIX_FMT_RGB565,
 		.bpp = 16,
 		.planes = 1,
 		.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
 		.edf = PnDDCR4_EDF_NONE,
 	}, {
 		.fourcc = DRM_FORMAT_ARGB1555,
+		.v4l2 = V4L2_PIX_FMT_ARGB555,
 		.bpp = 16,
 		.planes = 1,
 		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
 		.edf = PnDDCR4_EDF_NONE,
 	}, {
 		.fourcc = DRM_FORMAT_XRGB1555,
+		.v4l2 = V4L2_PIX_FMT_XRGB555,
 		.bpp = 16,
 		.planes = 1,
 		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
 		.edf = PnDDCR4_EDF_NONE,
 	}, {
 		.fourcc = DRM_FORMAT_XRGB8888,
+		.v4l2 = V4L2_PIX_FMT_XBGR32,
 		.bpp = 32,
 		.planes = 1,
 		.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
 		.edf = PnDDCR4_EDF_RGB888,
 	}, {
 		.fourcc = DRM_FORMAT_ARGB8888,
+		.v4l2 = V4L2_PIX_FMT_ABGR32,
 		.bpp = 32,
 		.planes = 1,
 		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
 		.edf = PnDDCR4_EDF_ARGB8888,
 	}, {
 		.fourcc = DRM_FORMAT_UYVY,
+		.v4l2 = V4L2_PIX_FMT_UYVY,
 		.bpp = 16,
 		.planes = 1,
 		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
 		.edf = PnDDCR4_EDF_NONE,
 	}, {
 		.fourcc = DRM_FORMAT_YUYV,
+		.v4l2 = V4L2_PIX_FMT_YUYV,
 		.bpp = 16,
 		.planes = 1,
 		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
 		.edf = PnDDCR4_EDF_NONE,
 	}, {
 		.fourcc = DRM_FORMAT_NV12,
+		.v4l2 = V4L2_PIX_FMT_NV12M,
 		.bpp = 12,
 		.planes = 2,
 		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
 		.edf = PnDDCR4_EDF_NONE,
 	}, {
 		.fourcc = DRM_FORMAT_NV21,
+		.v4l2 = V4L2_PIX_FMT_NV21M,
 		.bpp = 12,
 		.planes = 2,
 		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
 		.edf = PnDDCR4_EDF_NONE,
 	}, {
 		.fourcc = DRM_FORMAT_NV16,
+		.v4l2 = V4L2_PIX_FMT_NV16M,
 		.bpp = 16,
 		.planes = 2,
 		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
@@ -97,62 +107,77 @@  static const struct rcar_du_format_info rcar_du_format_infos[] = {
 	 */
 	{
 		.fourcc = DRM_FORMAT_RGB332,
+		.v4l2 = V4L2_PIX_FMT_RGB332,
 		.bpp = 8,
 		.planes = 1,
 	}, {
 		.fourcc = DRM_FORMAT_ARGB4444,
+		.v4l2 = V4L2_PIX_FMT_ARGB444,
 		.bpp = 16,
 		.planes = 1,
 	}, {
 		.fourcc = DRM_FORMAT_XRGB4444,
+		.v4l2 = V4L2_PIX_FMT_XRGB444,
 		.bpp = 16,
 		.planes = 1,
 	}, {
 		.fourcc = DRM_FORMAT_BGR888,
+		.v4l2 = V4L2_PIX_FMT_RGB24,
 		.bpp = 24,
 		.planes = 1,
 	}, {
 		.fourcc = DRM_FORMAT_RGB888,
+		.v4l2 = V4L2_PIX_FMT_BGR24,
 		.bpp = 24,
 		.planes = 1,
 	}, {
 		.fourcc = DRM_FORMAT_BGRA8888,
+		.v4l2 = V4L2_PIX_FMT_ARGB32,
 		.bpp = 32,
 		.planes = 1,
 	}, {
 		.fourcc = DRM_FORMAT_BGRX8888,
+		.v4l2 = V4L2_PIX_FMT_XRGB32,
 		.bpp = 32,
 		.planes = 1,
 	}, {
 		.fourcc = DRM_FORMAT_YVYU,
+		.v4l2 = V4L2_PIX_FMT_YVYU,
 		.bpp = 16,
 		.planes = 1,
 	}, {
 		.fourcc = DRM_FORMAT_NV61,
+		.v4l2 = V4L2_PIX_FMT_NV61M,
 		.bpp = 16,
 		.planes = 2,
 	}, {
 		.fourcc = DRM_FORMAT_YUV420,
+		.v4l2 = V4L2_PIX_FMT_YUV420M,
 		.bpp = 12,
 		.planes = 3,
 	}, {
 		.fourcc = DRM_FORMAT_YVU420,
+		.v4l2 = V4L2_PIX_FMT_YVU420M,
 		.bpp = 12,
 		.planes = 3,
 	}, {
 		.fourcc = DRM_FORMAT_YUV422,
+		.v4l2 = V4L2_PIX_FMT_YUV422M,
 		.bpp = 16,
 		.planes = 3,
 	}, {
 		.fourcc = DRM_FORMAT_YVU422,
+		.v4l2 = V4L2_PIX_FMT_YVU422M,
 		.bpp = 16,
 		.planes = 3,
 	}, {
 		.fourcc = DRM_FORMAT_YUV444,
+		.v4l2 = V4L2_PIX_FMT_YUV444M,
 		.bpp = 24,
 		.planes = 3,
 	}, {
 		.fourcc = DRM_FORMAT_YVU444,
+		.v4l2 = V4L2_PIX_FMT_YVU444M,
 		.bpp = 24,
 		.planes = 3,
 	},
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.h b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
index e171527abdaa..0346504d8c59 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
@@ -19,6 +19,7 @@  struct rcar_du_device;
 
 struct rcar_du_format_info {
 	u32 fourcc;
+	u32 v4l2;
 	unsigned int bpp;
 	unsigned int planes;
 	unsigned int pnmr;
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index 28bfeb8c24fb..29a08f7b0761 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -109,8 +109,7 @@  void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc)
 	vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
 }
 
-/* Keep the two tables in sync. */
-static const u32 formats_kms[] = {
+static const u32 rcar_du_vsp_formats[] = {
 	DRM_FORMAT_RGB332,
 	DRM_FORMAT_ARGB4444,
 	DRM_FORMAT_XRGB4444,
@@ -138,40 +137,13 @@  static const u32 formats_kms[] = {
 	DRM_FORMAT_YVU444,
 };
 
-static const u32 formats_v4l2[] = {
-	V4L2_PIX_FMT_RGB332,
-	V4L2_PIX_FMT_ARGB444,
-	V4L2_PIX_FMT_XRGB444,
-	V4L2_PIX_FMT_ARGB555,
-	V4L2_PIX_FMT_XRGB555,
-	V4L2_PIX_FMT_RGB565,
-	V4L2_PIX_FMT_RGB24,
-	V4L2_PIX_FMT_BGR24,
-	V4L2_PIX_FMT_ARGB32,
-	V4L2_PIX_FMT_XRGB32,
-	V4L2_PIX_FMT_ABGR32,
-	V4L2_PIX_FMT_XBGR32,
-	V4L2_PIX_FMT_UYVY,
-	V4L2_PIX_FMT_YUYV,
-	V4L2_PIX_FMT_YVYU,
-	V4L2_PIX_FMT_NV12M,
-	V4L2_PIX_FMT_NV21M,
-	V4L2_PIX_FMT_NV16M,
-	V4L2_PIX_FMT_NV61M,
-	V4L2_PIX_FMT_YUV420M,
-	V4L2_PIX_FMT_YVU420M,
-	V4L2_PIX_FMT_YUV422M,
-	V4L2_PIX_FMT_YVU422M,
-	V4L2_PIX_FMT_YUV444M,
-	V4L2_PIX_FMT_YVU444M,
-};
-
 static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
 {
 	struct rcar_du_vsp_plane_state *state =
 		to_rcar_vsp_plane_state(plane->plane.state);
 	struct rcar_du_crtc *crtc = to_rcar_crtc(state->state.crtc);
 	struct drm_framebuffer *fb = plane->plane.state->fb;
+	const struct rcar_du_format_info *format;
 	struct vsp1_du_atomic_config cfg = {
 		.pixelformat = 0,
 		.pitch = fb->pitches[0],
@@ -194,12 +166,8 @@  static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
 		cfg.mem[i] = sg_dma_address(state->sg_tables[i].sgl)
 			   + fb->offsets[i];
 
-	for (i = 0; i < ARRAY_SIZE(formats_kms); ++i) {
-		if (formats_kms[i] == state->format->fourcc) {
-			cfg.pixelformat = formats_v4l2[i];
-			break;
-		}
-	}
+	format = rcar_du_format_info(state->format->fourcc);
+	cfg.pixelformat = format->v4l2;
 
 	vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe,
 			      plane->index, &cfg);
@@ -394,8 +362,8 @@  int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
 
 		ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs,
 					       &rcar_du_vsp_plane_funcs,
-					       formats_kms,
-					       ARRAY_SIZE(formats_kms),
+					       rcar_du_vsp_formats,
+					       ARRAY_SIZE(rcar_du_vsp_formats),
 					       NULL, type, NULL);
 		if (ret < 0)
 			return ret;