| Message ID | 1557882259-3353-3-git-send-email-Anson.Huang@nxp.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | [1/3] dt-bindings: clock: imx8mq: Add SNVS clock | expand |
On Wed, May 15, 2019 at 01:09:36AM +0000, Anson Huang wrote: > i.MX8MQ has clock gate for SNVS module, add clock info to SNVS > RTC node for clock management. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> This one still has problem with encoding and thus cannot be applied. Here is what I get, and there is '=20' in the patch content. diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dt= s/freescale/imx8mq.dtsi index e5f3133..b706de8 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -438,6 +438,8 @@ offset =3D <0x34>; interrupts =3D <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + clocks =3D <&clk IMX8MQ_CLK_SNVS_ROOT>; + clock-names =3D "snvs-rtc"; }; }; =20 --=20 2.7.4
Hi, Shawn > -----Original Message----- > From: Shawn Guo [mailto:shawnguo@kernel.org] > Sent: Thursday, May 23, 2019 9:03 AM > To: Anson Huang <anson.huang@nxp.com> > Cc: robh+dt@kernel.org; mark.rutland@arm.com; s.hauer@pengutronix.de; > kernel@pengutronix.de; festevam@gmail.com; mturquette@baylibre.com; > sboyd@kernel.org; l.stach@pengutronix.de; Abel Vesa > <abel.vesa@nxp.com>; andrew.smirnov@gmail.com; ccaione@baylibre.com; > angus@akkea.ca; agx@sigxcpu.org; devicetree@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux- > clk@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com> > Subject: Re: [PATCH 3/3] arm64: dts: imx8mq: add clock for SNVS RTC node > > On Wed, May 15, 2019 at 01:09:36AM +0000, Anson Huang wrote: > > i.MX8MQ has clock gate for SNVS module, add clock info to SNVS RTC > > node for clock management. > > > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > > This one still has problem with encoding and thus cannot be applied. > Here is what I get, and there is '=20' in the patch content. We switch to another server which has no such issue, I resent the patch, Please pick up this one, sorry for the inconvenience. https://patchwork.kernel.org/patch/10959097/ thanks, Anson. > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > b/arch/arm64/boot/dt= s/freescale/imx8mq.dtsi index e5f3133..b706de8 > 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -438,6 +438,8 @@ > offset =3D <0x34>; > interrupts =3D <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; > + clocks =3D <&clk IMX8MQ_CLK_SNVS_ROOT>; > + clock-names =3D "snvs-rtc"; > }; > }; > =20 > --=20 > 2.7.4
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index e5f3133..b706de8 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -438,6 +438,8 @@ offset = <0x34>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MQ_CLK_SNVS_ROOT>; + clock-names = "snvs-rtc"; }; };
i.MX8MQ has clock gate for SNVS module, add clock info to SNVS RTC node for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 ++ 1 file changed, 2 insertions(+)