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[00/15] KVM: nVMX: Optimize nested VM-Entry

Message ID 20190507160640.4812-1-sean.j.christopherson@intel.com (mailing list archive)
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Series KVM: nVMX: Optimize nested VM-Entry | expand

Message

Sean Christopherson May 7, 2019, 4:06 p.m. UTC
The majority of patches in this series are loosely related optimizations
to pick off low(ish) hanging fruit in nested VM-Entry, e.g. there are
many VMREADs and VMWRITEs that can be optimized away without too much
effort.

The major change (in terms of performance) is to not "put" the vCPU
state when switching between vmcs01 and vmcs02, which can reudce the
latency of a nested VM-Entry by upwards of 1000 cycles.

A few bug fixes are prepended as they touch code that happens to be
modified by the various optimizations.

Sean Christopherson (15):
  KVM: nVMX: Don't dump VMCS if virtual APIC page can't be mapped
  KVM: VMX: Always signal #GP on WRMSR to MSR_IA32_CR_PAT with bad value
  KVM: nVMX: Always sync GUEST_BNDCFGS when it comes from vmcs01
  KVM: nVMX: Write ENCLS-exiting bitmap once per vmcs02
  KVM: nVMX: Don't rewrite GUEST_PML_INDEX during nested VM-Entry
  KVM: nVMX: Don't "put" vCPU or host state when switching VMCS
  KVM: nVMX: Don't reread VMCS-agnostic state when switching VMCS
  KVM: nVMX: Don't speculatively write virtual-APIC page address
  KVM: nVMX: Don't speculatively write APIC-access page address
  KVM: nVMX: Update vmcs12 for MSR_IA32_CR_PAT when it's written
  KVM: nVMX: Update vmcs12 for SYSENTER MSRs when they're written
  KVM: nVMX: Update vmcs12 for MSR_IA32_DEBUGCTLMSR when it's written
  KVM: nVMX: Update vmcs02 GUEST_IA32_DEBUGCTL only when vmcs12 is dirty
  KVM: nVMX: Don't update GUEST_BNDCFGS if it's clean in HV eVMCS
  KVM: nVMX: Copy PDPTRs to/from vmcs12 only when necessary

 arch/x86/kvm/vmx/nested.c | 142 +++++++++++++++++++-------------------
 arch/x86/kvm/vmx/vmx.c    |  93 +++++++++++++++++--------
 arch/x86/kvm/vmx/vmx.h    |   5 +-
 3 files changed, 136 insertions(+), 104 deletions(-)

Comments

Paolo Bonzini June 6, 2019, 4:54 p.m. UTC | #1
On 07/05/19 18:06, Sean Christopherson wrote:
> The majority of patches in this series are loosely related optimizations
> to pick off low(ish) hanging fruit in nested VM-Entry, e.g. there are
> many VMREADs and VMWRITEs that can be optimized away without too much
> effort.
> 
> The major change (in terms of performance) is to not "put" the vCPU
> state when switching between vmcs01 and vmcs02, which can reudce the
> latency of a nested VM-Entry by upwards of 1000 cycles.
> 
> A few bug fixes are prepended as they touch code that happens to be
> modified by the various optimizations.

I've queued the patches locally, but it will be a few days before I can
give them adequate testing so I have not yet pushed them to kvm/queue.

Paolo