| Message ID | 20190602080500.31700-1-paul.walmsley@sifive.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | arch: riscv: add board and SoC DT file support | expand |
On Sun 02 Jun 2019 at 01:04, Paul Walmsley <paul.walmsley@sifive.com> wrote: > Add support for building flattened DT files from DT source files under > arch/riscv/boot/dts. Follow existing kernel precedent from other SoC > architectures. Start our board support by adding initial support for > the SiFive FU540 SoC and the first development board that uses it, the > SiFive HiFive Unleashed A00. > > This third version of the patch set adds I2C data for the chip, > incorporates all remaining changes that riscv-pk was making > automatically, and addresses a comment from Rob Herring > <robh@kernel.org>. > > Boot-tested on v5.2-rc1 on a HiFive Unleashed A00 board, using the > BBL and open-source FSBL, with modifications to pass in the DTB > file generated by these patches. > > This patch series can be found, along with the PRCI patch set > and the DT macro prerequisite patch, at: > > https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.2-rc1 > > > - Paul > Tested patch 1, 4 and 5 using FSBL + OpenSBI + U-Boot on HiFive Unleashed. Tested-by: Loys Ollivier <lollivier@baylibre.com> > > Paul Walmsley (5): > arch: riscv: add support for building DTB files from DT source data > dt-bindings: riscv: sifive: add YAML documentation for the SiFive > FU540 > dt-bindings: riscv: convert cpu binding to json-schema > riscv: dts: add initial support for the SiFive FU540-C000 SoC > riscv: dts: add initial board data for the SiFive HiFive Unleashed > > .../devicetree/bindings/riscv/cpus.yaml | 168 ++++++++++++++ > .../devicetree/bindings/riscv/sifive.yaml | 25 ++ > MAINTAINERS | 9 + > arch/riscv/boot/dts/Makefile | 2 + > arch/riscv/boot/dts/sifive/Makefile | 2 + > arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 215 ++++++++++++++++++ > .../boot/dts/sifive/hifive-unleashed-a00.dts | 67 ++++++ > 7 files changed, 488 insertions(+) > create mode 100644 Documentation/devicetree/bindings/riscv/cpus.yaml > create mode 100644 Documentation/devicetree/bindings/riscv/sifive.yaml > create mode 100644 arch/riscv/boot/dts/Makefile > create mode 100644 arch/riscv/boot/dts/sifive/Makefile > create mode 100644 arch/riscv/boot/dts/sifive/fu540-c000.dtsi > create mode 100644 arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts Note: the -fu540 was dropped from the previous version which results in a different dtb file. Loys
Hi Paul, Paul Walmsley <paul.walmsley@sifive.com> writes: > Add support for building flattened DT files from DT source files under > arch/riscv/boot/dts. Follow existing kernel precedent from other SoC > architectures. Start our board support by adding initial support for > the SiFive FU540 SoC and the first development board that uses it, the > SiFive HiFive Unleashed A00. > > This third version of the patch set adds I2C data for the chip, > incorporates all remaining changes that riscv-pk was making > automatically, and addresses a comment from Rob Herring > <robh@kernel.org>. > > Boot-tested on v5.2-rc1 on a HiFive Unleashed A00 board, using the > BBL and open-source FSBL, with modifications to pass in the DTB > file generated by these patches. Tested this series on top of v5.2-rc3 on HiFive Unleashed board using OpenSBI + mainline u-boot (master branch as of today). Tested-by: Kevin Hilman <khilman@baylibre.com> > This patch series can be found, along with the PRCI patch set > and the DT macro prerequisite patch, at: > > https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.2-rc1 nit: I only see this series in that branch, not any of the prerequisite patches you mentioned, which made me assume I could this series alone on top of v5.2-rc3, which worked just fine. Kevin
On 6/5/19 10:37 AM, Kevin Hilman wrote: > Hi Paul, > > Paul Walmsley <paul.walmsley@sifive.com> writes: > >> Add support for building flattened DT files from DT source files under >> arch/riscv/boot/dts. Follow existing kernel precedent from other SoC >> architectures. Start our board support by adding initial support for >> the SiFive FU540 SoC and the first development board that uses it, the >> SiFive HiFive Unleashed A00. >> >> This third version of the patch set adds I2C data for the chip, >> incorporates all remaining changes that riscv-pk was making >> automatically, and addresses a comment from Rob Herring >> <robh@kernel.org>. >> >> Boot-tested on v5.2-rc1 on a HiFive Unleashed A00 board, using the >> BBL and open-source FSBL, with modifications to pass in the DTB >> file generated by these patches. > > Tested this series on top of v5.2-rc3 on HiFive Unleashed board using > OpenSBI + mainline u-boot (master branch as of today). > > Tested-by: Kevin Hilman <khilman@baylibre.com> > >> This patch series can be found, along with the PRCI patch set >> and the DT macro prerequisite patch, at: >> >> https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.2-rc1 > > nit: I only see this series in that branch, not any of the prerequisite > patches you mentioned, which made me assume I could this series alone on > top of v5.2-rc3, which worked just fine. > I tried only this series on top of v5.2-rc3. Kernel boots file with DT updated via U-Boot. But networking didn't come up. Do you have networking up after the boot? If yes, can you please share the config. > Kevin > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv >
On Tue, 4 Jun 2019, Loys Ollivier wrote: > On Sun 02 Jun 2019 at 01:04, Paul Walmsley <paul.walmsley@sifive.com> wrote: > > > Add support for building flattened DT files from DT source files under > > arch/riscv/boot/dts. Follow existing kernel precedent from other SoC > > architectures. Start our board support by adding initial support for > > the SiFive FU540 SoC and the first development board that uses it, the > > SiFive HiFive Unleashed A00. > > > > This third version of the patch set adds I2C data for the chip, > > incorporates all remaining changes that riscv-pk was making > > automatically, and addresses a comment from Rob Herring > > <robh@kernel.org>. > > > > Boot-tested on v5.2-rc1 on a HiFive Unleashed A00 board, using the > > BBL and open-source FSBL, with modifications to pass in the DTB > > file generated by these patches. > > > > This patch series can be found, along with the PRCI patch set > > and the DT macro prerequisite patch, at: > > > > https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.2-rc1 > > Tested patch 1, 4 and 5 using FSBL + OpenSBI + U-Boot on HiFive Unleashed. > Tested-by: Loys Ollivier <lollivier@baylibre.com> Thanks very much for your testing! - Paul
Hi Kevin, On Wed, 5 Jun 2019, Kevin Hilman wrote: > Paul Walmsley <paul.walmsley@sifive.com> writes: > > > Add support for building flattened DT files from DT source files under > > arch/riscv/boot/dts. Follow existing kernel precedent from other SoC > > architectures. Start our board support by adding initial support for > > the SiFive FU540 SoC and the first development board that uses it, the > > SiFive HiFive Unleashed A00. > > Tested this series on top of v5.2-rc3 on HiFive Unleashed board using > OpenSBI + mainline u-boot (master branch as of today). > > Tested-by: Kevin Hilman <khilman@baylibre.com> Thanks very much! > > This patch series can be found, along with the PRCI patch set > > and the DT macro prerequisite patch, at: > > > > https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.2-rc1 > > nit: I only see this series in that branch, not any of the prerequisite > patches you mentioned, which made me assume I could this series alone on > top of v5.2-rc3, which worked just fine. Yep, just forgot to drop that part of the sentence from the series description. Those prerequisite patches were already merged. - Paul
Atish Patra <atish.patra@wdc.com> writes: > On 6/5/19 10:37 AM, Kevin Hilman wrote: >> Hi Paul, >> >> Paul Walmsley <paul.walmsley@sifive.com> writes: >> >>> Add support for building flattened DT files from DT source files under >>> arch/riscv/boot/dts. Follow existing kernel precedent from other SoC >>> architectures. Start our board support by adding initial support for >>> the SiFive FU540 SoC and the first development board that uses it, the >>> SiFive HiFive Unleashed A00. >>> >>> This third version of the patch set adds I2C data for the chip, >>> incorporates all remaining changes that riscv-pk was making >>> automatically, and addresses a comment from Rob Herring >>> <robh@kernel.org>. >>> >>> Boot-tested on v5.2-rc1 on a HiFive Unleashed A00 board, using the >>> BBL and open-source FSBL, with modifications to pass in the DTB >>> file generated by these patches. >> >> Tested this series on top of v5.2-rc3 on HiFive Unleashed board using >> OpenSBI + mainline u-boot (master branch as of today). >> >> Tested-by: Kevin Hilman <khilman@baylibre.com> >> >>> This patch series can be found, along with the PRCI patch set >>> and the DT macro prerequisite patch, at: >>> >>> https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.2-rc1 >> >> nit: I only see this series in that branch, not any of the prerequisite >> patches you mentioned, which made me assume I could this series alone on >> top of v5.2-rc3, which worked just fine. >> > > I tried only this series on top of v5.2-rc3. Kernel boots file with DT > updated via U-Boot. But networking didn't come up. > > Do you have networking up after the boot? If yes, can you please share > the config. I didn't test networking from the kernel initially, but looking now, I do not have networking come up in the kernel either. Kevin
On 6/7/19 9:52 AM, Kevin Hilman wrote: > Atish Patra <atish.patra@wdc.com> writes: > >> On 6/5/19 10:37 AM, Kevin Hilman wrote: >>> Hi Paul, >>> >>> Paul Walmsley <paul.walmsley@sifive.com> writes: >>> >>>> Add support for building flattened DT files from DT source files under >>>> arch/riscv/boot/dts. Follow existing kernel precedent from other SoC >>>> architectures. Start our board support by adding initial support for >>>> the SiFive FU540 SoC and the first development board that uses it, the >>>> SiFive HiFive Unleashed A00. >>>> >>>> This third version of the patch set adds I2C data for the chip, >>>> incorporates all remaining changes that riscv-pk was making >>>> automatically, and addresses a comment from Rob Herring >>>> <robh@kernel.org>. >>>> >>>> Boot-tested on v5.2-rc1 on a HiFive Unleashed A00 board, using the >>>> BBL and open-source FSBL, with modifications to pass in the DTB >>>> file generated by these patches. >>> >>> Tested this series on top of v5.2-rc3 on HiFive Unleashed board using >>> OpenSBI + mainline u-boot (master branch as of today). >>> >>> Tested-by: Kevin Hilman <khilman@baylibre.com> >>> >>>> This patch series can be found, along with the PRCI patch set >>>> and the DT macro prerequisite patch, at: >>>> >>>> https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.2-rc1 >>> >>> nit: I only see this series in that branch, not any of the prerequisite >>> patches you mentioned, which made me assume I could this series alone on >>> top of v5.2-rc3, which worked just fine. >>> >> >> I tried only this series on top of v5.2-rc3. Kernel boots file with DT >> updated via U-Boot. But networking didn't come up. >> >> Do you have networking up after the boot? If yes, can you please share >> the config. > > I didn't test networking from the kernel initially, but looking now, I > do not have networking come up in the kernel either. > ok. I am not alone then :). @Paul: Do you get networking up in your FSBL + BBL + Linux boot flow with the DT patch series ? > Kevin >
On Fri, 2019-06-07 at 10:58 -0700, Atish Patra wrote: > On 6/7/19 9:52 AM, Kevin Hilman wrote: > > Atish Patra <atish.patra@wdc.com> writes: > > > > > On 6/5/19 10:37 AM, Kevin Hilman wrote: > > > > Hi Paul, > > > > > > > > Paul Walmsley <paul.walmsley@sifive.com> writes: > > > > > > > > > Add support for building flattened DT files from DT source files under > > > > > arch/riscv/boot/dts. Follow existing kernel precedent from other SoC > > > > > architectures. Start our board support by adding initial support for > > > > > the SiFive FU540 SoC and the first development board that uses it, the > > > > > SiFive HiFive Unleashed A00. > > > > > > > > > > This third version of the patch set adds I2C data for the chip, > > > > > incorporates all remaining changes that riscv-pk was making > > > > > automatically, and addresses a comment from Rob Herring > > > > > <robh@kernel.org>. > > > > > > > > > > Boot-tested on v5.2-rc1 on a HiFive Unleashed A00 board, using the > > > > > BBL and open-source FSBL, with modifications to pass in the DTB > > > > > file generated by these patches. > > > > > > > > Tested this series on top of v5.2-rc3 on HiFive Unleashed board using > > > > OpenSBI + mainline u-boot (master branch as of today). > > > > > > > > Tested-by: Kevin Hilman <khilman@baylibre.com> > > > > > > > > > This patch series can be found, along with the PRCI patch set > > > > > and the DT macro prerequisite patch, at: > > > > > > > > > > https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.2-rc1 > > > > > > > > nit: I only see this series in that branch, not any of the prerequisite > > > > patches you mentioned, which made me assume I could this series alone on > > > > top of v5.2-rc3, which worked just fine. > > > > > > > > > > I tried only this series on top of v5.2-rc3. Kernel boots file with DT > > > updated via U-Boot. But networking didn't come up. > > > > > > Do you have networking up after the boot? If yes, can you please share > > > the config. > > > > I didn't test networking from the kernel initially, but looking now, I > > do not have networking come up in the kernel either. > > > > ok. I am not alone then :). > > @Paul: Do you get networking up in your FSBL + BBL + Linux boot flow > with the DT patch series ? > There does not appear to be a device tree node for the ethernet controller, which would be why networking is not coming up. U-Boot also has to be updated to match the new device bindings introduced by the ethernet controller patches currently on the mailing list [1]. Thanks, Lukas [1]: https://patchwork.kernel.org/project/linux-riscv/list/?series=121579
Add support for building flattened DT files from DT source files under arch/riscv/boot/dts. Follow existing kernel precedent from other SoC architectures. Start our board support by adding initial support for the SiFive FU540 SoC and the first development board that uses it, the SiFive HiFive Unleashed A00. This third version of the patch set adds I2C data for the chip, incorporates all remaining changes that riscv-pk was making automatically, and addresses a comment from Rob Herring <robh@kernel.org>. Boot-tested on v5.2-rc1 on a HiFive Unleashed A00 board, using the BBL and open-source FSBL, with modifications to pass in the DTB file generated by these patches. This patch series can be found, along with the PRCI patch set and the DT macro prerequisite patch, at: https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.2-rc1 - Paul Paul Walmsley (5): arch: riscv: add support for building DTB files from DT source data dt-bindings: riscv: sifive: add YAML documentation for the SiFive FU540 dt-bindings: riscv: convert cpu binding to json-schema riscv: dts: add initial support for the SiFive FU540-C000 SoC riscv: dts: add initial board data for the SiFive HiFive Unleashed .../devicetree/bindings/riscv/cpus.yaml | 168 ++++++++++++++ .../devicetree/bindings/riscv/sifive.yaml | 25 ++ MAINTAINERS | 9 + arch/riscv/boot/dts/Makefile | 2 + arch/riscv/boot/dts/sifive/Makefile | 2 + arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 215 ++++++++++++++++++ .../boot/dts/sifive/hifive-unleashed-a00.dts | 67 ++++++ 7 files changed, 488 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/cpus.yaml create mode 100644 Documentation/devicetree/bindings/riscv/sifive.yaml create mode 100644 arch/riscv/boot/dts/Makefile create mode 100644 arch/riscv/boot/dts/sifive/Makefile create mode 100644 arch/riscv/boot/dts/sifive/fu540-c000.dtsi create mode 100644 arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts