Show patches with: State = Action Required       |    Archived = No       |   29 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
riscv: Use flush_icache_mm for flush_icache_user_range riscv: Use flush_icache_mm for flush_icache_user_range - - - 0 0 0 2020-01-24 Guo Ren New
riscv: Introduce CONFIG_RELOCATABLE riscv: Introduce CONFIG_RELOCATABLE - - - 0 0 0 2020-01-23 Alexandre Ghiti New
[1/2] mm/sparsemem: Enable vmem_altmap support in vmemmap_populate_basepages() arm64: Enable vmemmap mapping from device memory 1 - - 0 0 0 2020-01-23 Anshuman Khandual New
riscv: Add gpio and pwmleds to DTS(/arch/riscv/boot/dts/sifive/) riscv: Add gpio and pwmleds to DTS(/arch/riscv/boot/dts/sifive/) - - - 0 0 0 2020-01-21 JaeJoon Jung New
[v2,1/2] asm-generic: Make dma-contiguous.h a mandatory include/asm header microblaze: Enable CMA 4 1 - 0 0 0 2020-01-17 Michal Simek New
[v4,2/2] riscv: Add support to determine no. of L2 cache way enabled cacheinfo support to read no. of L2 cache ways enabled - 1 - 0 0 0 2020-01-17 Yash Shah New
[v4,1/2] riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure cacheinfo support to read no. of L2 cache ways enabled - 1 - 0 0 0 2020-01-17 Yash Shah New
[V2,4/4] riscv: Add vector ISA support [V2,1/4] riscv: Separate patch for cflags and aflags - - - 0 0 0 2020-01-16 Guo Ren New
[V2,3/4] riscv: Extending cpufeature.c to detect V-extension [V2,1/4] riscv: Separate patch for cflags and aflags - 1 - 0 0 0 2020-01-16 Guo Ren New
[V2,2/4] riscv: Rename __switch_to_aux -> fpu [V2,1/4] riscv: Separate patch for cflags and aflags - 1 - 0 0 0 2020-01-16 Guo Ren New
[V2,1/4] riscv: Separate patch for cflags and aflags [V2,1/4] riscv: Separate patch for cflags and aflags - 1 - 0 0 0 2020-01-16 Guo Ren New
EDAC/sifive: fix return value check in ecc_register() EDAC/sifive: fix return value check in ecc_register() - - - 0 0 0 2020-01-15 Wei Yongjun New
riscv: delete temporary files riscv: delete temporary files - - - 0 0 0 2020-01-15 Ilie Halip New
[v4] riscv: make sure the cores stay looping in .Lsecondary_park [v4] riscv: make sure the cores stay looping in .Lsecondary_park - 1 - 0 0 0 2020-01-15 Greentime Hu New
[5.4,61/78] riscv: Implement copy_thread_tls Untitled series #227873 - - - 0 0 0 2020-01-14 Greg KH New
[v3,2/2] riscv: Add support to determine no. of L2 cache way enabled cacheinfo support to read no. of L2 cache ways enabled - 1 - 0 0 0 2020-01-13 Yash Shah New
[v3,1/2] riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure cacheinfo support to read no. of L2 cache ways enabled - 1 - 0 0 0 2020-01-13 Yash Shah New
[RFC,v2,4/4] riscv: Add numa support for riscv64 platform riscv: Add numa support for riscv64 platform - - - 0 0 0 2020-01-10 Greentime Hu New
[RFC,v2,3/4] riscv: Use variable this_cpu instead of smp_processor_id() riscv: Add numa support for riscv64 platform - - - 0 0 0 2020-01-10 Greentime Hu New
[RFC,v2,2/4] riscv: Move unflatten_device_tree() to paging_init() because riscv_numa_init() needs... riscv: Add numa support for riscv64 platform - - - 0 0 0 2020-01-10 Greentime Hu New
[RFC,v2,1/4] riscv: Add support pte_protnone and pmd_protnone if CONFIG_NUMA_BALANCING riscv: Add numa support for riscv64 platform - - - 0 0 0 2020-01-10 Greentime Hu New
riscv: set pmp configuration if kernel is running in M-mode riscv: set pmp configuration if kernel is running in M-mode - - - 0 0 0 2020-01-09 Greentime Hu New
[v3] riscv: make sure the cores stay looping in .Lsecondary_park [v3] riscv: make sure the cores stay looping in .Lsecondary_park - 2 - 0 0 0 2020-01-09 Greentime Hu New
riscv: move sifive_l2_cache.h to include/soc riscv: move sifive_l2_cache.h to include/soc - 2 - 0 0 0 2020-01-08 Yash Shah New
[v2] riscv: to make sure the cores in .Lsecondary_park [v2] riscv: to make sure the cores in .Lsecondary_park - 1 - 0 0 0 2020-01-08 Greentime Hu New
riscv: to make sure the cores in .Lsecondary_park riscv: to make sure the cores in .Lsecondary_park - - - 0 0 0 2020-01-07 Greentime Hu New
[v2] riscv: keep 32-bit kernel to 32-bit phys_addr_t [v2] riscv: keep 32-bit kernel to 32-bit phys_addr_t - - - 0 0 0 2020-01-06 Olof Johansson New
riscv: Delete CONFIG_SYSFS_SYSCALL from defconfigs riscv: Delete CONFIG_SYSFS_SYSCALL from defconfigs - - - 0 0 0 2020-01-05 Deepa Dinamani New
[v3] Documentation: riscv: add patch acceptance guidelines [v3] Documentation: riscv: add patch acceptance guidelines - 1 - 0 0 0 2020-01-04 Paul Walmsley New